WO2018066547A1 - Corps fritté à base d'oxyde et cible de pulvérisation - Google Patents

Corps fritté à base d'oxyde et cible de pulvérisation Download PDF

Info

Publication number
WO2018066547A1
WO2018066547A1 PCT/JP2017/035939 JP2017035939W WO2018066547A1 WO 2018066547 A1 WO2018066547 A1 WO 2018066547A1 JP 2017035939 W JP2017035939 W JP 2017035939W WO 2018066547 A1 WO2018066547 A1 WO 2018066547A1
Authority
WO
WIPO (PCT)
Prior art keywords
sintered body
thin film
less
oxide
sputtering
Prior art date
Application number
PCT/JP2017/035939
Other languages
English (en)
Japanese (ja)
Inventor
井上 一吉
雅敏 柴田
重和 笘井
Original Assignee
出光興産株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 出光興産株式会社 filed Critical 出光興産株式会社
Priority to JP2017562795A priority Critical patent/JP6326560B1/ja
Publication of WO2018066547A1 publication Critical patent/WO2018066547A1/fr

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/01Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08Oxides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • the present invention relates to an oxide sintered body and a sputtering target produced using the same.
  • Amorphous (amorphous) oxide semiconductors used for thin film transistors (TFTs) have higher carrier mobility than general-purpose amorphous silicon (a-Si), a large optical band gap, and can be formed at low temperatures. It is expected to be applied to next-generation displays that require large size, high resolution, and high-speed driving, and resin substrates with low heat resistance.
  • a sputtering method of sputtering a sputtering target is preferably used. This is because the thin film formed by the sputtering method has a component composition, film thickness, etc. in the film surface direction (in the film surface) as compared with the thin film formed by the ion plating method, vacuum evaporation method, or electron beam evaporation method. This is because the internal uniformity is excellent and a thin film having the same component composition as the sputtering target can be formed.
  • Patent Document 1 describes a method for producing a garnet compound represented by A 3 B 2 C 3 O 12 as a compound of aluminum oxide and samarium oxide.
  • Sm 3 Al 2 Al 3 O 12 compounds are exemplified.
  • Patent Document 2 describes a sputtering target containing a compound having an A 3 B 5 O 12 garnet structure obtained by sintering a raw material containing indium oxide, yttrium oxide, and aluminum oxide or gallium oxide. . Since this target includes a garnet structure, electrical resistance is reduced, abnormal discharge during sputtering is small, and there is a description regarding application to a TFT element with high mobility.
  • Patent Document 3 describes an ⁇ -Al 2 O 3 ceramic composite material containing a compound of SmAlO 3 and NdAlO 3 type perovskite structure obtained by sintering a raw material containing samarium oxide and aluminum oxide. Yes.
  • JP 2008-7340 A International Publication No. 2015/098060 Japanese Patent Laid-Open No. 9-67194
  • An object of the present invention is to provide a novel oxide sintered body and a sputtering target.
  • the present inventors have eagerly searched for a new substance based on indium oxide containing a lanthanoid metal element that can be used as a target material.
  • a novel oxide sintered body containing a perovskite phase and a bixbite phase represented by In 2 O 3 has been found.
  • the sputtering target using this oxide sintered compact had advantageous characteristics as target materials, such as high sintering density, low bulk resistance, few warpage of a target, and high bonding rate. Due to these target characteristics, abnormal discharge hardly occurs even when sputtering is performed with high power, and stable sputtering is possible. Further, the thin film obtained by sputtering this sputtering target has been found to exhibit excellent TFT performance (CVD resistance) when used in a TFT, and the present invention has been completed.
  • the following oxide sintered body, sputtering target, oxide semiconductor thin film manufacturing method, thin film transistor manufacturing method, and electronic device manufacturing method are provided.
  • the perovskite phase is a compound represented by the following general formula (I).
  • LnAlO 3 (I) (In the formula, Ln represents one or more metal elements selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu.) 3.
  • In / (In + Al + Ln) is 0.64 or more and 0.98 or less
  • Al / (In + Al + Ln) is 0.01 or more and 0.18 or less
  • Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less 5.1 to 4
  • the manufacturing method of the oxide semiconductor thin film characterized by forming into a film using the sputtering target of 6.5.
  • the manufacturing method of the thin-film transistor characterized by including the process of forming an oxide semiconductor thin film using the sputtering target of 7.5.
  • a step of forming an oxide semiconductor thin film using the sputtering target according to 8.5 The manufacturing method of the electronic device characterized by including the process of manufacturing the thin-film transistor containing the said oxide semiconductor thin film, and the process of mounting the said thin-film transistor in an electronic device.
  • Ln is one or more metal elements selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu;
  • the oxide semiconductor thin film whose atomic ratio of said In, said Al, and said Ln is the following range.
  • a thin film transistor including a semiconductor thin film is 0.64 or more and 0.98 or less Al / (In + Al + Ln) is 0.01 or more and 0.18 or less Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less 10.9
  • a thin film transistor including a semiconductor thin film is 0.64 or more and 0.98 or less
  • Al / (In + Al + Ln) is 0.01 or more and 0.18 or less
  • Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less 10.9
  • a thin film transistor including a semiconductor thin film is 0.01 or more and 0.18 or less 10.9
  • a novel oxide sintered body and sputtering target can be provided.
  • FIG. 1A is a top view of a display device including a TFT of the present invention
  • FIG. 1B is used when a liquid crystal element including the TFT of the present invention is applied to a pixel portion of the display device.
  • FIG. 1C is a circuit diagram of a pixel portion that can be used when an organic EL element including a TFT of the present invention is applied to the pixel portion of the display device. is there.
  • An example of a circuit structure of a CMOS image sensor is shown.
  • 2 is an X-ray diffraction pattern of the oxide sintered body of Example 1.
  • FIG. 2 is an X-ray diffraction pattern of an oxide sintered body of Example 2.
  • FIG. 4 is an X-ray diffraction pattern of an oxide sintered body of Example 3.
  • FIG. 1A is a top view of a display device including a TFT of the present invention
  • FIG. 1B is used when a liquid crystal element including the TFT of the present invention is applied to a
  • FIG. 4 is an X-ray diffraction pattern of an oxide sintered body of Example 4.
  • 6 is an X-ray diffraction pattern of an oxide sintered body of Example 5.
  • FIG. 7 is an X-ray diffraction pattern of an oxide sintered body of Example 7.
  • FIG. 7 is an X-ray diffraction pattern of an oxide sintered body of Example 8.
  • FIG. 10 is an X-ray diffraction pattern of an oxide sintered body of Example 9.
  • 3 is an X-ray diffraction pattern of an oxide sintered body of Example 10.
  • FIG. 3 is an X-ray diffraction pattern of an oxide sintered body of Example 11.
  • FIG. 3 is an X-ray diffraction pattern of an oxide sintered body of Example 12.
  • An oxide sintered body according to an embodiment of the present invention includes a perovskite phase and a bixbite phase represented by In 2 O 3 .
  • the perovskite phase and the bixbite phase represented by In 2 O 3 in the sintered body of the present invention can be detected from the XRD chart by, for example, the X-ray diffraction (XRD) method.
  • XRD X-ray diffraction
  • the perovskite phase in the sintered body of the present invention is preferably a compound represented by the following general formula (I).
  • LnAlO 3 (I) (In the formula, Ln represents one or more metal elements selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu.) Ln is particularly preferably one or both of Sm and Nd.
  • the compound represented by the general formula (I) has a perovskite structure, and by including this, a high-density sintered body can be obtained.
  • the perovskite compound represented by the general formula (I) may have a single crystal structure or a polycrystalline structure.
  • the sintered body of the present invention includes a perovskite phase represented by the above general formula (I) and a bixbite phase represented by In 2 O 3 , whereby a sintered density (relative density) and a volume resistivity are included. (Bulk resistance) can be improved. Also, the expansion coefficient can be reduced and the thermal conductivity can be increased. In addition, a sintered body having a low volume resistivity and a high sintering density should be used even when fired by a simple method such as in an atmosphere of oxygen using an atmosphere firing furnace or in the atmosphere. Can do.
  • the sintered body of the present invention having the above characteristics is preferable as a target material.
  • the sintered body of the present invention As a target material, the generation of stress is suppressed, the strength and thermal conductivity of the target are increased, the linear expansion coefficient is suppressed, the occurrence of microcracks and chipping of the target is suppressed, nodules and Generation of abnormal discharge can be suppressed, and a sputtering target capable of sputtering with high power can be obtained.
  • the sintered body of the present invention as a target material, it is possible to obtain a high-performance TFT with high mobility and small deterioration of semiconductor characteristics due to chemical vapor deposition (CVD) or the like.
  • a sputtering target according to an embodiment of the present invention (hereinafter referred to as a target of the present invention) is produced using the sintered body of the present invention.
  • the target of the present invention is a target material obtained by grinding the sintered body of the present invention, and this is bonded to a metal support such as a copper plate (hereinafter also referred to as a backing plate or target support) with metal indium or the like. Manufactured. The method for producing the oxide sintered body of the present invention and the target of the present invention will be described later.
  • the atomic ratio of In, Al, and Ln in the sintered body used for the target of the present invention is preferably in the following range.
  • In / (In + Al + Ln) is 0.64 or more and 0.98 or less
  • Al / (In + Al + Ln) is 0.01 or more and 0.18 or less
  • Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less
  • In / (In + Al + Ln) is 0.70 or more and 0.96 or less
  • Al / (In + Al + Ln) is 0.02 or more and 0.15 or less Ln / (In + Al + Ln) is 0.02 or more and 0.15 or less
  • In / (In + Al + Ln) is less than 0.64, the movement of the TFT including the oxide semiconductor thin film to be formed may be reduced. If it exceeds 0.98, the stability of the TFT may not be obtained, or it may be difficult to become a semiconductor by conducting it.
  • the perovskite phase represented by the general formula (I) is not formed, and the stability of the TFT may not be obtained, or it may be difficult to become conductive and become a semiconductor. Or stable sputtering may not be possible. On the other hand, if it exceeds 0.18, the movement of the TFT including the oxide semiconductor thin film to be formed may be small.
  • the perovskite phase represented by the general formula (I) may not be formed, and the stability of the TFT may not be obtained, or it may become difficult to become a semiconductor by conducting. Or stable sputtering may not be possible. On the other hand, if it exceeds 0.18, the movement of the TFT including the oxide semiconductor thin film to be formed may be small.
  • the sintered body of the present invention may further contain a positive tetravalent metal element. Thereby, sputtering can be performed more stably.
  • Examples of the positive tetravalent metal element include Sn, Ti, Zr, Hf, Ce, and Ge.
  • the sintered body of the present invention can contain one or more of these. Sn is preferred. Bulk resistance decreases due to the Sn doping effect, and sputtering can be performed more stably.
  • the positive tetravalent metal element is preferably dissolved in the bixbite phase represented by In 2 O 3 or the perovskite phase represented by the general formula (I), and the bixbite represented by In 2 O 3 More preferably, it is in solid solution in the phase.
  • the solid solution is preferably a substitutional solid solution. Thereby, sputtering can be performed more stably.
  • Ln and Al may be dissolved in a bixbite phase represented by In 2 O 3 .
  • the solid solution of the positive tetravalent metal element, Ln and Al can be identified from, for example, the lattice constant of XRD measurement.
  • the content of the positive tetravalent metal element is preferably 100 ppm or more and 10,000 ppm or less, more preferably 500 ppm or more and 8000 ppm or less, more preferably, with respect to all metal elements in the oxide sintered body of the present invention. It is 800 ppm or more and 6000 ppm or less. If it is less than 100 ppm, the bulk resistance may increase. On the other hand, if it exceeds 10,000 ppm, the TFT including the oxide semiconductor thin film to be formed may become conductive, and the on / off value may be reduced.
  • the abundance ratio of the bixbite phase represented by In 2 O 3 is preferably 1 to 99 wt%, and more preferably 10 to 98 wt%. If the abundance ratio of the bixbite phase represented by In 2 O 3 is in the above range, the perovskite phase is dispersed in the In 2 O 3 crystal, and the fluorescent material other than the target material is doped with a rare earth element. Application to the above is also conceivable.
  • the abundance ratio of the bixbite phase represented by In 2 O 3 can be measured by the method described in the examples.
  • the bixbite phase represented by In 2 O 3 is preferably the main component. If a crystal structure other than the bixbite structure is precipitated as a main component, the mobility may be lowered.
  • the bixbite phase represented by In 2 O 3 is a main component means that the existence ratio of the bixbite phase represented by In 2 O 3 is more than 50 wt%, preferably 70 wt%. As mentioned above, More preferably, it is 80 wt% or more, More preferably, it is 85 wt% or more.
  • the sintered density is preferably in the range of 6.5 to 7.1 g / cm 3 , more preferably in the range of 6.6 to 7.1 g / cm 3. preferable.
  • the sintered density is in the range of 6.5 to 7.1 g / cm 3 , voids that cause abnormal discharge and start nodules can be reduced when used as a target.
  • the sintered density can be measured by, for example, the Archimedes method.
  • the bulk resistance is preferably 50 m ⁇ ⁇ cm or less, more preferably 30 m ⁇ ⁇ cm or less, and further preferably 20 m ⁇ ⁇ cm or less.
  • the bulk resistance is preferably 50 m ⁇ ⁇ cm or less, more preferably 30 m ⁇ ⁇ cm or less, and further preferably 20 m ⁇ ⁇ cm or less.
  • it is 1 mohm * cm or more, or 5 mohm * cm or more.
  • 50 m ⁇ ⁇ cm or less during DC sputtering film formation with high power, abnormal discharge due to target charging is less likely to occur, and the plasma state is stabilized and spark is less likely to occur.
  • the bulk resistance can be measured based on, for example, a four-probe method. Specifically, it can be measured based on the four-probe method (JIS R 1637) using a known resistivity meter. There are about five measurement points, and the average value is preferably the bulk resistance value.
  • the measurement locations are preferably a total of five locations, that is, the center, four corners, and a midpoint between the centers.
  • the oxide sintered body has a total of five points: a center of a square inscribed in the circle, and four points of the four corners of the square and an intermediate point of the center.
  • the three-point bending strength is preferably 120 MPa or more, more preferably 140 MPa or more, and further preferably 150 MPa or more.
  • the pressure is less than 120 MPa, when sputtering film formation is performed with high power, the strength of the target is weak, the target is cracked or chipping occurs, and the chipped fragments may be scattered on the target and cause abnormal discharge. .
  • the three-point bending strength can be tested in accordance with, for example, JIS R 1601 “Room temperature bending strength test of fine ceramics”. Specifically, using a standard test piece having a width of 4 mm, a thickness of 3 mm, and a length of 40 mm, the test piece is placed on two fulcrums arranged at a fixed distance (30 mm), and the crosshead speed is 0 from the center between the fulcrums. The bending strength can be calculated from the maximum load when the test piece is broken by applying a load of 0.5 mm / min.
  • the linear expansion coefficient is preferably 8.0 ⁇ 10 ⁇ 6 K ⁇ 1 or less, more preferably 7.5 ⁇ 10 ⁇ 6 K ⁇ 1 or less, and 7.0 ⁇ 10 It is more preferably ⁇ 6 K ⁇ 1 or less.
  • the lower limit is not particularly limited, but is usually 5.0 ⁇ 10 ⁇ 6 K ⁇ 1 or more. If it exceeds 8.0 ⁇ 10 ⁇ 6 K ⁇ 1 , it is heated with high power during sputtering, the target expands, deformation occurs between the bonded copper plates, and microcracks are generated in the target due to stress. There is a risk of causing abnormal discharge due to cracking or chipping.
  • the linear expansion coefficient is, for example, a standard test piece having a width of 5 mm, a thickness of 5 mm, and a length of 10 mm.
  • the temperature increase rate is set to 5 ° C./min. It can be obtained by detecting with a detector.
  • the thermal conductivity is preferably 5.0 W / m ⁇ K or more, more preferably 5.5 W / m ⁇ K or more, and even more preferably 6.0 W / m ⁇ K or more. 6.5 W / m ⁇ K or more is most preferable.
  • the upper limit is not particularly limited, but is usually 10 W / m ⁇ K or less. In the case of less than 5.0 W / m ⁇ K, when sputtering film formation is performed with high power, the temperature of the sputtered surface and the bonded surface is different, and microcracks, cracks, and chipping may occur in the target due to internal stress. .
  • the thermal conductivity can be calculated by, for example, obtaining a specific heat capacity and a thermal diffusivity by a laser flash method using a standard test piece having a diameter of 10 mm and a thickness of 1 mm, and multiplying this by the density of the test piece.
  • the metal element of the sintered body of the present invention is essentially composed of In, Al, Ln, and optionally a positive tetravalent metal element, and contains other inevitable impurities as long as the effects of the present invention are not impaired. But you can. For example, 90 atomic% or more, 95 atomic% or more, 98 atomic% or more, 99 atomic% or more, or 100 atomic% of the metal element of the sintered body of the present invention is In, Al and Ln, or In, Al, Ln. And a positive tetravalent metal element.
  • the sintered body of the present invention includes a step of preparing a mixed powder of a raw material powder containing In, a raw material powder containing Al, and a raw material powder containing Ln, a step of forming a mixed powder to produce a molded body, and a molded body Can be produced by a step of baking.
  • the mixed powder may include a raw material powder containing a positive tetravalent metal element.
  • the raw material powder is preferably an oxide powder.
  • the mixing ratio of the raw material powder corresponds to, for example, the atomic ratio of the sintered body to be obtained.
  • the average particle diameter of the raw material powder is preferably 0.1 to 1.2 ⁇ m, more preferably 0.5 to 1.0 ⁇ m or less.
  • the average particle diameter of the raw material powder can be measured with a laser diffraction type particle size distribution apparatus or the like.
  • the method for mixing and forming the raw materials is not particularly limited, and can be performed using a known method.
  • a binder may be added when mixing.
  • the mixing of the raw materials can be performed using a known device such as a ball mill, a bead mill, a jet mill, or an ultrasonic device.
  • the mixing time may be appropriately adjusted, but is preferably about 6 to 100 hours.
  • the molding method may be, for example, pressing a mixed powder into a molded body. By this process, it can be formed into a product shape (for example, a shape suitable as a sputtering target).
  • the mixed powder raw material is filled in a mold, and molded by a mold press or cold isostatic press (CIP) at a pressure of 1000 kg / cm 2 or more, for example, to obtain a molded body.
  • molding aids such as polyvinyl alcohol, polyethylene glycol, methylcellulose, polywax, oleic acid, and stearic acid may be used.
  • the obtained molded body can be sintered at a sintering temperature of 1200 to 1650 ° C. for 10 hours or more, for example, to obtain a sintered body.
  • the sintering temperature is preferably 1350 to 1600 ° C, more preferably 1400 to 1600 ° C, still more preferably 1450 to 1600 ° C.
  • the sintering time is preferably 10 to 50 hours, more preferably 12 to 40 hours, still more preferably 13 to 30 hours.
  • the sintering temperature is less than 1200 ° C. or the sintering time is less than 10 hours, the sintering does not proceed sufficiently, and the electrical resistance of the target is not sufficiently lowered, which may cause abnormal discharge.
  • the firing temperature exceeds 1650 ° C. or the firing time exceeds 50 hours, the average crystal grain size increases due to remarkable crystal grain growth, and coarse pores are generated, and the sintered body strength is reduced. May cause abnormal discharge.
  • the compact is usually sintered in an air atmosphere or an oxygen gas atmosphere.
  • the oxygen gas atmosphere is preferably an atmosphere having an oxygen concentration of, for example, 10 to 50% by volume.
  • the sintered body density can be increased by performing the temperature raising process in an air atmosphere.
  • the heating rate during sintering is from 50 ° C. to 150 ° C./hour from 800 ° C. to the sintering temperature (1200 to 1650 ° C.).
  • the temperature range above 800 ° C. is the range where the sintering proceeds most.
  • the rate of temperature rise in this temperature range is slower than 50 ° C./hour, crystal grain growth becomes significant, and there is a possibility that densification cannot be achieved.
  • the rate of temperature increase is higher than 150 ° C./hour, a temperature distribution is generated in the molded body, and the sintered body may be warped or cracked.
  • the rate of temperature increase from 800 ° C. to the sintering temperature is preferably 60 to 140 ° C./hour, more preferably 70 to 130 ° C./hour.
  • the sputtering target of the present invention can be produced using the above-described sintered body of the present invention. Thereby, an oxide semiconductor thin film can be manufactured by vacuum processes, such as sputtering method.
  • the sputtering target can be produced, for example, by cutting or polishing the sintered body and bonding it to a backing plate. For example, by cutting, a sintered part in a highly oxidized state and an uneven surface on the surface of the sintered body can be removed. Also, it can be specified size.
  • the surface may be polished with # 200, # 400, or # 800. Thereby, abnormal discharge and generation of particles during sputtering can be suppressed.
  • the bonding rate is preferably 90% or more, more preferably 95% or more, and even more preferably 99% or more.
  • the bonding rate here refers to the area ratio of the surface where the target material and the target support material are bonded via the bonding layer with respect to the area of the overlapping surface of the target material and the target support.
  • the bonding rate can usually be measured with an ultrasonic flaw detector or the like.
  • a method for joining the target material and the target support will be described.
  • Surface treatment is performed on the joint surface with the target support in the target material processed into a predetermined shape.
  • a device used for the surface treatment a commercially available blasting device can be used.
  • the product name “Pneuma Blaster SGF-5-B” manufactured by Fuji Seisakusho can be mentioned.
  • Glass, alumina, zirconia, SiC, or the like can be used as the powder used in the blasting method, and these are appropriately selected according to the composition, hardness, etc. of the target material.
  • a bonding material such as metal indium solder is applied to the bonding surface.
  • a bonding material such as metal indium solder is applied to the bonding surface of the backing plate that has been subjected to a cleaning treatment if necessary.
  • a thin film layer such as copper or nickel having excellent wettability with the bonding material is previously formed on the bonding surface of the target material by a sputtering method. After forming by plating, etc., apply the bonding material by heating it above the melting point of the bonding material using the target material, or apply the bonding material directly to the bonding surface of the target material using ultrasonic waves. Also good.
  • the target support to which the bonding material is applied is heated to a temperature equal to or higher than the melting point of the used bonding material to melt the bonding material layer on the surface, and then the above-mentioned powder is placed on the surface to back the target material and the backing material. After joining the plates, the target can be obtained by cooling to room temperature.
  • the sputtering target of the present invention can be applied to a direct current (DC) sputtering method, a radio frequency (RF) sputtering method, an alternating current (AC) sputtering method, a pulsed DC sputtering method, and the like.
  • DC direct current
  • RF radio frequency
  • AC alternating current
  • DC pulsed DC
  • An oxide semiconductor thin film can be obtained by forming a film using the sputtering target of the present invention. Thereby, a thin film that exhibits excellent TFT performance when used in a TFT can be formed.
  • Film formation can be performed by a vapor deposition method, a sputtering method, an ion plating method, a pulse laser vapor deposition method, or the like.
  • Sputtering is preferably performed in an oxidizing argon atmosphere into which an oxygen atom-containing gas (oxidizing gas) such as O 2 or H 2 O is introduced. It is possible to suppress the generation of impurities that are an impediment to light transmission necessary for semiconductor characteristics and light stability obtained by performing sputtering in an oxidizing atmosphere.
  • the concentration of the oxidizing gas may be appropriately adjusted depending on the desired semiconductor characteristics of the film, particularly the carrier concentration. This adjustment can also be performed by, for example, the substrate temperature, the sputtering pressure, or the like.
  • a sputtering gas from the viewpoint of easily controlling the composition of the gas, preferably with Ar-O 2 based gas or Ar-H 2 O-based gas, more preferably at Ar-O 2 based gas control is excellent particularly .
  • Ar—O 2 -based gas a semiconductor film having semiconductor characteristics with excellent light stability can be obtained.
  • the O 2 concentration is preferably 0.2 to 50% by volume. If the O 2 concentration is less than 0.2% by volume, the resulting film may be colored yellow and the light stability may be poor. On the other hand, when the O 2 concentration is more than 50% by volume, the deposition cost of the thin film at the time of sputtering becomes slow, which may increase the production cost. Further, when the O 2 concentration is about 10% by volume, the obtained film has a carrier concentration of 10 15 to 10 18 cm ⁇ 3 by heat treatment, and can be used as an excellent semiconductor film.
  • the pressure before film formation in the sputtering apparatus (the pressure in the chamber) is preferably 10 ⁇ 6 to 10 ⁇ 3 Pa.
  • the pressure in the chamber exceeds 10 ⁇ 3 Pa, it is affected by residual moisture remaining in the vacuum, so that resistance control may be difficult.
  • the pressure in the chamber is less than 10 ⁇ 6 Pa, it takes time for evacuation, which may deteriorate productivity.
  • the current density during sputtering (the value obtained by dividing the input power by the area of the target surface) is preferably 1 to 10 W / cm 2 .
  • the current density is less than 1 W / cm 2 , the discharge may not be stable.
  • the current density exceeds 10 W / cm 2 , there is a possibility that the target may break due to the heat generated.
  • the pressure during sputtering is preferably 0.01 to 20 Pa. If the sputtering pressure is less than 0.01 Pa, the discharge may not be stable. On the other hand, when the sputtering pressure is higher than 20 Pa, the sputtering discharge may not be stable, and the sputtering gas itself may be taken into the conductive film to deteriorate the film characteristics.
  • the pressure is preferably 0.05 to 5 Pa, more preferably 0.1 to 1 Pa.
  • the substrate on which the oxide semiconductor thin film of the present invention is formed examples include glass, ceramics, plastics, and metals.
  • the substrate temperature during film formation is not particularly limited, but is preferably 300 ° C. or less from the viewpoint of easily obtaining an amorphous film.
  • the substrate temperature may be about room temperature when no intentional heating is performed. Although it can be used as a semiconductor element as an amorphous thin film, immediately after film formation, it was formed as an amorphous film, and after forming an island-shaped semiconductor portion by patterning, it was crystallized by heat treatment. Later, a source / drain electrode or the like may be connected to form a thin film semiconductor element.
  • the substrate may be post-heated (heat treatment).
  • This heat treatment is preferably performed at 150 to 400 ° C., preferably 200 to 350 ° C. in the air, nitrogen or vacuum.
  • heat treatment it is possible to prevent deterioration of the semiconductor film by crystallization, suppress changes in the carrier concentration of the semiconductor film, increase the band gap with excellent light stability, and improve the light transmittance. It becomes. Whether or not it is crystallized is determined by whether or not a peak is observed in the XRD measurement.
  • the heat treatment is less than 150 ° C., oxygen in the thin film is gradually exhausted and the semiconductor film may be deteriorated.
  • the heat treatment exceeds 350 ° C., the carrier concentration of the semiconductor film may be lowered.
  • An oxide semiconductor thin film according to an embodiment of the present invention (hereinafter referred to as an oxide semiconductor thin film of the present invention) is manufactured using the sputtering target of the present invention.
  • the oxide semiconductor thin film of the present invention contains In, Al, and Ln, and the Ln is one or more selected from La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu.
  • the atomic ratio of In, Al, and Ln is in the following range. In / (In + Al + Ln) is 0.64 or more and 0.98 or less Al / (In + Al + Ln) is 0.01 or more and 0.18 or less Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less
  • the atomic ratio of In, Al, and Ln in the oxide semiconductor thin film of the present invention is preferably in the following range.
  • In / (In + Al + Ln) is 0.64 or more and 0.98 or less
  • Al / (In + Al + Ln) is 0.01 or more and 0.18 or less
  • Ln / (In + Al + Ln) is 0.01 or more and 0.18 or less More preferably, in the following range is there.
  • In / (In + Al + Ln) is 0.70 or more and 0.96 or less Al / (In + Al + Ln) is 0.02 or more and 0.15 or less Ln / (In + Al + Ln) is 0.02 or more and 0.15 or less Atomic ratio of the oxide semiconductor thin film
  • the specific ground for the upper and lower limits in is the same as the specific ground for the upper and lower limits in the atomic ratio of the oxide sintered body of the present invention.
  • the content (atomic ratio) of each metal element in the oxide semiconductor thin film can be obtained by measuring the abundance of each element by ICP (Inductive Coupled Plasma) measurement or XRF (X-ray Fluorescence) measurement.
  • ICP Inductive Coupled Plasma
  • XRF X-ray Fluorescence
  • ICP measurement an induction plasma emission analyzer can be used.
  • XRF measurement a thin film X-ray fluorescence analyzer (AZX400, manufactured by Rigaku Corporation) can be used.
  • the content (atomic ratio) of each metal element in the oxide semiconductor thin film can be analyzed with the same accuracy as the induction plasma emission analysis even when using the sector type dynamic secondary ion mass spectrometer SIMS analysis.
  • a material in which the source and drain electrodes are formed with the same channel length as the TFT element on the upper surface of a standard oxide thin film with a known atomic ratio of metal elements measured by an induction plasma emission spectrometer or thin film fluorescent X-ray analyzer Analyze the oxide semiconductor layer by using a sector-type dynamic secondary ion mass spectrometer SIMS (IMS-7f-Auto, manufactured by AMETEK) as a standard material, obtain the mass spectrum intensity of each element, and obtain the known element concentration and mass spectrum intensity.
  • SIMS IMS-7f-Auto, manufactured by AMETEK
  • the calculated atomic ratio is Separately, it can be confirmed that it is within 2 atomic% of the atomic ratio of the oxide semiconductor film measured by the thin film fluorescent X-ray analyzer or the induction plasma emission analyzer.
  • a thin film transistor (TFT) according to an embodiment of the present invention includes the above-described oxide semiconductor thin film.
  • the oxide semiconductor thin film can be suitably used as a channel layer, for example.
  • the TFT of the present invention preferably has the following characteristics.
  • Saturation mobility of the TFT is 1.0cm 2 / V ⁇ s or more, preferably not more than 50.0cm 2 / V ⁇ s.
  • Saturation mobility of the TFT is 1.0 cm 2 / V ⁇ s or more, it is possible to drive the transfer transistor, cancel transistor, liquid crystal display, and organic EL display of the CMOS image sensor.
  • the saturation mobility of the TFT By setting the saturation mobility of the TFT to 50.0 cm 2 / V ⁇ s or less, the off current can be made 10 ⁇ 12 A or less, and the on / off ratio can be made 10 8 or more.
  • the saturation mobility of the TFT can be obtained from the transfer characteristics when a drain voltage of 20 V is applied. Specifically, a graph of the transfer characteristic Id-Vg is created, the transconductance (Gm) of each Vg is calculated, and the saturation mobility is obtained by the equation of the saturation region.
  • Id is a current between the source and drain electrodes
  • Vg is a gate voltage when a voltage Vd is applied between the source and drain electrodes.
  • the threshold voltage (Vth) is preferably ⁇ 3.0 V or more and +3.0 or less, more preferably ⁇ 2.5 or more and +2.5 V or less.
  • the on-off ratio is preferably 10 6 or more and 10 12 or less, more preferably 10 7 or more and 10 11 or less, and even more preferably 10 8 or more and 10 11 or less.
  • the on-off ratio is 10 6 or more, the liquid crystal display can be driven.
  • the on-off ratio is 10 12 or less, it becomes possible to drive an organic EL panel with a large contrast, and the off current can be 10 ⁇ 12 A or less, which is used for a transfer transistor or a cancel transistor of a CMOS image sensor. In this case, it is possible to lengthen the image holding time and improve the sensitivity.
  • the Off current value is preferably 10 ⁇ 11 A or less, and more preferably 10 ⁇ 12 A or less.
  • the off-current is 10 ⁇ 11 A or less, it is possible to drive an organic EL panel with a large contrast, and when used for a transfer transistor or a cancel transistor of a CMOS image sensor, Sensitivity can be improved.
  • the defect density of the oxide semiconductor thin film used for the channel layer of the TFT of the present invention is preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less, and more preferably 1.0 ⁇ 10 16 cm ⁇ 3 or less.
  • the element configuration of the TFT is not particularly limited, and various known element configurations can be employed.
  • the TFT of the present invention can be applied to various integrated circuits such as a field effect transistor, a logic circuit, a memory circuit, and a differential amplifier circuit. Further, in addition to the field effect transistor, the present invention can also be applied to an electrostatic induction transistor, a Schottky barrier transistor, a Schottky diode, and a resistance element. Moreover, it can use for electronic devices, such as display apparatuses, such as a liquid crystal display and an organic electroluminescent display, for example.
  • FIG. 1A is a top view of a display device including a TFT of the present invention
  • FIG. 1B is used when a liquid crystal element using the TFT of the present invention is applied to a pixel portion of the display device
  • 1C is a circuit diagram of a pixel portion that can be used when an organic EL element using a TFT of the present invention is applied to the pixel portion of the display device. is there.
  • the TFT of the present invention disposed in the pixel portion can be formed as already described.
  • the TFT of the present invention can easily be an n-channel type, a part of the driver circuit that can be formed using an n-channel transistor is formed over the same substrate as the transistor in the pixel portion. In this manner, a highly reliable display device can be provided by using the transistor described in any of the above embodiments for the transistor and the driver circuit in the pixel portion.
  • the display device in FIG. 1A is an active matrix display device.
  • the display device includes a pixel portion 11, a first scanning line driving circuit 12, a second scanning line driving circuit 13, and a signal line driving circuit 14 on a substrate 10.
  • a plurality of signal lines are extended from the signal line driving circuit 14, and a plurality of scanning lines are extended from the first scanning line driving circuit 12 and the second scanning line driving circuit 13.
  • Pixels each having a display element are provided in a matrix in the intersecting regions between the scanning lines and the signal lines.
  • the substrate 10 of the display device is connected to a timing control circuit (also referred to as a controller or a control IC) via a connecting portion such as an FPC (Flexible Printed Circuit).
  • a timing control circuit also referred to as a controller or a control IC
  • FPC Flexible Printed Circuit
  • the first scanning line driving circuit 12, the second scanning line driving circuit 13, and the signal line driving circuit 14 are formed on the same substrate 10 as the pixel portion 11. For this reason, the number of components such as a drive circuit provided outside is reduced, so that cost can be reduced. Further, when the drive circuit is provided outside the substrate 10, it is necessary to extend the wiring, and the number of connections between the wirings increases. In the case where a driver circuit is provided over the same substrate 10, the number of connections between the wirings can be reduced, and reliability or yield can be improved.
  • FIG. 1 An example of the circuit configuration of the pixel portion is shown in FIG. This example is a circuit of a pixel portion that can be applied to a pixel portion of a VA liquid crystal display device.
  • This circuit of the pixel portion can be applied to a configuration having a plurality of pixel electrodes in one pixel. Each pixel electrode is connected to a different transistor, and each transistor is configured to be driven by a different gate signal. As a result, signals applied to the individual pixel electrodes of the multi-domain designed pixel can be controlled independently.
  • the gate wiring 21 of the transistor 24 and the gate wiring 22 of the transistor 25 are separated so that different gate signals can be given.
  • the source or drain electrode 23 functioning as a data line is used in common for the transistor 24 and the transistor 25.
  • the TFT of the present invention can be used as appropriate. Thereby, a highly reliable liquid crystal display device can be provided.
  • the first pixel electrode is electrically connected to the transistor 24, and the second pixel electrode is electrically connected to the transistor 25.
  • the first pixel electrode and the second pixel electrode are separated.
  • the shape of the first pixel electrode and the second pixel electrode is not particularly limited.
  • the first pixel electrode may be V-shaped.
  • the gate electrode of the transistor 24 is connected to the gate wiring 21, and the gate electrode of the transistor 25 is connected to the gate wiring 22.
  • Different gate signals are given to the gate wiring 21 and the gate wiring 22 to change the operation timing of the transistors 24 and 25, thereby controlling the alignment of the liquid crystal.
  • a storage capacitor may be formed by the capacitor wiring 20, the gate insulating film functioning as a dielectric, and the capacitor electrode electrically connected to the first pixel electrode or the second pixel electrode.
  • the multi-domain structure includes a first liquid crystal element 26 and a second liquid crystal element 27 in one pixel.
  • the first liquid crystal element 26 is composed of a first pixel electrode, a counter electrode, and a liquid crystal layer therebetween
  • the second liquid crystal element 27 is composed of a second pixel electrode, a counter electrode, and a liquid crystal layer therebetween.
  • the circuit of the pixel portion shown in FIG. 1B is not limited to this.
  • a switch, a resistor, a capacitor, a transistor, a sensor, a logic circuit, or the like may be newly added to the pixel illustrated in FIG.
  • FIG. 1 shows a pixel structure of a display device using an organic EL element, and shows an example in which two n-channel transistors are used for one pixel.
  • the oxide semiconductor thin film of the present invention can be used for a channel formation region of an n-channel transistor.
  • Digital time gray scale driving can be applied to the circuit of this pixel portion.
  • the TFT of the present invention can be used as appropriate. Thereby, an organic EL display device with high reliability can be provided.
  • the circuit configuration of the pixel portion is not limited to the pixel configuration shown in FIG.
  • a switch, a resistor, a capacitor, a sensor, a transistor, a logic circuit, or the like may be added to the circuit of the pixel portion illustrated in FIG.
  • a CMOS (Complementary Metal Oxide Semiconductor) image sensor is a solid-state imaging device that holds a potential in a signal charge storage unit and outputs the potential to a vertical output line via an amplification transistor. If there is a leak current in the reset transistor and / or the transfer transistor included in the CMOS image sensor, charging or discharging occurs due to the leak current, and the potential of the signal charge storage portion changes. When the potential of the signal charge storage portion changes, the potential of the amplification transistor also changes, resulting in a value that deviates from the original potential, and the captured image deteriorates.
  • CMOS Complementary Metal Oxide Semiconductor
  • the amplifying transistor may be either a thin film transistor or a bulk transistor.
  • FIG. 2 is a diagram illustrating an example of a pixel configuration of a CMOS image sensor.
  • the pixel includes a photodiode 40 which is a photoelectric conversion element, a transfer transistor 41, a reset transistor 42, an amplification transistor 43, and various wirings.
  • a plurality of pixels are arranged in a matrix to form a sensor.
  • a selection transistor electrically connected to the amplification transistor 43 may be provided.
  • “OS” written in a transistor symbol represents an oxide semiconductor
  • Si represents silicon, which represents a preferable material when applied to each transistor.
  • the photodiode 40 is connected to the source side of the transfer transistor 41, and a signal charge storage unit 44 (FD: also referred to as floating diffusion) is formed on the drain side of the transfer transistor 41.
  • the signal charge storage unit 44 is connected to the source of the reset transistor 42 and the gate of the amplification transistor 43.
  • the reset power supply line 46 may be deleted. For example, there is a method of connecting the drain of the reset transistor 42 to the power supply line 45 or the vertical output line 47 instead of the reset power supply line 46.
  • Examples 1 to 4 Samarium oxide powder, indium oxide powder, and aluminum oxide powder were weighed so as to have the ratio shown in Table 1 below, placed in a polyethylene pot, and mixed and ground for 72 hours by a dry ball mill to prepare a mixed powder.
  • This mixed powder was put into a mold and formed into a press-molded body at a pressure of 500 kg / cm 2 .
  • This molded body was densified by CIP at a pressure of 2000 kg / cm 2 .
  • this molded body was placed in a normal pressure firing furnace, held at 350 ° C. for 3 hours in an air atmosphere, then heated at 50 ° C./hour, and sintered at 1350 ° C. for 40 hours. Thereafter, the mixture was left to cool to obtain an oxide sintered body.
  • ⁇ Apparatus Smartlab (manufactured by Rigaku Corporation) ⁇ X-ray: Cu-K ⁇ ray (wavelength 1.5418mm) ⁇ 2 ⁇ - ⁇ reflection method, continuous scan (2.0 ° / min) ⁇ Sampling interval: 0.02 ° ⁇ Slit DS (divergence slit), SS (scattering slit), RS (light receiving slit): 1 mm
  • FIGS. 1 to 4 XRD charts of the sintered bodies obtained in Examples 1 to 4 are shown in FIGS. 1 to 4, respectively. 1 to 4, it was found that the sintered body obtained in each example had the perovskite phase and the bixbite phase shown in Table 1.
  • Example 5 Samarium oxide powder, indium oxide powder, and aluminum oxide powder were weighed so as to have the ratio shown in Table 2 below, placed in a polyethylene pot, and mixed and ground for 72 hours by a dry ball mill to prepare a mixed powder.
  • This mixed powder was put into a mold and formed into a press-molded body at a pressure of 500 kg / cm 2 .
  • This molded body was densified by CIP at a pressure of 2000 kg / cm 2 .
  • this molded body was placed in a normal pressure firing furnace, held at 350 ° C. for 10 hours in an air atmosphere, then heated at 50 ° C./hour, and sintered at 1450 ° C. for 40 hours. Thereafter, the mixture was left to cool to obtain an oxide sintered body.
  • the characteristics of the sintered body were evaluated in the same manner as in Examples 1 to 4. The results are shown in Table 2.
  • the obtained oxide sintered body was ground and polished to produce a 4 inch ⁇ ⁇ 5 mmt oxide sintered body disc.
  • This disk was bonded to a copper backing plate having a thickness of 8 mm using molten metal indium.
  • Target bonding rate (%) The bonding rate (%) of the obtained target was measured by the following method. The results are shown in Table 2. The bonding rate was determined by measuring the void part that was not bonded by an ultrasonic flaw detector and calculating the ratio of the bonded part based on the target area.
  • Example 6 Using the sputtering target obtained in Example 5, an oxide semiconductor layer (channel layer) was formed by sputtering on a silicon substrate with a thermal oxide film using a channel-shaped metal mask.
  • a titanium electrode was formed to a thickness of 50 nm using a source / drain shaped metal mask.
  • annealing was performed in air at 300 ° C.
  • the TFT element was mounted on a CVD apparatus, and a SiO 2 film having a thickness of 100 nm was formed as a passivation film at 350 ° C., and then TFT characteristics after annealing in the atmosphere at 300 ° C. for 1 hour were evaluated.
  • the mobility was 12 cm 2 / V ⁇ sec
  • the S value (Swing Factor) 0.78. I was able to reproduce it.
  • the off current was 10 ⁇ 12 A or less. From these results, it can be used for a transistor of a display device of a display or a cancel transistor or a transfer transistor of a CMOS image sensor.
  • Examples 7-9 Neodymium oxide powder, indium oxide powder, and aluminum oxide powder were weighed so as to have the ratio shown in Table 3 below, placed in a polyethylene pot, and mixed and ground for 72 hours by a dry ball mill to prepare a mixed powder.
  • This mixed powder was put into a mold and formed into a press-molded body at a pressure of 500 kg / cm 2 .
  • This molded body was densified by CIP at a pressure of 2000 kg / cm 2 .
  • this molded body was placed in a normal pressure firing furnace, held at 350 ° C. for 3 hours in an air atmosphere, then heated at 50 ° C./hour, and sintered at 1350 ° C. for 40 hours. Thereafter, the mixture was left to cool to obtain an oxide sintered body.
  • Examples 10-12 Samarium oxide powder, indium oxide powder, and aluminum oxide powder were weighed so as to have the ratio shown in Table 4 below, placed in a polyethylene pot, and mixed and ground for 72 hours by a dry ball mill to prepare a mixed powder.
  • This mixed powder was put into a mold and formed into a press-molded body at a pressure of 500 kg / cm 2 .
  • This molded body was densified by CIP at a pressure of 1000 kg / cm 2 .
  • this molded body was placed in a normal pressure sintering furnace, left in an air atmosphere at 350 ° C. for 3 hours, heated at 50 ° C./hour, and sintered at 1420 ° C. for 28 hours.
  • the obtained oxide sintered body was ground and polished to produce a 4 inch ⁇ ⁇ 5 mmt oxide sintered body disc.
  • This disk was bonded to a copper backing plate having a thickness of 8 mm using a molten metal indium.
  • Example 13 Using the sputtering target obtained in Example 11, an oxide semiconductor layer (channel layer) was formed by sputtering on a silicon substrate with a thermal oxide film using a channel-shaped metal mask.
  • a titanium electrode was formed to a thickness of 50 nm using a source / drain shaped metal mask.
  • annealing was performed in air at 350 ° C.
  • This TFT element was mounted on a CVD apparatus, and a SiO 2 film having a thickness of 100 nm was formed as a passivation film at 300 ° C., and then TFT characteristics were evaluated after annealing at 350 ° C. in the air for 1 hour.
  • the mobility was 21 cm 2 / V ⁇ sec
  • the current value exceeding 10 ⁇ 8 A
  • the S value (Swing Factor) 0.26. I was able to reproduce it.
  • the off current was 10 ⁇ 12 A or less. From these results, it can be used for a transistor of a display device of a display or a cancel transistor or a transfer transistor of a CMOS image sensor.
  • the oxide sintered body of the present invention can be used as a sputtering target, and is useful for producing an oxide semiconductor thin film of a thin film transistor (TFT) used for a display device such as a liquid crystal display or an organic EL display.
  • TFT thin film transistor

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Structural Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Physical Vapour Deposition (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

L'invention concerne un corps fritté à base d'oxyde qui contient une phase pérovskite et une phase bixbyite représentée par In2O3
PCT/JP2017/035939 2016-10-04 2017-10-03 Corps fritté à base d'oxyde et cible de pulvérisation WO2018066547A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2017562795A JP6326560B1 (ja) 2016-10-04 2017-10-03 酸化物焼結体及びスパッタリングターゲット

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016-196143 2016-10-04
JP2016196143 2016-10-04

Publications (1)

Publication Number Publication Date
WO2018066547A1 true WO2018066547A1 (fr) 2018-04-12

Family

ID=61831793

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/035939 WO2018066547A1 (fr) 2016-10-04 2017-10-03 Corps fritté à base d'oxyde et cible de pulvérisation

Country Status (3)

Country Link
JP (2) JP6326560B1 (fr)
TW (1) TWI737829B (fr)
WO (1) WO2018066547A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI737829B (zh) * 2016-10-04 2021-09-01 日本商出光興產股份有限公司 氧化物燒結體及濺鍍靶

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0967194A (ja) * 1995-01-19 1997-03-11 Ube Ind Ltd セラミックス複合材料
JP2008007340A (ja) * 2006-06-27 2008-01-17 Fujifilm Corp ガーネット型化合物とその製造方法
WO2012043570A1 (fr) * 2010-09-29 2012-04-05 東ソー株式会社 Corps fritté en oxyde ainsi que son procédé de fabrication, cible de pulvérisation cathodique, film électroconducteur transparent en oxyde ainsi que son procédé de fabrication, et batterie solaire
WO2015098060A1 (fr) * 2013-12-27 2015-07-02 出光興産株式会社 Corps fritté en oxyde, son procédé de production et cible de pulvérisation cathodique

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI737829B (zh) * 2016-10-04 2021-09-01 日本商出光興產股份有限公司 氧化物燒結體及濺鍍靶

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0967194A (ja) * 1995-01-19 1997-03-11 Ube Ind Ltd セラミックス複合材料
JP2008007340A (ja) * 2006-06-27 2008-01-17 Fujifilm Corp ガーネット型化合物とその製造方法
WO2012043570A1 (fr) * 2010-09-29 2012-04-05 東ソー株式会社 Corps fritté en oxyde ainsi que son procédé de fabrication, cible de pulvérisation cathodique, film électroconducteur transparent en oxyde ainsi que son procédé de fabrication, et batterie solaire
WO2015098060A1 (fr) * 2013-12-27 2015-07-02 出光興産株式会社 Corps fritté en oxyde, son procédé de production et cible de pulvérisation cathodique

Also Published As

Publication number Publication date
TWI737829B (zh) 2021-09-01
JP6326560B1 (ja) 2018-05-16
TW201821388A (zh) 2018-06-16
JPWO2018066547A1 (ja) 2018-10-11
JP2018131382A (ja) 2018-08-23

Similar Documents

Publication Publication Date Title
TWI760539B (zh) 濺鍍靶材、氧化物半導體薄膜、薄膜電晶體及電子機器
US11987504B2 (en) Garnet compound, sintered body and sputtering target containing same
US20210355033A1 (en) Oxide sintered body, sputtering target and oxide semiconductor film
JP6869157B2 (ja) 酸化物焼結体、スパッタリングターゲット、非晶質酸化物半導体薄膜、および薄膜トランジスタ
KR102353398B1 (ko) 산화물 소결체 및 스퍼터링 타깃
JP6858107B2 (ja) 酸化物焼結体、スパッタリングターゲット、非晶質酸化物半導体薄膜、および薄膜トランジスタ
JP6326560B1 (ja) 酸化物焼結体及びスパッタリングターゲット
TWI805567B (zh) 氧化物半導體膜、薄膜電晶體、氧化物燒結體及濺鍍靶材
JP2019064887A (ja) 酸化物焼結体、スパッタリングターゲット、酸化物半導体薄膜、および薄膜トランジスタ
JP2019077599A (ja) 酸化物焼結体、スパッタリングターゲット、酸化物半導体薄膜、および薄膜トランジスタ
WO2023189870A1 (fr) Cible de pulvérisation, procédé de production de cible de pulvérisation, couche mince d'oxyde, transistor à couches minces et dispositif électronique
JP2019077594A (ja) 酸化物焼結体、スパッタリングターゲット、酸化物半導体薄膜、および薄膜トランジスタ
JP2017222526A (ja) 酸化物焼結体

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 2017562795

Country of ref document: JP

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17858385

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17858385

Country of ref document: EP

Kind code of ref document: A1