WO2018058323A1 - 功率放大器、射频拉远单元及基站 - Google Patents

功率放大器、射频拉远单元及基站 Download PDF

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WO2018058323A1
WO2018058323A1 PCT/CN2016/100415 CN2016100415W WO2018058323A1 WO 2018058323 A1 WO2018058323 A1 WO 2018058323A1 CN 2016100415 W CN2016100415 W CN 2016100415W WO 2018058323 A1 WO2018058323 A1 WO 2018058323A1
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Prior art keywords
low pass
pulse width
power amplifier
multiphase pulse
pass filter
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PCT/CN2016/100415
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English (en)
French (fr)
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蔡中华
张立鹏
王开展
庞志远
朱胜
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华为技术有限公司
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Priority to PCT/CN2016/100415 priority Critical patent/WO2018058323A1/zh
Priority to EP16917083.4A priority patent/EP3503439B1/en
Priority to US16/365,783 priority patent/US10879857B2/en
Priority to CN201680089217.1A priority patent/CN109716681B/zh
Publication of WO2018058323A1 publication Critical patent/WO2018058323A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216—Continuous control
    • H03F1/0222—Continuous control by using a signal derived from the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/193—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H03F3/2178—Class D power amplifiers; Switching amplifiers using more than one switch or switching amplifier in parallel or in series
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B14/00—Transmission systems not characterised by the medium used for transmission
    • H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/10—Monitoring; Testing of transmitters
    • H04B17/11—Monitoring; Testing of transmitters for calibration
    • H04B17/13—Monitoring; Testing of transmitters for calibration of power amplifiers, e.g. gain or non-linearity
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/102—A non-specified detector of a signal envelope being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/165—A filter circuit coupled to the input of an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/336—A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/351—Pulse width modulation being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/387—A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21112—A filter circuit being added at the input of a power amplifier stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21139—An impedance adaptation circuit being added at the output of a power amplifier stage
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/08—Access point devices

Definitions

  • the present invention relates to wireless communication technologies, and in particular, to a power amplifier, a radio remote unit, and a base station.
  • Radio frequency power amplifier (RFPA), referred to as "power amplifier”, is an important part of wireless base stations.
  • the efficiency of power amplifier determines the power consumption, size, and thermal design of the base station.
  • the peak-to-average ratio (PAR) of most multi-carrier, multi-mode baseband baseband signals is 6 to 12 dB.
  • the peak-to-average ratio signal has higher requirements for the power amplifier in the base station.
  • the base station power amplifier uses a variety of high-efficiency power amplifier schemes to amplify these peak-to-average signals without distortion and distortion.
  • the envelope tracking is a current research. More efficient power amplifier technology
  • Envelope Tracking (ET) technology uses dynamic voltage regulation to control the drain voltage or collector voltage of the RF power amplifier by using signal envelope, so that the power amplifier tube works in a deep compression state, such as P-1dB. Or P-2dB, etc., to achieve high efficiency.
  • a deep compression state such as P-1dB. Or P-2dB, etc.
  • the inductance of the feed loop is relatively high, so that the video bandwidth (VBW) index is low, which affects digital predistortion (DPD) correction.
  • the embodiment of the invention provides a novel structure of a radio frequency power amplifier, a transceiver, and a base station, which can reduce the inductance of the power amplifier feeding loop and improve the VBW and DPD correction performance.
  • an embodiment of the present invention provides a power amplifier including a multi-phase pulse width modulator, N switching amplifiers, and N low pass filters.
  • Multiphase pulse width modulator with N switches The amplifiers are connected to generate N multiphase pulse width modulated PWM signals.
  • the switching amplifier Sn is configured to receive the nth polyphase pulse width modulation signal PWMn generated by the multiphase pulse width modulator and amplify the PWMn signal.
  • the low pass filter Fn is connected to the switching amplifier Sn for filtering the signal outputted by the switching amplifier Sn.
  • the switch amplification Sn is the nth of the N switching amplifiers; the low pass filter Fn is the nth of the N low pass filters; N and n are positive integers, and the 1 ⁇ n ⁇ N.
  • the low-pass filter Fn includes a radio frequency decoupling capacitor and a feeder; one end of the radio frequency decoupling capacitor is connected to the feeder; the radio frequency decoupling The other end of the capacitor is grounded.
  • the low pass filter Fn may further include a low pass element. One end of the low pass element is connected to the feed line, and the other end of the low pass element is connected to the switching amplifier Sn.
  • the low-pass filter Fn includes a radio frequency decoupling capacitor and an inductor; the low-pass component is connected to the inductor, and one end of the radio frequency decoupling capacitor is low The pass element is connected to the inductor; the other end of the RF decoupling capacitor is grounded.
  • the low pass filter Fn further includes a low pass component; one end of the low pass component is connected to the inductor, and the other end of the low pass component is connected to the switching amplifier Sn.
  • the parameters of the low pass component are determined by filtering and choke performance.
  • the power amplifier further includes a radio frequency power amplifier; N low-pass filters are connected at the output of the radio frequency power amplifier to achieve turbulence.
  • the multiphase pulse width modulator can include a field programmable gate array FPGA, an application specific integrated circuit ASIC, or an analog circuit.
  • an embodiment of the present invention provides a remote radio unit (RRU), including any one of the foregoing possible implementations.
  • RRU remote radio unit
  • an embodiment of the present invention provides a base station, including the RRU provided by the second aspect.
  • an embodiment of the present invention further provides a power amplification method, including: generating N more a phase pulse width modulated PWM signal; amplifying the multiphase pulse width modulated signal PWMn; and PWMn filtering the multiphase pulse width modulated signal.
  • the PWMn signal is the nth of the N multiphase pulse width modulated signals; the n is a positive integer, and the 1 ⁇ n ⁇ N.
  • the multiphase pulse width modulated signal is PWMn filtered.
  • the embodiment of the present invention further provides a computer storage medium for storing computer instructions included in various possible implementation manners of the foregoing fourth aspect.
  • the multi-phase pulse width modulator modulates and generates N multi-phase pulse width modulation PWM signals; the multi-phase pulse width modulation signal PWMn is amplified; and the multi-phase pulse width modulation signal PWMn Filtering; and combining at the drain or collector of the power tube.
  • the new RF amplifier provided by the present application can effectively reduce the envelope feed loop inductance and improve the VBW and DPD correction performance.
  • FIG. 1 is a schematic structural diagram of a power amplifier according to an embodiment of the present invention.
  • 1-1 is a schematic structural diagram of a power amplifier according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of implementation of a power amplifier according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of implementation of a power amplifier according to an embodiment of the present invention.
  • 4-1 is a schematic structural diagram of a low pass filter according to an embodiment of the present invention.
  • 4-2 is a schematic structural diagram of a low pass filter according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a method for power amplification according to an embodiment of the present invention.
  • 2G communication systems such as Global System for Mobile Communications (GSM), Wideband Code Division Multiple Access ( 3G communication system such as WCDMA (wideband code division multiple access), time division-synchronization code division multiple access (TD-SCDMA); LTE (long-term evolution) communication system and its subsequent evolution Next generation communication systems such as systems.
  • GSM Global System for Mobile Communications
  • 3G communication system such as WCDMA (wideband code division multiple access), time division-synchronization code division multiple access (TD-SCDMA); LTE (long-term evolution) communication system and its subsequent evolution Next generation communication systems such as systems.
  • WCDMA wideband code division multiple access
  • TD-SCDMA time division-synchronization code division multiple access
  • LTE long-term evolution
  • the power amplifier provided by the embodiment of the present invention can be integrated into any network element device that needs to perform wireless signal power amplification, such as a base station.
  • the power amplifier provided by the embodiment of the present invention may be in the radio part of the base station, for example, may be disposed in a radio remote unit (RRU) of the base station.
  • the base station may be a base transceiver station (BTS) in a GSM system or a CDMA system, or a Node B in a WCDMA system, or an evolved Node B (e-NodeB, evolved in an LTE system). NodeB) or similar device in a LTE subsequently evolved communication system.
  • BTS base transceiver station
  • e-NodeB evolved in an LTE system
  • FIG. 1 is a schematic structural diagram of a power amplifier according to an embodiment of the present invention.
  • the embodiments of the present invention can effectively improve the VBW and DPD correction performance.
  • VBW The calculation of VBW can be determined as follows:
  • the feed network For a fixed leakage RF power amplifier, its feed network, as shown in Figure 1-1, can be constructed as follows.
  • the power supply 103 provides a voltage input, and the RF decoupling capacitor 104 implements a radio frequency decoupling function, and the envelope is retracted.
  • the coupling capacitor 105 implements a decoupling function on the bandwidth of the signal envelope signal.
  • the Lf106 implements the function of RF turbulence and the equivalent inductance value Lo.
  • the equivalent drain-to-ground equivalent of the power amplifier is mainly composed of the power tube junction capacitance Cds107 and the matching circuit 108 equivalent capacitance Cm, then the power amplifier's VBW, that is, FVBW ⁇ 1/ ⁇ 2 ⁇ *sqrt[Lo*(Cds+Cm)] ⁇ .
  • the power amplifying circuit provided in this embodiment may be specifically applied to the process of amplifying the envelope signal.
  • the amplifier 100 provided in this embodiment specifically includes: a multi-phase pulse width modulator 101, and a switching amplifier group 102. And low pass filter bank 103.
  • the output of the multi-phase pulse width modulator 101 is connected to the input of the switching amplifier group 102, and the output of the switching amplifier group 102 is connected to the input of the low-pass filter bank 103.
  • the multiphase pulse width modulator 101 is configured to receive a digital in-phase/quadrature (I/Q) signal, and modulate the I/Q to generate a multi-channel multi-phase pulse width modulation (pulse-width modulation, PWM) signal.
  • I/Q digital in-phase/quadrature
  • PWM pulse-width modulation
  • the multiphase pulse width modulator 101 can also receive an analog I/Q signal and modulate the analog signal to produce an analog multiphase PWM signal.
  • the multi-phase pulse width modulator 101 can include, but is not limited to, one of the following: a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), and an analog circuit.
  • FPGA field programmable gate array
  • ASIC application-specific integrated circuit
  • the digital PWM method implemented by FPGA or ASIC only digitizes the original analog PWM modulation.
  • analog PWM is taken as an example to illustrate the multiphase PWM modulation.
  • the waveform of each point is illustrated by taking a 4-phase architecture as an example.
  • the system generates triangular waves or sawtooth waves Vtg1, Vtg2, Vtg3, and Vtg4 with phases of 0, 90, 180, and 270 degrees respectively.
  • Vs and Vtg1, Vtg2, Vtg3, and Vtg4 are obtained.
  • the implementation of the PWM can include the methods described here, as well as the commonly used Sigma-Delta modulation.
  • the multi-phase pulse width modulator 101 is connected to the input of the switching amplifier group 102; wherein the switching amplifier group 102 is composed of a plurality of independent switching amplifiers, as shown in FIG.
  • the off amplifier group 102 includes n independent switching amplifiers, as shown by S1 to Sn in 102 of FIG. 1, and Sn is the nth switching amplifier in the switching amplifier group 102, and each switching amplifier, such as S1 to Sn,
  • the outputs of the multiphase pulse width modulator 101 are connected, and the multiphase pulse width modulator 101 generates at least one PWM signal output. For each PWM signal output, a switching amplifier is connected to the PWM signal to amplify and balance.
  • the implementation parameters of the switching amplifier can be determined based on the bandwidth of the tracked envelope signal. According to the Nyquist sampling theorem, the switching frequency of the switching amplifier requires at least 2 times the signal frequency. The actual implementation is usually about 5 to 10 times the switching frequency.
  • the switching amplifier group 102 is configured as n switching amplifiers, each of which is connected to the output of the multi-phase pulse width modulator 101; as shown in FIG. 1, n switching amplifiers (S1 to Sn) are connected to the multiphase pulse width modulator 101, respectively.
  • the low pass filter bank 103 is connected to the switching amplifier group 102, and the low pass filter bank 103 includes n independent low pass filters, as indicated by F1 to Fn in FIG. 1, and Fn is in the low pass filter bank 103.
  • the nth low pass filter is connected to a single switching amplifier, specifically S1 and F1 are shown in Figure 1, and Sn and Fn are connected.
  • the low pass filter Fn is used to filter the signal outputted by the switching amplifier Sn. It can be understood that the switching amplifier and the low-pass filter are connected to each other and can be connected to the unified input of the low-pass filter bank 103 through the unified output of the switching amplifier group 102.
  • the output of the low pass filter bank 103 can also be connected to the power tube drain or collector to synthesize a complete envelope signal.
  • a 4-phase architecture is taken as an example.
  • FIG. 3 the waveforms of the respective points are illustrated.
  • PH1, PH2, PH3, and PH4 are waveforms of the output of the switching amplifier, respectively, after the LPF1, LPF2, LPF3, and LPF4 are at the drain of the power tube or The collector is combined to obtain the Envelope waveform.
  • the aforementioned multiphase pulse width modulator 101, switching amplifier bank 102, low pass filter bank 103 shows the main implementation structure, and may also include an auxiliary circuit to implement a complete circuit.
  • the power amplifier provided by the embodiment of the invention can effectively reduce the inductance of the feeding loop, thereby improving the VBW and DPD correction performance.
  • the low pass filter 400 includes a radio frequency decoupling capacitor 401 and a feed line 402. One end of the RF decoupling capacitor 401 is connected to the feed line 402. The other end of the RF decoupling capacitor 401 is grounded.
  • the low pass filter 400 further includes a low pass element 403.
  • One end of the low pass element 403 is connected to the feed line 402, and the other end of the low pass element 403 is connected to the output end of the switching amplifier.
  • the low pass component is here an optional configuration, and the low pass component can be selected according to the suppression requirements of the feed line 402 and the decoupling capacitor 401 for the power amplifier drain or collector RF signal.
  • FIG. 4-2 A block diagram of a low pass filter 410 in another low pass filter bank 103 is shown in FIG. 4-2.
  • the low pass filter 410 includes a radio frequency decoupling capacitor 411 and an inductor 412.
  • One end of the RF decoupling capacitor 411 is connected to the inductor 412. The other end of the RF decoupling capacitor 411 is grounded.
  • the low pass filter 410 further includes a low pass element 413.
  • the low pass element 413 is coupled to the inductor 412 and the other end of the low pass element 413 is coupled to the output of the switching amplifier.
  • the parameters of the low-pass components are designed to meet the premise that the RF signal of the drain or collector of the amplifier does not interfere with the switching amplifier.
  • the output of the low pass filter bank 103 is connected at the output of the RF power amplifier to achieve turbulence or matching.
  • An embodiment of the present invention further provides a method for implementing power amplification, as shown in FIG. 5, including:
  • the multiphase pulse width modulator modulation generates N multiphase pulse width modulated PWM signals; wherein the N is a positive integer;
  • the PWMn signal is the nth of the N multiphase pulse width modulated signals; the n is a positive integer, and the 1 ⁇ n ⁇ N.
  • the filtered multiphase pulse width modulated signal PWMn is turbulent.
  • the power amplification scheme provided by the embodiment of the invention can effectively reduce the inductance of the feeding loop, thereby Improve VBW and DPD correction performance.
  • the number of the envelope modulator and the auxiliary power amplifier of the power amplifier and the corresponding connection relationship need not be creatively made to make various reasonable changes according to the description of the embodiments of the present invention. Both will be within the scope of protection of the present invention.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the modules is only a logical function division.
  • there may be another division manner for example, multiple modules or components may be combined or Can be integrated into another device, or some features can be ignored or not executed.
  • each functional module in each embodiment of the present invention may be integrated into one processing module, and each module may exist physically separately, or two or more modules may be integrated into one module.

Abstract

本发明实施例提供一种功率放大器、射频拉远单元RRU及基站。多相脉冲宽度调制器调制产生N个多相脉冲宽度调制PWM信号；对所述多相脉冲宽度调制信号PWMn放大；对所述多相脉冲宽度调制信号PWMn滤波；并在功率管漏极或集电极合路。本申请提供的新型射频放大器，可有效降低包络馈电环路电感，提高视频带宽与DPD校正性能。

Description

功率放大器、射频拉远单元及基站 技术领域
本发明涉及无线通信技术，尤其涉及一种功率放大器、射频拉远单元及基站。
背景技术
射频功率放大器(radio frequency power amplifier,RFPA)，简称“功放”，是无线基站中重要的组成部分，功放的效率决定了基站的功耗、尺寸、热设计等参数。目前，大多数多载波、多模基站基带信号的峰值功率与平均功率比值(peak-to-average ratio,PAR)较高，达到6～12dB。高峰均比的信号在基站中对功放有更高的要求，基站功放为了不失真高效的放大这些高峰均比的信号，采用了多种高效率功放方案，其中包络跟踪就是一种目前研究较多的高效功放技术
包络跟踪(Envelope Tracking，ET)技术是利用动态调压的方法，利用信号包络来控制射频功放的漏极电压或集电极电压，使功放管工作在较深的压缩状态，如P-1dB或P-2dB等，达到高效率的目的。但现有的技术方案，馈电环路的电感较高，使得视频带宽(Video Bandwidth，VBW)指标较低，影响数字预失真(digital predistortion,DPD)校正。
发明内容
本发明实施例提供一种新型结构的射频功率放大器、收发信机、基站，可以降低功放馈电环路的电感，提高VBW与DPD校正性能。
第一方面，本发明实施例提供一种功率放大器，包括多相脉冲宽度调制器，N个开关放大器，和N个低通滤波器。多相脉冲宽度调制器与N个开关 放大器相连，用于产生N个多相脉冲宽度调制PWM信号。开关放大器Sn，用于接收所述多相脉冲宽度调制器产生的第n个多相脉冲宽度调制信号PWMn，并对所述PWMn信号放大。低通滤波器Fn，与开关放大器Sn相连，用于对经开关放大器Sn输出的信号进行滤波。其中，开关放大Sn为所述N个开关放大器中的第n个；低通滤波器Fn为所述N个低通滤波器中的第n个；N和n为正整数，且所述1≤n≤N。
根据第一方面，在第一方面的第一种可能的实现方式中，低通滤波器Fn，包括射频退耦电容和馈线；射频退耦电容的一端与所述馈线相连；所述射频退耦电容的另一端接地。可选的，低通滤波器Fn，还可以包括低通元件。该低通元件的一端与馈线相连，所述低通元件的另一端与所述开关放大器Sn相连。
根据第一方面，在第一方面的第二种可能的实现方式中，低通滤波器Fn，包括射频退耦电容和电感；低通元件与电感相连，射频退耦电容的一端与所述低通元件和所述电感相连；射频退耦电容的另一端接地。可选的，低通滤波器Fn，还包括低通元件；低通元件的一端与电感相连，所述低通元件的另一端与所述开关放大器Sn相连。
根据第一方面的第一或第二种可能的实现方式，在第一方面的第三种可能的实现方式中，低通元件的参数由滤波和扼流性能决定。
在一种可能的实现方式中，功率放大器，还包括射频功率放大器；N个低通滤波器在所述射频功率放大器的输出端相连，实现扼流。
在一种可能的实现方式中，多相脉冲宽度调制器可以包括现场可编程门阵列FPGA，专用集成电路ASIC或模拟电路。
第二方面，本发明实施例提供一种射频拉远单元(remote radio unit,RRU)，包括前述可能的实现方式中的任一功率放大器。
第三方面，本发明实施例提供一种基站，包括第二方面所提供的RRU。
第四方面，本发明实施例还提供一种功率放大方法，包括：产生N个多 相脉冲宽度调制PWM信号；对所述多相脉冲宽度调制信号PWMn放大；对所述多相脉冲宽度调制信号PWMn滤波。
其中，所述PWMn信号为所述N个多相脉冲宽度调制信号中的第n个；所述n为正整数，且所述1≤n≤N。
根据第四方面，在一种可能的实现方式中，对多相脉冲宽度调制信号PWMn滤波。
第五方面，本发明实施例还提供一种计算机存储介质，用于存储上述第四方面的各种可能的实现方式所包含的计算机指令。
采用本发明实施例提供的技术方案，多相脉冲宽度调制器调制产生N个多相脉冲宽度调制PWM信号；对所述多相脉冲宽度调制信号PWMn放大；对所述多相脉冲宽度调制信号PWMn滤波；并在功率管漏极或集电极合路。本申请提供的新型射频放大器，可有效降低包络馈电环路电感，提高VBW与DPD校正性能。
附图说明
为了更清楚地说明本发明实施中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的一种功率放大器的结构示意图；
图1-1是本发明实施例提供的一种功率放大器的结构示意图；
图2是本发明实施例提供的一种功率放大器的实现示意图；
图3是本发明实施例提供的一种功率放大器的实现示意图；
图4-1是本发明实施例提供的一种低通滤波器的结构示意图；
图4-2是本发明实施例提供的一种低通滤波器的结构示意图；
图5是本发明实施例提供的一种功率放大的方法的示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本文中描述的各种技术可用于各种通信系统，包括2G、3G通信系统和下一代通信系统，例如全球移动通信(GSM，global system for mobile communication)等2G通信系统，宽带码分多址(WCDMA，wideband code division multiple access)，时分同步码分多址(TD-SCDMA，time division-synchronization code division multiple access)等3G通信系统；长期演进(LTE，long-term evolution)通信系统及其后续演进系统等下一代通信系统。
本发明实施例提供的功率放大器可集成在基站等任意需要进行无线信号功率放大的网元设备中。本发明实施例提供的功率放大器可以在基站的射频部分工作，例如可以布置在基站的射频拉远单元(RRU，radio remote unit)中。所述基站可以是GSM系统或CDMA系统中的基站收发台(BTS，base transceiver station)、或者WCDMA系统中的节点B(Node B)、或者LTE系统中的演进型节点B(e-NodeB，evolved NodeB)或者LTE后续演进的通信系统中的类似设备。
图1是本发明实施例提供的一种功率放大器的结构示意图。本发明实施例可以有效提高VBW与DPD校正性能。
VBW的计算方式可以通过如下确定：
对于一个固定漏压射频功放其馈电网络来说，例如图1-1所示，可以如下方式构成。电源103提供电压输入，射频退耦电容104实现射频退耦功能，包络退 耦电容105实现信号包络信号带宽上的退耦功能。Lf106实现射频扼流的功能，等效电感值Lo。
假设功放漏极对地等效电阻主要由功率管结电容Cds107与匹配电路108等效电容Cm组成，那么该功放的VBW，即FVBW≈1/{2π*sqrt[Lo*(Cds+Cm)]}。
本实施例提供的功率放大电路具体可以应用于对包络信号的放大处理过程，如图1所示，本实施例提供的放大器100具体包括：多相脉冲宽度调制器101，开关放大器组102，和低通滤波器组103。其中，多相脉冲宽度调制器101的输出端与开关放大器组102的输入端相连，开关放大器组102的输出端与低通滤波器组103的输入端相连。
多相脉冲宽度调制器101，用于接收数字同相正交(in-phase/quadrature,I/Q)信号，对该I/Q进行调制，产生多路多相脉冲宽度调制(pulse-width modulation，PWM)信号。
多相脉冲宽度调制器101,也可以接收模拟I/Q信号，对该模拟信号进行调制，产生模拟多相PWM信号。
其中，多相脉冲宽度调制器101可以包括但不限于如下方式之一实现：现场可编程门阵列(field programmable gate array，FPGA)，专用集成电路(application-specific integrated circuit，ASIC)和模拟电路。
FPGA或者ASIC实现数字PWM方式只是将原来模拟PWM调制进行数字化，业界有实现方案，这里以模拟PWM为例来进行多相PWM调制的说明。
如图2所示，这里以4相架构为例来说明各个点的波形。系统产生相位分别为0、90、180、270度的三角波或者锯齿波Vtg1、Vtg2、Vtg3、Vtg4，通过将Vs与Vtg1、Vtg2、Vtg3、Vtg4输入比较器即得到PH1_IN、PH2_IN、PH3_IN、PH4_IN的信号。PWM的实现方案可以包含此处所述的方式，同时也包含常用的Sigma-Delta调制方式。
多相脉冲宽度调制器101与开关放大器组102的输入端相连；其中，开关放大器组102由多个独立的开关放大器组成，具体如图1中102所示，开 关放大器组102包括n个独立的开关放大器，如图1中102中S1～Sn所示，Sn为开关放大器组102中的第n个开关放大器，每个开关放大器，如S1～Sn，都和多相脉冲宽度调制器101的输出端相连，多相脉冲宽度调制器101产生至少一路PWM信号输出，对于每一路PWM信号输出都连接一个开关放大器对PWM信号放大平衡。
开关放大器的实现参数可以根据跟踪的包络信号的带宽来决定。根据奈奎斯特(Nyquist)采样定理，开关放大器的开关频率至少需要>2倍的信号频率，实际实现是通常选择开关频率在5～10倍左右。
以产生n路PWM信号输出为例，开关放大器组102被配置为n个开关放大器，每一个开关放大器都和多相脉冲宽度调制器101的输出端连接；具体图1所示，n个开关放大器(S1～Sn)分别和多相脉冲宽度调制器101相连。
低通滤波器组103与开关放大器组102相连，低通滤波器组103包括n个独立的低通滤波器，如图1中的F1～Fn所示，Fn为低通滤波器组103中的第n个低通滤波器。单个低通滤波器和单个开关放大器相连，具体图1中所示的S1和F1相连，Sn和Fn相连。低通滤波器Fn用于对经开关放大器Sn输出的信号进行滤波。可以理解的是，开关放大器和低通滤波器之间相连，可以通过开关放大器组102统一的输出端与低通滤波器组103统一的输入端相连。
低通滤波器组103的输出端还可以连接功率管漏极或集电极，以合成完整的包络信号。这里以4相架构为例，如图3所示，说明各个点的波形，PH1，PH2，PH3，PH4分别是开关放大器输出的波形，经过LPF1、LPF2、LPF3、LPF4后在功率管漏极或集电极合路，得到Envelope波形。
前述的多相脉冲宽度调制器101，开关放大器组102，低通滤波器组103示出了主要实现结构，还可以包括辅助电路，以实现完整的电路。
本发明实施例提供的功率放大器，可有效降低馈电环路的电感，从而提高VBW与DPD校正性能。
图4-1示出了低通滤波器组103中的一个低通滤波器400的结构示意图，如图3所示，低通滤波器400，包括射频退耦电容401和馈线402。射频退耦电容401的一端与馈线402相连。射频退耦电容401的另一端接地。
可选的，低通滤波器400，还包括低通元件403。低通元件403的一端与馈线402相连，低通元件403的另一端与开关放大器的输出端相连。
低通元件在此处做为一可选配置，可以根据馈线402与退耦电容401对功放漏极或集电极射频信号的抑制度要求来选择低通元件。
图4-2给出了另一种低通滤波器组103中的一个低通滤波器410的结构示意图，低通滤波器410，包括射频退耦电容411和电感412。
射频退耦电容411的一端与电感412相连。射频退耦电容411的另一端接地。
可选的，低通滤波器410，还包括低通元件413。低通元件413与电感412相连，低通元件413的另一端与开关放大器的输出端相连。
低通元件的参数设计以满足功放漏极或集电极的射频信号不干扰开关放大器为前提。
可选的，低通滤波器组103的输出端在所述射频功率放大器的输出端相连，实现扼流或匹配。
本发明实施例还提供一种实现功率放大的方法，如图5所示，包括：
S501:多相脉冲宽度调制器调制产生N个多相脉冲宽度调制PWM信号；其中，所述N为正整数；
S502:对所述多相脉冲宽度调制信号PWMn放大；
S503:对所述多相脉冲宽度调制信号PWMn低通滤波；
其中，所述PWMn信号为所述N个多相脉冲宽度调制信号中的第n个；所述n为正整数，且所述1≤n≤N。
对经滤波后的所述多相脉冲宽度调制信号PWMn扼流。
本发明实施例提供的功率放大方案，可有效降低馈电环路的电感，从而 提高VBW与DPD校正性能。
可以了解，本领域的普通技术人员可以根据本发明实施例的描述，对功率放大器的包络调制器和辅助功率放大器的数量及相应的连接关系不需要付出创造性努力做出各种合理的变化，均将处于本发明的保护范围内。
在本申请所提供的几个实施例中，应该理解到，所揭露的设备和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述模块的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个模块或组件可以结合或者可以集成到另一个设备中，或一些特征可以忽略，或不执行。
另外，在本发明各个实施例中的各功能模块可以集成在一个处理模块中，可以是各个模块单独物理存在，也可以两个或两个以上模块集成在一个模块中。
本领域普通技术人员可以理解实施上述实施例的全部或部分步骤可以通过硬件来完成，也可以通过程序来指令相关的硬件完成，所述的程序可以存储于一种计算机可读介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (12)

  1. 一种功率放大器，其特征在于，包括多相脉冲宽度调制器，N个开关放大器，和N个低通滤波器；其中，所述N为正整数；
    所述多相脉冲宽度调制器，与所述N个开关放大器相连，用于产生N个多相脉冲宽度调制PWM信号；
    开关放大器Sn，用于接收所述多相脉冲宽度调制器产生的第n个多相脉冲宽度调制信号PWMn，并对所述PWMn信号放大，其中，所述开关放大Sn为所述N个开关放大器中的第n个；
    低通滤波器Fn，与所述开关放大器Sn相连，用于对经所述开关放大器Sn输出的信号进行滤波，其中，所述低通滤波器Fn为所述N个低通滤波器中的第n个；其中，所述n为正整数，且所述1≤n≤N。
  2. 根据权利要求1所述的功率放大器，其特征在于，
    所述低通滤波器Fn，包括射频退耦电容和馈线；
    所述射频退耦电容的一端与所述馈线相连；所述射频退耦电容的另一端接地。
  3. 根据权利要求2所述的功率放大器，其特征在于，
    所述低通滤波器Fn，还包括低通元件；
    所述低通元件的一端与馈线相连，所述低通元件的另一端与所述开关放大器Sn相连。
  4. 根据权利要求1所述的功率放大器，其特征在于，
    所述低通滤波器Fn，包括射频退耦电容和电感；
    所述低通元件与电感相连，所述射频退耦电容的一端与所述低通元件和所述电感相连；所述射频退耦电容的另一端接地。
  5. 根据权利要求4所述的功率放大器，其特征在于，
    所述低通滤波器Fn，还包括低通元件；
    所述低通元件的一端与电感相连，所述低通元件的另一端与所述开关放 大器Sn相连。
  6. 根据权利要求3或5所述的功率放大器，其特征在于，
    所述低通元件的参数由滤波和扼流性能决定。
  7. 根据权利要求1至6任一项所述的功率放大器，其特征在于，
    所述功率放大器，还包括射频功率放大器；
    所述N个低通滤波器在所述射频功率放大器的输出端相连，实现扼流。
  8. 根据权利要求1至7任一项所述的功率放大器，其特征在于，
    所述多相脉冲宽度调制器包括现场可编程门阵列FPGA，专用集成电路ASIC或模拟电路。
  9. 一种射频拉远单元RRU，包括如前述权利要求1至8任一所述的功率放大器。
  10. 一种基站，包括权利要求9所述的RRU。
  11. 一种功率放大方法，其特征在于，包括：
    产生N个多相脉冲宽度调制PWM信号；其中，所述N为正整数；
    对所述多相脉冲宽度调制信号PWMn放大；
    对所述多相脉冲宽度调制信号PWMn低通滤波；
    其中，所述PWMn信号为所述N个多相脉冲宽度调制信号中的第n个；所述n为正整数，且所述1≤n≤N。
  12. 根据权利要求11所述的功率放大方法，其特征在于，
    对经滤波后的所述多相脉冲宽度调制信号PWMn扼流。
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