WO2018055013A1 - Alimentation électrique redondante, en particulier pour un consommateur - Google Patents

Alimentation électrique redondante, en particulier pour un consommateur Download PDF

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Publication number
WO2018055013A1
WO2018055013A1 PCT/EP2017/073842 EP2017073842W WO2018055013A1 WO 2018055013 A1 WO2018055013 A1 WO 2018055013A1 EP 2017073842 W EP2017073842 W EP 2017073842W WO 2018055013 A1 WO2018055013 A1 WO 2018055013A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
power supply
redundant power
switch
flop
Prior art date
Application number
PCT/EP2017/073842
Other languages
German (de)
English (en)
Inventor
Rainer Edelhäuser
Original Assignee
Valeo Siemens Eautomotive Germany Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Valeo Siemens Eautomotive Germany Gmbh filed Critical Valeo Siemens Eautomotive Germany Gmbh
Publication of WO2018055013A1 publication Critical patent/WO2018055013A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H02J1/10—Parallel operation of dc sources
    • H02J1/108—Parallel operation of dc sources using diodes blocking reverse current flow
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/263—Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems

Definitions

  • Redundant power supply for a consumer The invention relates to a redundant power supply for a consumer, comprising at least two voltage sources arranged in parallel switching branches.
  • Redun dante power supplies with multiple independent chip ⁇ voltage sources are intended for use by consumers. These power supplies are designed to ensure operation of the load in situations where not all power sources are available. A Derar ⁇ term situation can be caused for example by a failure of one of the intended voltage sources. Re ⁇ dundant power supplies are particularly geeig ⁇ net to ensure the power / voltage supply of safety consumers.
  • Voltage sources is connected to charge a further battery with this via a decoupling element that a directed current flow between the voltage sources is made ⁇ light.
  • a current flow between the clamping ⁇ voltage sources can cause damage.
  • Such current flow can occur in particular if the capacitance of one of the batteries used as voltage sources see below a critical amount, thus providing a lower clamping ⁇ voltage.
  • this object is achieved by a re ⁇ dundante power supply with the characterizing Merkma ⁇ len of claim 1.
  • a redundant power supply for a consumer comprises at least two voltage sources arranged in parallel switching branches.
  • each voltage source ⁇ each associated with a blocking element and a switch.
  • Each locking element being arranged between the associated clamping ⁇ voltage source and the load and poled that a current flow between the voltage sources is blocked and at the same time permits a directed flow of current in the direction of the Ver ⁇ brauchers.
  • the blocking element associated with the voltage source can be bridged by closing the switch connected in parallel therewith and associated with the voltage source.
  • a logic circuit is adapted to switch the switch in dependence from a ⁇ on the unbridged locking element or the locking elements unbridged descending chip ⁇ voltage.
  • the redundant power supply includes multiple power sources that provide power to a common load.
  • the goal is to keep the consumer constantly adequately supplied with current or voltage. If, for example, the voltage source which is connected directly to the consumer ⁇ cher, ie its associated switch is closed, only provides a low voltage, so that the load is supplied through another of the provided voltage sources must be ensured.
  • This situation could be identified, for example, by means of a direct approach, which provides for monitoring the voltage source connected to the power supply of the consumer.
  • a direct approach requires a lock-up with minimal resistance, so that a clamping ⁇ voltage drop can be detected at the disposed between the respective voltage source and the load lock member based on a measurement of the current flowing through the blocking element directed stream.
  • the direct approach thus requires a power loss.
  • the respective voltage source associated switches for example, by a field effect transistor, in particular by a metal-oxide-semiconductor field effect transistor
  • MOSFET metal-insulator-oxide-semiconductor field effect transistor
  • MISFIT metal-insulator-oxide-semiconductor field effect transistor
  • Power / voltage supplied can be connected substantially resistance-free, so that power losses are minimized.
  • the voltage drop across the inactive Barrier elements which may be formed, for example, as diodes, in particular as pn or Schottky diodes, monitored in the flow direction.
  • any voltage source that provides a DC voltage is considered a voltage source in the sense of the present invention.
  • the voltage sources can be designed, for example, as power supplies and / or as batteries.
  • the logic circuit is preferably so formed to bypass the blocking element that power source by closing of the associated switch, whose supplied ⁇ ordnetem locking element when the switch is a voltage drop.
  • the bridging of the blocking element takes place when the value of the falling voltage reaches or exceeds a predeterminable amount. This provides a stable switching behavior safe since an inactive voltage source ⁇ not activated and the associated locking element is bypassed when it supplies a boosted voltage to the active voltage ⁇ source.
  • the defining the switching condition amount is inter alia determined by the information provided by the respective voltage source is inactive output voltage plus the forward voltage of the zugeord ⁇ Neten locking element.
  • the logic circuit is further preferably designed to open that or those remaining switches which are the other voltage source or the other voltage sources assigned.
  • the logic ⁇ circuit implementing such switching behavior that not only an automatic bridge this spermi- cides relements takes place at a he ⁇ knew voltage drop across any of the inactive Sperrele ⁇ ments, but also any Matterbrückun ⁇ gen of rest, other voltage sources associated Sper ⁇ relements be repealed.
  • the logic circuit is adapted to a switching state in which one, in particular exactly one of the switches is closed, store.
  • a switching state in which one, in particular exactly one of the switches is closed, store.
  • Blocking element is preferably assigned to each voltage source Ver ⁇ same element.
  • the comparison element generates a particularly digital input signal for the logic circuit as a function of the voltage which drops across the blocking element assigned to the voltage source.
  • the comparison element is a comparator.
  • the comparator is a comparator.
  • the logic circuit comprises in a preferred embodiment ⁇ example, at least one bistable flip-flop, which is the output side connected to one of the respective voltage sources to ⁇ ordered switch.
  • bistable flip-flop provides a particularly simple circuitry implementation of a memory function, so that a
  • the logic circuit for controlling the two voltage sources only one bistable flip-flop, whose outputs are connected to the respective clamping ⁇ voltage sources associated switches.
  • the logic circuit comprises a plurality of bistable tilt ⁇ members, each bistable flip-flop has its output connected with one of the respective voltage sources associated scarf ⁇ ter.
  • the number of flip-flops thus corresponds to the number of independent clamping ⁇ voltage sources.
  • each bistable flip-flop is preceded on the input side by a circuit arrangement which implements at least one logic gate.
  • This can be done in a conventional manner by interconnecting construction ⁇ elements, in particular of resistors, diodes and / or transistors.
  • the at least one logic gate performs, for example, the function of an OR operation, in particular a wired-OR operation, it can be implemented that the switching condition is satisfied if indices corresponding one of the input side, fed etcssig dimensional ⁇ a truth value. 1 This may in particular correspond to the situation in which the value reaches the falling above the cor ⁇ respond Schlden blocking element voltage the predetermined amount already mentioned or exceed.
  • the bistable flip-flop upstream circuit arrangement that implements the at least one logic gate, the input signals from those comparison elements with each other, the voltage sources other than the output side of the switch connected to the flip-flop associated switch voltage source ⁇ associated.
  • the bistable flip-flop upstream circuit arrangement that implements the at least one logic gate, the input signals from those comparison elements with each other, the voltage sources other than the output side of the switch connected to the flip-flop associated switch voltage source ⁇ associated.
  • each bistable flip-flop is preceded on the input side by at least one circuit arrangement which implements a pulse shaper.
  • the pulse shaper generates a short pulse for resetting from any previously stored switching conditions the function of the generated from the comparison ⁇ divided input signals.
  • Such embodiments can in particular serve for Ausbil ⁇ dung of symmetrical logic circuits in which all comparators are connected via a common control line.
  • the bistable flip-flop is formed as an RS flip-flop from ⁇ .
  • the bistable flip-flop upstream scarf ⁇ tion arrangement, which implements the at least one logic gate or the pulse shaper is in this context be ⁇ preferably preceded by a reset input.
  • the one comparing element is further preferably connected to a set input of the RS flip-flop, which assigned to the assigned to the output side ver ⁇ switch-bound voltage source is.
  • the switch connected to the output of the RS flip-flop is thus ge ⁇ sets in dependence on a voltage drop across the associated locking element-containing switching condition (set), that is closed, for example.
  • connected to the output of the RS flip-flop switch in dependence from ⁇ a switching condition, which depends on the voltage drop of the other, non-bridged locking elements is to ⁇ reset (reset), therefore opened again, for example.
  • RS flip-flops are generally formed symmetrically. The designation of the set input or reset input used here, however, opens up in the context of the described circuit logic.
  • the building're ⁇ abilen flip-flops or RS flip-flop can be described by two logic gates also beispiels- example. Furthermore, such flip-flops or bistable flip-flops may include a plurality of one ⁇ gears, so that even in such a component, additional logic gates are integrated. In other words, several concrete implementations are conceivable that implement the fundamental circuit logic described here.
  • FIG. 1 shows a circuit diagram of a redundant power supply with three independent voltage sources according to a first embodiment of the invention
  • FIG. 2 shows a circuit diagram of a redundant power supply with three independent voltage sources according to a second embodiment of the inven ⁇ tion.
  • FIG 1 and FIG 2 show possible embodiments of the invention it ⁇ .
  • a redundant voltage supply 100 includes meh ⁇ eral, independent in the illustrated embodiments, three, vonei- Nander voltage sources 1, 2, 3, which are connected in parallel. Each voltage source 1, 2, 3 is connected via an interposed blocking element 11, 12, 13 with a consumer 4 or more connected in series or parallel to ⁇ consumers 4.
  • the Sperrele- elements 11, 12, 13 provide a directed flow of current from the respective current source 1, 2, 3 to the common consumer ⁇ cher 4 and block a current flow in the opposite direction.
  • Each blocking element 11, 12, 13 is in each case a switch 21, 22, 23 connected in parallel in such a way that the blocking element 11, 12, 13 can be bridged via the associated switch 21, 22, 23. Furthermore, a voltage drop across the respective blocking element 11, 12, 13 can be detected by means of comparison elements 31, 32, 33.
  • the comparison elements 31, 32, 33 generie ⁇ Ren digital input signals for a downstream logic circuit, which controls the switching behavior of the switches 21, 22, 23.
  • the logic circuit combines a circuit arrangement with several logic gates 41, 42, 43.
  • the logic circuit of the second embodiment of FIG provides 2 circuit arrangements as a pulse shaper 61, 62, 63 to the Training circuit pulses serve.
  • a plurality of bistable flip-flops 51, 52, 53 are connected downstream of the circuit arrangements.
  • the bist ⁇ abile flip-flops 51, 52, 53 are RS flip-flops.
  • the logic gates 41, 42, 43 implement in the first exemplary embodiment an OR operation.
  • the comparison elements 31, 32, 33 are comparators in the exemplary embodiments shown. As can be seen from Figures 1 and 2, each voltage source ⁇ 1, 2, 3 exactly one blocking element 11, 12, 13, a scarf ⁇ ter 21, 22, 23 and a comparator 31, 32, assigned to the 33rd More precisely, the first voltage source 1, the first locking element 11, the first switch 21 and the first Ver ⁇ same element 31 assigned. Accordingly, the second voltage source 2, the second blocking element 12, the second switch 22 and the second comparison element 32 and the third ⁇ th voltage source 3, the third blocking element 13, the third switch 23 and the third comparison element 33 assigned.
  • the output of the first comparison element 31 is connected to the set input of the first bistable flip-flop 51, on the output side of which the first switch 21 is connected.
  • the redundant power supply 100 is constructed symmetrically, ie, the output of the second comparator 32 is ent ⁇ speaking with the set input of the second bistable
  • Tilting member 52 is connected, which is the output side connected to the two ⁇ th switch 22. Accordingly, the output of the third comparing element 33 is connected to the set input of the bistable flip-flop 53 drit ⁇ th, on the output side of the third switch is connected 31st
  • the reset input of the first bistable flip-flop 51, the first logic gate 41 provided ⁇ switches which input signals processed by the second and third comparator 32, 34th According to the Re ⁇ set input of the second bistable flip-flop 52 is connected upstream of the second logic gate 42 which processes input signals of the other two comparators 31, 34, so the first and the third comparator 31, 34th
  • the bistable flip-flop the drit ⁇ th 53 upstream logic gate 43 has its input side connected to the first and second comparison element 31, 32nd
  • Each pulse shaper 61, 62, 63 comprises ei ⁇ NEN capacitor 71 and a resistor 73.
  • the decoupling elements 70 implement in Verbin ⁇ dung to the common control line 75 and another abutment ⁇ stands 72 a (wired) OR gate, whose output signal is supplied to the respective pulse shaper 61, 62, 63rd From the output signal of the corresponding pulse shaper ⁇ 61,62,63 triggers the resetting of the respective downstream bistabilden
  • Tilting member 51, 52, 53 made.
  • Comparing element 31 an input signal to the downstream logic circuit which sets the first bistable flip-flop 51 and the first switch 21 closes, so that the first clamping ⁇ voltage source 1 is connected substantially without any resistance consumers with the comparison. 4
  • the flip-flop 53, 53 is reset accordingly and the second and third switches 22, 23 controlled by these components are opened. If, for example, in the course of the further operation, the voltage provided by the first voltage source 1 should decrease below a critical amount, so that a The time to flow kitge from the second voltage source 2 ⁇ set voltage is greater than the first voltage ⁇ source 1, a current begins to flow direction through the unbridged second locking element 12th This is detected by the second comparison element 32, which provides a ent ⁇ speaking input signal for the logic circuit. This causes a reset of the first bistable
  • the circuit logic described above is implemented with the aid of the pulse shapers 61, 62, 63.
  • the pulse shapers 61, 62, 63 generate a short reset pulse via the RC element formed by the capacitor 71 and the resistor 73, so that initially all the switches 21, 22, 23 are opened.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention concerne une alimentation (100) électrique redondante pour un consommateur (4), qui comprend au moins deux sources de tension (1, 2, 3) montées en parallèle. Selon l'invention, un élément de blocage (11, 12, 13) et un commutateur sont associés à chaque source de tension (1, 2, 3). Chaque élément de blocage (11, 12, 13) est disposé entre la source de tension (1, 2, 3) et le consommateur (4), et polarisé de telle manière que le passage du courant est bloqué entre les sources de tension (1, 2, 3) mais possible en direction du consommateur (4). L'élément de blocage (11, 12, 13) associé à la source de tension (1, 2, 3) peut être shunté par la fermeture du commutateur (21, 22, 23) associé à la source de tension (1, 2, 3), monté en parallèle avec ledit élément de blocage. Un circuit logique est conçu pour commuter les commutateurs (21, 22, 23) en fonction de la chute de tension aux bornes du ou des élément(s) de blocage (11, 12, 13) non shunté(s).
PCT/EP2017/073842 2016-09-22 2017-09-21 Alimentation électrique redondante, en particulier pour un consommateur WO2018055013A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016218263.3A DE102016218263B4 (de) 2016-09-22 2016-09-22 Redundante Spannungsversorgung für einen Verbraucher
DE102016218263.3 2016-09-22

Publications (1)

Publication Number Publication Date
WO2018055013A1 true WO2018055013A1 (fr) 2018-03-29

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PCT/EP2017/073842 WO2018055013A1 (fr) 2016-09-22 2017-09-21 Alimentation électrique redondante, en particulier pour un consommateur

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4812672A (en) * 1987-10-01 1989-03-14 Northern Telecom Limited Selective connection of power supplies
DE10053584A1 (de) 2000-10-25 2002-05-02 Volkswagen Ag Redundante Spannungsversorgung für sicherheitsrelevante Verbraucher
US20020135235A1 (en) * 2001-03-22 2002-09-26 Winick Bradley D. Active circuit protection for switched power supply system
WO2011085980A2 (fr) * 2010-01-13 2011-07-21 Phoenix Contact Gmbh & Co Kg Module redondant comprenant des trajets de courant symétriques

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4617473A (en) 1984-01-03 1986-10-14 Intersil, Inc. CMOS backup power switching circuit
US5608273A (en) 1991-11-25 1997-03-04 At&T Global Information Solutions Company Battery back-up for electronic circuits
DE102004035126B4 (de) 2004-07-20 2006-06-14 Austriamicrosystems Ag Schaltungsanordnung zur alternativen Spannungsversorgung einer Last aus mehreren Spannungsquellen und Verfahren zum alternativen Verbinden von Versorgungsspannungsanschlüssen mit einem gemeinsamen Lastanschluss

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4812672A (en) * 1987-10-01 1989-03-14 Northern Telecom Limited Selective connection of power supplies
DE10053584A1 (de) 2000-10-25 2002-05-02 Volkswagen Ag Redundante Spannungsversorgung für sicherheitsrelevante Verbraucher
US20020135235A1 (en) * 2001-03-22 2002-09-26 Winick Bradley D. Active circuit protection for switched power supply system
WO2011085980A2 (fr) * 2010-01-13 2011-07-21 Phoenix Contact Gmbh & Co Kg Module redondant comprenant des trajets de courant symétriques

Also Published As

Publication number Publication date
DE102016218263A1 (de) 2018-03-22
DE102016218263B4 (de) 2021-10-28

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