WO2018055013A1

WO2018055013A1 - Redundant voltage supply for a load

Info

Publication number: WO2018055013A1
Application number: PCT/EP2017/073842
Authority: WO
Inventors: Rainer Edelhäuser
Original assignee: Valeo Siemens Eautomotive Germany Gmbh
Priority date: 2016-09-22
Filing date: 2017-09-21
Publication date: 2018-03-29
Also published as: DE102016218263B4; DE102016218263A1

Abstract

The invention relates to a redundant voltage supply (100) for a load (4), the redundant voltage supply (100) comprising at least two voltage sources (1, 2, 3) connected in parallel. According to the invention, each voltage source (1, 2, 3) is allocated a blocking element (11, 12, 13) and a switch. Each blocking element (11, 12, 13) is arranged and poled between the allocated voltage source (1, 2, 3) and the load (4) such that a current flow between the voltage sources (1, 2, 3) is blocked yet is allowed in the direction towards the load (4). The blocking element (11, 12, 13) allocated to the voltage source (1, 2, 3) can be bridged by closing the switch (21, 22, 23) which is connected in parallel thereto and is allocated to the voltage source (1, 2, 3). A logic element is designed to operate the switch (21, 22, 23) depending on a drop in voltage across the non-bridged blocking element (11, 12, 13) or across the non-bridged blocking elements (11, 12, 13).

Description

description

Redundant power supply for a consumer The invention relates to a redundant power supply for a consumer, comprising at least two voltage sources arranged in parallel switching branches.

In various technical fields, in particular in the field of industrial plants or in the power ^¬ ^¬ fahrzeugtechnik Redun dante power supplies with multiple independent chip ^¬ voltage sources are intended for use by consumers. These power supplies are designed to ensure operation of the load in situations where not all power sources are available. A Derar ^¬ term situation can be caused for example by a failure of one of the intended voltage sources. Re ^¬ dundant power supplies are particularly geeig ^¬ net to ensure the power / voltage supply of safety consumers.

From DE 100 53 584 AI redundant clamping ^¬ voltage supply for a safety-relevant loads in a motor vehicle is known, for example, which len more voltage sources, which are embodied as batteries, comprising. One of the

Voltage sources is connected to charge a further battery with this via a decoupling element that a directed current flow between the voltage sources is made ^¬ light.

In general, however, a current flow between the clamping ^¬ voltage sources can cause damage. Such current flow can occur in particular if the capacitance of one of the batteries used as voltage sources see below a critical amount, thus providing a lower clamping ^¬ voltage. When operating safety-relevant Consumers must be ensured in particular in case of failure of a clamping voltage source ^¬ that no short-circuit situation arises, which leads to damage of the remaining Spannungsquel ^¬ len and / or disruption of supply to the consumer.

Starting from this prior art, it is an object of the present invention to provide an improved redundant voltage supply ^¬, wherein the provided Spannungsquel ^¬ len are effectively decoupled.

According to the invention, this object is achieved by a re ^¬ dundante power supply with the characterizing Merkma ^¬ len of claim 1.

Advantageous developments of the invention are the subject of the dependent claims.

A redundant power supply for a consumer comprises at least two voltage sources arranged in parallel switching branches. According to the invention, each voltage source ^¬ each associated with a blocking element and a switch. Each locking element being arranged between the associated clamping ^¬ voltage source and the load and poled that a current flow between the voltage sources is blocked and at the same time permits a directed flow of current in the direction of the Ver ^¬ brauchers. The blocking element associated with the voltage source can be bridged by closing the switch connected in parallel ^therewith and associated with the voltage source. A logic circuit is adapted to switch the switch in dependence from a ^¬ on the unbridged locking element or the locking elements unbridged descending chip ^¬ voltage.

In other words, the redundant power supply includes multiple power sources that provide power to a common load. The goal is to keep the consumer constantly adequately supplied with current or voltage. If, for example, the voltage source which is connected directly to the consumer ^¬ cher, ie its associated switch is closed, only provides a low voltage, so that the load is supplied through another of the provided voltage sources must be ensured. This situation could be identified, for example, by means of a direct approach, which provides for monitoring the voltage source connected to the power supply of the consumer. However, such a direct approach requires a lock-up with minimal resistance, so that a clamping ^¬ voltage drop can be detected at the disposed between the respective voltage source and the load lock member based on a measurement of the current flowing through the blocking element directed stream. The direct approach thus requires a power loss. In practical applications, in which the respective voltage source associated switches, for example, by a field effect transistor, in particular by a metal-oxide-semiconductor field effect transistor

(MOSFET) or a metal-insulator-oxide-semiconductor field effect transistor (MISFIT) is realized, therefore, this can not be completely controlled. The use in particular ^¬ sondere of such a field effect transistor makes sense, since in these components typically locking elements are already integrated as diodes.

In the present invention, therefore, is pre-schla ^¬ gene, a voltage monitoring not special on the basis of an experienced summarized voltage drop across the bridged locking member countries based on detection of Spanungsabfällen on the remaining, not bridged locking elements to provide. This has the advantage that the bridged blocking element whose associated voltage source with the consumer

Power / voltage supplied, can be connected substantially resistance-free, so that power losses are minimized. To keep a decoupling of the power supply to maintain it ^¬, thus, the voltage drop across the inactive Barrier elements, which may be formed, for example, as diodes, in particular as pn or Schottky diodes, monitored in the flow direction. When a detected current flow through one of the unbridged, that is inactive locking elements repeals existing bridging and bridging the Sperrele ^¬ ment, in which the current flow is detected. This control is performed by this correspondingly ^¬ formed logic circuit which stores the current switching state and optionally ensures the correct state transition such that the locking element is actively bridged, which is associated with the highest voltage providing tensioning ^¬ voltage source.

In particular, any voltage source that provides a DC voltage is considered a voltage source in the sense of the present invention. The voltage sources can be designed, for example, as power supplies and / or as batteries.

The logic circuit is preferably so formed to bypass the blocking element that power source by closing of the associated switch, whose supplied ^¬ ordnetem locking element when the switch is a voltage drop. Particularly preferably, the bridging of the blocking element takes place when the value of the falling voltage reaches or exceeds a predeterminable amount. This provides a stable switching behavior safe since an inactive voltage source ^¬ not activated and the associated locking element is bypassed when it supplies a boosted voltage to the active voltage ^¬ source. The defining the switching condition amount is inter alia determined by the information provided by the respective voltage source is inactive output voltage plus the forward voltage of the zugeord ^¬ Neten locking element. The logic circuit is further preferably designed to open that or those remaining switches which are the other voltage source or the other voltage sources assigned. In other words, the logic ^¬ circuit implementing such switching behavior that not only an automatic bridge this spermi- cides relements takes place at a he ^¬ knew voltage drop across any of the inactive Sperrele ^¬ ments, but also any Überbrückun ^¬ gen of rest, other voltage sources associated Sper ^¬ relements be repealed.

Particularly preferably, the logic circuit is adapted to a switching state in which one, in particular exactly one of the switches is closed, store. Upon the occurrence of the above-mentioned switching condition therefore is the entspre ^¬ sponding locking element in which a current flow or a voltage drop ^¬ tension was registered bridged. This switching state is stored, and thus maintained until a switching condition occurs again, that is detected until a Spannungsab ^¬ event over one of the unbridged locking elements. To detect the voltage drop across the corresponding

Blocking element is preferably assigned to each voltage source Ver ^¬ same element. The comparison element generates a particularly digital input signal for the logic circuit as a function of the voltage which drops across the blocking element assigned to the voltage source.

In one possible embodiment of the invention, the comparison element is a comparator. In a particularly preferred embodiment, the

Logic circuit on the input side connected to each comparator via a common control line. Such a sym ^¬ metric embodiment is advantageous because this favors a modular design of the redundant power supply. For example, must one of the provided voltage sources are ^¬ exchanges, they can about their comparator to the common control line to be connected. An wiring on ^¬ manoeuvrable with components other EXISTING ^¬ which are assigned to the voltage sources can thus be eliminated. The logic circuit comprises in a preferred embodiment ^¬ example, at least one bistable flip-flop, which is the output side connected to one of the respective voltage sources to ^¬ ordered switch. Such a bistable flip-flop provides a particularly simple circuitry implementation of a memory function, so that a

Wherein a bridge is maintained until the generated as a function of the voltage drop across the other, non-bridged Sperrele ^¬ elements switching condition is satisfied is defined switching state.

In one embodiment, the logic circuit for controlling the two voltage sources, only one bistable flip-flop, whose outputs are connected to the respective clamping ^¬ voltage sources associated switches.

Preferably, the logic circuit comprises a plurality of bistable tilt ^¬ members, each bistable flip-flop has its output connected with one of the respective voltage sources associated scarf ^¬ ter. The number of flip-flops thus corresponds to the number of independent clamping ^¬ voltage sources.

In a preferred embodiment, each bistable flip-flop is preceded on the input side by a circuit arrangement which implements at least one logic gate. This can be done in a ^conventional manner by interconnecting construction ^¬ elements, in particular of resistors, diodes and / or transistors. If the at least one logic gate performs, for example, the function of an OR operation, in particular a wired-OR operation, it can be implemented that the switching condition is satisfied if nigstens corresponding one of the input side, fed Eingangssig dimensional ^¬ a truth value. 1 This may in particular correspond to the situation in which the value reaches the falling above the cor ^¬ respondierenden blocking element voltage the predetermined amount already mentioned or exceed.

In one possible embodiment, the bistable flip-flop upstream circuit arrangement that implements the at least one logic gate, the input signals from those comparison elements with each other, the voltage sources other than the output side of the switch connected to the flip-flop associated switch voltage source ^¬ associated. In other words, which is con- trolled on the output side of the bistable flip-flop of the switches is switched in response to the voltage provided by the other power supplies of the redundant Spannungsversor ^¬ supply.

In another embodiment, each bistable flip-flop is preceded on the input side by at least one circuit arrangement which implements a pulse shaper. The pulse shaper generates a short pulse for resetting from any previously stored switching conditions the function of the generated from the comparison ^¬ divided input signals. Such embodiments can in particular serve for Ausbil ^¬ dung of symmetrical logic circuits in which all comparators are connected via a common control line. Preferably, the bistable flip-flop is formed as an RS flip-flop from ^¬ . The bistable flip-flop upstream scarf ^¬ tion arrangement, which implements the at least one logic gate or the pulse shaper is in this context be ^¬ preferably preceded by a reset input. Further, the one comparing element is further preferably connected to a set input of the RS flip-flop, which assigned to the assigned to the output side ver ^¬ switch-bound voltage source is. The switch connected to the output of the RS flip-flop is thus ge ^¬ sets in dependence on a voltage drop across the associated locking element-containing switching condition (set), that is closed, for example. Further, connected to the output of the RS flip-flop switch in dependence from ^¬ a switching condition, which depends on the voltage drop of the other, non-bridged locking elements is to ^¬ reset (reset), therefore opened again, for example. It is understood that RS flip-flops are generally formed symmetrically. The designation of the set input or reset input used here, however, opens up in the ^{context of} the described circuit logic. The building're ^¬ abilen flip-flops or RS flip-flop can be described by two logic gates also beispiels- example. Furthermore, such flip-flops or bistable flip-flops may include a plurality of one ^¬ gears, so that even in such a component, additional logic gates are integrated. In other words, several concrete implementations are conceivable that implement the fundamental circuit logic described here.

For a further description of the invention reference is made to the embodiment shown in the drawing figures. They show in a schematic representation:

1 shows a circuit diagram of a redundant power supply with three independent voltage sources according to a first embodiment of the invention, and

2 shows a circuit diagram of a redundant power supply with three independent voltage sources according to a second embodiment of the inven ^¬ tion.

Corresponding parts are provided in all figures with the same reference numerals. FIG 1 and FIG 2 show possible embodiments of the invention it ^¬. A redundant voltage supply 100 includes meh ^¬ eral, independent in the illustrated embodiments, three, vonei- Nander voltage sources 1, 2, 3, which are connected in parallel. Each voltage source 1, 2, 3 is connected via an interposed blocking element 11, 12, 13 with a consumer 4 or more connected in series or parallel to ^¬ consumers 4. The Sperrele- elements 11, 12, 13 provide a directed flow of current from the respective current source 1, 2, 3 to the common consumer ^¬ cher 4 and block a current flow in the opposite direction.

Each blocking element 11, 12, 13 is in each case a switch 21, 22, 23 connected in parallel in such a way that the blocking element 11, 12, 13 can be bridged via the associated switch 21, 22, 23. Furthermore, a voltage drop across the respective blocking element 11, 12, 13 can be detected by means of comparison elements 31, 32, 33. The comparison elements 31, 32, 33 generie ^¬ Ren digital input signals for a downstream logic circuit, which controls the switching behavior of the switches 21, 22, 23.

In the example shown in FIG 1 the first embodiment to ^¬ the logic circuit combines a circuit arrangement with several logic gates 41, 42, 43. In contrast, the logic circuit of the second embodiment of FIG provides 2 circuit arrangements as a pulse shaper 61, 62, 63 to the Training circuit pulses serve. In any case, a plurality of bistable flip-flops 51, 52, 53 are connected downstream of the circuit arrangements. Specifically, the bist ^¬ abile flip-flops 51, 52, 53 are RS flip-flops.

The logic gates 41, 42, 43 implement in the first ^exemplary embodiment an OR operation. The comparison elements 31, 32, 33 are comparators in the exemplary embodiments shown. As can be seen from Figures 1 and 2, each voltage source ^¬ 1, 2, 3 exactly one blocking element 11, 12, 13, a scarf ^¬ ter 21, 22, 23 and a comparator 31, 32, assigned to the 33rd More precisely, the first voltage source 1, the first locking element 11, the first switch 21 and the first Ver ^¬ same element 31 assigned. Accordingly, the second voltage source 2, the second blocking element 12, the second switch 22 and the second comparison element 32 and the third ^¬ th voltage source 3, the third blocking element 13, the third switch 23 and the third comparison element 33 assigned.

The output of the first comparison element 31 is connected to the set input of the first bistable flip-flop 51, on the output side of which the first switch 21 is connected. The redundant power supply 100 is constructed symmetrically, ie, the output of the second comparator 32 is ent ^¬ speaking with the set input of the second bistable

Tilting member 52 is connected, which is the output side connected to the two ^¬ th switch 22. Accordingly, the output of the third comparing element 33 is connected to the set input of the bistable flip-flop 53 drit ^¬ th, on the output side of the third switch is connected 31st

In the first embodiment, the reset input of the first bistable flip-flop 51, the first logic gate 41 provided ^¬ switches which input signals processed by the second and third comparator 32, 34th According to the Re ^¬ set input of the second bistable flip-flop 52 is connected upstream of the second logic gate 42 which processes input signals of the other two comparators 31, 34, so the first and the third comparator 31, 34th The bistable flip-flop the drit ^¬ th 53 upstream logic gate 43 has its input side connected to the first and second comparison element 31, 32nd In the second embodiment, the reset input of the bistable flip-flop 51 th ers ^¬ a circuit arrangement provided ^¬ switches that implements a first pulse shaper 61st ^Accordingly , the reset input of the second and third bistable flip-flop 52, 53 is preceded by a second or third pulse shaper 62, 63. Each pulse shaper 61, 62, 63 comprises ei ^¬ NEN capacitor 71 and a resistor 73. About the Entkopp ^¬ ment element 70, the logic circuit with each comparison ^¬ member 31, 32, 33 via a common control line 75 connected. The decoupling elements 70 implement in Verbin ^¬ dung to the common control line 75 and another abutment ^¬ stands 72 a (wired) OR gate, whose output signal is supplied to the respective pulse shaper 61, 62, 63rd From the output signal of the corresponding pulse shaper ^¬ 61,62,63 triggers the resetting of the respective downstream bistabilden

Tilting member 51, 52, 53 made.

In the following, the fundamental circuit behavior implemented by the logic circuit of the first and second embodiments will be illustrated by means of an example. Represents, for example, at a time the first clamping ^¬ voltage source 1 in comparison to the other power sources 2, 3 the highest voltage available, a substantial current flows through the first locking element 11, which as a voltage ^¬ drop across the first lock member 11 from the first comparative member 31 is detected. In this case, the first generates

Comparing element 31 an input signal to the downstream logic circuit which sets the first bistable flip-flop 51 and the first switch 21 closes, so that the first clamping ^¬ voltage source 1 is connected substantially without any resistance consumers with the comparison. 4 The second and third bistable

The flip-flop 53, 53 is reset accordingly and the second and third switches 22, 23 controlled by these components are opened. If, for example, in the course of the further operation, the voltage provided by the first voltage source 1 should decrease ^below a critical amount, so that a The time to flow bereitge from the second voltage source 2 ^¬ set voltage is greater than the first voltage ^¬ source 1, a current begins to flow direction through the unbridged second locking element 12th This is detected by the second comparison element 32, which provides a ent ^¬ speaking input signal for the logic circuit. This causes a reset of the first bistable

Tilting member 51 and opening the first switch 21. At the same time ^¬ the second bistable flip-flop 52 is set and the second switch 22 is closed, so that now the second blocking element 12 is bridged.

In the second exemplary embodiment of FIG. 2, the circuit ^logic described above is implemented with the aid of the pulse shapers 61, 62, 63. As soon as one of the voltage sources 1, 2, 3, whose assigned is blocking element 11, 12, 13 do not have ^¬ bridged, carries a current towards the load 4 at ^¬, this is detected by the associated comparator 11, 12, 13, which comprises common control line 75 pulls to a high level. The pulse shapers 61, 62, 63 generate a short reset pulse via the RC element formed by the capacitor 71 and the resistor 73, so that initially all the switches 21, 22, 23 are opened. As is expected, however, that only the one power source 1, 2, 3 current contributes which has the switching condition originally triggered and their zugeord ^¬ scribed comparing element 31, 32, 33 still provides a Eingangssig ^¬ nal with high-level, the purpose Corresponding ^¬ dierende switch 21, 22, 23 closed. Although WUR illustrates the invention in detail with reference to the preferred embodiments in greater detail and described ^¬, so the invention is not restricted by this. An ^¬ particular variations and combinations can be abge by those skilled ^¬ passes without departing from the essential spirit of the invention. The redundant power supply can in particular ^¬ any special number of independent Spannungsquel- len 1, 2, 3 have. So could, for example more lo ^¬ gikgatter 41, 42, 43 be provided in order to implement 3 is an equivalent circuit logic for a redundant voltage supply 100 with more than three voltage sources 1, 2,. In embodiments, the only two voltage sources 1, 2 umfas ^¬ sen, could accordingly, the logic gate 41 shown in Figure 1, 42 dispensed with and the outputs of the corresponding Ver ^¬ same members 31, 32, for example, directly to the reset inputs of the bistable flip-flops 51, 52 get connected. The essential idea is seen in ensuring the decoupling of the existing voltage sources 1, 2, 3 using a surveil ^¬ monitoring of the present time unbridged locking elements 11, 12, 13, so that the respective active power source 1, 2, 3 substantially resistor ^¬ can be connected freely with the consumer 4.

Claims

claims

1. A redundant power supply (100) for a consumer (4), comprising at least two voltage sources (1, 2, 3) arranged in parallel switching branches,

characterized in that each voltage source (1, 2, 3) are each a locking element (11, 12, 13) and a switch is added ^¬ assigns, each locking element (11, 12, 13) such Zvi ^¬ rule of the associated voltage source (1 , 2, 3) and the consumer (4) is arranged and poled in such a way that a current flow between the voltage sources (1, 2, 3) is blocked, whereby the blocking element (11, 2, 3) assigned to the voltage source (1, 2, 3) 12, 13) by closing the parallel therewith, the voltage source (1, 2, associated 3) switch (21, 22, 23) can be bridged, wherein a logic circuit to be ^¬ forms, the switch (21, 22, 23) in response to a via the non-bridged blocking element (11, 12, 13) or via the non-bridged locking elements (11, 12, 13) abfal ^¬ loin voltage to switch.

2. Redundant power supply (100) according to claim 1, characterized in that the logic circuit is ^¬ forms is, the blocking element (11, 12, 13) of that voltage ^¬ voltage source (1, 2, 3) by closing the associated switch- ter (21, 22, 23) to bridge over whose associated blocking element (11, 12, 13) when the switch (21, 22, 23), a voltage drops whose value reaches or exceeds a predetermined Be ^{¬ contract} . 3. Redundant power supply (100) according to claim 2, characterized in that the logic circuit is ^¬ forms to those other switches (21, 22, 23) to öff ^¬ NEN, which of the other voltage source (1, 2, 3) or the other voltage sources (1, 2,

3) are assigned.

4. Redundant power supply (100) according to claim 2 or 3, characterized in that the logic circuit is ^{ausgebil ¬} det, a switching state in which one of the switches (21, 22, 23) is closed to store.

5. Redundant power supply (100) according to one of the preceding claims,

characterized in that each voltage source (1, 2, 3) is assigned a comparison element (31, 32, 33) which generates an input signal for the logic circuit as a function of the voltage which is assigned to that of the voltage source (1, 2, 3) Locking element (11, 12, 13) drops.

6. redundant power supply (100) according to claim 5, characterized in that the comparison element (31, 32, 33) is a comparator.

7. Redundant power supply (100) according to one of the preceding claims,

characterized in that the logic circuit input side, with each comparator (31, 32, 33) is connected via a common ^¬ same control line (75).

8. Redundant power supply (100) according to one of the preceding claims,

characterized in that the logic circuit comprises at least one bistable flip-flop (51, 52, 53), which on the output side is connected to one of the respective voltage sources (1, 2, 3) associated switch (21, 22, 23).

9. redundant power supply (100) according to any one of the preceding claims 1 to 7,

characterized in that the logic circuit comprises a plurality of bistable flip-flops (51, 52, 53), each bist ^¬ abiles flip-flop (51, 52, 53) on the output side with one of the respective voltage sources (1, 2, 3) associated Schal ^¬ ter (21, 22, 23) is connected.

10. A redundant power supply (100) according to claim 8 or 9,

characterized in that each bistable flip-flop (51, 52, 53) is preceded on the input side by at least one circuit arrangement which implements at least one logic gate (41, 42, 43).

11. Redundant power supply (100) according to claim 10, characterized in that the bistable flip-flop (51, 52, 53) upstream of, the at least one logic gate (41, 42, 43) implementing circuitry linking the A ^¬ output signals from those of Comparative members together which are associated with other voltage sources (1, 2, 3) than the voltage source (1, 2, 3) assigned to the output side connected switch (21, 22, 23).

12. Redundant power supply (100) according to one of

Claims 8 to 11,

characterized in that each bistable flip-flop (51, 52, 53) on the input side, at least one circuit arrangement is connected upstream, which a pulse shaper (61, 62, 63) in ^¬ implements.

13. Redundant power supply (100) according to one of the preceding claims 8 to 12,

characterized in that the at least one Logikgat ^¬ ter (41, 42, 43) or the pulse shaper (61, 62, 63) implemen ^¬ animal end circuitry of a reset input of a formed as a RS flip-flop bistable flip-flop (51, 52, 53 ) is connected upstream.

14. Redundant power supply (100) according to one of the preceding claims 8 to 13,

characterized in that the comparison element (31, 32, 33) is provided with a set input of an RS flip-flop designed as a the bistable flip-flop (51, 52, 53) is connected, wel ^¬ Ches the output side connected switch (21, 22, 23) associated voltage source (1, 2, 3) is assigned.