WO2018011648A1 - Oxyde métallique, et dispositif semi-conducteur comportant ledit oxyde métallique - Google Patents

Oxyde métallique, et dispositif semi-conducteur comportant ledit oxyde métallique Download PDF

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WO2018011648A1
WO2018011648A1 PCT/IB2017/053614 IB2017053614W WO2018011648A1 WO 2018011648 A1 WO2018011648 A1 WO 2018011648A1 IB 2017053614 W IB2017053614 W IB 2017053614W WO 2018011648 A1 WO2018011648 A1 WO 2018011648A1
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metal oxide
oxide
layer
insulating film
film
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PCT/IB2017/053614
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Japanese (ja)
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WO2018011648A9 (fr
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山崎舜平
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株式会社半導体エネルギー研究所
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • One embodiment of the present invention relates to a metal oxide.
  • one embodiment of the present invention is not limited to the above technical field.
  • the technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method.
  • one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter).
  • one embodiment of the present invention relates to a metal oxide or a method for manufacturing the metal oxide.
  • One embodiment of the present invention relates to a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof.
  • Oxides are attracting attention as semiconductor materials applicable to transistors.
  • an In—Zn—Ga oxide, an In—Zn—Ga—M oxide, an In—Zn oxide, an In—Sn oxide, an In oxide, and an In—Ga oxide are disclosed.
  • a field effect transistor having an amorphous oxide that is one of a Sn—In—Zn-based oxide is disclosed.
  • Non-Patent Document 1 a structure including a two-layer metal oxide of an In—Zn—O-based oxide and an In—Ga—Zn—O-based oxide as an active layer of a transistor is studied. Yes.
  • Patent Document 1 In-Zn-Ga-based oxide, In-Zn-Ga-Mg-based oxide, In-Zn-based oxide, In-Sn-based oxide, In-based oxide, and In-Ga-based oxide
  • the active layer of the transistor is formed using an amorphous oxide which is one of Sn—In—Zn-based oxides.
  • the active layer of the transistor includes any one of the above oxides.
  • the on-current which is one of the electrical characteristics of the transistor, is lowered.
  • the active layer of the transistor is formed of any one of the above amorphous oxides, there is a problem that the reliability of the transistor is deteriorated.
  • Non-Patent Document 1 in a channel protection type bottom-gate transistor, the active layer of the transistor is a two-layer stack of In—Zn oxide and In—Ga—Zn oxide, and a channel is formed.
  • an S value also referred to as Subthreshold Swing, SS
  • SS Subthreshold Swing
  • SS Subthreshold Swing
  • SS Subthreshold Swing
  • SS a threshold voltage
  • Vth which is one of transistor characteristics is ⁇ 2.9 V, which is a so-called normally-on transistor characteristic.
  • an object of one embodiment of the present invention is to provide a novel metal oxide. Another object of one embodiment of the present invention is to impart favorable electrical characteristics to a semiconductor device. Another object is to provide a highly reliable semiconductor device. Another object is to provide a semiconductor device with a novel structure. Another object is to provide a display device with a novel structure.
  • One embodiment of the present invention is a metal oxide having a plurality of energy gaps, and the metal oxide has a higher energy level at the lower end of the conduction band of the energy band and an energy higher than that of the first layer.
  • the difference in energy level at the lower end of the band is 0.2 eV or more, and the first layer and the second layer are metal oxides alternately stacked.
  • Another embodiment of the present invention is a metal oxide including a first layer having a first energy gap and a second layer having a second energy gap.
  • the energy level at the lower end of the conduction band is higher than the first layer, the first layer contains the first oxide of the first metal element, and the second layer contains the second oxide of the second metal element.
  • the first oxide includes a third element different from the first metal element in order to increase the energy gap, and the concentration of the third element in the first layer is 3 element is higher than the concentration of the third element in the second layer, the first layer and the second layer are metal oxides stacked alternately.
  • the first metal element is Ga
  • the second metal element is In
  • the third element can be at least one selected from Al, Si, Mg, Zr, Be, and B.
  • the first layer may further contain In and Zn, and the second layer may further contain Zn.
  • a novel metal oxide can be provided.
  • favorable electrical characteristics can be imparted to a semiconductor device.
  • a highly reliable semiconductor device can be provided.
  • a semiconductor device with a novel structure can be provided.
  • a display device with a novel structure can be provided.
  • 2A and 2B are diagrams illustrating a transistor and a schematic diagram illustrating energy level distribution in the transistor.
  • 10A and 10B each illustrate a band diagram model of a transistor.
  • 10A and 10B each illustrate a band diagram model of a transistor.
  • 6A and 6B illustrate a transistor.
  • 6A and 6B illustrate a transistor.
  • 6A and 6B illustrate a transistor.
  • 6A and 6B illustrate a transistor.
  • 10A and 6B illustrate a transistor.
  • 10A to 10D illustrate a method for manufacturing a transistor.
  • 10A to 10D illustrate a method for manufacturing a transistor.
  • 10A to 10D illustrate a method for manufacturing a transistor.
  • 8A and 8B illustrate a structure example of a display panel.
  • 8A and 8B illustrate a structure example of a display panel.
  • a transistor is an element having at least three terminals including a gate, a drain, and a source.
  • a channel region is provided between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and a current flows through the drain, channel region, and source. It is something that can be done.
  • a channel region refers to a region through which a current mainly flows.
  • the functions of the source and drain may be switched when transistors having different polarities are employed or when the direction of current changes during circuit operation. Therefore, in this specification and the like, the terms source and drain can be used interchangeably.
  • a silicon oxynitride film refers to a film having a higher oxygen content than nitrogen, and a silicon nitride oxide film has a nitrogen content as compared to oxygen. Represents a film with a large amount.
  • parallel means a state in which two straight lines are arranged at an angle of ⁇ 10 ° to 10 °. Therefore, the case of ⁇ 5 ° to 5 ° is also included.
  • substantially parallel means a state in which two straight lines are arranged at an angle of ⁇ 30 ° to 30 °.
  • Vertical refers to a state in which two straight lines are arranged at an angle of 80 ° to 100 °. Therefore, the case of 85 ° to 95 ° is also included.
  • substantially vertical means a state in which two straight lines are arranged at an angle of 60 ° to 120 °.
  • normally-on refers to an on state when no potential is applied by a power source (0 V).
  • normally-on characteristics may refer to electrical characteristics in which the threshold voltage is negative when the voltage applied to the gate of the transistor is 0V.
  • a metal oxide is a metal oxide in a broad expression.
  • Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply OS), and the like.
  • oxide semiconductors also referred to as oxide semiconductors or simply OS
  • the metal oxide may be referred to as an oxide semiconductor. That is, in the case of describing as an OS FET, it can be said to be a transistor including a metal oxide or an oxide semiconductor.
  • the metal oxide of one embodiment of the present invention preferably contains at least In. In particular, it is preferable to contain In and Zn.
  • the metal oxide of one embodiment of the present invention includes M (M is at least two selected from Al, Ga, Si, Mg, Zr, Be, and B). May be.
  • M is preferably at least two selected from Al, Ga, and Si.
  • M is Al and Ga, Al and Si, or a combination of Ga and Si.
  • nitride Specifically, as M, aluminum nitride or silicon nitride can be used.
  • M is preferably contained in the metal oxide at a concentration of 1 to 50 atomic%.
  • Examples of the metal oxide of one embodiment of the present invention include In—Al—Ga—Zn oxide, In—Al—Si—Zn oxide, and In—Ga—Si—Zn oxide.
  • the metal oxide of one embodiment of the present invention includes a plurality of components.
  • the metal oxide of one embodiment of the present invention includes a first layer and a second layer, and the first layer is M (M is Al, Ga, Si, Mg, Be, and B). (At least two selected) oxides and In-M-Zn oxides, and the first layer includes In oxides and In-Zn oxides.
  • first layer and the second layer may have a mixed region.
  • the metal oxide of one embodiment of the present invention includes a plurality of layers, the metal oxide has a plurality of energy gaps. More specifically, the metal oxide of one embodiment of the present invention has the energy level at the lower end of the conduction band of a plurality of energy bands.
  • the metal oxide of one embodiment of the present invention includes a first layer having a relatively high energy level at the lower end of the energy band and an energy at the lower end of the energy band of the energy band than the first region.
  • a second layer having a relatively low level, and the second layer has more carriers than the first layer, and the energy at the lower end of the conduction band between the first layer and the second layer.
  • the level difference is 0.2 eV or more.
  • the metal oxide as a semiconductor for a transistor, a transistor with high field-effect mobility and high switching characteristics can be realized. In addition, a highly reliable transistor can be realized.
  • FIG. 1A is a schematic view of a transistor in which the metal oxide is used for a channel region.
  • a transistor includes a source, a drain, a first gate, a second gate, a first gate insulating portion, and a second gate insulating portion.
  • the resistance of the channel portion can be controlled by a potential applied to the gate. That is, conduction (transistor is on) and non-conduction (transistor is off) between the source and the drain can be controlled by a potential applied to the first gate or the second gate.
  • the metal oxide 101b included in the channel portion includes an oxide 101bw having a first band gap as a first layer and an oxide 101bn having a second band gap as a second layer. It has the structure which overlaps. For example, as illustrated in FIG. 1A, the oxide 101bw_1 is provided over the oxide 101bw_1 in contact with the second gate insulating portion, and thereafter the oxide 101bw and the oxide 101bn are alternately provided. The structure is in contact with the first gate insulating portion. Note that n is 2 or more, preferably 3 or more and 10 or less.
  • the oxide 101bw_1 is provided over the oxide 101bn_1 in contact with the second gate insulating portion, the oxide 101bn and the oxide 101bw are alternately provided, and the oxide 101bn_n is in contact with the first gate insulating portion. You can also
  • the first band gap is larger than the second band gap, and the difference is 0.1 eV or more and 1.3 eV or less.
  • the carrier density of the oxide 101bn having the second band gap is higher than the carrier density of the oxide 101bw having the first band gap.
  • the carrier density of the oxide 101 bw having the first band gap is 1 ⁇ 10 10 cm ⁇ 3 or more and 1 ⁇ 10 16 cm ⁇ 3 or less, preferably about 1 ⁇ 10 15 cm ⁇ 3 .
  • the carrier density of the oxide 101bn having the second band gap is preferably greater than or equal to 1 ⁇ 10 18 cm ⁇ 3 and less than 1 ⁇ 10 21 cm ⁇ 3 .
  • the thickness of the oxide 101bw having the first band gap has a region of 0.1 nm to less than 30 nm, preferably 0.1 nm to 10 nm, and more preferably 0.1 nm to 3 nm.
  • the thickness of the oxide 101bn having the second band gap has a region of 0.1 nm to less than 30 nm, preferably 0.1 nm to 10 nm, and more preferably 0.1 nm to 3 nm.
  • the oxide 101bw having the first band gap includes M (M is at least two selected from Al, Ga, Si, Mg, Zr, Be, and B) oxide,
  • M is at least two selected from Al, Ga, Si, Mg, Zr, Be, and B
  • a metal oxide containing -M-Zn oxide can be used.
  • an In—Ga—Al—Zn oxide or an In—Ga—Si—Zn oxide can be used as the oxide 101bw.
  • the oxide 101bn having the second band gap preferably contains In, Zn, or the like. Further, nitrogen may be included.
  • an In oxide, an In—Zn oxide, an In—Zn oxide containing nitrogen, an In—Zn nitride, an In—Ga—Zn oxide containing nitrogen, or the like can be used.
  • FIG. 1B is a schematic diagram illustrating the distribution of energy levels between the source and the drain of the transistor illustrated in FIG.
  • the solid line indicates the energy at the lower end of the conduction band.
  • a dashed line indicated by E f indicates the energy of the quasi-Fermi level of electrons.
  • the first gate voltage a negative voltage is applied between the gate and the source, a case of applying the drain voltage (V d> 0) between the source and the drain.
  • FIG. 3 shows an example of an energy band of an oxide used for this transistor.
  • Ec can be obtained from the ionization potential Ip and the band gap Eg, which are the difference between the vacuum level and the energy at the top of the valence band.
  • the band gap Eg can be measured using a spectroscopic ellipsometer (HORIBA JOBIN YVON UT-300).
  • the ionization potential Ip can be measured using an ultraviolet photoelectron spectroscopy (UPS: Ultraelectron Spectroscopy) apparatus (PHI VersaProbe).
  • UPS ultraviolet photoelectron spectroscopy
  • the oxide 101bn having the second band gap has a relatively narrow band gap than the oxide 101bw having the first band gap, so that the oxide having the second band gap is oxidized.
  • the Ec end of the object 101bn exists at a position relatively lower than the Ec end of the oxide 101bw having the first band gap.
  • the junction between the oxide 101bn having the second band gap and the oxide 101bw having the first band gap has fluctuations in the aggregated form and composition of the oxide, or Since a part of the oxide 101bw having the first band gap may be included in the oxide 101bn having the second band gap, the band is not discontinuous but continuous as shown in FIG. Has changed.
  • the Al oxide is more than an In oxide, an In—Zn oxide, and a Ga oxide. Is also highly insulating. That is, Al oxide has a larger band gap than In oxide, In—Zn oxide, and Ga oxide.
  • a property attributed to the oxide 101bn having the second band gap and a property attributed to the oxide 101bw having the first band gap Can operate in a complementary manner, so that a high on-current (I on ), a high field-effect mobility ( ⁇ ), and a low off-current (I off ) can be realized. It can be.
  • Al having the above structure may be Si, Mg, Zr, Be, or B.
  • the component of the oxide 101bw having the first band gap can be In—Ga—Al—Zn oxide
  • the component of the oxide 101bn having the second band gap can be In—Zn oxide.
  • the first band gap is 3.3 eV or the vicinity thereof
  • the second band gap is 2.4 eV or the vicinity thereof.
  • the band gap value a value obtained by measuring a single film of each material with an ellipsometer can be used.
  • the difference between the first band gap and the second band gap is preferably at least 0.2 eV or more.
  • the position of the energy at the top of the valence band derived from the oxide 101bw having the first band gap may be different from the position of the energy at the top of the valence band derived from the oxide 101bn having the second band gap. Therefore, the difference between the first band gap and the second band gap is preferably 0.3 eV or more, and more preferably 0.4 eV or more.
  • FIGS. 4A, 4 ⁇ / b> B, and 4 ⁇ / b> C model diagrams of band diagrams on a solid line indicated by X-X ′ are illustrated in FIGS. 4A, 4 ⁇ / b> B, and 4 ⁇ / b> C. Note that when a voltage is applied to the first gate electrode (1stGate E.), the same voltage is also applied to the second gate electrode (2ndGate E.).
  • FIG. 4A shows a state (ONState) in which a positive voltage (V g > 0) is applied between the gate and the source as the first gate voltage V g .
  • FIG. 4C shows a state (OFFState) in which a negative voltage (V g ⁇ 0) is applied between the gate and the source as the first gate voltage V g .
  • the solid line indicates the energy at the lower end of the conduction band.
  • a dash-dot line indicated by E f indicates the energy of the quasi-Fermi level of electrons.
  • the first layer having the first band gap and the second layer having the second band gap interact electrically.
  • the first layer having the first band gap and the second layer having the second band gap function in a complementary manner.
  • the second band gap having a low Ec end and a second band gap is formed.
  • the layer becomes the main conduction path, and electrons (Electron (Carrier)) flow, and at the same time, electrons flow in the first layer having the first band gap. Therefore, a high current driving capability, that is, a large on current and a high field effect mobility can be obtained in the on state of the transistor.
  • the first gate gap having the first band gap is obtained. Since one layer behaves as a dielectric (insulator), the conduction path in the first layer is blocked. Further, the second layer having the second band gap is in contact with the first layer having the first band gap. Accordingly, the first layer having the first band gap electrically interacts with the second layer having the second band gap in addition to itself, and the second layer having the second band gap. Even the conduction path inside is cut off. Thus, the entire channel portion is turned off and the transistor is turned off.
  • leakage current between the gate and the source or drain can be reduced or prevented when the transistor operates, for example, when a potential difference is generated between the gate and the source or drain.
  • a metal oxide S3 is provided between the metal oxide 101b having a multilayer structure and the first gate insulating portion (GI), and the metal oxide A structure in which a metal oxide S1 is provided between 101b and the second gate insulating portion (GI) can also be employed.
  • the metal oxide 101b has a three-layer structure in which the oxide 101bn having the second band gap is sandwiched between the oxide 101bw_1 and the oxide 101bw_2 having the first band gap, and is referred to as a metal oxide S2. .
  • the oxide 101bw_1 is in contact with the metal oxide S1
  • the oxide 101bw_2 is in contact with the metal oxide S3.
  • a material having a band gap larger than that of the oxide 101bw can be used.
  • a material to which M is added more than the oxide 101bw can be used.
  • an In—Ga—Zn oxide obtained by adjusting the atomic ratio of In, Ga, and Zn can be used.
  • the metal oxide S2 sandwiched between the metal oxide S1 and the metal oxide S3 has a higher conductivity ⁇ than the metal oxide S1 and the metal oxide S3, and functions as a channel.
  • the lower end of the conduction band of the metal oxide S2 is obtained from the energy level of the lower end of the conduction band of the metal oxide S1 and the metal oxide S3.
  • the energy level decreases, and an energy difference occurs at the lower end of the conduction band.
  • the oxide 101bn having the second band gap has a higher carrier density than the oxides 101bw_1 and 101bw_2 having the first band gap, and is compared with the oxides 101bw_1 and 101bw_2 having the first band gap.
  • the level (Ef) is close to the lower end of the conduction band (Ec).
  • the metal oxide S2 as a buried channel, the effect of reducing the interfacial scattering of carriers and the effect of providing the metal oxide S2 with the oxide 101bn having a high carrier density are combined to provide a high electric field effect. Mobility can be realized.
  • the metal oxide S2 has a structure in which a trap level is hardly formed.
  • the trap level may be farther from the vacuum level than the energy level (Ec) at the lower end of the conduction band of the metal oxide S2 functioning as a channel region, and electrons are likely to accumulate in the trap level. Accumulation of electrons at the trap level results in a negative fixed charge, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is preferable that the trap level be closer to the vacuum level than the energy level (Ec) at the lower end of the conduction band of the metal oxide S2. By doing so, electrons are unlikely to accumulate in the trap level, the on-state current of the transistor can be increased, and field effect mobility can be increased.
  • the metal oxides S1 and S3 have a lower energy level at the bottom of the conduction band than the metal oxide S2, and typically the energy level at the bottom of the conduction band of the metal oxide S2, and the metal
  • the difference from the energy level at the lower end of the conduction band of the oxides S1 and S3 is 0.15 eV or more, or 0.5 eV or more, and 2 eV or less, or 1 eV or less. That is, the difference between the electron affinity of the metal oxides S1 and S3 and the electron affinity of the metal oxide S2 is 0.15 eV or more, or 0.5 eV or more, and 2 eV or less, or 1 eV or less.
  • the metal oxide S2 becomes a main current path. That is, the metal oxide S2 has a function as a channel region, and the metal oxides S1 and S3 have a function as an oxide insulating film.
  • the metal oxides S1 and S3 are preferably metal oxides composed of one or more metal elements constituting the metal oxide S2 in which the channel region is formed.
  • the metal oxides S1 and S3 can also be called oxide insulating films because of their physical properties and / or functions.
  • the metal oxides S1 and S3 have an electron affinity (difference between the vacuum level and the energy level at the bottom of the conduction band) smaller than that of the metal oxide S2, and the energy level at the bottom of the conduction band is the metal oxide S2.
  • a material having a difference (band offset) from the lower energy level of the conduction band is used.
  • the energy level at the lower end of the conduction band of the metal oxides S1 and S3 is lower than the lower end of the conduction band of the metal oxide S2. It is preferable to use a material closer to the vacuum level than the energy level.
  • the difference between the energy level at the lower end of the conduction band of the metal oxide S2 and the energy level at the lower end of the conduction bands of the metal oxides S1 and S3 may be 0.2 eV or more, preferably 0.5 eV or more. preferable.
  • a metal oxide in which the hydrogen concentration in the film is reduced is preferably used.
  • a metal oxide having a reduced hydrogen concentration in the film may be referred to as high purity intrinsic or substantially high purity intrinsic.
  • a metal oxide that is highly purified intrinsic or substantially highly purified intrinsic has few carriers due to hydrogen (for example, V o H in which hydrogen is present in oxygen vacancies), and thus the carrier density can be lowered.
  • a metal oxide that is highly purified intrinsic or substantially highly purified intrinsic has a low defect level density, and thus may have a low trap level density.
  • the charge trapped in the trap level of the metal oxide takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel region is formed in a metal oxide having a high trap state density may have unstable electrical characteristics.
  • impurities include hydrogen and alkali metals.
  • the concentration of carbon in the metal oxide and the concentration of carbon in the vicinity of the interface with the metal oxide are set to 2 ⁇ 10 18 atoms. / Cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
  • the concentration of the alkali metal in the metal oxide obtained by SIMS is 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
  • oxygen deficiency V o
  • hydrogen contained in the metal oxide reacts with oxygen bonded to metal atoms to become water, and thus may form oxygen deficiency (V o ).
  • V o oxygen deficiency
  • electrons as carriers may be generated.
  • a part of hydrogen may be combined with oxygen bonded to a metal atom to generate electrons as carriers. Therefore, a transistor using a metal oxide containing hydrogen is likely to be normally on. For this reason, it is preferable that hydrogen in the metal oxide is reduced as much as possible.
  • the hydrogen concentration obtained by SIMS is 1 ⁇ 10 16 atoms / cm 3 or more and less than 3 ⁇ 10 21 atoms / cm 3 , preferably 1 ⁇ 10 17 atoms / cm 3 or more and 3 ⁇ . It should be less than 10 20 atoms / cm 3 .
  • oxygen vacancies (V o ) in the metal oxide can be reduced by introducing oxygen into the metal oxide.
  • the oxygen deficiency in the metal oxide (V o) that the oxygen is compensated, oxygen vacancy (V o) is lost. Therefore, by diffusing oxygen into the metal oxide, oxygen vacancies (V o ) of the transistor can be reduced and reliability can be improved.
  • an oxide containing more oxygen than oxygen in contact with the stoichiometric composition can be provided in contact with the metal oxide. That is, it is preferable that a region where oxygen is present in excess of the stoichiometric composition (hereinafter also referred to as an excess oxygen region) is formed in the oxide.
  • an excess oxygen region a region where oxygen is present in excess of the stoichiometric composition
  • oxygen vacancies in the transistor can be reduced and reliability can be improved. it can.
  • Metal oxide film forming method> Below, an example of a metal oxide is demonstrated.
  • the temperature for forming the metal oxide is preferably room temperature (for example, 25 ° C.) or more and 170 ° C. or less, more preferably 100 ° C. or more and less than 150 ° C.
  • room temperature for example, 25 ° C.
  • a large substrate such as G10 has a substrate temperature limit depending on its size. Therefore, a temperature that is higher than the vaporization temperature of water (100 ° C. or higher) and has good device maintainability and throughput is selected as appropriate.
  • the room temperature includes a state where heating is not performed intentionally.
  • a rare gas typically argon
  • oxygen oxygen
  • a rare gas oxygen
  • a rare gas oxygen
  • a mixed gas of oxygen the ratio of oxygen gas to the entire deposition gas is 0% to 30%, preferably 5% to 20%.
  • oxygen gas or argon gas used as a sputtering gas is a gas having a dew point of ⁇ 40 ° C. or lower, preferably ⁇ 80 ° C. or lower, more preferably ⁇ 100 ° C. or lower, more preferably ⁇ 120 ° C. or lower.
  • the chamber in the sputtering apparatus uses an adsorption-type vacuum exhaust pump such as a cryopump to remove water or the like that is an impurity for the metal oxide as much as possible.
  • High vacuum from 5 ⁇ 10 ⁇ 7 Pa to about 1 ⁇ 10 ⁇ 4 Pa
  • an In-M-Zn metal oxide target can be used.
  • Al: Ga: Zn 4: 1: 1: 4 [atomic ratio]
  • Al: Si: Zn 4: 1: 1: 4 [atomic ratio]
  • Ga: Si: Zn 4: 1: 1: 4 [atomic ratio]
  • Al: Ga: Zn 5: 0.5: 0.5: 7 [atomic ratio]
  • Al: Si: Zn 5: 0.5: 0.5: 7 [atomic number ratio]
  • In: Ga: Si: Zn 5: 0.5: 0.5: 7 [atomic number ratio]
  • an atomic ratio in the vicinity thereof It is preferable to use a metal oxide target.
  • the magnet unit arranged in the vicinity of the target may be rotated or moved.
  • the metal oxide of one embodiment of the present invention can be formed by swinging the magnet unit up and down or / and left and right during film formation.
  • the magnet unit may be swung with a beat of 0.1 Hz to 1 kHz.
  • the metal according to one embodiment of the present invention is formed by performing film formation while swinging a magnet unit disposed in the vicinity (for example, the back surface) of an In—Al—Ga—Zn metal oxide target having an atomic ratio of 7 [atomic ratio]. An oxide can be formed.
  • FIG. 6A is a top view of a transistor 300A that is a semiconductor device of one embodiment of the present invention
  • FIG. 6B is a cross-sectional view of a cross section along a dashed-dotted line X1-X2 in FIG. 6A
  • 6C corresponds to a cross-sectional view of a cross-sectional surface taken along the alternate long and short dash line Y1-Y2 illustrated in FIG.
  • FIG. 6D corresponds to a cross-sectional conceptual diagram in which the region P1 illustrated in FIG. 6B is enlarged.
  • FIG. 6A some components (such as an insulating film functioning as a gate insulating film) are not illustrated in order to avoid complexity.
  • the direction of the alternate long and short dash line X1-X2 may be referred to as a channel length direction, and the direction of the alternate long and short dash line Y1-Y2 may be referred to as a channel width direction.
  • some components may be omitted in the following drawings as in FIG. 6A.
  • the transistor 300A includes a conductive film 304 over a substrate 302, an insulating film 306 over the substrate 302 and the conductive film 304, an insulating film 307 over the insulating film 306, a metal oxide 308 over the insulating film 307, and a metal oxide.
  • the conductive film 320 a over the film 316 and the conductive film 320 b over the insulating film 316 are included.
  • the insulating film 306 and the insulating film 307 have an opening 351, and a conductive film 312c that is electrically connected to the conductive film 304 through the opening 351 is formed over the insulating film 306 and the insulating film 307. Is done.
  • the insulating film 314 and the insulating film 316 include an opening 352a reaching the conductive film 312b and an opening 352b reaching the conductive film 312c.
  • the metal oxide 308 includes the metal oxide having a multilayer structure of one embodiment of the present invention described in Embodiment 1.
  • connection between the metal oxide having a multilayer structure of one embodiment of the present invention and the conductive film is described with reference to FIG.
  • the metal oxide 308 includes a metal oxide 308_1, a metal oxide 308_2, and a metal oxide 308_3.
  • the metal oxide 308_1 corresponds to the metal oxide S1 described in Embodiment 1.
  • the metal oxide 308_2 corresponds to the metal oxide S2 described in Embodiment 1.
  • the metal oxide 308_3 corresponds to the metal oxide S3 described in Embodiment 1.
  • FIG. 6D illustrates a three-layer structure in which the metal oxide 308 ⁇ / b> _ ⁇ b> 2 is sandwiched between the metal oxide 308 ⁇ / b> N and the metal oxide 308 ⁇ / b> W.
  • the metal oxide 308 W corresponds to the oxide 101 bw described in Embodiment 1.
  • the metal oxide 308 N corresponds to the oxide 101bn described in Embodiment 1.
  • the metal oxide 308_2 is not limited to a three-layer structure, and a plurality of metal oxides 308_2 may be provided.
  • the conductive film 312a is in contact with the top and side surfaces of the metal oxide 308, contact resistance can be reduced. Also, at the end of the metal oxide 308, since the contact and the metal oxide 308 N and the conductive film 312a, can further reduce the contact resistance. Note that although not illustrated, the connection between the metal oxide 308 and the conductive film 312b is similar to that of the region P1.
  • the metal oxide of one embodiment of the present invention has a region with high conductivity, and contact resistance with the conductive film is reduced. Accordingly, the field-effect mobility of the transistor including the metal oxide can be increased.
  • the field effect mobility of the transistor 300A can exceed 50 cm 2 / Vs, and more preferably, the field effect mobility of the transistor 300A can exceed 100 cm 2 / Vs.
  • a display device with a narrow frame width can be provided by using the transistor with high field-effect mobility described above for a gate driver that generates a gate signal included in the display device.
  • the above transistor with high field-effect mobility is used for a source driver that supplies signals from a signal line included in a display device (particularly, a demultiplexer connected to an output terminal of a shift register included in the source driver).
  • a display device with a small number of wirings connected to the display device can be provided.
  • impurities such as hydrogen or moisture mixed in the metal oxide 308 cause problems because they affect transistor characteristics. Therefore, in the channel region in the metal oxide 308, it is preferable that impurities such as hydrogen or moisture be smaller.
  • oxygen vacancies formed in the channel region in the metal oxide 308 are problematic because they affect transistor characteristics. For example, when an oxygen vacancy is formed in the channel region of the metal oxide 308, hydrogen is bonded to the oxygen vacancy to serve as a carrier supply source. When a carrier supply source is generated in the channel region of the metal oxide 308, a change in electrical characteristics of the transistor 300A including the metal oxide 308, typically, a threshold voltage shift occurs. Therefore, it is preferable that the oxygen vacancies be smaller in the channel region of the metal oxide 308.
  • the conductive film 312c and the conductive film 320a are electrically connected, and the conductive film 312b and the conductive film 320b are electrically connected. Note that the conductive film 320a and the conductive film 320b are formed by processing the same conductive film.
  • An insulating film 318 is provided over the transistor 300A.
  • the insulating film 318 is formed so as to cover the insulating film 316, the conductive film 320a, and the conductive film 320b.
  • the insulating films 306 and 307 have a function as a first gate insulating film of the transistor 300A, and the insulating films 314 and 316 have a function as a second gate insulating film of the transistor 300A.
  • the insulating film 318 functions as a protective insulating film of the transistor 300A.
  • the conductive film 304 functions as a first gate electrode
  • the conductive film 320a functions as a second gate electrode
  • the conductive film 320b is a pixel used for a display device. It has a function as an electrode.
  • the conductive film 312a functions as a source electrode
  • the conductive film 312b functions as a drain electrode.
  • the conductive film 312c functions as a connection electrode.
  • the insulating films 306 and 307 may be referred to as a first insulating film
  • the insulating films 314 and 316 as a second insulating film
  • the insulating film 318 as a third insulating film, respectively. is there.
  • the conductive film 320a functioning as the second gate electrode includes the conductive film 304 functioning as the first gate electrode with the conductive film 312c functioning as the connection electrode interposed therebetween. And electrically connected. Therefore, the same potential is applied to the conductive film 304 and the conductive film 320a.
  • the metal oxide 308 is positioned so as to face the conductive film 304 functioning as the first gate electrode and the conductive film 320a functioning as the second gate electrode. And sandwiched between films functioning as two gate electrodes.
  • the length of the conductive film 320a in the channel length direction and the length of the conductive film 320a in the channel width direction are longer than the length of the metal oxide 308 in the channel length direction and the length of the metal oxide 308 in the channel width direction, respectively.
  • the entire metal oxide 308 is covered with the conductive film 320a with the insulating films 314 and 316 interposed therebetween.
  • the conductive film 304 functioning as the first gate electrode and the conductive film 320a functioning as the second gate electrode are formed of the insulating film 306 functioning as the first gate insulating film,
  • the metal oxide 308 is surrounded by the insulating films 314 and 316 functioning as the third gate insulating film 307 and the second gate insulating film.
  • the metal oxide 308 included in the transistor 300A is electrically surrounded by the electric field of the conductive film 304 functioning as the first gate electrode and the conductive film 320a functioning as the second gate electrode.
  • a device structure of a transistor that electrically surrounds a metal oxide in which a channel region is formed by an electric field of the first gate electrode and the second gate electrode is referred to as a surround channel (S-channel) structure. Can be called.
  • the transistor 300A Since the transistor 300A has an S-channel structure, an electric field for inducing a channel can be effectively applied to the metal oxide 308 by the conductive film 304 functioning as the first gate electrode. The current driving capability is improved and high on-current characteristics can be obtained. Further, since the on-state current can be increased, the transistor 300A can be miniaturized. In addition, since the transistor 300A has a structure in which the metal oxide film 308 is surrounded by the conductive film 304 functioning as the first gate electrode and the conductive film 320a functioning as the second gate electrode, the mechanical strength of the transistor 300A is increased. Can be increased.
  • FIGS. 6A, 6B, and 6C are a top view and cross-sectional views of a transistor 300B that is a modification of the transistor 300A illustrated in FIGS. 6A, 6B, and 6C.
  • FIG. 7D corresponds to a cross-sectional conceptual diagram in which the region P2 illustrated in FIG. 7B is enlarged.
  • a channel formation region of the transistor 300B illustrated in FIGS. 7A, 7B, and 7C has a three-layer structure like the metal oxide 308 included in the transistor 300A illustrated in FIGS. It is. Note that the conductive film 312a and the conductive film 312b are different from the transistor 300A in that they are in contact with the top and side surfaces of the metal oxide 308_2 and the metal oxide 308_3.
  • the top surface of the metal oxide 308 having a large contact area with the conductive films 312a and 312b is the metal oxide 308_3.
  • the metal oxide 308_3 corresponds to the metal oxide S3 described in Embodiment 1, and is formed using a material having a larger band gap than the metal oxide 308_2. That is, since the metal oxide 308_3 has a relatively large resistance, the contact resistance with the conductive films 312a and 312b is increased, which hinders improvement in on-state current.
  • the band gap is smaller than that of the metal oxide 308_3, and the metal oxide 308_2 in which a channel is formed is in contact with the conductive films 312a and 312b; Can be expected to improve reliability.
  • FIG. 8A is a top view of a transistor 500A that is a semiconductor device of one embodiment of the present invention
  • FIG. 8B is a cross-sectional view taken along the dashed-dotted line X1-X2 in FIG. 8C corresponds to a cross-sectional view of a cross-sectional surface taken along alternate long and short dash line Y1-Y2 in FIG. 8A
  • FIG. 8D corresponds to a cross-sectional conceptual diagram in which the region P3 illustrated in FIG. 8B is enlarged.
  • a transistor 500A illustrated in FIGS. 8A, 8B, and 8C is a so-called top-gate transistor.
  • the transistor 500A includes a conductive film 506 over a substrate 502, an insulating film 504 over the substrate 502 and the conductive film 506, a metal oxide 508 over the insulating film 504, an insulating film 510 over the metal oxide 508, and an insulating film.
  • the conductive film 512 over 510, the insulating film 504, the metal oxide 508, and the insulating film 516 over the conductive film 512 are included.
  • the metal oxide 508 is preferably the metal oxide of one embodiment of the present invention.
  • the metal oxide 508 includes a region 508 i that overlaps with the conductive film 512 and is in contact with the insulating film 510, and a region 508 n that does not overlap with the conductive film 512 but overlaps with the insulating film 516.
  • the region 508n has a region with a higher carrier density than the region 508i. That is, the metal oxide 508 has a plurality of regions with different carrier densities.
  • the region 508n can also be referred to as a source region or a drain region.
  • the metal oxide 508 includes a metal oxide 508_1, a metal oxide 508_2, and a metal oxide 508_3.
  • the metal oxide 508_1 corresponds to the metal oxide S1 described in Embodiment 1.
  • the metal oxide 508_2 corresponds to the metal oxide S2 described in Embodiment 1.
  • the metal oxide 508_3 corresponds to the metal oxide S3 described in Embodiment 1.
  • the metal oxide 508_2 has a 3-layer structure sandwiching the metal oxide 508 N in the metal oxide 508 W.
  • the metal oxide 508 W corresponds to the oxide 101bw described in Embodiment 1.
  • the metal oxide 508 N corresponds to the oxide 101bn described in Embodiment 1.
  • the metal oxide 508_2 is not limited to a three-layer structure, and may include a plurality of metal oxides.
  • the side surface of the region 508i and the side surface of the region 508n are in contact with each other, so that the contact resistance can be reduced.
  • the connection between the other side surface of the region 508i and the side surface of the region 508n is the same as that of the region P3.
  • the metal oxide of one embodiment of the present invention has a high conductivity region and has reduced contact resistance with a source region or a drain region. Accordingly, the field-effect mobility of the transistor including the metal oxide can be increased.
  • the region 508n is in contact with the insulating film 516.
  • the insulating film 516 includes nitrogen or hydrogen. Therefore, nitrogen or hydrogen in the insulating film 516 is added into the region 508n. In the region 508n, nitrogen or hydrogen is added from the insulating film 516, whereby the carrier density is increased.
  • the transistor 500A includes an insulating film 518 over the insulating film 516, a conductive film 520a electrically connected to the region 508n through an opening 541a provided in the insulating films 516 and 518, an insulating film 516, A conductive film 520b electrically connected to the region 508n may be provided through an opening 541b provided in 518.
  • the insulating film 504 and the insulating film 510 are provided with an opening 543.
  • the conductive film 506 is electrically connected to the conductive film 512 through the opening 543. Therefore, the same potential is applied to the conductive film 506 and the conductive film 512. Alternatively, different potentials may be applied to the conductive film 506 and the conductive film 512 without providing the opening 543.
  • the conductive film 506 functions as a first gate electrode (also referred to as a bottom gate electrode), and the conductive film 512 functions as a second gate electrode (also referred to as a top gate electrode).
  • the insulating film 504 functions as a first gate insulating film, and the insulating film 510 functions as a second gate insulating film.
  • the transistor 500A illustrated in FIGS. 8A, 8B, and 8C has a structure including conductive films functioning as gate electrodes above and below the metal oxide 508.
  • the semiconductor device of one embodiment of the present invention may include two or more gate electrodes.
  • the metal oxide 508 is positioned so as to face the conductive film 506 functioning as the first gate electrode and the conductive film 512 functioning as the second gate electrode. And sandwiched between conductive films functioning as two gate electrodes.
  • the length of the conductive film 512 in the channel width direction is longer than the length of the metal oxide 508 in the channel width direction, and the entire channel width direction of the metal oxide 508 is covered with the conductive film 512 with the insulating film 510 interposed therebetween. It has been broken. Further, since the conductive film 512 and the conductive film 506 are connected to each other in the opening 543 provided in the insulating film 504 and the insulating film 510, one of the side surfaces in the channel width direction of the metal oxide 508 is interposed through the insulating film 510. Opposite to the conductive film 512.
  • the conductive film 506 and the conductive film 512 are connected to each other through the opening 543 provided in the insulating film 504 and the insulating film 510, and the metal is interposed between the insulating film 504 and the insulating film 510.
  • the structure surrounds the oxide 508. That is, the transistor 500A has the S-channel structure described above.
  • FIGS. 9A, 9B, and 9C are a top view and cross-sectional views of a transistor 500B that is a modification of the transistor 500A illustrated in FIGS. 8A, 8B, and 8C.
  • FIG. 9D corresponds to a cross-sectional conceptual diagram in which a region P4 illustrated in FIG. 9B is enlarged.
  • a channel formation region of the transistor 500B illustrated in FIGS. 9A, 9B, and 9C has a three-layer structure like the metal oxide 508 included in the transistor 500A illustrated in FIGS. It is.
  • the shape of the metal oxide 508 included in the transistor 500A is different from that of the region 508i_3.
  • the metal oxide 508 included in the transistor 500B has a shape in which the side surface of the region 508i_1 and the side surface of the region 508i_2 are covered with the region 508i_3.
  • the insulating film 510 is not in contact with the side surface of the region 508i_1 and the side surface of the region 508i_2.
  • impurities that can enter the regions 508i_1 and 508i_2, particularly the region 508i_2 can be suppressed; thus, a highly reliable semiconductor device can be provided.
  • substrate There is no particular limitation on the material of the substrates 302 and 502, but it is necessary to have at least heat resistance enough to withstand heat treatment performed later.
  • a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrates 302 and 502.
  • a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, or the like can be applied, and a semiconductor element is provided over these substrates.
  • a substrate may be used as the substrates 302 and 502.
  • the sixth generation (1500 mm ⁇ 1850 mm), the seventh generation (1870 mm ⁇ 2200 mm), the eighth generation (2200 mm ⁇ 2400 mm), the ninth generation (2400 mm ⁇ 2800 mm),
  • a large area substrate such as a 10th generation (2950 mm ⁇ 3400 mm)
  • a large display device can be manufactured.
  • a flexible substrate may be used as the substrates 302 and 502, and the transistor may be formed directly over the flexible substrate.
  • a separation layer may be provided between the substrates 302 and 502 and the transistor. The separation layer can be used for separating a substrate from the substrates 302 and 502 and transferring it to another substrate after part or all of the semiconductor device is completed thereon. At that time, the transistor can be transferred to a substrate having poor heat resistance or a flexible substrate.
  • the conductive films 320a and 512 functioning as the pixel electrode and the conductive film 320b functioning as the pixel electrode include chromium (Cr), copper (Cu), aluminum (Al), gold (Au), silver (Ag), and zinc (Zn).
  • Molybdenum (Mo) tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel (Ni), iron (Fe), cobalt (Co), or a metal element described above
  • the conductive films 304, 312a, 312b, 312c, 320a, 320b, 506, 520a, 520b, and 512 include oxides containing indium and tin, oxides containing tungsten and indium, tungsten, indium, and zinc.
  • an oxide conductor can be preferably used for the conductive films 320a and 512.
  • an oxide conductor may be referred to as an OC (Oxide Conductor).
  • Oxide Conductor As an oxide conductor, for example, when an oxygen vacancy is formed in an oxide semiconductor and hydrogen is added to the oxygen vacancy, a donor level is formed in the vicinity of the conduction band. As a result, the oxide semiconductor becomes highly conductive and becomes a conductor.
  • a conductive oxide semiconductor can be referred to as an oxide conductor.
  • an oxide semiconductor has a large energy gap and thus has a light-transmitting property with respect to visible light.
  • an oxide conductor is an oxide semiconductor having a donor level in the vicinity of the conduction band. Therefore, the oxide conductor is less influenced by absorption due to the donor level, and has a light-transmitting property similar to that of an oxide semiconductor with respect to visible light.
  • the conductive films 304, 312a, 312b, 312c, 320a, 320b, 506, 520a, 520b, and 512 have a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied.
  • X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti
  • a Cu-X alloy film it can be processed by a wet etching process, and thus manufacturing costs can be suppressed.
  • the above-described Cu—X alloy film can be preferably used for the conductive films 312a, 312b, 520a, and 520b.
  • a Cu—Mn alloy film is particularly preferable.
  • insulating film functioning as first gate insulating film As the insulating films 306, 307, and 504 functioning as the first gate insulating film of the transistor, a silicon oxide film, an oxynitride nitride film, a plasma enhanced chemical vapor deposition (PECVD) method, a sputtering method, or the like is used. Silicon film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film, cerium oxide film and neodymium oxide Each insulating layer including one or more films can be used. Note that as the insulating films 306, 307, and 510, a single-layer insulating film selected from the above materials, or two or more insulating films may be used.
  • an oxide insulating film is preferably used for the insulating film in contact with the metal oxides 308 and 508 functioning as channel regions of the transistor, and a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region) ) Is more preferable.
  • the present invention is not limited to the above structure, and a nitride insulating film may be used as the insulating film in contact with the metal oxides 308 and 508.
  • a structure in which a silicon nitride film is formed and the surface of the silicon nitride film is subjected to oxygen plasma treatment or the like to oxidize the surface of the silicon nitride film can be given.
  • oxygen plasma or the like is performed on the surface of the silicon nitride film, the surface of the silicon nitride film may be oxidized at the atomic level, so that oxygen may not be detected even when the cross section of the transistor is observed.
  • a silicon nitride film has a higher relative dielectric constant than a silicon oxide film and has a large film thickness necessary for obtaining a capacitance equivalent to that of a silicon oxide film. Therefore, silicon nitride is used as a gate insulating film of a transistor. By including the film, the insulating film can be thickened. Therefore, a decrease in the withstand voltage of the transistor can be suppressed, and further, the withstand voltage can be improved to suppress electrostatic breakdown of the transistor.
  • hafnium oxide has a higher dielectric constant than silicon oxide or silicon oxynitride. Accordingly, since the insulating films 306, 307, and 504 can be made thicker than when silicon oxide is used, leakage current due to tunneling current can be reduced. That is, a transistor with a small off-state current can be realized. Further, hafnium oxide having a crystal structure has a higher dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with low off-state current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include a monoclinic system and a cubic system. Note that one embodiment of the present invention is not limited thereto.
  • Metal oxide As the metal oxides 308 and 508, the metal oxide of one embodiment of the present invention described in Embodiment 1 can be used.
  • the metal oxides 308 and 508 have an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. In this manner, off-state current of a transistor can be reduced by using a metal oxide having a wide energy gap.
  • the thicknesses of the metal oxides 308 and 508 are 3 nm to 200 nm, preferably 3 nm to 100 nm, and more preferably 3 nm to 50 nm.
  • the metal oxides 308 and 508 have appropriate carrier density, impurity concentration, defect density, atomic ratio of metal element to oxygen, density, and the like. .
  • the insulating films 314, 316, and 510 function as a second gate insulating film of the transistor.
  • the insulating films 314, 316, and 510 have a function of supplying oxygen to the metal oxides 308 and 508. That is, the insulating films 314, 316, and 510 have oxygen.
  • the insulating film 314 is an insulating film that can transmit oxygen. Note that the insulating film 314 also functions as a damage reducing film for the metal oxide 308 when an insulating film 316 to be formed later is formed.
  • silicon oxide, silicon oxynitride, or the like with a thickness of 5 nm to 150 nm, preferably 5 nm to 50 nm can be used.
  • the insulating film 314 preferably has a small amount of defects.
  • the insulating film 314 can be formed using an oxide insulating film having a low level density due to nitrogen oxides.
  • the level density due to the nitrogen oxide may be formed between the energy (Ev_os) at the upper end of the valence band of the metal oxide and the energy (Ec_os) at the lower end of the conduction band of the metal oxide. is there.
  • the oxide insulating film a silicon oxynitride film with a low emission amount of nitrogen oxide, an aluminum oxynitride film with a low emission amount of nitrogen oxide, or the like can be used.
  • a silicon oxynitride film with a small amount of released nitrogen oxide is a film having a larger amount of released ammonia than a released amount of nitrogen oxide in a thermal desorption gas analysis (TDS) method.
  • the amount of released ammonia is 1 ⁇ 10 18 cm ⁇ 3 or more and 5 ⁇ 10 19 cm ⁇ 3 or less.
  • the amount of ammonia released is the amount released by heat treatment at a film surface temperature of 50 ° C. to 650 ° C., preferably 50 ° C. to 550 ° C.
  • Nitrogen oxide (NO x , x exceeds 0 and is 2 or less, preferably 1 or more and 2 or less), typically NO 2 or NO forms a level in the insulating film 314 or the like.
  • the level is located in the energy gap of the metal oxide 308. Therefore, when nitrogen oxide diffuses to the interface between the insulating film 314 and the metal oxide 308, the level may trap electrons on the insulating film 314 side. As a result, trapped electrons remain in the vicinity of the interface between the insulating film 314 and the metal oxide 308, and thus shift the threshold voltage of the transistor in the positive direction.
  • Nitrogen oxide reacts with ammonia and oxygen in heat treatment. Since nitrogen oxide contained in the insulating film 314 reacts with ammonia contained in the insulating film 316 in the heat treatment, nitrogen oxide contained in the insulating film 314 is reduced. Therefore, electrons are not easily trapped at the interface between the insulating film 314 and the metal oxide 308.
  • the oxide insulating film as the insulating film 314, a shift in threshold voltage of the transistor can be reduced, and variation in electrical characteristics of the transistor can be reduced.
  • the insulating film 314 has a g value of 2.037 or more in a spectrum obtained by measurement with an ESR of 100K or less by heat treatment in a manufacturing process of the transistor, typically 300 ° C. or more and less than 350 ° C.
  • a first signal having a g value of 2.001 or more and 2.003 or less and a third signal having a g value of 1.964 or more and 1.966 or less are observed.
  • the split width of the first signal and the second signal and the split width of the second signal and the third signal are about 5 mT in the X-band ESR measurement.
  • the first signal having a g value of 2.037 to 2.039
  • the second signal having a g value of 2.001 to 2.003
  • the total density of the spins of the third signal is less than 1 ⁇ 10 18 spins / cm 3 , typically 1 ⁇ 10 17 spins / cm 3 or more and less than 1 ⁇ 10 18 spins / cm 3 .
  • the first signal having a g value of 2.037 to 2.039
  • the second signal having a g value of 2.001 to 2.003
  • the total density of spins of the third signal that is not less than 1.966 is not less than the total density of the spins of signals caused by nitrogen oxides (NO x , x is greater than 0 and not more than 2 and preferably not less than 1 and not more than 2). It corresponds to.
  • nitrogen oxides include nitrogen monoxide and nitrogen dioxide.
  • a first signal having a g value of 2.037 to 2.039 a second signal having a g value of 2.001 to 2.003, and a g value of 1.964 to 1.966. It can be said that the smaller the total density of spins of the third signal, the smaller the content of nitrogen oxide contained in the oxide insulating film.
  • the oxide insulating film has a nitrogen concentration measured by SIMS of 6 ⁇ 10 20 atoms / cm 3 or less.
  • oxide insulating film By forming the oxide insulating film using a PECVD method using silane and dinitrogen monoxide with a substrate temperature of 220 ° C. or higher and 350 ° C. or lower, a dense and high hardness film is formed. be able to.
  • the insulating films 316 and 510 are preferably formed using an oxide insulating film containing more oxygen than that in the stoichiometric composition. Part of oxygen is released by heating from the oxide insulating film containing oxygen in excess of that in the stoichiometric composition.
  • An oxide insulating film containing oxygen in excess of the stoichiometric composition has an oxygen desorption amount of 1.0 ⁇ 10 19 atoms / cm 3 or more in terms of oxygen atoms in TDS analysis.
  • the oxide insulating film is preferably 3.0 ⁇ 10 20 atoms / cm 3 or more.
  • the surface temperature of the film in the TDS is preferably in the range of 100 ° C. to 700 ° C., or 100 ° C. to 500 ° C.
  • silicon oxide, silicon oxynitride, or the like with a thickness of 30 nm to 500 nm, preferably 50 nm to 400 nm can be used.
  • the insulating films 316 and 510 preferably have a small amount of defects.
  • the interface between the insulating film 314 and the insulating film 316 may not be clearly confirmed. Therefore, in this embodiment mode, the interface between the insulating film 314 and the insulating film 316 is indicated by a broken line. Note that although a two-layer structure of the insulating film 314 and the insulating film 316 has been described in this embodiment mode, the present invention is not limited thereto, and for example, a single-layer structure of the insulating film 314 or a stacked structure of three or more layers may be used. Good.
  • the insulating films 318 and 516 function as protective insulating films for the transistors.
  • the insulating films 318 and 516 include one or both of hydrogen and nitrogen. Alternatively, the insulating films 318 and 516 include nitrogen and silicon.
  • the insulating films 318 and 516 have a function of blocking oxygen, hydrogen, water, alkali metal, alkaline earth metal, and the like.
  • a nitride insulating film can be used as the insulating films 318 and 516.
  • the nitride insulating film include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide.
  • various films such as the conductive film, the insulating film, the metal oxide, and the metal film described above can be formed by a sputtering method or a PECVD method.
  • other methods such as thermal CVD (Chemical Vapor Deposition) can be used.
  • thermal CVD Chemical Vapor Deposition
  • Examples of the thermal CVD method include MOCVD (Metal Organic Chemical Vapor Deposition) method or ALD (Atomic Layer Deposition) method.
  • the thermal CVD method has an advantage that no defect is generated due to plasma damage because it is a film forming method that does not use plasma.
  • film formation may be performed by sending a source gas and an oxidant into the chamber at the same time, making the inside of the chamber under atmospheric pressure or reduced pressure, reacting in the vicinity of the substrate or on the substrate and depositing on the substrate. .
  • film formation may be performed by setting the inside of the chamber to atmospheric pressure or reduced pressure, sequentially introducing source gases for reaction into the chamber, and repeating the order of introducing the gases.
  • Thermal CVD methods such as MOCVD and ALD methods can form various films such as the conductive film, insulating film, and metal oxide of the above embodiment.
  • FIGS. 11A to 11C, and FIGS. 12A to 12C are cross-sectional views illustrating a method for manufacturing a semiconductor device. It is. 10A to 10D, 11A to 11C, and 12A to 12C, the left side is a cross-sectional view in the channel length direction. The right side is a cross-sectional view in the channel width direction.
  • the conductive film 506 is formed over the substrate 502.
  • the insulating film 504 is formed over the substrate 502 and the conductive film 506, and the first metal oxide, the second metal oxide, and the third metal oxide are formed over the insulating film 504. .
  • the first metal oxide, the second metal oxide, and the third metal oxide are processed into island shapes, whereby the metal oxide 508_1a, the metal oxide 508_2a, and the metal oxide 508_3a are formed. (See FIG. 10A).
  • the conductive film 506 can be formed by selecting any of the materials described above.
  • a sputtering film is used as the conductive film 506, and a stacked film of a tungsten film with a thickness of 50 nm and a copper film with a thickness of 400 nm is formed.
  • a method for processing the conductive film to be the conductive film 506 one or both of a wet etching method and a dry etching method may be used.
  • the conductive film is processed by etching the tungsten film by a dry etching method, so that the conductive film 506 is formed.
  • the insulating film 504 can be formed using a sputtering method, a CVD method, an evaporation method, a pulse laser deposition (PLD) method, a printing method, a coating method, or the like as appropriate.
  • a 400-nm-thick silicon nitride film and a 50-nm-thick silicon oxynitride film are formed as the insulating film 504 using a PECVD apparatus.
  • oxygen may be added to the insulating film 504 after the insulating film 504 is formed.
  • oxygen added to the insulating film 504 include oxygen radicals, oxygen atoms, oxygen atom ions, and oxygen molecular ions.
  • the addition method include an ion doping method, an ion implantation method, and a plasma treatment method.
  • oxygen may be added to the insulating film 504 through the film.
  • a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten is used as the above-described film for suppressing desorption of oxygen. Can be formed.
  • the amount of oxygen added to the insulating film 504 can be increased by exciting oxygen with a microwave to generate high-density oxygen plasma.
  • the metal oxide 508_1a, the metal oxide 508_2a, and the metal oxide 508_3a are preferably formed successively in a vacuum using a sputtering apparatus.
  • Metal oxide 508_1a, metal oxide 508_2a, and metal oxide 508_3a are successively formed in a vacuum using a sputtering apparatus, so that impurities (eg, hydrogen, water, and the like) that can be attached to each interface are suppressed. can do.
  • the metal oxide 508_2a As a formation condition of the metal oxide 508_2a, it is preferable that the metal oxide 508_2a be formed at a lower oxygen partial pressure than either one or both of the metal oxide 508_1a and the metal oxide 508_3a. Note that the metal oxide 508_2a has the multilayer structure described in Embodiment 1.
  • an inert gas eg, helium gas, argon gas, xenon gas, or the like
  • oxygen flow ratio the ratio of oxygen gas to the entire deposition gas when forming the metal oxide 508_1a
  • the oxygen flow rate ratio in forming the metal oxide 508_2a is greater than 0% and 30% or less, preferably 5% or more and 15% or less.
  • the oxygen flow rate ratio in forming the metal oxide 508_3a is 70% to 100%, preferably 80% to 100%, more preferably 90% to 100%.
  • the metal oxide 508_2a may be formed at a lower substrate temperature than either or both of the metal oxide 508_1a and the metal oxide 508_3a.
  • the substrate temperature may be a room temperature or higher and lower than 150 ° C., preferably a room temperature or higher and 140 ° C. or lower.
  • the formation conditions of the metal oxide 508_1a and the metal oxide 508_3a may be a substrate temperature of room temperature to 300 ° C., preferably a substrate temperature of room temperature to 200 ° C.
  • the substrate temperatures at the time of formation of the metal oxide 508_1a, the metal oxide 508_2a, and the metal oxide 508_3a be the same (eg, room temperature or higher and lower than 150 ° C.) because productivity is increased.
  • the metal oxide 508_2a can have a region with lower crystallinity than the metal oxide 508_1a and the metal oxide 508_3a.
  • the thickness of the metal oxide 508_1a may be greater than or equal to 1 nm and less than 20 nm, preferably greater than or equal to 5 nm and less than or equal to 10 nm.
  • the thickness of the metal oxide 508_2a may be 20 nm to 100 nm, preferably 20 nm to 50 nm.
  • the thickness of the metal oxide 508_3a may be greater than or equal to 1 nm and less than 20 nm, preferably greater than or equal to 5 nm and less than or equal to 15 nm.
  • the crystallinity of the metal oxide 508 can be increased by heating the metal oxide 508 to form a film.
  • the substrate temperature when the metal oxide 508 is formed is 200 ° C. or more and 300 ° C. or less. 502 may be deformed (distorted or warped). Therefore, when a large glass substrate is used, deformation of the glass substrate can be suppressed by setting the substrate temperature when the metal oxide 508 is formed to 100 ° C. or higher and lower than 200 ° C.
  • oxygen gas or argon gas used as a sputtering gas is a gas having a dew point of ⁇ 40 ° C. or lower, preferably ⁇ 80 ° C. or lower, more preferably ⁇ 100 ° C. or lower, more preferably ⁇ 120 ° C. or lower.
  • the chamber in the sputtering apparatus uses an adsorption-type vacuum exhaust pump such as a cryopump to remove water or the like that is an impurity for the metal oxide as much as possible. It is preferable to exhaust to a high vacuum (from about 5 ⁇ 10 ⁇ 7 Pa to about 1 ⁇ 10 ⁇ 4 Pa).
  • a wet etching method and Either or both of dry etching methods may be used.
  • heat treatment is performed to dehydrogenate or dehydrate the metal oxide 508_1a, the metal oxide 508_2a, and the metal oxide 508_3a. May be.
  • the temperature of the heat treatment is typically 150 ° C. or higher and lower than the strain point of the substrate, 250 ° C. or higher and 450 ° C. or lower, or 300 ° C. or higher and 450 ° C. or lower.
  • the heat treatment can be performed in an inert gas atmosphere containing nitrogen or a rare gas such as helium, neon, argon, xenon, or krypton.
  • heating may be performed in an oxygen atmosphere.
  • hydrogen, water, etc. are not contained in the said inert atmosphere and oxygen atmosphere.
  • the treatment time may be 3 minutes or more and 24 hours or less.
  • an electric furnace, an RTA apparatus, or the like can be used for the heat treatment.
  • the RTA apparatus heat treatment can be performed at a temperature equal to or higher than the strain point of the substrate for a short time. Therefore, the heat treatment time can be shortened.
  • the hydrogen concentration obtained by SIMS in the metal oxide is 5 ⁇ 10 19 atoms / cm 3 or less, or 1 ⁇ 10 19 atoms / cm 3 or less, 5 ⁇ 10 18 atoms / cm 3 or less, or 1 ⁇ 10 18 atoms / cm 3 or less, or 5 ⁇ 10 17 atoms / cm 3 or less, or 1 ⁇ 10 16 atoms / cm 3 It can be 3 or less.
  • an insulating film 510_0 is formed over the insulating film 504 and the metal oxide 508. (See FIG. 10B).
  • a silicon oxide film, a silicon oxynitride film, or a silicon nitride film can be formed using a plasma enhanced chemical vapor deposition apparatus (a PECVD apparatus or simply a plasma CVD apparatus).
  • a PECVD apparatus plasma enhanced chemical vapor deposition apparatus
  • the deposition gas containing silicon include silane, disilane, trisilane, and fluorinated silane.
  • the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide.
  • the insulating film 510_0 PECVD in which the flow rate of the oxidizing gas with respect to the flow rate of the deposition gas is greater than 20 times and less than 100 times, or greater than or equal to 40 times and less than or equal to 80 times, and the pressure in the treatment chamber is less than 100 Pa or less than 50 Pa.
  • PECVD in which the flow rate of the oxidizing gas with respect to the flow rate of the deposition gas is greater than 20 times and less than 100 times, or greater than or equal to 40 times and less than or equal to 80 times, and the pressure in the treatment chamber is less than 100 Pa or less than 50 Pa.
  • a substrate placed in a processing chamber evacuated in a PECVD apparatus is held at 280 ° C. or higher and 400 ° C. or lower, and a raw material gas is introduced into the processing chamber so that the pressure in the processing chamber is 20 Pa or higher and 250 Pa.
  • a dense silicon oxide film or silicon oxynitride film can be formed according to conditions in which high-frequency power is supplied to an electrode provided in the treatment chamber, more preferably, 100 Pa to 250 Pa.
  • the insulating film 510_0 may be formed by a PECVD method using a microwave.
  • Microwave refers to the frequency range from 300 MHz to 300 GHz. Microwaves have a low electron temperature and a low electron energy. Further, in the supplied power, the ratio used for accelerating electrons is small, it can be used for dissociation and ionization of more molecules, and high density plasma (high density plasma) can be excited. . Therefore, the insulating film 510_0 with little plasma damage to the deposition surface and deposits and few defects can be formed.
  • a silicon oxynitride film with a thickness of 100 nm is formed using a PECVD apparatus.
  • the insulating film 510_0 and a part of the insulating film 504 are etched, so that an opening 543 reaching the conductive film 506 is formed ( (See FIG. 10C).
  • the opening 543 As a method for forming the opening 543, one or both of a wet etching method and a dry etching method may be used. In this embodiment, the opening 543 is formed by a dry etching method.
  • a conductive film 512_0 is formed over the conductive film 506 and the insulating film 510_0 so as to cover the opening 543.
  • oxygen may be added to the insulating film 510_0 when the conductive film 512_0 is formed (see FIG. 10D).
  • oxygen added to the insulating film 510_0 is schematically represented by an arrow.
  • the conductive film 512_0 is formed so as to cover the opening 543, whereby the conductive film 506 and the conductive film 512_0 are electrically connected to each other.
  • the conductive film 512_0 is preferably formed by a sputtering method in an atmosphere containing oxygen gas at the time of formation.
  • oxygen can be preferably added to the insulating film 510_0.
  • the formation method of the conductive film 512_0 is not limited to the sputtering method, and other methods such as an ALD method may be used.
  • oxygen addition treatment may be performed on the insulating film 510_0 before the conductive film 512_0 is formed or after the conductive film 512_0 is formed. The oxygen addition treatment may be performed in the same manner as the oxygen addition treatment that can be performed after the insulating film 504 is formed.
  • a mask 540 is formed at a desired position over the conductive film 512_0 by a lithography process (see FIG. 11A).
  • etching is performed over the mask 540 to process the conductive film 512_0 and the insulating film 510_0. Further, after the conductive film 512_0 and the insulating film 510_0 are processed, the mask 540 is removed. By processing the conductive film 512_0 and the insulating film 510_0, the island-shaped conductive film 512 and the island-shaped insulating film 510 are formed (see FIG. 11B).
  • the conductive film 512_0 and the insulating film 510_0 are processed using a dry etching method.
  • the thickness of the metal oxide 508 in a region where the conductive film 512 is not overlapped may be thin.
  • the insulating film 504 in a region where the metal oxide 508 is not overlapped may be thin.
  • an etchant or an etching gas eg, chlorine
  • an etchant or an etching gas is added to the metal oxide 508, or the constituent elements of the conductive film 512_0 or the insulating film 510_0 are added. It may be added into the metal oxide 508.
  • the insulating film 516 is formed over the insulating film 504, the metal oxide 508, and the conductive film 512. Note that when the insulating film 516 is formed, the metal oxide 508 in contact with the insulating film 516 becomes a region 508n. In the metal oxide 508 overlapping with the conductive film 512, a region 508i_1, a region 508i_2, and a region 508i_3 are formed. (See FIG. 11C).
  • the insulating film 516 can be formed by selecting any of the materials described above.
  • a silicon nitride oxide film with a thickness of 100 nm is formed using a PECVD apparatus.
  • two steps of plasma treatment and film formation are performed at a temperature of 220 ° C.
  • argon gas having a flow rate of 100 sccm and nitrogen gas having a flow rate of 1000 sccm are introduced into the chamber before film formation, the pressure in the chamber is set to 40 Pa, and power of 1000 W is supplied to an RF power source (27.12 MHz). Supply.
  • a silane gas having a flow rate of 50 sccm, a nitrogen gas having a flow rate of 5000 sccm, and an ammonia gas having a flow rate of 100 sccm are introduced into the chamber, the pressure in the chamber is set to 100 Pa, and an RF power source (27.12 MHz) Supply 1000 W of power.
  • the insulating film 516 By using a silicon nitride oxide film as the insulating film 516, nitrogen or hydrogen in the silicon nitride oxide film can be supplied to the region 508n in contact with the insulating film 516. In addition, by setting the temperature at the time of forming the insulating film 516 to the above-described temperature, release of excess oxygen contained in the insulating film 510 to the outside can be suppressed.
  • an insulating film 518 is formed over the insulating film 516 (see FIG. 12A).
  • the insulating film 518 can be formed by selecting any of the materials described above.
  • a 300-nm-thick silicon oxynitride film is formed as the insulating film 518 using a PECVD apparatus.
  • the insulating film 518 and part of the insulating film 516 are etched to form openings 541a and 541b reaching the region 508n (FIG. 12 (B)).
  • a method for etching the insulating film 518 and the insulating film 516 one or both of a wet etching method and a dry etching method may be used.
  • the insulating film 518 and the insulating film 516 are processed using a dry etching method.
  • a conductive film is formed over the region 508n and the insulating film 518 so as to cover the openings 541a and 541b, and the conductive film is processed into a desired shape, so that the conductive films 520a and 520b are formed (FIG. 12). (See (C)).
  • the conductive films 520a and 520b can be formed by selecting any of the materials described above.
  • a stacked film of a 50-nm-thick tungsten film and a 400-nm-thick copper film is formed as the conductive films 520a and 520b using a sputtering apparatus.
  • a method for processing the conductive film to be the conductive films 520a and 520b either or both of a wet etching method and a dry etching method may be used.
  • the conductive film is processed by etching the tungsten film by a dry etching method, so that the conductive films 520a and 520b are formed.
  • the transistor 500A illustrated in FIGS. 8A, 8B, 8C, and 8D can be manufactured.
  • a sputtering method in addition to the above-described formation methods, a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulse laser deposition (PLD) ) Method or ALD method. Alternatively, it can be formed by a coating method or a printing method.
  • CVD chemical vapor deposition
  • PLD pulse laser deposition
  • a thermal CVD method is typical, but a thermal CVD method may be used.
  • An example of the thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.
  • the inside of a chamber is set to atmospheric pressure or reduced pressure, and a source gas and an oxidant are simultaneously sent into the chamber, reacted in the vicinity of the substrate or on the substrate, and deposited on the substrate.
  • the thermal CVD method is a film forming method that does not generate plasma, and thus has an advantage that no defect is generated due to plasma damage.
  • FIGS. 3 An example of a display panel that can be used for a display portion or the like of a display device including the semiconductor device of one embodiment of the present invention will be described with reference to FIGS.
  • the display panel exemplified below is a display panel that includes both a reflective liquid crystal element and a light-emitting element and can display in both a transmission mode and a reflection mode.
  • the metal oxide of one embodiment of the present invention and the transistor including the metal oxide are preferably used for a pixel transistor of a display device, a driver for driving the display device, or an LSI for supplying data to the display device. Can be used.
  • FIG. 13 is a schematic perspective view of a display panel 600 of one embodiment of the present invention.
  • the display panel 600 has a structure in which a substrate 651 and a substrate 661 are attached to each other.
  • the substrate 661 is indicated by a broken line.
  • the display panel 600 includes a display portion 662, a circuit 659, a wiring 666, and the like.
  • the substrate 651 is provided with, for example, a circuit 659, a wiring 666, a conductive film 663 functioning as a pixel electrode, and the like.
  • FIG. 13 shows an example in which an IC 673 and an FPC 672 are mounted on a substrate 651. Therefore, the structure illustrated in FIG. 13 can also be referred to as a display module including the display panel 600, the FPC 672, and the IC 673.
  • circuit 659 for example, a circuit functioning as a scan line driver circuit can be used.
  • the wiring 666 has a function of supplying a signal and power to the display portion 662 and the circuit 659.
  • the signal and power are input to the wiring 666 from the outside or the IC 673 through the FPC 672.
  • FIG. 13 shows an enlarged view of a part of the display portion 662.
  • conductive films 663 included in a plurality of display elements are arranged in a matrix.
  • the conductive film 663 has a function of reflecting visible light and functions as a reflective electrode of a liquid crystal element 640 described later.
  • the conductive film 663 has an opening. Further, the light-emitting element 660 is provided on the substrate 651 side of the conductive film 663. Light from the light-emitting element 660 is emitted to the substrate 661 side through the opening of the conductive film 663.
  • FIG. 14 illustrates an example of a cross section of the display panel illustrated in FIG. 13 when a part of the region including the FPC 672, a part of the region including the circuit 659, and a part of the region including the display portion 662 are cut. Show.
  • the display panel includes an insulating film 620 between the substrate 651 and the substrate 661.
  • a light-emitting element 660, a transistor 601, a transistor 605, a transistor 606, a coloring layer 634, and the like are provided between the substrate 651 and the insulating film 620.
  • a liquid crystal element 640, a colored layer 631, and the like are provided between the insulating film 620 and the substrate 661.
  • the substrate 661 and the insulating film 620 are bonded to each other through an adhesive layer 641, and the substrate 651 and the insulating film 620 are bonded to each other through an adhesive layer 642.
  • the transistor 606 is electrically connected to the liquid crystal element 640, and the transistor 605 is electrically connected to the light-emitting element 660. Since both the transistor 605 and the transistor 606 are formed over the surface of the insulating film 620 on the substrate 651 side, they can be manufactured using the same process.
  • the substrate 661 is provided with a coloring layer 631, a light-blocking film 632, an insulating film 621, a conductive film 613 functioning as a common electrode for the liquid crystal element 640, an alignment film 633b, an insulating film 617, and the like.
  • the insulating film 617 functions as a spacer for maintaining the cell gap of the liquid crystal element 640.
  • An insulating layer such as an insulating film 681, an insulating film 682, an insulating film 683, an insulating film 684, and an insulating film 685 is provided on the substrate 651 side of the insulating film 620.
  • Part of the insulating film 681 functions as a gate insulating layer of each transistor.
  • the insulating film 682, the insulating film 683, and the insulating film 684 are provided so as to cover each transistor.
  • An insulating film 685 is provided to cover the insulating film 684.
  • the insulating film 684 and the insulating film 685 function as a planarization layer.
  • the insulating layer covering the transistor or the like has three layers of an insulating film 682, an insulating film 683, and an insulating film 684 is shown here, the number of layers is not limited to this, and the number of layers may be four or more. It may be a layer or two layers.
  • the insulating film 684 functioning as a planarization layer is not necessarily provided if not necessary.
  • the transistor 601, the transistor 605, and the transistor 606 each include a conductive film 654 that partially functions as a gate, a conductive film 652 that functions as a source or a drain, and a semiconductor film 653.
  • the same hatching pattern is given to a plurality of layers obtained by processing the same conductive film.
  • the liquid crystal element 640 is a reflective liquid crystal element.
  • the liquid crystal element 640 has a stacked structure in which a conductive film 635, a liquid crystal layer 612, and a conductive film 613 are stacked.
  • a conductive film 663 that reflects visible light is provided in contact with the conductive film 635 on the substrate 651 side.
  • the conductive film 663 has an opening 655.
  • the conductive films 635 and 613 include a material that transmits visible light.
  • An alignment film 633 a is provided between the liquid crystal layer 612 and the conductive film 635, and an alignment film 633 b is provided between the liquid crystal layer 612 and the conductive film 613.
  • a polarizing plate 656 is provided on the outer surface of the substrate 661.
  • the conductive film 663 has a function of reflecting visible light
  • the conductive film 613 has a function of transmitting visible light.
  • Light incident from the substrate 661 side is polarized by the polarizing plate 656, passes through the conductive film 613 and the liquid crystal layer 612, and is reflected by the conductive film 663. Then, the light passes through the liquid crystal layer 612 and the conductive film 613 again and reaches the polarizing plate 656.
  • the alignment of liquid crystal can be controlled by the voltage applied between the conductive films 663 and 635 and 613, and the optical modulation of light can be controlled. That is, the intensity of light emitted through the polarizing plate 656 can be controlled.
  • light that is not in a specific wavelength region is absorbed by the colored layer 631, so that the extracted light is, for example, red light.
  • the light emitting element 660 is a bottom emission type light emitting element.
  • the light-emitting element 660 has a stacked structure in which the conductive film 643, the EL layer 644, and the conductive film 645b are stacked in this order from the insulating film 620 side.
  • a conductive film 645a is provided to cover the conductive film 645b.
  • the conductive film 645b includes a material that reflects visible light
  • the conductive film 643 and the conductive film 645a include a material that transmits visible light.
  • Light emitted from the light-emitting element 660 is emitted to the substrate 661 side through the coloring layer 634, the insulating film 620, the opening 655, the conductive film 613, and the like.
  • the opening 655 is preferably provided with a conductive film 635 that transmits visible light. Accordingly, since the liquid crystal is aligned in the region overlapping with the opening 655 as in the other regions, alignment failure of the liquid crystal is generated at the boundary between these regions, and unintended light leakage can be suppressed.
  • a linear polarizing plate may be used as the polarizing plate 656 disposed on the outer surface of the substrate 661, but a circular polarizing plate may also be used.
  • a circularly-polarizing plate what laminated
  • a desired contrast may be realized by adjusting a cell gap, an alignment, a driving voltage, or the like of the liquid crystal element used for the liquid crystal element 640 depending on the type of the polarizing plate.
  • An insulating film 647 is provided in contact with part of the insulating film 646 that covers the end portion of the conductive film 643.
  • the insulating film 647 functions as a spacer for suppressing the insulating film 620 and the substrate 651 from approaching more than necessary.
  • the EL layer 644 and the conductive film 645a may have a function of suppressing contact of the shielding mask with a formation surface. Note that the insulating film 647 is not necessarily provided if not necessary.
  • One of a source and a drain of the transistor 605 is electrically connected to the conductive film 643 of the light-emitting element 660 through the conductive film 648.
  • connection portion 607 is a portion that connects conductive layers provided on both surfaces of the insulating film 620 through an opening provided in the insulating film 620.
  • connection portion 604 is provided in a region of the substrate 651 that does not overlap with the substrate 661.
  • the connection portion 604 is electrically connected to the FPC 672 through the connection layer 649.
  • the connection unit 604 has the same configuration as the connection unit 607.
  • a conductive layer obtained by processing the same conductive film as the conductive film 635 is exposed on the upper surface of the connection portion 604. Accordingly, the connection portion 604 and the FPC 672 can be electrically connected through the connection layer 649.
  • connection portion 687 is provided in a part of the region where the adhesive layer 641 is provided.
  • a conductive layer obtained by processing the same conductive film as the conductive film 635 and a part of the conductive film 613 are electrically connected by a connection body 686. Therefore, a signal or a potential input from the FPC 672 connected to the substrate 651 side can be supplied to the conductive film 613 formed on the substrate 661 side through the connection portion 687.
  • connection body 686 for example, conductive particles can be used.
  • conductive particles those obtained by coating the surface of particles such as organic resin or silica with a metal material can be used. It is preferable to use nickel or gold as the metal material because the contact resistance can be reduced. In addition, it is preferable to use particles in which two or more kinds of metal materials are coated in layers, such as further coating nickel with gold. It is preferable to use a material that can be elastically deformed or plastically deformed as the connection body 686. At this time, the connection body 686 which is an electroconductive particle may become the shape crushed up and down as shown in FIG. By doing so, the contact area between the connection body 686 and the conductive layer electrically connected to the connection body 686 can be increased, the contact resistance can be reduced, and the occurrence of defects such as poor connection can be suppressed.
  • connection body 686 is preferably disposed so as to be covered with the adhesive layer 641.
  • the connection body 686 may be dispersed in the adhesive layer 641 before curing.
  • FIG. 14 illustrates an example in which a transistor 601 is provided as an example of the circuit 659.
  • FIG. 14 as an example of the transistor 601 and the transistor 605, a structure in which a semiconductor film 653 in which a channel is formed is sandwiched between two gates is applied.
  • One gate is formed using a conductive film 654, and the other gate is formed using a conductive film 623 that overlaps with the semiconductor film 653 with an insulating film 682 interposed therebetween.
  • the threshold voltage of the transistor can be controlled.
  • the transistor may be driven by connecting two gates and supplying the same signal thereto.
  • Such a transistor can have higher field-effect mobility than other transistors, and can increase on-state current.
  • a circuit that can be driven at high speed can be manufactured.
  • the area occupied by the circuit portion can be reduced.
  • the transistor included in the circuit 659 and the transistor included in the display portion 662 may have the same structure.
  • the plurality of transistors included in the circuit 659 may have the same structure or may be combined with different structures.
  • the plurality of transistors included in the display portion 662 may have the same structure or may be combined with different structures.
  • At least one of the insulating film 682 and the insulating film 683 that covers each transistor is preferably formed using a material in which impurities such as water and hydrogen hardly diffuse. That is, the insulating film 682 or the insulating film 683 can function as a barrier film. With such a structure, it is possible to effectively prevent impurities from diffusing from the outside to the transistor, and a highly reliable display panel can be realized.
  • an insulating film 621 is provided to cover the coloring layer 631 and the light-shielding film 632.
  • the insulating film 621 may function as a planarization layer. Since the surface of the conductive film 613 can be substantially flattened by the insulating film 621, the alignment state of the liquid crystal layer 612 can be made uniform.
  • a conductive film 635, a conductive film 663, and an insulating film 620 are formed in this order over a supporting substrate having a separation layer, and after that, a transistor 605, a transistor 606, a light-emitting element 660, and the like are formed, and then the substrate is formed using the adhesive layer 642. 651 and the support substrate are bonded together. After that, the supporting substrate and the peeling layer are removed by peeling at each interface between the peeling layer and the insulating film 620 and the peeling layer and the conductive film 635.
  • a substrate 661 on which a colored layer 631, a light shielding film 632, a conductive film 613, and the like are formed in advance is prepared.
  • the display panel 600 can be manufactured by dropping liquid crystal over the substrate 651 or the substrate 661 and attaching the substrate 651 and the substrate 661 with the adhesive layer 641.
  • a material that causes separation at the interface between the insulating film 620 and the conductive film 635 can be selected as appropriate.
  • a layer containing a refractory metal material such as tungsten and a layer containing an oxide of the metal material are stacked as the separation layer, and silicon nitride, silicon oxynitride, or silicon nitride oxide is used as the insulating film 620 over the separation layer. It is preferable to use a layer in which a plurality of such layers are stacked.
  • the formation temperature of a layer formed later can be increased, the impurity concentration is reduced, and a highly reliable display panel can be realized.
  • an oxide or a nitride such as a metal oxide or a metal nitride is preferably used.
  • a metal oxide a material in which at least one of the concentration of hydrogen, boron, phosphorus, nitrogen, and other impurities, and the amount of oxygen vacancies is higher than that of a semiconductor layer used in a transistor is used. Can be used.
  • Adhesive layer As the adhesive layer, various curable adhesives such as an ultraviolet curable photocurable adhesive, a reactive curable adhesive, a thermosetting adhesive, and an anaerobic adhesive can be used.
  • these adhesives include epoxy resins, acrylic resins, silicone resins, phenol resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene vinyl acetate) resins, and the like.
  • a material with low moisture permeability such as an epoxy resin is preferable.
  • a two-component mixed resin may be used.
  • an adhesive sheet or the like may be used.
  • the resin may contain a desiccant.
  • a substance that adsorbs moisture by chemical adsorption such as an alkaline earth metal oxide (such as calcium oxide or barium oxide)
  • an alkaline earth metal oxide such as calcium oxide or barium oxide
  • a substance that adsorbs moisture by physical adsorption such as zeolite or silica gel
  • the inclusion of a desiccant is preferable because impurities such as moisture can be prevented from entering the element and the reliability of the display panel is improved.
  • light extraction efficiency can be improved by mixing a filler having a high refractive index or a light scattering member with the resin.
  • a filler having a high refractive index or a light scattering member for example, titanium oxide, barium oxide, zeolite, zirconium, or the like can be used.
  • connection layer an anisotropic conductive film (ACF: Anisotropic Conductive Film), an anisotropic conductive paste (ACP: Anisotropic Conductive Paste), or the like can be used.
  • ACF Anisotropic Conductive Film
  • ACP Anisotropic Conductive Paste
  • Examples of materials that can be used for the colored layer include metal materials, resin materials, resin materials containing pigments or dyes, and the like.
  • the material that can be used for the light-shielding layer include carbon black, titanium black, metal, metal oxide, and composite oxide containing a solid solution of a plurality of metal oxides.
  • the light shielding layer may be a film containing a resin material or a thin film of an inorganic material such as a metal.
  • a stacked film of a film containing a material for the colored layer can be used for the light shielding layer.
  • a stacked structure of a film including a material used for a colored layer that transmits light of a certain color and a film including a material used for a colored layer that transmits light of another color can be used. It is preferable to use a common material for the coloring layer and the light-shielding layer because the apparatus can be shared and the process can be simplified.
  • Example of production method> Here, an example of a method for manufacturing a display panel using a flexible substrate will be described.
  • the element layer includes a display element, and may include an element such as a wiring that is electrically connected to the display element, a transistor used for a pixel, or a circuit in addition to the display element.
  • the substrate includes a very thin film having a thickness of 10 nm to 300 ⁇ m.
  • a method for forming an element layer over a flexible substrate having an insulating surface there are typically two methods described below.
  • One is a method of forming an element layer directly on a substrate.
  • the other is a method of forming an element layer on a support substrate different from the substrate, peeling the element layer and the support substrate, and transferring the element layer to the substrate.
  • a method of providing flexibility by forming an element layer on a non-flexible substrate and thinning the substrate by polishing or the like is also.
  • the material constituting the substrate has heat resistance against the heat applied to the element layer forming step
  • a peeling layer and an insulating layer are first stacked over the supporting substrate, and an element layer is formed over the insulating layer. Then, it peels between a support substrate and an element layer, and transfers an element layer to a board
  • the upper limit of the temperature required for forming the element layer can be increased, and an element layer having a more reliable element can be formed. Therefore, it is preferable.
  • a layer containing a high-melting-point metal material such as tungsten and a layer containing an oxide of the metal material are stacked as the separation layer, and silicon oxide, silicon nitride, silicon oxynitride, It is preferable to use a layer in which a plurality of silicon nitride oxides or the like are stacked.
  • Examples of methods for peeling the element layer and the supporting substrate include applying a mechanical force, etching the peeling layer, or infiltrating a liquid into the peeling interface. Or you may peel by heating or cooling using the difference in the thermal expansion coefficient of two layers which form a peeling interface.
  • the peeling layer is not necessarily provided.
  • glass can be used as the supporting substrate, and an organic resin such as polyimide can be used as the insulating layer.
  • an organic resin such as polyimide
  • a starting point of peeling is formed by locally heating a part of the organic resin using a laser beam or the like, or physically cutting or penetrating a part of the organic resin with a sharp member, Peeling may be performed at the interface between the glass and the organic resin.
  • the organic resin a photosensitive material is preferably used because the shape of the opening and the like can be easily manufactured.
  • said laser beam it is preferable that it is the light of the wavelength range of visible light to an ultraviolet-ray, for example.
  • light with a wavelength of 200 nm to 400 nm preferably light with a wavelength of 250 nm to 350 nm can be used.
  • an excimer laser having a wavelength of 308 nm because the productivity is excellent.
  • a solid-state UV laser such as a UV laser having a wavelength of 355 nm, which is the third harmonic of the Nd: YAG laser, may be used.
  • a heat generation layer may be provided between the support substrate and the insulating layer made of an organic resin, and the heat generation layer may be heated to perform peeling at the interface between the heat generation layer and the insulating layer.
  • the heat generating layer various materials such as a material that generates heat when an electric current flows, a material that generates heat by absorbing light, and a material that generates heat by applying a magnetic field can be used.
  • the heat generating layer can be selected from semiconductors, metals, and insulators.
  • the insulating layer formed of an organic resin can be used as a substrate after peeling.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Thin Film Transistor (AREA)

Abstract

La présente invention concerne un nouvel oxyde métallique. L'invention concerne spécifiquement un oxyde métallique présentant une pluralité d'espaces d'énergie, l'oxyde métallique étant prévu avec une première couche dans laquelle le niveau d'énergie en partie inférieure de la bande de conduction de la bande d'énergie est élevé et une seconde couche dans laquelle le niveau d'énergie en partie inférieure de la bande de conduction de la bande d'énergie est inférieur à celui de la première couche, la seconde couche présentant plus de supports que la première couche, la différence entre les niveaux d'énergie en partie inférieure de la bande de conduction dans la première couche et de la seconde couche est d'au moins 0,2 eV, et la première couche et la second couche sont alternativement stratifiées.
PCT/IB2017/053614 2016-07-11 2017-06-19 Oxyde métallique, et dispositif semi-conducteur comportant ledit oxyde métallique WO2018011648A1 (fr)

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JP2016137189 2016-07-11
JP2016-137189 2016-07-11

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023092554A1 (fr) * 2021-11-29 2023-06-01 京东方科技集团股份有限公司 Transistor à couches minces et son procédé de fabrication, substrat matriciel et panneau d'affichage

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007123702A (ja) * 2005-10-31 2007-05-17 Toppan Printing Co Ltd 薄膜トランジスタとその製造方法
JP2014103389A (ja) * 2012-10-24 2014-06-05 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
JP2014207396A (ja) * 2013-04-16 2014-10-30 スタンレー電気株式会社 ｐ型ＺｎＯ系半導体層の製造方法、ＺｎＯ系半導体素子の製造方法、及び、ｎ型ＺｎＯ系半導体積層構造

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007123702A (ja) * 2005-10-31 2007-05-17 Toppan Printing Co Ltd 薄膜トランジスタとその製造方法
JP2014103389A (ja) * 2012-10-24 2014-06-05 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
JP2014207396A (ja) * 2013-04-16 2014-10-30 スタンレー電気株式会社 ｐ型ＺｎＯ系半導体層の製造方法、ＺｎＯ系半導体素子の製造方法、及び、ｎ型ＺｎＯ系半導体積層構造

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023092554A1 (fr) * 2021-11-29 2023-06-01 京东方科技集团股份有限公司 Transistor à couches minces et son procédé de fabrication, substrat matriciel et panneau d'affichage

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