WO2018010082A1 - 一种应用于封闭通信系统的信号解调装置及方法 - Google Patents

一种应用于封闭通信系统的信号解调装置及方法 Download PDF

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WO2018010082A1
WO2018010082A1 PCT/CN2016/089742 CN2016089742W WO2018010082A1 WO 2018010082 A1 WO2018010082 A1 WO 2018010082A1 CN 2016089742 W CN2016089742 W CN 2016089742W WO 2018010082 A1 WO2018010082 A1 WO 2018010082A1
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signal
communication system
digital signal
closed communication
digital
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PCT/CN2016/089742
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English (en)
French (fr)
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王光耀
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深圳市汇顶科技股份有限公司
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Priority to CN201680000578.4A priority Critical patent/CN106464624B/zh
Priority to PCT/CN2016/089742 priority patent/WO2018010082A1/zh
Priority to EP16886811.5A priority patent/EP3324590B1/en
Priority to KR1020177021643A priority patent/KR20180116119A/ko
Priority to US15/663,807 priority patent/US10291388B2/en
Publication of WO2018010082A1 publication Critical patent/WO2018010082A1/zh
Priority to US16/283,698 priority patent/US10523410B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
    • H04L27/2338—Demodulator circuits; Receiver circuits using non-coherent demodulation using sampling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0087—Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/156—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
    • H04L27/1566—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using synchronous sampling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38—Demodulator circuits; Receiver circuits

Definitions

  • the present application relates to the field of signal demodulation technologies, and in particular, to a signal demodulation apparatus and method applied to a closed communication system.
  • corresponding demodulation methods generally include: filtering, envelope detection, local carrier multiplication, sampling decision, and so on.
  • the receiving end since the receiving end does not determine the modulation mode of the transmitting end, in order to avoid interference of other modulated signals on the modulated signal that needs to be demodulated, it is necessary to set a complicated demodulating circuit.
  • a typical 2FSK demodulation method needs to configure four filters, two envelope detectors, and one sample decider in order to avoid interference of 2FSK, 2PSK and other modulation signals on 2FSK modulated signals.
  • the demodulation method is relatively complicated, and the circuit area and power consumption required for implementation are relatively large, and it is difficult to meet the application of ultra-low power consumption.
  • the receiving end since the receiving end has determined the modulation mode of the transmitting end, including the amplitude, frequency and length of the carrier, the receiving end will only receive such a modulated signal, and there is no need to consider other like the non-closed communication system. Modulation of signal interference.
  • the closed communication system has the following characteristics: a single communication signal, a fixed modulation mode, and limited power consumption. If the signal demodulation device of the existing communication system is applied to the closed In a communication system, it is necessary to add a circuit complicated device, thereby causing a large increase in power consumption of the communication system.
  • the present application provides a signal demodulating apparatus and method applied to a closed communication system that overcomes the above problems or at least partially solves the above problems.
  • the present application provides a signal demodulating apparatus applied to a closed communication system, including:
  • An analog voltage comparator for converting the received modulated signal into a digital signal and outputting the digital signal
  • sampling determiner for sampling the received digital signal and obtaining a value represented by the digital signal according to characteristics of the sampled digital signal to complete signal demodulation.
  • Another aspect of the present application provides a signal demodulation method applied to a closed communication system, including:
  • the digital signal is sampled and the value represented by the digital signal is obtained based on characteristics of the sampled digital signal to complete signal demodulation.
  • an analog modulated signal is converted into a digital signal by an analog voltage comparator, and the digital signal is sampled and characterized by a sampling determiner to obtain the digital
  • the value represented by the signal is demodulated to complete the signal. Therefore, the present application adopts a simple circuit structure to demodulate a modulated signal of a closed communication system, and has the advantages of simple circuit structure, easy implementation, small circuit area, low power consumption, etc., and is suitable for applications with strict requirements on power consumption and area. Scenes, such as wearable devices.
  • Figure 1 shows a schematic diagram of a conventional 2FSK demodulation circuit
  • FIG. 2 is a schematic diagram showing an embodiment of a signal demodulating apparatus applied to a closed communication system of the present application
  • FIG. 3 is a schematic diagram showing an embodiment of an analog voltage comparator in a signal demodulating apparatus of the present application applied to a closed communication system;
  • FIG. 4 is a schematic diagram showing signals of an input signal being a 2ASK modulated signal passing through an analog voltage comparator and a sampled decider;
  • Figure 5 is a diagram showing signals of an input signal being a 2FSK modulated signal passing through an analog voltage comparator and a sampled decider;
  • Figure 6 is a diagram showing signals of an input signal being a 2PSK modulated signal passing through an analog voltage comparator and a sampled decider;
  • FIG. 7 is a schematic diagram showing an embodiment of a sample decider in a signal demodulating apparatus applied to a closed communication system of the present application
  • FIG. 8 is a flow chart showing an embodiment of a signal demodulation method applied to a closed communication system of the present application
  • step S1 is a flow chart showing an embodiment of step S1 in the signal demodulation method applied to the closed communication system of the present application.
  • Figure 10 is a flow chart showing an embodiment of the step S2 in the signal demodulation method applied to the closed communication system of the present application.
  • an embodiment of the present application provides a signal demodulating apparatus applied to a closed communication system, including:
  • the analog voltage comparator 21 is configured to convert the received modulated signal into a digital signal and output the digital signal.
  • the sample arbiter 22 is configured to sample the received digital signal and obtain a value represented by the digital signal according to characteristics of the sampled digital signal to complete signal demodulation.
  • the present invention adopts a simple circuit structure to demodulate a modulated signal of a closed communication system, and has the advantages of simple circuit structure, easy implementation, small circuit area and low power consumption, and is suitable for applications in which power consumption and area requirements are strict. Such as wearable devices.
  • Another embodiment of the present application provides a signal demodulating apparatus applied to a closed communication system, including an analog voltage comparator 21 and a sampling decider 22.
  • the analog voltage comparator 21 includes:
  • the signal input end 211 is configured to receive the modulated signal.
  • the threshold input terminal 212 is configured to receive a comparator threshold voltage.
  • the signal output end 213 is configured to output a digital signal according to a comparison result of the modulation signal and the comparator threshold voltage.
  • the signal output end 213 is specifically configured to: when the voltage of the modulation signal is greater than the comparator threshold voltage, output the first numerical digital signal; otherwise, output the second numerical digital signal.
  • the first value is 1; the second value is 0.
  • the modulated signal received by the signal input terminal 211 passes through the analog voltage comparator 21, it is only necessary to set the comparator threshold voltage of the voltage comparator 21 to an appropriate value, common digital modulation signals 2ASK, 2FSK and 2PSK. After the analog comparator 21 is passed, the modulation is about to be After comparing the signal with the comparator threshold voltage, both the value 0 and the value 1 have distinct features. Therefore, a digital signal consisting of 1 or 0 output from the signal output terminal 213 of the analog voltage comparator 21 can be obtained according to the comparatively distinct different features.
  • the demodulation process of the 2ASK modulated signal through the analog voltage comparator 21 is as shown in FIG. 4, the demodulation process of the 2FSK modulated signal through the voltage comparator is as shown in FIG. 5, and the demodulation process of the 2PSK modulated signal through the voltage comparator is as shown in FIG. 6. Shown.
  • the square wave obtained after passing through the analog voltage comparator 21 has relatively distinct features: 2ASK modulated signal is demodulated by a voltage comparator, square wave high The value represents the value 1, and the square wave low value represents the value 0.
  • the square wave closely represents the value 1
  • the square wave sparse represents the value 0
  • the 2PSK modulated signal is demodulated by the voltage comparator
  • the cosine The wave represents a value of 1
  • the sine wave reaches a value of 0.
  • the comparator threshold voltage is half of the peak voltage of the modulation signal, and the specific value may be adjusted according to the application scenario of the signal demodulation device.
  • Another embodiment of the present application provides a signal demodulating apparatus applied to a closed communication system, including an analog voltage comparator 21 and a sampling decider 22.
  • the sample decider 22 includes:
  • the high frequency clock sampling circuit 221 is configured to sample the digital signal with a high frequency clock and output a sampling signal.
  • the frequency of the high frequency clock is determined according to a pulse width of the digital signal and an application scenario of the signal demodulating device.
  • the high frequency clock sampling circuit utilizes a high frequency clock to sample at least two points for a high level of any of the pulses of the digital signal.
  • the sampled signal is a continuous binary code stream.
  • the feature extraction decision circuit 222 is configured to perform feature extraction on the received sampling signal, compare the extracted feature with characteristics of the known digital modulated signal, and obtain a value represented by the digital signal to complete signal demodulation.
  • the extracted feature is: a detection pulse width, a period, a rising edge, and a bottom of the sampling signal At least one of the falling edges.
  • the extracted features are compared to features of known digitally modulated signals to obtain values representative of the digital signals, as shown in Figures 4 through 6, thereby completing the signal demodulation.
  • an embodiment of the present application provides a signal demodulation method applied to a closed communication system, including:
  • the present invention adopts a simple circuit structure to demodulate a modulated signal of a closed communication system, and has the advantages of simple circuit structure, easy implementation, small circuit area and low power consumption, and is suitable for applications in which power consumption and area requirements are strict. Such as wearable devices.
  • Another embodiment of the present application provides a signal demodulation method applied to a closed communication system, including step S1 and step S2.
  • step S1 includes:
  • the S13 specifically includes: when the voltage of the modulation signal is greater than the comparator threshold voltage, outputting the first numerical digital signal; otherwise, outputting the second numerical digital signal.
  • the first value is 1; the second value is 0.
  • the comparator threshold voltage of the voltage comparator only needs to be set to an appropriate value, and common digital modulation signals 2ASK, 2FSK, 2PSK, etc. are compared by the analog. After comparing the modulation signal with the threshold voltage of the comparator, the value 0 and the value 1 have different distinct characteristics. Therefore, a digital signal consisting of 1 or 0 output from the signal output terminal 213 of the analog voltage comparator 21 can be obtained according to the comparatively distinct different features.
  • the demodulation process of the 2ASK modulated signal through the analog voltage comparator 21 is as shown in FIG. 4, the demodulation process of the 2FSK modulated signal through the voltage comparator is as shown in FIG. 5, and the demodulation process of the 2PSK modulated signal through the voltage comparator is as shown in FIG. 6. Shown. As can be seen from the above figures, for a particular digitally modulated signal, after the analog voltage comparator 21, the value "0" and the value "1" have relatively different characteristics, and the analog voltage comparator 21 is obtained. A digital signal composed of 1 or 0 output from the signal output terminal 213.
  • the comparator threshold voltage is half of the peak voltage of the modulation signal, and the specific value may be adjusted according to the application scenario of the signal demodulation device.
  • Another embodiment of the present application provides a signal demodulation method applied to a closed communication system, including step S1 and step S2.
  • the step S2 includes:
  • the digital signal is sampled by using a high frequency clock.
  • the frequency of the high frequency clock is determined according to a pulse width of the digital signal and an application scenario of the signal demodulating device.
  • the high frequency clock sampling circuit utilizes a high frequency clock to sample at least two points for a high level of any of the pulses of the digital signal.
  • the sampled signal is a continuous binary code stream.
  • S22 Perform feature extraction on the sampled signal, compare the extracted feature with characteristics of the known digital modulated signal, and obtain a value represented by the digital signal to complete signal demodulation.
  • the extracted feature is: at least one of a detection pulse width, a period, a rising edge, and a falling edge of the sampling signal.
  • the extracted features are compared to features of known digitally modulated signals to obtain values representative of the digital signals, as shown in Figures 4 through 6, thereby completing the signal demodulation.
  • modules in the devices of the embodiments can be adaptively changed and placed in one or more devices different from the embodiment.
  • the modules or units or components of the embodiments may be combined into one module or unit or component, and further they may be divided into a plurality of sub-modules or sub-units or sub-components.
  • any combination of the features disclosed in the specification, including the accompanying claims, the abstract and the drawings, and any methods so disclosed, or All processes or units of the device are combined.
  • Each feature disclosed in this specification (including the accompanying claims, the abstract and the drawings) may be replaced by alternative features that provide the same, equivalent or similar purpose.
  • the various component embodiments of the present application can be implemented in hardware, or in a software module running on one or more processors, or in a combination thereof.
  • a microprocessor or digital signal processor may be used in practice to implement some or all of the functionality of some or all of the components of the message alerting in accordance with embodiments of the present application.
  • the application can also be implemented as a device or device program (e.g., a computer program and a computer program product) adapted to perform some or all of the methods described herein.
  • Such a program implementing the present application may be stored on a computer readable medium or may be in the form of one or more signals. Such signals may be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.
  • "an embodiment," or "an embodiment," or "one or more embodiments" as used herein means that the particular features, structures, or characteristics described in connection with the embodiments are included in at least one embodiment of the present application.
  • phrase "in one embodiment" is not necessarily referring to the same embodiment.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
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Abstract

一种应用于封闭通信系统的信号解调装置及方法，其中装置包括：模拟电压比较器（21），用于将接收的调制信号转换为数字信号，并输出所述数字信号；抽样判决器（22），用于对接收的所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。

Description

一种应用于封闭通信系统的信号解调装置及方法 技术领域
本申请涉及信号解调技术领域，特别涉及一种应用于封闭通信系统的信号解调装置及方法。
背景技术
常用的数字调制方式有如下几种：二进制幅移键控调制(Binary Amplitude Shift Keying，即2ASK)、二进制频移键控调制(Binary Frequency Shift Keying，即2FSK)、二进制相移键控调制(Binary Phase Shift Keying，即2PSK)等，对应的解调方式一般包括：滤波、包络检测、本地载波相乘、抽样判决等。
对于非封闭通信系统，由于接收端并不确定发送端的调制方式，因此为了避免其他调制信号对需要进行解调的调制信号的干扰，需要设置复杂的解调电路。
参见图1，典型的2FSK解调方法为了避免2ASK、2PSK等其他调制信号对2FSK调制信号的干扰，其需要配置4个滤波器、2个包络检波器、一个抽样判决器。该解调方法比较复杂，实现起来需要耗费的电路面积和功耗都会比较大，难以满足超低功耗的应用。对于封闭的通信系统，由于接收端已确定发送端的调制方式，包括载波的幅度、频率和长度等信息，接收端只会接收到这一种调制信号，没有必要像非封闭通信系统一样需要考虑其他调制信号的干扰。
根据以上可以看出，封闭的通信系统有以下特点：通讯信号单一，调制方式固定，电能功耗有限。如果将现有通信系统的信号解调装置应用于封闭 的通信系统中，则需要添加电路复杂的装置，从而导致通信系统的电能功耗大大增加。
因此，亟需一种应用于封闭通信系统的信号解调装置以解决现有技术中存在的问题。
发明内容
鉴于上述问题，本申请提供一种克服上述问题或者至少部分地解决上述问题的应用于封闭通信系统的信号解调装置及方法。
本申请一方面提供了一种应用于封闭通信系统的信号解调装置，包括：
模拟电压比较器，用于将接收的调制信号转换为数字信号，并输出所述数字信号；
抽样判决器，用于对接收的所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。
本申请另一方面提供了一种应用于封闭通信系统的信号解调方法，包括：
将接收的调制信号转换为数字信号；
对所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。
根据本申请的应用于封闭通信系统的信号解调装置及方法，通过模拟电压比较器将模拟调制信号转换为数字信号，以及抽样判决器对所述数字信号进行采样以及特征判断，获得所述数字信号代表的值以完成信号解调。因此，本申请采用简单的电路结构对封闭通信系统的调制信号进行解调，具有电路结构简单，易于实现、电路面积小和功耗低等优点，适合应用在对功耗和面积要求比较严格的场景，比如可穿戴设备等。
上述说明仅是本申请技术方案的概述，为了能够更清楚了解本申请的技术手段，而可依照说明书的内容予以实施，并且为了让本申请的上述和其它 目的、特征和优点能够更明显易懂，以下特举本申请的具体实施方式。
附图说明
通过阅读下文优选实施方式的详细描述，各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的，而并不认为是对本申请的限制。而且在整个附图中，用相同的参考符号表示相同的部件。在附图中：
图1示出了现有的2FSK解调电路示意图；
图2示出了本申请应用于封闭通信系统的信号解调装置一实施例的示意图；
图3示出了本申请应用于封闭通信系统的信号解调装置中模拟电压比较器一实施例的示意图；
图4示出了输入信号为2ASK调制信号通过模拟电压比较器和抽样判决器的信号的示意图；
图5示出了输入信号为2FSK调制信号通过模拟电压比较器和抽样判决器的信号的示意图；
图6示出了输入信号为2PSK调制信号通过模拟电压比较器和抽样判决器的信号的示意图；
图7示出了本申请应用于封闭通信系统的信号解调装置中抽样判决器一实施例的示意图；
图8示出了本申请应用于封闭通信系统的信号解调方法一实施例的流程图；
图9示出了本申请应用于封闭通信系统的信号解调方法中步骤S1一实施例的流程图；
图10示出了本申请应用于封闭通信系统的信号解调方法中步骤S2一实施例的流程图。
具体实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例，然而应当理解，可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反，提供这些实施例是为了能够更透彻地理解本公开，并且能够将本公开的范围完整的传达给本领域的技术人员。
参见图2，本申请实施例提供了一种应用于封闭通信系统的信号解调装置，包括：
模拟电压比较器21，用于将接收的调制信号转换为数字信号，并输出所述数字信号。
抽样判决器22，用于对接收的所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。
本申请采用简单的电路结构对封闭通信系统的调制信号进行解调，具有电路结构简单，易于实现、电路面积小和功耗低等优点，适合应用在对功耗和面积要求比较严格的场景，比如可穿戴设备等。
本申请另一实施例提供一种应用于封闭通信系统的信号解调装置，包括模拟电压比较器21以及抽样判决器22。
参见图3，所述模拟电压比较器21包括：
信号输入端211，用于接收所述调制信号。
阈值输入端212，用于接收比较器阈值电压。
信号输出端213，用于根据所述调制信号与所述比较器阈值电压的比较结果输出数字信号。
所述信号输出端213具体用于：当所述调制信号的电压大于所述比较器阈值电压时，输出第一数值数字信号；否则，输出第二数值数字信号。
具体地，所述第一数值为1；所述第二数值为0。
当信号输入端211接收的调制信号经过所述模拟电压比较器21时，只需将所述电压比较器21的比较器阈值电压设置为一个合适的值，常见的数字调制信号2ASK、2FSK和2PSK等通过所述模拟比较器21后，即将所述调制 信号与所述比较器阈值电压的进行比较后，数值0和数值1都会有比较明显的不同特征。因此，可根据所述比较明显的不同特征，获得模拟电压比较器21的所述信号输出端213输出的1或者0组成的数字信号。
2ASK调制信号通过所述模拟电压比较器21的解调过程如图4所示，2FSK调制信号通过电压比较器解调过程如图5所示，2PSK调制信号通过电压比较器解调过程如图6所示。从上述附图可以看出，对于特定的数字调制信号，经过所述模拟电压比较器21后，获得的方波都有比较明显的不同特征：2ASK调制信号经过电压比较器解调后，方波高值代表数值1，方波低值代表数值0，2FSK调制信号经过电压比较器解调后，方波紧密代表数值1，方波稀疏代表数值0，2PSK调制信号经过电压比较器解调后，余弦波代表数值1，正弦波达标数值0，根据上述特征，获得模拟电压比较器21的所述信号输出端213输出的1或者0组成的数字信号。
为了达到理想的解调效果，所述比较器阈值电压为所述调制信号的峰值电压的一半，具体数值可以根据所述信号解调装置应用场景进行调整。
本申请另一实施例提供一种应用于封闭通信系统的信号解调装置，包括模拟电压比较器21以及抽样判决器22。
参见图7，所述抽样判决器22包括：
高频时钟采样电路221，用于利用高频时钟对所述数字信号进行采样，并输出采样信号。
具体地，所述高频时钟的频率根据所述数字信号的脉冲宽度和所述信号解调装置的应用场景确定。
为了达到理想的解调效果，所述高频时钟采样电路利用高频时钟针对所述数字信号任一脉冲的高电平至少采样两个点。
所述采样信号为连续的二进制码流。
特征提取判决电路222，用于对接收的所述采样信号进行特征提取，将所提取的特征与已知数字调制信号的特征进行比较，获得所述数字信号代表的值以完成信号解调。
所述提取的特征为：所述采样信号的检测脉冲宽度、周期、上升沿、下 降沿中至少其一。
将所述提取的特征与已知数字调制信号的特征进行比较，获得所述数字信号代表的值，如图4至图6所示，从而完成所述信号解调。
参见图8，本申请实施例提供了一种应用于封闭通信系统的信号解调方法，包括：
S1、将接收的调制信号转换为数字信号。
S2、对所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。
本申请采用简单的电路结构对封闭通信系统的调制信号进行解调，具有电路结构简单，易于实现、电路面积小和功耗低等优点，适合应用在对功耗和面积要求比较严格的场景，比如可穿戴设备等。
本申请另一实施例提供一种应用于封闭通信系统的信号解调方法，包括步骤S1以及步骤S2。
参见图9，所述步骤S1包括：
S11、接收所述调制信号。
S12、接收比较器阈值电压。
S13、根据所述调制信号与所述比较器阈值电压的比较结果输出数字信号。
所述S13具体包括：当所述调制信号的电压大于所述比较器阈值电压时，输出第一数值数字信号；否则，输出第二数值数字信号。
具体地，所述第一数值为1；所述第二数值为0。
当接收的调制信号经过所述模拟电压比较器时，只需将所述电压比较器的比较器阈值电压设置为一个合适的值，常见的数字调制信号2ASK、2FSK和2PSK等通过所述模拟比较器后，即将所述调制信号与所述比较器阈值电压的进行比较后，数值0和数值1都会有比较明显的不同特征。因此，可根据所述比较明显的不同特征，获得模拟电压比较器21的所述信号输出端213输出的1或者0组成的数字信号。
2ASK调制信号通过所述模拟电压比较器21的解调过程如图4所示，2FSK调制信号通过电压比较器解调过程如图5所示，2PSK调制信号通过电压比较器解调过程如图6所示。从上述附图可以看出，对于特定的数字调制信号，经过所述模拟电压比较器21后，数值“0”和数值“1”都有比较明显的不同特征，获得模拟电压比较器21的所述信号输出端213输出的1或者0组成的数字信号。
为了达到理想的解调效果，所述比较器阈值电压为所述调制信号的峰值电压的一半，具体数值可以根据所述信号解调装置应用场景进行调整。
本申请另一实施例提供一种应用于封闭通信系统的信号解调方法，包括步骤S1以及步骤S2。
参见图10，所述步骤S2包括：
S21、利用高频时钟对所述数字信号进行采样。
具体地，所述高频时钟的频率根据所述数字信号的脉冲宽度和所述信号解调装置的应用场景确定。
为了达到理想的解调效果，所述高频时钟采样电路利用高频时钟针对所述数字信号任一脉冲的高电平至少采样两个点。
所述采样信号为连续的二进制码流。
S22、对采样信号进行特征提取，将所提取的特征与已知数字调制信号的特征进行比较，获得所述数字信号代表的值以完成信号解调。
所述提取的特征为：所述采样信号的检测脉冲宽度、周期、上升沿、下降沿中至少其一。
将所述提取的特征与已知数字调制信号的特征进行比较，获得所述数字信号代表的值，如图4至图6所示，从而完成所述信号解调。
在此提供的算法和显示不与任何特定计算机、虚拟系统或者其它设备固有相关。各种通用系统也可以与基于在此的示教一起使用。根据上面的描述，构造这类系统所要求的结构是显而易见的。此外，本申请也不针对任何特定编程语言。应当明白，可以利用各种编程语言实现在此描述的本申请的内容，并且上面对特定语言所做的描述是为了披露本申请的最佳实施方式。
在此处所提供的说明书中，说明了大量具体细节。然而，能够理解，本申请的实施例可以在没有这些具体细节的情况下实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
类似地，应当理解，为了精简本公开并帮助理解各个发明方面中的一个或多个，在上面对本申请的示例性实施例的描述中，本申请的各个特征有时被一起分组到单个实施例、图、或者对其的描述中。然而，并不应将该公开的方法解释成反映如下意图：即所要求保护的本申请要求比在每个权利要求中所明确记载的特征更多的特征。更确切地说，如下面的权利要求书所反映的那样，发明方面在于少于前面公开的单个实施例的所有特征。因此，遵循具体实施方式的权利要求书由此明确地并入该具体实施方式，其中每个权利要求本身都作为本申请的单独实施例。
本领域那些技术人员可以理解，可以对实施例中的设备中的模块进行自适应性地改变并且把它们设置在与该实施例不同的一个或多个设备中。可以把实施例中的模块或单元或组件组合成一个模块或单元或组件，以及此外可以把它们分成多个子模块或子单元或子组件。除了这样的特征和/或过程或者单元中的至少一些是相互排斥之外，可以采用任何组合对本说明书(包括伴随的权利要求、摘要和附图)中公开的所有特征以及如此公开的任何方法或者设备的所有过程或单元进行组合。除非另外明确陈述，本说明书(包括伴随的权利要求、摘要和附图)中公开的每个特征可以由提供相同、等同或相似目的的替代特征来代替。
此外，本领域的技术人员能够理解，尽管在此所述的一些实施例包括其它实施例中所包括的某些特征而不是其它特征，但是不同实施例的特征的组合意味着处于本申请的范围之内并且形成不同的实施例。例如，在下面的权利要求书中，所要求保护的实施例的任意之一都可以以任意的组合方式来使用。
本申请的各个部件实施例可以以硬件实现，或者以在一个或者多个处理器上运行的软件模块实现，或者以它们的组合实现。本领域的技术人员应当理解，可以在实践中使用微处理器或者数字信号处理器(DSP)来实现根据本申请实施例的消息提醒的装置中的一些或者全部部件的一些或者全部功 能。本申请还可以实现为适于执行这里所描述的方法的一部分或者全部的设备或者装置程序(例如，计算机程序和计算机程序产品)。这样的实现本申请的程序可以存储在计算机可读介质上，或者可以具有一个或者多个信号的形式。这样的信号可以从因特网网站上下载得到，或者在载体信号上提供，或者以任何其他形式提供。
本文中所称的“一个实施例”、“实施例”或者“一个或者多个实施例”意味着，结合实施例描述的特定特征、结构或者特性包括在本申请的至少一个实施例中。此外，请注意，这里“在一个实施例中”的词语例子不一定全指同一个实施例。
在此处所提供的说明书中，说明了大量具体细节。然而，能够理解，本申请的实施例可以在没有这些具体细节的情况下被实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
应该注意的是上述实施例对本申请进行说明而不是对本申请进行限制，并且本领域技术人员在不脱离所附权利要求的范围的情况下可设计出替换实施例。在权利要求中，不应将位于括号之间的任何参考符号构造成对权利要求的限制。单词“包含”不排除存在未列在权利要求中的元件或步骤。位于元件之前的单词“一”或“一个”不排除存在多个这样的元件。本申请可以借助于包括有若干不同元件的硬件以及借助于适当编程的计算机来实现。在列举了若干装置的单元权利要求中，这些装置中的若干个可以是通过同一个硬件项来具体体现。单词第一、第二、以及第三等的使用不表示任何顺序。可将这些单词解释为名称。

Claims (20)

  1. 一种应用于封闭通信系统的信号解调装置，其特征在于，包括：
    模拟电压比较器，用于将接收的调制信号转换为数字信号，并输出所述数字信号；
    抽样判决器，用于对接收的所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。
  2. 如权利要求1所述的应用于封闭通信系统的信号解调装置，其特征在于，所述模拟电压比较器包括：
    信号输入端，用于接收所述调制信号；
    阈值输入端，用于接收比较器阈值电压；
    信号输出端，用于根据所述调制信号与所述比较器阈值电压的比较结果输出数字信号。
  3. 如权利要求2所述的应用于封闭通信系统的信号解调装置，其特征在于，所述信号输出端具体用于：当所述调制信号的电压大于所述比较器阈值电压时，输出第一数值数字信号；否则，输出第二数值数字信号。
  4. 如权利要求3所述的应用于封闭通信系统的信号解调装置，其特征在于，所述第一数值为1；所述第二数值为0。
  5. 如权利要求2至4中任一项所述的应用于封闭通信系统的信号解调装置，其特征在于，所述比较器阈值电压为所述调制信号的峰值电压的一半。
  6. 如权利要求1所述的应用于封闭通信系统的信号解调装置，其特征在于，所述抽样判决器包括：
    高频时钟采样电路，用于利用高频时钟对所述数字信号进行采样，并输出采样信号；
    特征提取判决电路，用于对接收的所述采样信号进行特征提取，将所提取的特征与已知数字调制信号的特征进行比较，获得所述数字信号代表的值以完成信号解调。
  7. 如权利要求6所述的应用于封闭通信系统的信号解调装置，其特征在 于，所述高频时钟的频率根据所述数字信号的脉冲宽度和所述信号解调装置的应用场景确定。
  8. 如权利要求7所述的应用于封闭通信系统的信号解调装置，其特征在于，所述高频时钟采样电路利用高频时钟针对所述数字信号任一脉冲的高电平至少采样两个点。
  9. 如权利要求8所述的应用于封闭通信系统的信号解调装置，其特征在于，所述采样信号为连续的二进制码流。
  10. 如权利要求6所述的应用于封闭通信系统的信号解调装置，其特征在于，所述提取的特征为：所述采样信号的检测脉冲宽度、周期、上升沿、下降沿中至少其一。
  11. 一种应用于封闭通信系统的信号解调方法，其特征在于，包括：
    将接收的调制信号转换为数字信号；
    对所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调。
  12. 如权利要求11所述的应用于封闭通信系统的信号解调方法，其特征在于，所述将接收的调制信号转换为数字信号包括：
    接收所述调制信号；
    接收比较器阈值电压；
    根据所述调制信号与所述比较器阈值电压的比较结果输出数字信号。
  13. 如权利要求12所述的应用于封闭通信系统的信号解调方法，其特征在于，所述根据所述调制信号与所述比较器阈值电压的比较结果输出数字信号具体为：当所述调制信号的电压大于所述比较器阈值电压时，输出第一数值数字信号；否则，输出第二数值数字信号。
  14. 如权利要求13所述的应用于封闭通信系统的信号解调方法，其特征在于，所述第一数值为1；所述第二数值为0。
  15. 如权利要求12至14中任一项所述的应用于封闭通信系统的信号解调方法，其特征在于，所述比较器阈值电压为所述调制信号的峰值电压的一半。
  16. 如权利要求11所述的应用于封闭通信系统的信号解调方法，其特征在于，所述对所述数字信号进行采样，并根据采样数字信号的特征获得所述数字信号代表的值以完成信号解调包括：
    利用高频时钟对所述数字信号进行采样；
    对采样信号进行特征提取，将所提取的特征与已知数字调制信号的特征进行比较，获得所述数字信号代表的值以完成信号解调。
  17. 如权利要求16所述的应用于封闭通信系统的信号解调方法，其特征在于，所述高频时钟的频率根据所述数字信号的脉冲宽度和所述信号解调装置的应用场景确定。
  18. 如权利要求17所述的应用于封闭通信系统的信号解调方法，其特征在于，所述高频时钟采样电路利用高频时钟针对所述数字信号任一脉冲的高电平至少采样两个点。
  19. 如权利要求18所述的应用于封闭通信系统的信号解调方法，其特征在于，所述采样信号为连续的二进制码流。
  20. 如权利要求16所述的应用于封闭通信系统的信号解调方法，其特征在于，所述提取的特征为：所述采样信号的检测脉冲宽度、周期、上升沿、下降沿中至少其一。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101546A (ja) * 1989-09-14 1991-04-26 Matsushita Electric Works Ltd デジタル信号読み取り方式
US5777511A (en) * 1996-04-22 1998-07-07 Sanyo Electric Co., Ltd. Data demodulation apparatus
JP2009055097A (ja) * 2007-08-23 2009-03-12 Advanced Telecommunication Research Institute International Ｆｓｋ復調回路及び方法
CN201607480U (zh) * 2009-11-13 2010-10-13 英业达股份有限公司 电源信号测试装置
CN103634263A (zh) * 2013-12-07 2014-03-12 天津光电通信技术有限公司 一种连续相位频移键控数字解调装置及其解调方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4065722A (en) * 1976-12-27 1977-12-27 Glenayre Electronics, Ltd. Demodulation method and circuit for discretely modulated ac signals
US5107522A (en) * 1990-02-05 1992-04-21 Sharp Kabushiki Kaisha Automatic frequency control circuit
US5550505A (en) * 1994-12-30 1996-08-27 General Electric Company Frequency shift keying (FSK) demodulator for use in low signal-to-noise ratio environments
CN1156987C (zh) * 1996-05-28 2004-07-07 皇家菲利浦电子有限公司 一种接收机,一种解调器和一种解调方法
KR100290284B1 (ko) 1997-11-18 2001-05-15 윤종용 카운터를 구비한 주파수 천이 키잉 복조기
JP3252820B2 (ja) * 1999-02-24 2002-02-04 日本電気株式会社 復調及び変調回路並びに復調及び変調方法
JP2000307665A (ja) * 1999-04-22 2000-11-02 Matsushita Electric Ind Co Ltd 無線受信装置の復調回路及び復調方法
JP3783853B2 (ja) * 2002-02-12 2006-06-07 株式会社ゼネラル リサーチ オブ エレクトロニックス Ｆｓｋ復調信号の中心レベル検出補正回路
CN100499619C (zh) * 2004-04-05 2009-06-10 鼎芯通讯（上海）有限公司 二进制移频键控解调器
JP4506426B2 (ja) * 2004-11-19 2010-07-21 ソニー株式会社 Ｃｏｆｄｍ変調方式受信機及び隣接チャネル妨害排除方法
CN100496033C (zh) * 2006-03-23 2009-06-03 上海交通大学 基于希尔伯特-黄变换的二进制频移键控系统解调方法
DE602006002112D1 (de) * 2006-04-21 2008-09-18 Alcatel Lucent Daten-Slicer Schaltung, Demodulationsstufe, Empfangssystem und Methode zur Demodulation von sprungkodierten Signalen
CN1953438A (zh) * 2006-10-26 2007-04-25 西安电子科技大学 二进制移频键控填充式数字解调方法
US20080252367A1 (en) * 2007-04-10 2008-10-16 Micrel, Inc. Demodulator with Multiple Operating Modes for Amplitude Shift Keyed Signals
US7633320B2 (en) * 2007-06-29 2009-12-15 Kabushiki Kaisha Toshiba Comparator circuit
US7885359B2 (en) * 2007-08-15 2011-02-08 Seiko Epson Corporation Sampling demodulator for amplitude shift keying (ASK) radio receiver
CN101729470A (zh) * 2008-10-24 2010-06-09 南京师范大学 等幅等周期数字信号调制及解调方法
CN102123122B (zh) * 2010-01-07 2013-10-16 无锡爱睿芯电子有限公司 调制解调装置及方法
CN102014093B (zh) * 2010-12-09 2012-12-19 东南大学 扩展的二元相移键控调制解调器及其实现方法
TWI514777B (zh) * 2012-08-03 2015-12-21 Realtek Semiconductor Corp 預測性逐漸逼近式類比數位轉換裝置及其方法
CN103346988B (zh) * 2013-06-13 2016-03-23 电子科技大学 一种fsk数字解调器
CN104300984B (zh) * 2014-10-21 2018-04-27 上海玮舟微电子科技有限公司 一种模数转换器和模数转换方法
CN105897639B (zh) * 2014-12-09 2020-06-16 恩智浦美国有限公司 Fsk解调器
CN104793680B (zh) * 2015-04-08 2017-12-12 云南卓烁科技有限公司 一种电压信号解调电路
US9531400B1 (en) * 2015-11-04 2016-12-27 Avnera Corporation Digitally calibrated successive approximation register analog-to-digital converter
CN107040260B (zh) * 2016-02-03 2020-09-08 中芯国际集成电路制造(上海)有限公司 异步逐次逼近型模数转换电路
US9584144B1 (en) * 2016-04-21 2017-02-28 Xilinx, Inc. Asynchronous clock generation for time-interleaved successive approximation analog to digital converters

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101546A (ja) * 1989-09-14 1991-04-26 Matsushita Electric Works Ltd デジタル信号読み取り方式
US5777511A (en) * 1996-04-22 1998-07-07 Sanyo Electric Co., Ltd. Data demodulation apparatus
JP2009055097A (ja) * 2007-08-23 2009-03-12 Advanced Telecommunication Research Institute International Ｆｓｋ復調回路及び方法
CN201607480U (zh) * 2009-11-13 2010-10-13 英业达股份有限公司 电源信号测试装置
CN103634263A (zh) * 2013-12-07 2014-03-12 天津光电通信技术有限公司 一种连续相位频移键控数字解调装置及其解调方法

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