WO2017193437A1 - 显示面板及其阵列基板行驱动电路的过流保护电路 - Google Patents

显示面板及其阵列基板行驱动电路的过流保护电路 Download PDF

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Publication number
WO2017193437A1
WO2017193437A1 PCT/CN2016/085358 CN2016085358W WO2017193437A1 WO 2017193437 A1 WO2017193437 A1 WO 2017193437A1 CN 2016085358 W CN2016085358 W CN 2016085358W WO 2017193437 A1 WO2017193437 A1 WO 2017193437A1
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WIPO (PCT)
Prior art keywords
circuit
voltage
signal
transistor
output
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Ceased
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PCT/CN2016/085358
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English (en)
French (fr)
Inventor
曹丹
张先明
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US15/118,790 priority Critical patent/US10290244B2/en
Priority to KR1020187036030A priority patent/KR102153460B1/ko
Priority to JP2018560026A priority patent/JP6683407B2/ja
Publication of WO2017193437A1 publication Critical patent/WO2017193437A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for DC applications
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared

Definitions

  • the present invention relates to the field of display devices, and in particular, to an overcurrent protection circuit for a display panel and an array substrate row driving circuit thereof.
  • the Gate Driver on Array technology directly forms a gate drive circuit on an array substrate instead of a driver chip fabricated from an external silicon chip. Since the GOA circuit can be directly fabricated around the panel, the process process is simplified, the product cost can be reduced, the integration of the liquid crystal panel can be improved, and the panel tends to be thinner.
  • the WOA (Wire On Array) layout is designed to directly route on the array substrate to replace the flexible printed circuit (FPC) to connect the data signals on the scan lines and data lines, which can significantly reduce the layout. The weight of the panel and the cost.
  • the gate line driving signal (CKV) in the WOA trace is short-circuited or other abnormal conditions occur, the panel may be damaged due to excessive current, so that the protection circuit of the CKV needs to be increased.
  • the present invention proposes an overcurrent protection circuit for a display panel and its GOA circuit.
  • the specific technical solution proposed by the present invention is: providing an overcurrent protection circuit for an array substrate row driving circuit, comprising an amplifying circuit, a load circuit, a comparator, a controller, and a switching circuit: the input end of the amplifying circuit is connected to a high voltage input End, the high voltage input end is configured to receive a high voltage signal of a control signal source of the array substrate row driving circuit, the amplifying circuit is configured to amplify the high voltage signal, and an output end of the amplifying circuit passes through a load circuit Grounding; the comparator is connected between an output end of the amplifying circuit and the controller, and the comparator is configured to output a first high after comparing a voltage value at an output end of the amplifying circuit to a voltage value greater than a threshold voltage Level signal to the controller; the controller is further connected to the switch circuit, and the controller is configured to output the first after receiving the first high level signal a high level signal to the switch circuit; the switch circuit is further connected to the amplifying circuit, the high voltage input
  • the comparator is further configured to output a first low level signal to the controller after comparing a voltage value at an output end of the amplifying circuit to a voltage value lower than the threshold voltage, and the controller is configured to receive Outputting a second low level signal to the switch circuit after the first low level signal, and causing the switch circuit to communicate with the high voltage input terminal and the voltage output terminal, thereby outputting the voltage output terminal The high voltage signal.
  • a non-inverting input terminal of the comparator is respectively connected to an output end of the amplifying circuit and the load circuit, and an inverting input end of the comparator is configured to receive the threshold voltage, the comparator The output is connected to the controller.
  • the amplifying circuit includes
  • a voltage amplifier connected to the input end of the amplifying circuit for receiving and amplifying the high voltage signal
  • a voltage-current converter is coupled between the voltage amplifier and an output of the amplifying circuit for converting the amplified high voltage signal into a current signal.
  • the load circuit includes a first load circuit and a second load circuit
  • the first load circuit includes a first resistor, an output end of the amplifying circuit is grounded via the first resistor; and the second load circuit
  • the second resistor and the transistor are included, the gate of the transistor is configured to receive a display mode signal, the source of the transistor is grounded, and the second resistor is coupled to an output end of the amplifying circuit and a drain of the transistor between.
  • the display mode signal is a signal in a two-dimensional display mode, the transistor is in an off state, and the resistance value R of the load circuit is a resistance value of the first resistor.
  • the display mode signal is a signal in a three-dimensional display mode
  • the transistor is in an on state
  • the resistance value R of the load circuit is a resistance value after the first resistor and the second resistor are connected in parallel.
  • the switching circuit includes a first transistor, a second transistor, a gate of the first transistor is connected between the voltage amplifier and the voltage-current converter, and a source of the first transistor The voltage output terminal is connected, a drain of the first transistor is connected to the high voltage input terminal, a gate of the second transistor is connected to the controller, a source of the second transistor is The low voltage input is connected, and the drain of the second transistor is connected to the voltage output.
  • the present invention also provides a display panel including the overcurrent protection circuit as described above.
  • the display panel and the overcurrent protection circuit thereof of the GOA circuit provided by the invention convert the voltage signal of the control signal source of the GOA circuit into a current signal and amplify the same, and then select different load resistors according to the display mode, and then amplify
  • the product of the current signal and the load resistance is compared with the threshold voltage. If the product of the amplified current signal and the load resistance is greater than the threshold voltage, the controller controls the switch circuit to output a low level signal to cause the GOA circuit to be in an overcurrent protection state. Therefore, the current panel is prevented from being burned and the display panel is burned, and the current signal is amplified and then compared, thereby reducing the detection difficulty, improving the accuracy, and reducing the probability of misoperation. At the same time, the two-dimensional display mode and the three-dimensional display mode are over-current protected by different load circuits, and the protection effect is improved.
  • FIG. 1 is a structural diagram of an overcurrent protection circuit of a GOA circuit of the present invention
  • FIG. 2 is a structural diagram of a specific circuit of an overcurrent protection circuit of the GOA circuit of the present invention.
  • the GOA circuit overcurrent protection circuit includes an amplification circuit 10, a load circuit 20, a comparator 30, a controller 40, and a switch circuit 50.
  • the input end of the amplifying circuit 10 is connected to a high voltage input terminal VGH, and the high voltage input terminal VGH is for receiving a high voltage signal of a control signal source of the GOA circuit, and the amplifying circuit 10 is configured to receive and amplify a current value of the high voltage signal.
  • the output of the amplifying circuit 10 is grounded through the load circuit 20.
  • the comparator 30 is connected between the output terminal of the amplifying circuit 10 and the controller 40.
  • the non-inverting input terminal of the comparator 30 is connected to the output terminal of the amplifying circuit 10, and the inverting input terminal of the comparator 30 is connected with a threshold value.
  • the voltage source Vth is connected, the output end of the comparator 30 is connected to the controller 40, and the switch circuit 50 is respectively connected to the amplifying circuit 10 and the controller 40.
  • the switch circuit 50 is also connected to the high voltage input terminal VGH, the low voltage input terminal VGL and the voltage output. End Vout.
  • the amplifying circuit 10 includes a voltage amplifier 120 and a voltage-current converter 130.
  • the voltage amplifier 120 is connected to an input terminal of the amplifying circuit 10, and the voltage-current converter 130 is connected to the output terminal of the voltage amplifier 120 and the amplifying circuit 10. between.
  • the voltage amplifier 120 receives and amplifies the high voltage signal of the control signal source of the GOA circuit, and the voltage-current converter 130 receives the amplified high voltage signal and converts it into a current signal for transmission to the load circuit 20, where the control signal source VGH
  • the output signal is a CKV signal. Since the CKV signal is relatively small, it needs to be amplified, which can reduce the detection difficulty, improve the accuracy, and reduce the probability of misoperation.
  • the amplification factor of the voltage amplifier 120 can be set according to actual needs. For example, the magnification is 10.
  • the non-inverting input terminal of the comparator 30 is connected to the output terminal of the amplifying circuit 10, so that the voltage value of the non-inverting input terminal of the comparator 30 is equal to V, and the inverting input terminal of the comparator 30 receives the threshold voltage from the threshold voltage source Vth, the threshold voltage The voltage value is Vref1, and then comparator 30 compares the magnitude of V and Vref1.
  • the comparator 30 When V>Vref1, ie, i>Vref1/R, the comparator 30 outputs a first high level signal to the controller 40, and the controller 40 outputs a second high level signal to the switch circuit 50 after receiving the first high level signal.
  • the switch circuit 50 is connected to the low voltage input terminal VGL and the voltage output terminal Vout, so that the voltage output terminal Vout outputs a low voltage signal.
  • the GOA circuit is in an overcurrent protection state.
  • V ⁇ Vref1, ie, i ⁇ Vref1/R the comparator 30 outputs a first low level signal to the controller 40, and the controller 40 outputs a second low level signal to the switch circuit 50 after receiving the first low level signal.
  • the switch circuit 50 connects the high voltage input terminal VGH and the voltage output terminal Vout, so that the voltage output terminal Vout outputs a high voltage signal, and at this time, the GOA circuit is in a normal working state.
  • the load circuit 20 includes the first load circuit 100 and the second load circuit 110.
  • the first load circuit 100 includes a first resistor R1 having a resistance r1
  • the second load circuit 110 includes a second resistor R2 and a transistor Q3.
  • the resistance of R2 is r2, and the gate of the transistor Q3 is The pole is connected to the display mode signal source Vmode, the source of the transistor Q3 is grounded, the second resistor R2 is connected between the output terminal of the amplifier circuit 10 and the drain of the transistor Q3, and the output end of the amplifier circuit 10 is connected to the first resistor R1 and grounded.
  • the display mode includes a two-dimensional display mode and a three-dimensional display mode.
  • the transistor is an NMOS transistor.
  • other switching circuit components may also be used to implement the function of the transistor, for example, a triode. If the display mode of the GOA circuit is the two-dimensional display mode, the display mode signal source Vmode outputs a low level. At this time, the gate of the transistor Q3 is at a low level, which is in an off state, and the second load circuit 110 is not turned on, and is amplified.
  • the resistance of the output end of the circuit 10 is the resistance value r1 of the first resistor R1.
  • V i*r1
  • the threshold current is Vref1/r1; if the display mode of the GOA circuit is the three-dimensional display mode, the display mode signal source Vmode The output level is high.
  • the gate of the transistor Q3 is at a high level, which is in an on state, the second load circuit 110 is turned on, the first resistor R1 is connected in parallel with the second resistor R2, and the resistance value of the output end of the amplifying circuit 10 is The resistance value r1*r2/(r1+r2) after R1 and R2 are connected in parallel.
  • V i*r1*r2/(r1+r2)
  • the threshold current is Vref1*(r1+r2)/r1*r2 .
  • the switching circuit 50 includes a first transistor Q1 and a second transistor Q2.
  • the gate of the first transistor Q1 is connected between the voltage amplifier 120 and the voltage-current converter 130.
  • the source of the first transistor Q1 is connected to the voltage output terminal.
  • the drain of one transistor Q1 is connected to the high voltage input terminal VGH, the gate of the second transistor Q2 is connected to the controller 40, the source of the second transistor Q2 is connected to the low voltage input terminal, and the drain and voltage of the second transistor Q2 are connected.
  • the output terminal Vout is connected.
  • the first transistor is a PMOS transistor
  • the second transistor is an NMOS transistor.
  • the output signal of the gate receiving controller 40 of the second transistor Q2 is the second high level signal
  • the second transistor Q2 is in the on state
  • the gate of the first transistor Q1 is received by the voltage amplifier 120.
  • the high voltage signal is greater than the turn-on voltage of the first transistor Q1. Therefore, the first transistor Q1 is in an off state, the low voltage input terminal VGL and the voltage output terminal Vout are connected, and the voltage output terminal Vout outputs a low voltage signal.
  • the GOA circuit In the overcurrent protection state; the output signal of the gate receiving controller 40 of the second transistor Q2 is the second low level signal, and the second transistor Q2 is in the off state.
  • the voltage amplifier of the gate of the first transistor Q1 is received.
  • the amplified high voltage signal of 120 is smaller than the turn-on voltage of the first transistor Q1. Therefore, the first transistor Q1 is in an on state, and the high voltage input terminal VGH and the voltage output terminal Vout are connected, and the voltage is input.
  • the output Vout outputs a high voltage signal, and at this time, the GOA circuit is in a normal working state.
  • the embodiment further provides a GOA type display panel comprising the overcurrent protection circuit of the GOA circuit as described above, by converting the voltage signal of the control signal source of the GOA circuit into a current signal and amplifying the same, and then displaying according to the display
  • the mode selects different load resistors, and then compares the product of the amplified current signal with the load resistance and the threshold voltage. If the product of the amplified current signal and the load resistance is greater than the threshold voltage, the controller controls the switch circuit to output a low level.
  • the signal makes the GOA circuit in an overcurrent protection state, thereby avoiding excessive current and burning the display panel, and by comparing the current signal and then comparing, the detection difficulty is reduced, the accuracy is improved, and the probability of misoperation is reduced.
  • the two-dimensional display mode and the three-dimensional display mode are over-current protected by different load circuits, and the protection effect is improved.

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Abstract

一种GOA电路的过流保护电路，包括放大电路（10）、负载电路（20）、比较器（30）、控制器（40）、开关电路（50），通过将GOA电路的控制信号源的电流信号进行放大，然后根据显示模式选择不同的负载电阻，再将放大后的电流信号与负载电阻的乘积和阈值电压（Vth）进行比较，若放大后的电流信号与负载电阻的乘积大于阈值电压（Vth），则控制器（40）控制开关电路（50）输出低电平信号使得GOA电路处于过流保护状态，从而避免电流过大而烧毁显示面板，减小了侦测难度、提高了精确度、降低了误操作概率。同时，通过不同的负载电路（100，110）来实现对二维显示模式和三维显示模式进行过流保护，改善了保护效果。

Description

显示面板及其阵列基板行驱动电路的过流保护电路 技术领域
本发明涉及显示器件领域，尤其涉及一种显示面板及其阵列基板行驱动电路的过流保护电路。
背景技术
阵列基板行驱动(Gate Driver on Array)技术，简称GOA技术，其是直接将栅极驱动电路制作在阵列基板上，以代替由外接硅芯片制作的驱动芯片。由于GOA电路可直接制作于面板周围，简化了制程工艺，而且还可降低产品成本，提高液晶面板的集成度，使面板趋向于更加薄型化。此外，WOA(Wire On Array)布板设计是直接在阵列基板上走线，以替代柔性电路板(Flexible Printed Circuit，FPC)连接扫描线与数据线上的数据信号，该布板方式可显著减轻面板的重量并降低成本。当WOA走线中的栅极线驱动信号(CKV)短路或者出现其它异常状况时，可能因为电流过大而导致面板损坏，从而需增加CKV的保护电路。
发明内容
为了解决现有技术的不足，本发明提出了一种显示面板及其GOA电路的过流保护电路。
本发明提出的具体技术方案为：提供一种阵列基板行驱动电路的过流保护电路，包括放大电路、负载电路、比较器、控制器以及开关电路：所述放大电路的输入端连接高电压输入端，所述高电压输入端用于接收所述阵列基板行驱动电路的控制信号源的高电压信号，所述放大电路用于放大所述高电压信号，所述放大电路的输出端通过负载电路接地；所述比较器连接于所述放大电路的输出端及所述控制器之间，所述比较器用于在比较所述放大电路的输出端的电压值大于阈值电压的电压值后输出第一高电平信号至所述控制器；所述控制器还连接所述开关电路，所述控制器用于在接收到所述第一高电平信号后输出第 二高电平信号至所述开关电路；所述开关电路还分别连接所述放大电路、所述高电压输入端、低电压输入端及电压输出端，所述低电压输入端用于接收所述阵列基板行驱动电路的控制信号源的低电压信号，所述开关电路用于在接收到所述第二高电平信号后连通所述低电压输入端及所述电压输出端，从而使所述电压输出端输出所述低电压信号。
进一步地，所述比较器还用于在比较所述放大电路的输出端的电压值小于所述阈值电压的电压值后输出第一低电平信号至所述控制器，所述控制器用于在接收到所述第一低电平信号后输出第二低电平信号至所述开关电路而使所述开关电路连通所述高电压输入端及所述电压输出端，从而使所述电压输出端输出所述高电压信号。
进一步地，所述放大电路的输出端的电压值为V＝I*R，其中I为所述高电压信号经所述放大电路放大后的电流值，R为所述负载电路的阻值。
进一步地，所述比较器的正相输入端分别与所述放大电路的输出端和所述负载电路连接，所述比较器的反相输入端用于接收所述阈值电压，所述比较器的输出端连接所述控制器。
进一步地，所述放大电路包括
电压放大器，与所述放大电路的输入端连接，用于接收并放大所述高电压信号；
电压-电流转换器，连接于所述电压放大器与所述放大电路的输出端之间，用于将放大后的高电压信号转换为电流信号。
进一步地，所述负载电路包括第一负载电路和第二负载电路，所述第一负载电路包括第一电阻，所述放大电路的输出端经所述第一电阻接地；所述第二负载电路包括第二电阻以及晶体管，所述晶体管的栅极用于接收显示模式信号，所述晶体管的源极接地，所述第二电阻连接于所述放大电路的输出端与所述晶体管的漏极之间。
进一步地，所述显示模式信号为二维显示模式下的信号，所述晶体管处于截止状态，所述负载电路的阻值R为所述第一电阻的阻值。
进一步地，所述显示模式信号为三维显示模式下的信号，所述晶体管处于导通状态，所述负载电路的阻值R为所述第一电阻与所述第二电阻并联后的阻值。
进一步地，所述开关电路包括第一晶体管、第二晶体管，所述第一晶体管的栅极连接于所述电压放大器与所述电压-电流转换器之间，所述第一晶体管的源极与所述电压输出端连接，所述第一晶体管的漏极与所述高电压输入端连接，所述第二晶体管的栅极与所述控制器连接，所述第二晶体管的源极与所述低电压输入端连接，所述第二晶体管的漏极与所述电压输出端连接。
本发明还提供了一种显示面板，所述显示面板包括如上所述的过流保护电路。
本发明提出的显示面板及其GOA电路的过流保护电路，通过将GOA电路的控制信号源的电压信号转换成电流信号并对其进行放大，然后根据显示模式选择不同的负载电阻，再将放大后的电流信号与负载电阻的乘积和阈值电压进行比较，若放大后的电流信号与负载电阻的乘积大于阈值电压，则控制器控制开关电路输出低电平信号使得GOA电路处于过流保护状态，从而避免电流过大而烧毁显示面板，而且通过将电流信号进行放大后再进行比较，减小了侦测难度、提高了精确度、降低了误操作概率。同时，通过不同的负载电路来实现对二维显示模式和三维显示模式进行过流保护，改善了保护效果。
附图说明
图1为本发明GOA电路的过流保护电路结构图；
图2为本发明GOA电路的过流保护电路具体电路结构图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。在附图中，相同的标号将始终被用于表示相同的元件。
参照图1，本实施例提供的GOA电路过流保护电路包括放大电路10、负载电路20、比较器30、控制器40以及开关电路50。所述放大电路10的输入端连接高电压输入端VGH，高电压输入端VGH用于接收GOA电路的控制信号源的高电压信号，放大电路10用于接收并放大所述高电压信号的电流值，放大电路10的输出端通过负载电路20接地。比较器30连接于放大电路10的输出端及所述控制器40之间，具体的，比较器30的正相输入端与放大电路10的输出端连接，比较器30的反相输入端与阈值电压源Vth连接，比较器30的输出端与控制器40连接，开关电路50分别与放大电路10、控制器40连接，开关电路50还连接高电压输入端VGH、低电压输入端VGL以及电压输出端Vout。
参照图2，放大电路10包括电压放大器120以及电压-电流转换器130，电压放大器120与放大电路10的输入端连接，电压-电流转换器130连接于电压放大器120与放大电路10的输出端之间。电压放大器120接收GOA电路的控制信号源的高电压信号并将其放大，电压-电流转换器130接收放大后的高电压信号并将其转换为电流信号发送给负载电路20，这里控制信号源VGH输出的信号为CKV信号，由于CKV信号比较小，所以需要对其进行放大，从而可以减小侦测难度、提高精确度、降低误操作概率；电压放大器120的放大倍数可以根据实际需要来设定，例如，放大倍数为10。
放大电路10的输出端的电压值为V＝I*R，其中，I为经电压-电流转换器130转换后的电流信号的电流值，R为负载电路20的阻值。比较器30的正相输入端与放大电路10的输出端连接，故比较器30正相输入端的电压值等于V，比较器30的反相输入端从阈值电压源Vth接收阈值电压，阈值电压的电压值为Vref1，然后比较器30比较V与Vref1的大小。当V>Vref1即i>Vref1/R，比较器30输出第一高电平信号至控制器40，控制器40在接收到第一高电平信号后输出第二高电平信号至开关电路50，开关电路50连通低电压输入端VGL和电压输出端Vout，从而，电压输出端Vout输出低电压信号，此时，GOA电路处于过流保护状态。当V<Vref1即i<Vref1/R，比较器30输出第一低电平信号至控制器40，控制器40在接收到第一低电平信号后输出第二低电平信号至开关电路50，开关电路50连通高电压输入端VGH和电压输出端Vout，从而，电压输出端Vout输出高电压信号，此时，GOA电路处于正常工作状态。
为了保证GOA电路在二维显示模式和三维显示模式下都能够获得比较好的保护效果，负载电路20包括第一负载电路100以及第二负载电路110。再次参照图2，具体的，第一负载电路100包括第一电阻R1，其阻值为r1，第二负载电路110包括第二电阻R2以及晶体管Q3，R2的阻值为r2，晶体管Q3的栅极连接显示模式信号源Vmode，晶体管Q3的源极接地，第二电阻R2连接于放大电路10的输出端与晶体管Q3的漏极之间，放大电路10的输出端与第一电阻R1连接后接地，其中，显示模式包括二维显示模式和三维显示模式，优选的，晶体管为NMOS管，在其他实施例中也可以采用其他开关电路元件来实现晶体管的功能，例如，三极管。若GOA电路的显示模式为二维显示模式，则显示模式信号源Vmode输出低电平，此时，晶体管Q3的栅极为低电平，其处于截止状态，第二负载电路110不导通，放大电路10的输出端的阻值为第一电阻R1的阻值r1，此时，V＝i*r1，阈值电流为Vref1/r1；若GOA电路的显示模式为三维显示模式，则显示模式信号源Vmode输出高电平，此时，晶体管Q3的栅极为高电平，其处于导通状态，第二负载电路110导通，第一电阻R1与第二电阻R2并联，放大电路10的输出端的阻值为R1与R2并联后的阻值r1*r2/(r1+r2)，此时，V＝i*r1*r2/(r1+r2)，阈值电流为Vref1*(r1+r2)/r1*r2。
开关电路50包括第一晶体管Q1、第二晶体管Q2，第一晶体管Q1的栅极连接于电压放大器120与电压-电流转换器130之间，第一晶体管Q1的源极与电压输出端连接，第一晶体管Q1的漏极与高电压输入端VGH连接，第二晶体管Q2的栅极与控制器40连接，第二晶体管Q2的源极与低电压输入端连接，第二晶体管Q2的漏极与电压输出端Vout连接，优选的，第一晶体管为PMOS管,第二晶体管为NMOS管。其中，第二晶体管Q2栅极接收控制器40的输出信号为第二高电平信号，第二晶体管Q2处于导通状态，而第一晶体管Q1的栅极接收的是经电压放大器120放大后的高电压信号，其大于第一晶体管Q1的开启电压，所以，第一晶体管Q1处于截止状态，低电压输入端VGL和电压输出端Vout连通，电压输出端Vout输出低电压信号，此时，GOA电路处于过流保护状态；第二晶体管Q2栅极接收控制器40的输出信号为第二低电平信号，第二晶体管Q2处于截止状态，此时，第一晶体管Q1的栅极接收的经电压放大器120放大后的高电压信号小于第一晶体管Q1的开启电压，所以，第一晶体管Q1处于导通状态，高电压输入端VGH和电压输出端Vout连通，电压输 出端Vout输出高电压信号，此时，GOA电路处于正常工作状态。
本实施例还提供了一种GOA型显示面板，其包括如上所述GOA电路的过流保护电路，通过将GOA电路的控制信号源的电压信号转换成电流信号并对其进行放大，然后根据显示模式选择不同的负载电阻，再将放大后的电流信号与负载电阻的乘积和阈值电压进行比较，若放大后的电流信号与负载电阻的乘积大于阈值电压，则控制器控制开关电路输出低电平信号使得GOA电路处于过流保护状态，从而避免电流过大而烧毁显示面板，而且通过将电流信号进行放大后再进行比较，减小了侦测难度、提高了精确度、降低了误操作概率。同时，通过不同的负载电路来实现对二维显示模式和三维显示模式进行过流保护，改善了保护效果。
以上所述仅是本申请的具体实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (18)

  1. 一种阵列基板行驱动电路的过流保护电路，其中，包括放大电路、负载电路、比较器、控制器以及开关电路：
    所述放大电路的输入端连接高电压输入端，所述高电压输入端用于接收所述阵列基板行驱动电路的控制信号源的高电压信号，所述放大电路用于放大所述高电压信号，所述放大电路的输出端通过负载电路接地；
    所述比较器连接于所述放大电路的输出端及所述控制器之间，所述比较器用于在比较所述放大电路的输出端的电压值大于阈值电压的电压值后输出第一高电平信号至所述控制器；
    所述控制器还连接所述开关电路，所述控制器用于在接收到所述第一高电平信号后输出第二高电平信号至所述开关电路；
    所述开关电路还分别连接所述放大电路、所述高电压输入端、低电压输入端及电压输出端，所述低电压输入端用于接收所述阵列基板行驱动电路的控制信号源的低电压信号，所述开关电路用于在接收到所述第二高电平信号后连通所述低电压输入端及所述电压输出端，从而使所述电压输出端输出所述低电压信号。
  2. 根据权利要求1所述的过流保护电路，其中，所述比较器还用于在比较所述放大电路的输出端的电压值小于所述阈值电压的电压值后输出第一低电平信号至所述控制器，所述控制器用于在接收到所述第一低电平信号后输出第二低电平信号至所述开关电路而使所述开关电路连通所述高电压输入端及所述电压输出端，从而使所述电压输出端输出所述高电压信号。
  3. 根据权利要求2所述的过流保护电路，其中，所述放大电路的输出端的电压值为V＝I*R，其中I为所述高电压信号经所述放大电路放大后的电流值，R为所述负载电路的阻值。
  4. 根据权利要求3所述的过流保护电路，其中，所述比较器的正相输入端分别与所述放大电路的输出端和所述负载电路连接，所述比较器的反相输入端用于接收所述阈值电压，所述比较器的输出端连接所述控制器。
  5. 根据权利要求1所述的过流保护电路，其中，所述放大电路包括
    电压放大器，与所述放大电路的输入端连接，用于接收并放大所述高电压信号；
    电压-电流转换器，连接于所述电压放大器与所述放大电路的输出端之间，用于将放大后的高电压信号转换为电流信号。
  6. 根据权利要求1所述的过流保护电路，其中，所述负载电路包括第一负载电路和第二负载电路，所述第一负载电路包括第一电阻，所述放大电路的输出端经所述第一电阻接地；所述第二负载电路包括第二电阻以及晶体管，所述晶体管的栅极用于接收显示模式信号，所述晶体管的源极接地，所述第二电阻连接于所述放大电路的输出端与所述晶体管的漏极之间。
  7. 根据权利要求6所述的过流保护电路，其中，所述显示模式信号为二维显示模式下的信号，所述晶体管处于截止状态，所述负载电路的阻值R为所述第一电阻的阻值。
  8. 根据权利要求6所述的过流保护电路，其中，所述显示模式信号为三维显示模式下的信号，所述晶体管处于导通状态，所述负载电路的阻值R为所述第一电阻与所述第二电阻并联后的阻值。
  9. 根据权利要求5所述的过流保护电路，其中，所述开关电路包括第一晶体管、第二晶体管，所述第一晶体管的栅极连接于所述电压放大器与所述电压-电流转换器之间，所述第一晶体管的源极与所述电压输出端连接，所述第一晶体管的漏极与所述高电压输入端连接，所述第二晶体管的栅极与所述控制器连接，所述第二晶体管的源极与所述低电压输入端连接，所述第二晶体管的漏极与所述电压输出端连接。
  10. 一种显示面板，所述显示面板包括阵列基板行驱动电路的过流保护电路，其中，所述过流保护电路包括放大电路、负载电路、比较器、控制器以及开关电路：
    所述放大电路的输入端连接高电压输入端，所述高电压输入端用于接收所述阵列基板行驱动电路的控制信号源的高电压信号，所述放大电路用于放大所 述高电压信号，所述放大电路的输出端通过负载电路接地；
    所述比较器连接于所述放大电路的输出端及所述控制器之间，所述比较器用于在比较所述放大电路的输出端的电压值大于阈值电压的电压值后输出第一高电平信号至所述控制器；
    所述控制器还连接所述开关电路，所述控制器用于在接收到所述第一高电平信号后输出第二高电平信号至所述开关电路；
    所述开关电路还分别连接所述放大电路、所述高电压输入端、低电压输入端及电压输出端，所述低电压输入端用于接收所述阵列基板行驱动电路的控制信号源的低电压信号，所述开关电路用于在接收到所述第二高电平信号后连通所述低电压输入端及所述电压输出端，从而使所述电压输出端输出所述低电压信号。
  11. 根据权利要求10所述的显示面板，其中，所述比较器还用于在比较所述放大电路的输出端的电压值小于所述阈值电压的电压值后输出第一低电平信号至所述控制器，所述控制器用于在接收到所述第一低电平信号后输出第二低电平信号至所述开关电路而使所述开关电路连通所述高电压输入端及所述电压输出端，从而使所述电压输出端输出所述高电压信号。
  12. 根据权利要求11所述的显示面板，其中，所述放大电路的输出端的电压值为V＝I*R，其中I为所述高电压信号经所述放大电路放大后的电流值，R为所述负载电路的阻值。
  13. 根据权利要求12所述的显示面板，其中，所述比较器的正相输入端分别与所述放大电路的输出端和所述负载电路连接，所述比较器的反相输入端用于接收所述阈值电压，所述比较器的输出端连接所述控制器。
  14. 根据权利要求10所述的显示面板，其中，所述放大电路包括
    电压放大器，与所述放大电路的输入端连接，用于接收并放大所述高电压信号；
    电压-电流转换器，连接于所述电压放大器与所述放大电路的输出端之间， 用于将放大后的高电压信号转换为电流信号。
  15. 根据权利要求10所述的显示面板，其中，所述负载电路包括第一负载电路和第二负载电路，所述第一负载电路包括第一电阻，所述放大电路的输出端经所述第一电阻接地；所述第二负载电路包括第二电阻以及晶体管，所述晶体管的栅极用于接收显示模式信号，所述晶体管的源极接地，所述第二电阻连接于所述放大电路的输出端与所述晶体管的漏极之间。
  16. 根据权利要求15所述的显示面板，其中，所述显示模式信号为二维显示模式下的信号，所述晶体管处于截止状态，所述负载电路的阻值R为所述第一电阻的阻值。
  17. 根据权利要求15所述的显示面板，其中，所述显示模式信号为三维显示模式下的信号，所述晶体管处于导通状态，所述负载电路的阻值R为所述第一电阻与所述第二电阻并联后的阻值。
  18. 根据权利要求14所述的显示面板，其中，所述开关电路包括第一晶体管、第二晶体管，所述第一晶体管的栅极连接于所述电压放大器与所述电压-电流转换器之间，所述第一晶体管的源极与所述电压输出端连接，所述第一晶体管的漏极与所述高电压输入端连接，所述第二晶体管的栅极与所述控制器连接，所述第二晶体管的源极与所述低电压输入端连接，所述第二晶体管的漏极与所述电压输出端连接。
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