WO2017185773A1 - Light-emitting diode and manufacturing method therefor - Google Patents

Light-emitting diode and manufacturing method therefor Download PDF

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WO2017185773A1
WO2017185773A1 PCT/CN2016/111668 CN2016111668W WO2017185773A1 WO 2017185773 A1 WO2017185773 A1 WO 2017185773A1 CN 2016111668 W CN2016111668 W CN 2016111668W WO 2017185773 A1 WO2017185773 A1 WO 2017185773A1
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layer
light emitting
emitting diode
defect
temperature
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PCT/CN2016/111668
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French (fr)
Chinese (zh)
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林忠宝
程虎
林兓兓
张家宏
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厦门市三安光电科技有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025Physical imperfections, e.g. particular concentration or distribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a light emitting diode and a preparation method thereof.
  • the multi-quantum well layer structure of the gradation structure is often added in the prior art to increase the luminous efficiency of the LED device.
  • a low-temperature shallow quantum well layer having a gradient of In doping gradient is disposed under a low temperature multiple quantum well layer, and an aluminum-containing layer is used as a barrier layer, and the amount of aluminum is also gradually changed.
  • the epitaxial layer structure of the LED prepared by the method has limited performance in all aspects of the LED chip, and can only partially improve the luminous efficiency, and has little effect on other aspects of the LED chip.
  • the present invention provides a light emitting diode and a method for fabricating the same, which can increase the In composition and improve the light emitting brightness of the light emitting diode under the premise of improving the quality of the quantum well.
  • the technical solution of the present invention is: a method for preparing a light emitting diode, comprising the steps of: providing a substrate, performing a cleaning process on the surface of the substrate; sequentially growing a buffer layer, an N-type semiconductor layer, and a quantum on the surface of the substrate a well layer, a first P-type semiconductor layer, an electron blocking layer and a second P-type semiconductor layer; the step of growing the quantum well layer is specifically: first adjusting the temperature of the reaction chamber to a first temperature T1, and growing by an In/Ga content a defect layer formed by cyclically laminating a C1 InGaN well layer and a GaN barrier layer; subsequently adjusting a reaction chamber temperature to a second temperature T2, and growing an InGaN well layer having an In/Ga content ratio of C2 and a GaN barrier layer cyclically stacked a repair layer; wherein, C2 ⁇ C1;T2>T1; finally adjusting the temperature of the reaction chamber to a third temperature T3, and growing a
  • the first temperature T1 of the defect layer ranges from 700 to 780 ° C; and the In/Ga content ratio of the InGaN well layer is 50% to 80%.
  • the second temperature T2 of the repair layer ranges from 780 to 900 ° C; and the InGaN ratio of the InGaN well layer ranges from 45% to 60%.
  • the third temperature T3 of the light-emitting layer ranges from 650 to 850 ° C; and the In/Ga content ratio of the InGaN well layer is 50% to 60%.
  • the lattice defect density is 5 ⁇ 10 17 cm -2 to 5 ⁇ 10 18 cm -2 .
  • the defect layer has a total thickness of 40 nm to 115 nm, a cycle period of 15 to 25, and a thickness ratio of the well layer to the barrier layer per cycle of 1:2 to 1:5.
  • the repair layer has a total thickness of 150 nm to 200 nm, a cycle period of 2 to 5, and a thickness ratio of the well layer to the barrier layer per cycle of 1:6 to 1:10.
  • the total thickness of the light-emitting layer is 140 nm to 345 nm, the cycle period is 8-15, and the thickness ratio of the well layer to the barrier layer is 1:5.5 to 1:10 per cycle.
  • the defect layer, the repair layer and the light-emitting layer are n-type doped layers.
  • the defect layer and the repair layer have a doping concentration of 1 ⁇ 10 18 cm ⁇ 3 to 5 ⁇ 10 18 cm ⁇ 3 .
  • the light-emitting layer has a doping concentration of 1 ⁇ 10 17 cm ⁇ 3 to 5 ⁇ 10 17 cm ⁇ 3 .
  • the invention also provides a light emitting diode, which is, in order from bottom to top, a substrate, a buffer layer, an N-type semiconductor layer, a quantum well layer, a first P-type semiconductor layer, an electron blocking layer and a second P-type semiconductor layer,
  • the quantum well layer is composed of a defect layer, a repair layer, and a light-emitting layer;
  • the defect layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C1 and a GaN barrier layer;
  • the repair layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C2 and a GaN barrier layer, wherein C2 ⁇ C1;
  • the light emitting layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C3 and a GaN barrier layer;
  • the first P-type doped layer on the surface of the quantum well layer is a low concentration doped layer, and the doping concentration is 1 ⁇ 10 17 cm ⁇ 3 to 3 ⁇ 10 17 cm ⁇ 3 .
  • a defect layer is first formed by using low temperature and high indium gallium content to form a high-density "V"-shaped lattice defect, which better releases stress during subsequent growth, and increases electron injection. Efficiency, providing a basis for the radiation composite of the subsequent luminescent layer;
  • a light-emitting layer is grown on the defect layer and the repair layer structure. Since the defect layer has a high-density "V"-shaped defect extending into the light-emitting layer, a sufficient base point is provided for the recombination of electrons and holes, and holes are added. And the effective combination probability of electrons, improve the external quantum efficiency of the light-emitting diode, and increase the brightness of the light.
  • the first P-type layer is grown at a high voltage to reduce the content of carbon impurities during the growth process, thereby reducing the activation energy of Mg in the GaN material, increasing the doping efficiency of Mg, and thus the growth process.
  • the medium can reduce the access of the Mg source, improve the lattice quality, and further improve the brightness of the light.
  • the light-emitting diode obtained by the invention has a brightness increase of 3% to 6%, and the antistatic ability is improved from a 90% pass rate before the improvement to a pass rate of 98% (the test condition is a human body mode of 4000V).
  • FIG. 1 is a flow chart of a method of a specific embodiment of the present invention.
  • FIG. 2 is a schematic view of a light emitting diode according to an embodiment of the present invention.
  • a light emitting diode is sequentially from bottom to top: a substrate 100, a buffer layer 200, an N-type semiconductor layer 300, a quantum well layer 400, and a P-type semiconductor layer 500, wherein the P-type semiconductor layer 500 includes the first A P-type semiconductor layer 510, an electron blocking layer 520, and a second P-type semiconductor layer 530; the quantum well layer 400 is composed of a defect layer 410, a repair layer 420, and a light-emitting layer 430.
  • the defect layer 410 is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of 50% to 80% and a GaN barrier layer.
  • the repair layer 420 is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of 45% to 60% and a GaN barrier layer.
  • the thickness of each layer of the repair layer 420 is greater than the thickness of each period of the defect layer 410, but In/Ga
  • the content ratio C2 is smaller than the In/Ga content ratio C1 of the defect layer 410.
  • the light-emitting layer 430 is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of 50% to 60% and a GaN barrier layer.
  • a quantum well layer of the surface 400 of the first P-type doped layer 510 is a low concentration impurity layer, a doping concentration of 1 ⁇ 10 17 cm -3 ⁇ 3 ⁇ 10 17 cm -3.
  • the present invention provides a method for preparing a light-emitting diode, comprising the following steps:
  • a substrate 100 is provided to clean the surface of the substrate 100, and the surface of the substrate 100 is usually purged under a hydrogen atmosphere or a mixed atmosphere of hydrogen and nitrogen at 1000 to 1200 ° C to remove oxide impurities on the surface of the substrate 100. .
  • the buffer layer 200 includes a low temperature buffer layer 210 and a high temperature buffer layer 220; the low temperature buffer layer 210 is mainly followed.
  • the growth provides a nucleation point while reducing the lattice difference between the substrate 100 and subsequent layers, and releasing stress during subsequent deposition to improve crystal quality.
  • the high temperature buffer layer 220 mainly provides an excellent growth interface for the growth of the subsequent N-type semiconductor layer 300, reduces crystal defects, and improves the electrical performance of the light emitting diode.
  • the chamber environment is grown to grow the N-type semiconductor layer 300.
  • the quantum well layer 400 is grown, specifically:
  • the temperature of the reaction chamber is adjusted to a first temperature T1 of 700 to 780 ° C, and an Indium source, a gallium source, a nitrogen source, and an n-type impurity source are introduced, and InGaN having an In/Ga content ratio of C1 of 50% to 80% is grown.
  • the defect layer 410 formed by cyclically laminating the well layer and the GaN barrier layer has a cycle period of 15 to 25 and a total thickness of 150 nm to 200 nm, wherein the ratio of the thickness of the well layer to the barrier layer in each cycle is 1:2 to 1:6;
  • the growth temperature of the well layer and the barrier layer is the same or different, and the present embodiment preferably grows at the same temperature.
  • the n-type doping concentration in the defect layer 410 is 1 ⁇ 10 18 cm -3 to 5 ⁇ 10 18 cm -3 .
  • the defect layer 410 is formed by using low temperature and high indium gallium content to form a high density "V" shape and a non-"V" shape lattice defect, and the defect density is as high as 5 ⁇ 10 17 cm -2 to 5 ⁇ 10 18 cm. -2 , better release of stress during subsequent growth, and because electrons pass through the GaN material layer through the "V" shaped defect, thereby increasing electron injection efficiency and improving light emission brightness.
  • the reaction chamber temperature is adjusted to a second temperature T2 of 780 to 900 ° C, and a repair layer 420 formed by cyclically laminating an InGaN well layer and a GaN barrier layer having an In/Ga content ratio of 45% to 60% is grown.
  • the total thickness is 40 nm to 115 nm, wherein the ratio of the thickness of the well layer to the barrier layer in each period is 1:6 to 1:10; and the growth temperature of the well layer and the barrier layer is the same or different, this embodiment It is preferred to grow at different temperatures, and the temperature difference between the barrier layer temperature and the well layer is 80 to 110 °C.
  • the defect layer has a doping concentration of 1 ⁇ 10 18 cm -3 to 5 ⁇ 10 18 cm -3 .
  • the repair layer 420 utilizes an In/Ga content ratio lower than the defect layer and a high growth temperature to lower the In source effectively incorporated into the layer, thereby obtaining excellent crystal quality; meanwhile, the thickness of each layer of the repair layer 420 is greater than The thickness of each period of the defect layer 410, especially the thickness of the barrier layer, thereby better blocking the non-"V" shaped defect in the defect layer 410 from extending to the subsequent layer, increasing the antistatic capability of the LED and reducing the leakage phenomenon; C2 ⁇ C1, T2>T1 further enhances the crystal quality and provides an excellent growth interface for the subsequent growth layer.
  • the reaction chamber temperature is adjusted to a third temperature T3 of 650 to 850 ° C, and a light-emitting layer 430 formed by cyclically laminating an InGaN well layer and a GaN barrier layer having an In/Ga content ratio C3 of 50% to 60% is grown.
  • the total thickness is 135 nm to 345 nm, wherein the ratio of the thickness of the well layer to the barrier layer in each period is 1:5.5 to 1:10; and the growth temperature of the well layer and the barrier layer is the same or different, this embodiment It is preferred to grow at different temperatures, and the temperature difference between the barrier layer temperature and the well layer is 80 to 110 °C.
  • the defect layer is doped with a concentration of 1 ⁇ 10 17 cm -3 ⁇ 5 ⁇ 10 17 cm -3. Because the light-emitting layer 430 is based on the structure of the defect layer 410 and the repair layer 420, it has a high-density "V"-shaped defect, which provides a base point for the recombination of electrons and holes, increases the probability of recombination, and improves the brightness of the light.
  • the quantum well structure employs a defect layer 410 having a high density defect in combination with a high crystal quality repair layer 420 to improve the stress release capability while avoiding affecting the crystal quality of the subsequent light emitting layer 430;
  • the extension of the non-V-type defect is broken and the side of the "V"-shaped defect is micro-repaired to make it more effective for subsequent effective recombination of electrons and holes.
  • the long light-emitting layer 430 is then regenerated on the surface of the repair layer 420 to finally form the quantum well layer 400.
  • the repair layer 420 and the light-emitting layer 430 are both thick film structures, most The low thickness is 20 nm and 17 nm, respectively (conventional structures are 15 nm and 13 nm, respectively), and if the thick film structure is used in the conventional quantum well structure, the brightness thereof is remarkably lowered, but the brightness is increased by 3% in accordance with the growth conditions of the present invention. ⁇ 5% or so, and the antistatic ability is increased from the previous 90% pass rate to 98% pass rate (test condition is human body mode 4000V).
  • the chamber conditions are adjusted, wherein the pressure is 350-450 mbar, and the first P-type semiconductor layer 510 is grown by using high-voltage conditions; and the pressure is changed to a conventional condition to continue growing the electron blocking layer 520 and the second P-type semiconductor layer 530 to form a P-type semiconductor.
  • Layer 500 ultimately forming a light emitting diode.
  • the first P-type semiconductor layer 510 is grown using high-voltage conditions, which reduces the content of carbon impurities during the growth process, thereby reducing the activation energy of Mg in the GaN material, thereby increasing the doping efficiency of Mg, and thus can be reduced during growth.
  • the Mg doping concentration of the present invention is 1 ⁇ 10 17 cm -3 to 3 ⁇ 10 17 cm -3 , which is only 1/5 of the Mg concentration of the conventional first P-type layer, which is extremely large.
  • the crystal quality is improved, the light absorption effect due to the poor crystal lattice quality of the material is reduced, and the luminance of the light is further improved.

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Abstract

Provided are a light-emitting diode and a manufacturing method therefor, comprising an underlayment (100), performing a cleaning process on a surface of the underlayment (100); growing a buffer layer (200) and an N-type semiconductor layer (300) on the surface of the underlayment (100) in sequence; growing a quantum well layer (400) on a surface of the N-type semiconductor layer (300), wherein the growth of the quantum well layer (400) comprises: the growth of a defect layer (410), a recovered layer (420) and a light-emitting layer (430); and growing a first P-type semiconductor layer (510), an electron blocking layer (520) and a second P-type semiconductor layer (530) on a surface of the quantum well layer (400). Increasing In composition on the premise of improving the quality of the quantum well and meanwhile using the high pressure and lightly doped first P-type layer structure, improve the light-emitting brightness of the light-emitting diode.

Description

一种发光二极管及其制备方法Light emitting diode and preparation method thereof 技术领域Technical field
本发明属于半导体制造技术领域,特别涉及一种发光二极管及其制备方法。The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a light emitting diode and a preparation method thereof.
背景技术Background technique
近年来,InGaN/GaN多量子阱层作为蓝绿光发光二极管有源区的研究越来越广泛而深入。而传统的LED外延结构中,通常包括缓冲层、N型层、应力释放层、发光层和P型层,所述的应力释放层仅能起到释放发光层生长应力的作用,对于发光层的发光效率的提升作用局限。In recent years, the research of InGaN/GaN multiple quantum well layers as active regions of blue-green light-emitting diodes has become more and more extensive. In the conventional LED epitaxial structure, a buffer layer, an N-type layer, a stress releasing layer, a light-emitting layer and a P-type layer are generally included, and the stress releasing layer can only serve to release the growth stress of the light-emitting layer. The improvement of luminous efficiency is limited.
为更好解决N型层与发光层之间存在的应力对LED器件发光效率等各方面性能的影响,现有技术中多通过设置渐变结构的多量子阱层结构来增加LED器件的发光效率。如CN201300008579.1中通过在低温多量子阱层下设置In掺杂浓度渐变的低温浅量子阱层,并以含铝层作为垒层,同时也渐变掺杂铝的量。但通过该方法制备得到的LED外延层结构对LED芯片各方面性能的提高很局限,仅能起到局部提高发光效率的作用,对LED芯片的其他方面性能作用微小。In order to better solve the influence of the stress existing between the N-type layer and the luminescent layer on the luminous efficiency of the LED device, the multi-quantum well layer structure of the gradation structure is often added in the prior art to increase the luminous efficiency of the LED device. For example, in CN201300008579.1, a low-temperature shallow quantum well layer having a gradient of In doping gradient is disposed under a low temperature multiple quantum well layer, and an aluminum-containing layer is used as a barrier layer, and the amount of aluminum is also gradually changed. However, the epitaxial layer structure of the LED prepared by the method has limited performance in all aspects of the LED chip, and can only partially improve the luminous efficiency, and has little effect on other aspects of the LED chip.
技术问题technical problem
问题的解决方案Problem solution
技术解决方案Technical solution
针对上述问题,本发明提出了一种发光二极管及其制备方法,在改善量子阱质量的前提下增加In组分,提高发光二极管的发光亮度。In view of the above problems, the present invention provides a light emitting diode and a method for fabricating the same, which can increase the In composition and improve the light emitting brightness of the light emitting diode under the premise of improving the quality of the quantum well.
本发明技术方案为:一种发光二极管的制备方法,包括如下步骤:提供一衬底,对所述衬底表面进行清洁处理;在所述衬底表面依次生长缓冲层、N型半导体层、量子阱层、第一P型半导体层、电子阻挡层和第二P型半导体层;所述量子阱层的生长步骤具体为:首先调节反应腔室温度至第一温度T1,生长由In/Ga含量比为C1的InGaN阱层和GaN垒层循环层叠形成的缺陷层;随后调节反应腔室温度至第二温度T2,生长由In/Ga含量比为C2的InGaN阱层与GaN垒层循环层叠形成的修复层;其中,C2<C1;T2>T1;最后调节反应腔室温度至第三温度T3 ,生长由In/Ga含量比为C3的InGaN阱层与GaN垒层循环层叠形成的发光层;所述量子阱层生长结束后,采用高压条件生长第一P型掺杂层,所述生长压力为350~500mbar,所述第一P型层为低浓度掺杂层,掺杂浓度为1×1017cm-3~3×1017cm-3The technical solution of the present invention is: a method for preparing a light emitting diode, comprising the steps of: providing a substrate, performing a cleaning process on the surface of the substrate; sequentially growing a buffer layer, an N-type semiconductor layer, and a quantum on the surface of the substrate a well layer, a first P-type semiconductor layer, an electron blocking layer and a second P-type semiconductor layer; the step of growing the quantum well layer is specifically: first adjusting the temperature of the reaction chamber to a first temperature T1, and growing by an In/Ga content a defect layer formed by cyclically laminating a C1 InGaN well layer and a GaN barrier layer; subsequently adjusting a reaction chamber temperature to a second temperature T2, and growing an InGaN well layer having an In/Ga content ratio of C2 and a GaN barrier layer cyclically stacked a repair layer; wherein, C2<C1;T2>T1; finally adjusting the temperature of the reaction chamber to a third temperature T3, and growing a light-emitting layer formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C3 and a GaN barrier layer; After the growth of the quantum well layer is completed, the first P-type doped layer is grown under high pressure conditions, the growth pressure is 350-500 mbar, and the first P-type layer is a low-concentration doped layer, and the doping concentration is 1×. 10 17 cm -3 to 3 × 10 17 cm -3 .
优选的,所述缺陷层的第一温度T1范围为:700~780℃;所述InGaN阱层的In/Ga含量比C1为50%~80%。Preferably, the first temperature T1 of the defect layer ranges from 700 to 780 ° C; and the In/Ga content ratio of the InGaN well layer is 50% to 80%.
优选的,所述修复层的第二温度T2范围为:780~900℃;所述InGaN阱层的In/Ga含量比C2为45%~60%。Preferably, the second temperature T2 of the repair layer ranges from 780 to 900 ° C; and the InGaN ratio of the InGaN well layer ranges from 45% to 60%.
优选的,所述发光层的第三温度T3范围为:650~850℃;所述InGaN阱层的In/Ga含量比C3为50%~60%。Preferably, the third temperature T3 of the light-emitting layer ranges from 650 to 850 ° C; and the In/Ga content ratio of the InGaN well layer is 50% to 60%.
优选的,所述晶格缺陷密度为5×1017cm-2~5×1018cm-2Preferably, the lattice defect density is 5 × 10 17 cm -2 to 5 × 10 18 cm -2 .
优选的,所述缺陷层的总厚度为40nm~115nm,循环周期为15~25,每一周期阱层与垒层厚度比为1∶2~1∶5。Preferably, the defect layer has a total thickness of 40 nm to 115 nm, a cycle period of 15 to 25, and a thickness ratio of the well layer to the barrier layer per cycle of 1:2 to 1:5.
优选的,所述修复层的总厚度为150nm~200nm,循环周期为2~5,每一周期阱层与垒层厚度比为1∶6~1∶10。Preferably, the repair layer has a total thickness of 150 nm to 200 nm, a cycle period of 2 to 5, and a thickness ratio of the well layer to the barrier layer per cycle of 1:6 to 1:10.
优选的,所述发光层的总厚度为140nm~345nm,循环周期为8~15,每一周期阱层与垒层厚度比为1∶5.5~1∶10。Preferably, the total thickness of the light-emitting layer is 140 nm to 345 nm, the cycle period is 8-15, and the thickness ratio of the well layer to the barrier layer is 1:5.5 to 1:10 per cycle.
优选的,所述缺陷层、修复层和发光层为n型掺杂层。Preferably, the defect layer, the repair layer and the light-emitting layer are n-type doped layers.
优选的,所述缺陷层和修复层的掺杂浓度为1×1018cm-3~5×1018cm-3Preferably, the defect layer and the repair layer have a doping concentration of 1×10 18 cm −3 to 5×10 18 cm −3 .
优选的,所述发光层掺杂浓度为1×1017cm-3~5×1017cm-3Preferably, the light-emitting layer has a doping concentration of 1×10 17 cm −3 to 5×10 17 cm −3 .
本发明同时提出一种发光二极管,从下至上依次为:衬底、缓冲层、N型半导体层、量子阱层、第一P型半导体层、电子阻挡层和第二P型半导体层,所述量子阱层由缺陷层、修复层和发光层组成;其中,The invention also provides a light emitting diode, which is, in order from bottom to top, a substrate, a buffer layer, an N-type semiconductor layer, a quantum well layer, a first P-type semiconductor layer, an electron blocking layer and a second P-type semiconductor layer, The quantum well layer is composed of a defect layer, a repair layer, and a light-emitting layer;
所述缺陷层由In/Ga含量比为C1的InGaN阱层和GaN垒层循环层叠形成;The defect layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C1 and a GaN barrier layer;
所述修复层由In/Ga含量比为C2的InGaN阱层与GaN垒层循环层叠形成,其中,C2<C1;The repair layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C2 and a GaN barrier layer, wherein C2<C1;
所述发光层由In/Ga含量比为C3的InGaN阱层和GaN垒层循环层叠形成;The light emitting layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C3 and a GaN barrier layer;
所述量子阱层表面的所述第一P型掺杂层为低浓度掺杂层,掺杂浓度为1×1017 cm-3~3×1017cm-3The first P-type doped layer on the surface of the quantum well layer is a low concentration doped layer, and the doping concentration is 1×10 17 cm −3 to 3×10 17 cm −3 .
发明的有益效果Advantageous effects of the invention
有益效果Beneficial effect
本发明至少具有以下有益效果:The invention has at least the following beneficial effects:
本发明的量子阱结构中首先采用低温和高铟镓含量比条件生长形成缺陷层,使其具有高密度“V”形晶格缺陷,较好的释放后续生长过程中应力的同时,增加电子注入效率,为后续发光层的辐射复合提供基础;In the quantum well structure of the present invention, a defect layer is first formed by using low temperature and high indium gallium content to form a high-density "V"-shaped lattice defect, which better releases stress during subsequent growth, and increases electron injection. Efficiency, providing a basis for the radiation composite of the subsequent luminescent layer;
随后采用较高成长温度及低铟镓含量比,获得晶体质量优良的修复层,阻断前述缺陷层的非“V”形缺陷延伸至后续层,增加发光二极管的抗静电能力,降低漏电现象;且为后续层提供优良的生长界面;Then, using a higher growth temperature and a low indium gallium content ratio, a repair layer having excellent crystal quality is obtained, and the non-"V" shaped defect of the defect layer is blocked from extending to the subsequent layer, thereby increasing the antistatic capability of the LED and reducing the leakage phenomenon; And providing an excellent growth interface for the subsequent layers;
最后在缺陷层和修复层结构之上生长形成发光层,由于缺陷层具有的高密度“V”形缺陷延伸至发光层中,为电子与空穴的复合提供了充足的基点,增加了空穴和电子有效复合几率,提升发光二极管的外量子效率,增加发光亮度。Finally, a light-emitting layer is grown on the defect layer and the repair layer structure. Since the defect layer has a high-density "V"-shaped defect extending into the light-emitting layer, a sufficient base point is provided for the recombination of electrons and holes, and holes are added. And the effective combination probability of electrons, improve the external quantum efficiency of the light-emitting diode, and increase the brightness of the light.
[0018]且在此量子阱结构的基础上高压生长第一P型层,减少生长过程中碳杂质的含量,从而降低Mg在GaN材料中的活化能,提高Mg的掺杂效率,因此生长过程中可减小Mg源的通入,提升晶格质量,进一步提升发光亮度。[0018] and based on the quantum well structure, the first P-type layer is grown at a high voltage to reduce the content of carbon impurities during the growth process, thereby reducing the activation energy of Mg in the GaN material, increasing the doping efficiency of Mg, and thus the growth process. The medium can reduce the access of the Mg source, improve the lattice quality, and further improve the brightness of the light.
[0019]利用本发明获得的发光二极管,其发光亮度提升3%~6%,抗静电能力由改进之前的90%通过率提升为98%通过率(测试条件为人体模式4000V)。[0019] The light-emitting diode obtained by the invention has a brightness increase of 3% to 6%, and the antistatic ability is improved from a 90% pass rate before the improvement to a pass rate of 98% (the test condition is a human body mode of 4000V).
对附图的简要说明Brief description of the drawing
附图说明DRAWINGS
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。The drawings are intended to provide a further understanding of the invention, and are intended to be a In addition, the drawing figures are a summary of the description and are not drawn to scale.
图1为本发明具体实施方式之方法流程图。1 is a flow chart of a method of a specific embodiment of the present invention.
图2为本发明具体实施方式之发光二极管示意图。2 is a schematic view of a light emitting diode according to an embodiment of the present invention.
图中:100.衬底;200.缓冲层;210.低温缓冲层;220.高温缓冲层;300.N型半导体层;400.量子阱层;410.缺陷层;420.修复层;430.发光层;500.P型半导体层;510.第一P型半导体层;520.电子阻挡层;530.第二P型半导体层。 In the figure: 100. substrate; 200. buffer layer; 210. low temperature buffer layer; 220. high temperature buffer layer; 300. N type semiconductor layer; 400. quantum well layer; 410. defect layer; 420. repair layer; Light-emitting layer; 500. P-type semiconductor layer; 510. First P-type semiconductor layer; 520. Electron blocking layer; 530. Second P-type semiconductor layer.
发明实施例Invention embodiment
本发明的实施方式Embodiments of the invention
下面结合附图和实施例对本发明的具体实施方式进行详细说明。The specific embodiments of the present invention will be described in detail below with reference to the drawings and embodiments.
参看附图1,一种发光二极管从下至上依次为:衬底100、缓冲层200、N型半导体层300、量子阱层400、P型半导体层500,其中,P型半导体层500包括第一P型半导体层510、电子阻挡层520和第二P型半导体层530;所述量子阱层400由缺陷层410、修复层420和发光层430组成。缺陷层410由In/Ga含量比C1为50%~80%的InGaN阱层和GaN垒层循环层叠形成。修复层420由In/Ga含量比C2为45%~60%的InGaN阱层与GaN垒层循环层叠形成,修复层420的每一周期厚度大于缺陷层410的每一周期厚度,但In/Ga含量比C2小于缺陷层410的In/Ga含量比C1。发光层430由In/Ga含量比C3为50%~60%的InGaN阱层和GaN垒层循环层叠形成。量子阱层400表面的第一P型掺杂层510为低浓度掺杂层,掺杂浓度为1×1017cm-3~3×1017cm-3Referring to FIG. 1, a light emitting diode is sequentially from bottom to top: a substrate 100, a buffer layer 200, an N-type semiconductor layer 300, a quantum well layer 400, and a P-type semiconductor layer 500, wherein the P-type semiconductor layer 500 includes the first A P-type semiconductor layer 510, an electron blocking layer 520, and a second P-type semiconductor layer 530; the quantum well layer 400 is composed of a defect layer 410, a repair layer 420, and a light-emitting layer 430. The defect layer 410 is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of 50% to 80% and a GaN barrier layer. The repair layer 420 is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of 45% to 60% and a GaN barrier layer. The thickness of each layer of the repair layer 420 is greater than the thickness of each period of the defect layer 410, but In/Ga The content ratio C2 is smaller than the In/Ga content ratio C1 of the defect layer 410. The light-emitting layer 430 is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of 50% to 60% and a GaN barrier layer. A quantum well layer of the surface 400 of the first P-type doped layer 510 is a low concentration impurity layer, a doping concentration of 1 × 10 17 cm -3 ~ 3 × 10 17 cm -3.
参看图1和2为实现上述发光二极管的结构,本发明提出一种发光二极管的制备方法,包括如下步骤:Referring to Figures 1 and 2, in order to realize the structure of the above light-emitting diode, the present invention provides a method for preparing a light-emitting diode, comprising the following steps:
提供一衬底100,对衬底100表面进行清洁处理,通常采用氢气气氛或氢气与氮气的混合气氛在1000~1200℃条件下对衬底100表面进行吹扫,去除衬底100表面氧化物杂质。A substrate 100 is provided to clean the surface of the substrate 100, and the surface of the substrate 100 is usually purged under a hydrogen atmosphere or a mixed atmosphere of hydrogen and nitrogen at 1000 to 1200 ° C to remove oxide impurities on the surface of the substrate 100. .
随后调节腔室温度、压力及气氛,通入镓源和氮源,生长缓冲层200,此实施例中所述缓冲层200包括低温缓冲层210和高温缓冲层220;低温缓冲层210主要为后续生长提供成核点,同时减小衬底100与后续层的晶格差异,且释放后续沉积过程中的应力,改善晶体质量。高温缓冲层220主要为后续N型半导体层300的生长提供优良的生长界面,减少晶体缺陷,提升发光二极管的电学性能。Then, the chamber temperature, the pressure and the atmosphere are adjusted, the gallium source and the nitrogen source are passed, and the buffer layer 200 is grown. In this embodiment, the buffer layer 200 includes a low temperature buffer layer 210 and a high temperature buffer layer 220; the low temperature buffer layer 210 is mainly followed. The growth provides a nucleation point while reducing the lattice difference between the substrate 100 and subsequent layers, and releasing stress during subsequent deposition to improve crystal quality. The high temperature buffer layer 220 mainly provides an excellent growth interface for the growth of the subsequent N-type semiconductor layer 300, reduces crystal defects, and improves the electrical performance of the light emitting diode.
后于腔室中通入n型杂质源,调节腔室环境生长N型半导体层300。After the n-type impurity source is introduced into the chamber, the chamber environment is grown to grow the N-type semiconductor layer 300.
然后,调节腔室环境至量子阱生长所需条件,生长量子阱层400,具体为:Then, adjusting the chamber environment to the conditions required for quantum well growth, the quantum well layer 400 is grown, specifically:
首先将反应腔室温度调节至第一温度T1为700~780℃,通入铟源、镓源、氮源和n型杂质源,生长由In/Ga含量比C1为50%~80%的InGaN阱层和GaN垒层循环层叠形成的缺陷层410,循环周期为15~25,总厚度为150nm~200nm,其中每 一周期中阱层与垒层的厚度比例为1∶2~1∶6;且阱层与垒层的生长温度相同或不同,本实施例优选同温生长。该缺陷层410中n型掺杂浓度为1×1018cm-3~5×1018cm-3。缺陷层410利用低温、高铟镓含量比条件生长形成,使其具有高密度“V”形及非“V”形晶格缺陷,缺陷密度高达5×1017cm-2~5×1018cm-2,较好的释放后续生长过程中的应力,且因为电子透过“V”形缺陷更容易通过GaN材料层,从而增加电子注入效率,提升发光亮度。First, the temperature of the reaction chamber is adjusted to a first temperature T1 of 700 to 780 ° C, and an Indium source, a gallium source, a nitrogen source, and an n-type impurity source are introduced, and InGaN having an In/Ga content ratio of C1 of 50% to 80% is grown. The defect layer 410 formed by cyclically laminating the well layer and the GaN barrier layer has a cycle period of 15 to 25 and a total thickness of 150 nm to 200 nm, wherein the ratio of the thickness of the well layer to the barrier layer in each cycle is 1:2 to 1:6; And the growth temperature of the well layer and the barrier layer is the same or different, and the present embodiment preferably grows at the same temperature. The n-type doping concentration in the defect layer 410 is 1 × 10 18 cm -3 to 5 × 10 18 cm -3 . The defect layer 410 is formed by using low temperature and high indium gallium content to form a high density "V" shape and a non-"V" shape lattice defect, and the defect density is as high as 5×10 17 cm -2 to 5×10 18 cm. -2 , better release of stress during subsequent growth, and because electrons pass through the GaN material layer through the "V" shaped defect, thereby increasing electron injection efficiency and improving light emission brightness.
随后,调节反应腔室温度至第二温度T2为780~900℃,生长由In/Ga含量比C2为45%~60%的InGaN阱层与GaN垒层循环层叠形成的修复层420,循环周期为2~5,总厚度为40nm~115nm,其中每一周期中阱层与垒层的厚度比例为1∶6~1∶10;且阱层与垒层的生长温度相同或不同,本实施例优选不同温生长,垒层温度与阱层温度差为80~110℃。该缺陷层掺杂浓度1×1018cm-3~5×1018cm-3。所述修复层420利用低于缺陷层的In/Ga含量比和高生长温度,使有效并入该层的In源降低,从而获得优良的晶体质量;同时,修复层420的每一周期厚度大于缺陷层410的每一周期厚度,尤其是垒层的厚度,从而更好的阻断缺陷层410中非“V”形缺陷延伸至后续层,增加发光二极管的抗静电能力,降低漏电现象;且C2<C1,T2>T1,进一步提升晶体质量,并为后续生长层提供优良的生长界面。Subsequently, the reaction chamber temperature is adjusted to a second temperature T2 of 780 to 900 ° C, and a repair layer 420 formed by cyclically laminating an InGaN well layer and a GaN barrier layer having an In/Ga content ratio of 45% to 60% is grown. 2 to 5, the total thickness is 40 nm to 115 nm, wherein the ratio of the thickness of the well layer to the barrier layer in each period is 1:6 to 1:10; and the growth temperature of the well layer and the barrier layer is the same or different, this embodiment It is preferred to grow at different temperatures, and the temperature difference between the barrier layer temperature and the well layer is 80 to 110 °C. The defect layer has a doping concentration of 1 × 10 18 cm -3 to 5 × 10 18 cm -3 . The repair layer 420 utilizes an In/Ga content ratio lower than the defect layer and a high growth temperature to lower the In source effectively incorporated into the layer, thereby obtaining excellent crystal quality; meanwhile, the thickness of each layer of the repair layer 420 is greater than The thickness of each period of the defect layer 410, especially the thickness of the barrier layer, thereby better blocking the non-"V" shaped defect in the defect layer 410 from extending to the subsequent layer, increasing the antistatic capability of the LED and reducing the leakage phenomenon; C2<C1, T2>T1 further enhances the crystal quality and provides an excellent growth interface for the subsequent growth layer.
接着,调节反应腔室温度至第三温度T3为650~850℃,生长由In/Ga含量比C3为50%~60%的InGaN阱层与GaN垒层循环层叠形成的发光层430,循环周期为8~15,总厚度为135nm~345nm,其中每一周期中阱层与垒层的厚度比例为1∶5.5~1∶10;且阱层与垒层的生长温度相同或不同,本实施例优选不同温生长,垒层温度与阱层温度差为80~110℃。该缺陷层掺杂浓度1×1017cm-3~5×1017cm-3。因为发光层430基于缺陷层410和修复层420结构之上,具有高密度“V”形缺陷,其为电子与空穴的复合提供基点,增加复合几率,提升发光亮度。Next, the reaction chamber temperature is adjusted to a third temperature T3 of 650 to 850 ° C, and a light-emitting layer 430 formed by cyclically laminating an InGaN well layer and a GaN barrier layer having an In/Ga content ratio C3 of 50% to 60% is grown. 8 to 15, the total thickness is 135 nm to 345 nm, wherein the ratio of the thickness of the well layer to the barrier layer in each period is 1:5.5 to 1:10; and the growth temperature of the well layer and the barrier layer is the same or different, this embodiment It is preferred to grow at different temperatures, and the temperature difference between the barrier layer temperature and the well layer is 80 to 110 °C. The defect layer is doped with a concentration of 1 × 10 17 cm -3 ~ 5 × 10 17 cm -3. Because the light-emitting layer 430 is based on the structure of the defect layer 410 and the repair layer 420, it has a high-density "V"-shaped defect, which provides a base point for the recombination of electrons and holes, increases the probability of recombination, and improves the brightness of the light.
本发明中,所述量子阱结构采用具有高密度缺陷的缺陷层410配合高晶体质量的修复层420,在提升应力释放能力的同时避免影响后续发光层430的晶体质量;且利用修复层420阻断非“V”型缺陷的延伸并对“V”形缺陷侧面进行微修复,使其更利于后续电子与空穴的有效复合。随后再生长发光层430于修复层420表面,最终形成量子阱层400。本发明中修复层420和发光层430均采用厚膜结构,最 低厚度分别为20nm和17nm(常规结构分别为15nm和13nm),而在常规量子阱结构中若采用此厚膜结构,则其亮度明显降低,但配合本发明生长条件,则其亮度上升3%~5%左右,且抗静电能力由之前的90%通过率提升为98%通过率(测试条件为人体模式4000V)。In the present invention, the quantum well structure employs a defect layer 410 having a high density defect in combination with a high crystal quality repair layer 420 to improve the stress release capability while avoiding affecting the crystal quality of the subsequent light emitting layer 430; The extension of the non-V-type defect is broken and the side of the "V"-shaped defect is micro-repaired to make it more effective for subsequent effective recombination of electrons and holes. The long light-emitting layer 430 is then regenerated on the surface of the repair layer 420 to finally form the quantum well layer 400. In the present invention, the repair layer 420 and the light-emitting layer 430 are both thick film structures, most The low thickness is 20 nm and 17 nm, respectively (conventional structures are 15 nm and 13 nm, respectively), and if the thick film structure is used in the conventional quantum well structure, the brightness thereof is remarkably lowered, but the brightness is increased by 3% in accordance with the growth conditions of the present invention. ~5% or so, and the antistatic ability is increased from the previous 90% pass rate to 98% pass rate (test condition is human body mode 4000V).
最后,调节腔室条件,其中压力为350~450mbar,利用高压条件生长第一P型半导体层510;再改变压力至常规条件继续生长电子阻挡层520和第二P型半导体层530形成P型半导体层500,最终形成发光二极管。此处使用高压条件生长第一P型半导体层510,降低了生长过程中碳杂质的含量,从而降低Mg在GaN材料中的活化能,进而提高Mg的掺杂效率,因此生长过程中可减小Mg源的通入,本发明的Mg掺杂浓度为1×1017cm-3~3×1017cm-3,仅为常规第一P型层Mg掺杂浓度的1/5,极大的提升了晶体质量,减小因材料晶格质量差而产生的吸光效应,进一步提升发光亮度。Finally, the chamber conditions are adjusted, wherein the pressure is 350-450 mbar, and the first P-type semiconductor layer 510 is grown by using high-voltage conditions; and the pressure is changed to a conventional condition to continue growing the electron blocking layer 520 and the second P-type semiconductor layer 530 to form a P-type semiconductor. Layer 500, ultimately forming a light emitting diode. Here, the first P-type semiconductor layer 510 is grown using high-voltage conditions, which reduces the content of carbon impurities during the growth process, thereby reducing the activation energy of Mg in the GaN material, thereby increasing the doping efficiency of Mg, and thus can be reduced during growth. For the introduction of the Mg source, the Mg doping concentration of the present invention is 1 × 10 17 cm -3 to 3 × 10 17 cm -3 , which is only 1/5 of the Mg concentration of the conventional first P-type layer, which is extremely large. The crystal quality is improved, the light absorption effect due to the poor crystal lattice quality of the material is reduced, and the luminance of the light is further improved.
应当理解的是,上述具体实施方案为本发明的优选实施例,本发明的范围不限于该实施例,凡依本发明所做的任何变更,皆属本发明的保护范围之内。 It is to be understood that the above-described embodiments are a preferred embodiment of the invention, and the scope of the invention is not limited to the embodiment, and any modifications made in accordance with the invention are within the scope of the invention.

Claims (12)

  1. 一种发光二极管的制备方法,包括如下步骤:A method for preparing a light emitting diode includes the following steps:
    提供一衬底,对所述衬底表面进行清洁处理;Providing a substrate for performing a cleaning process on the surface of the substrate;
    在所述衬底表面依次生长缓冲层、N型半导体层、量子阱层、第一P型半导体层、电子阻挡层和第二P型半导体层;Forming a buffer layer, an N-type semiconductor layer, a quantum well layer, a first P-type semiconductor layer, an electron blocking layer, and a second P-type semiconductor layer sequentially on the surface of the substrate;
    其特征在于:所述量子阱层的生长步骤具体为,The step of growing the quantum well layer is specifically
    首先调节反应腔室温度至第一温度T1,生长由In/Ga含量比为C1的InGaN阱层和GaN垒层循环层叠形成的缺陷层;First, adjusting the temperature of the reaction chamber to a first temperature T1, and growing a defect layer formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C1 and a GaN barrier layer;
    随后调节反应腔室温度至第二温度T2,生长由In/Ga含量比为C2的InGaN阱层与GaN垒层循环层叠形成的修复层;其中,C2<C1;T2>T1;Subsequently, the reaction chamber temperature is adjusted to a second temperature T2, and a repair layer formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C2 and a GaN barrier layer is grown; wherein C2<C1; T2>T1;
    最后调节反应腔室温度至第三温度T3,生长由In/Ga含量比为C3的InGaN阱层与GaN垒层循环层叠形成的发光层;Finally, the reaction chamber temperature is adjusted to a third temperature T3, and a light-emitting layer formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C3 and a GaN barrier layer is grown;
    所述量子阱层生长结束后,采用高压条件生长第一P型掺杂层,所述生长压力为350~500mbar,所述第一P型层为低浓度掺杂层,掺杂浓度为1×1017cm-3~3×1017cm-3After the growth of the quantum well layer is completed, the first P-type doped layer is grown under high pressure conditions, the growth pressure is 350-500 mbar, and the first P-type layer is a low-concentration doped layer, and the doping concentration is 1×. 10 17 cm -3 to 3 × 10 17 cm -3 .
  2. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述缺陷层的第一温度T1范围为:700~780℃;所述InGaN阱层的In/Ga含量比C1为50%~80%。The method for fabricating a light emitting diode according to claim 1, wherein the first temperature T1 of the defect layer ranges from 700 to 780 ° C; and the In/Ga content ratio of the InGaN well layer is 50 %~80%.
  3. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述修复层的第二温度T2范围为:780~900℃;所述InGaN阱层的In/Ga含量比C2为45%~60%。The method for preparing a light emitting diode according to claim 1, wherein the second temperature T2 of the repair layer ranges from 780 to 900 ° C; and the In/Ga content ratio of the InGaN well layer is 45 %~60%.
  4. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述发光层的第三温度T3范围为:650~850℃;所述InGaN阱层的In/Ga含量比C3为50%~60%。The method for fabricating a light emitting diode according to claim 1, wherein the third temperature T3 of the light emitting layer ranges from 650 to 850 ° C; and the In/Ga content ratio of the InGaN well layer is 50 %~60%.
  5. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述缺陷层形成的缺陷密度为5×1017cm-2~5×1018cm-2The method of fabricating a light emitting diode according to claim 1, wherein the defect layer has a defect density of 5 × 10 17 cm -2 to 5 × 10 18 cm -2 .
  6. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于: 所述缺陷层的总厚度为40nm~115nm,循环周期为15~25,每一周期阱层与垒层厚度比为1∶2~1∶5。A method of fabricating a light emitting diode according to claim 1, wherein: The defect layer has a total thickness of 40 nm to 115 nm, a cycle period of 15 to 25, and a thickness ratio of the well layer to the barrier layer per cycle of 1:2 to 1:5.
  7. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述修复层的总厚度为150nm~200nm,循环周期为2~5,每一周期阱层与垒层厚度比为1∶6~1∶10。The method for preparing a light emitting diode according to claim 1, wherein the repair layer has a total thickness of 150 nm to 200 nm, a cycle period of 2 to 5, and a ratio of a well layer to a barrier layer thickness of 1 per cycle. : 6 to 1:10.
  8. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述发光层的总厚度为140nm~345nm,循环周期为8~15,每一周期阱层与垒层厚度比为1∶5.5~1∶10。The method for fabricating a light emitting diode according to claim 1, wherein the total thickness of the light emitting layer is 140 nm to 345 nm, the cycle period is 8 to 15, and the ratio of the thickness of the well layer to the barrier layer is 1 per cycle. : 5.5 to 1:10.
  9. 根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述缺陷层、修复层和发光层均为n型掺杂层。The method of manufacturing a light emitting diode according to claim 1, wherein the defect layer, the repair layer and the light emitting layer are both n-type doped layers.
  10. 根据权利要求9所述的一种发光二极管的制备方法,其特征在于:所述缺陷层和修复层的掺杂浓度为1×1018cm-3~5×1018cm-3A method of fabricating a light emitting diode according to claim 9, wherein the defect layer and the repair layer have a doping concentration of 1 × 10 18 cm -3 to 5 × 10 18 cm -3 .
  11. 根据权利要求9所述的一种发光二极管的制备方法,其特征在于:所述发光层掺杂浓度为1×1017cm-3~5×1017cm-3The method for producing a light emitting diode according to claim 9, wherein: said light emitting layer is doped at a concentration of 1 × 10 17 cm -3 ~ 5 × 10 17 cm -3.
  12. 一种发光二极管,从下至上依次为:衬底、缓冲层、N型半导体层、量子阱层、第一P型半导体层、电子阻挡层和第二P型半导体层,其特征在于:所述量子阱层由缺陷层、修复层和发光层组成;A light emitting diode, from bottom to top, is a substrate, a buffer layer, an N-type semiconductor layer, a quantum well layer, a first P-type semiconductor layer, an electron blocking layer, and a second P-type semiconductor layer, wherein: The quantum well layer is composed of a defect layer, a repair layer and a light-emitting layer;
    其中,among them,
    所述缺陷层由In/Ga含量比为C1的InGaN阱层和GaN垒层循环层叠形成;The defect layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C1 and a GaN barrier layer;
    所述修复层由In/Ga含量比为C2的InGaN阱层与GaN垒层循环层叠形成,其中,C2<C1;The repair layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C2 and a GaN barrier layer, wherein C2<C1;
    所述发光层由In/Ga含量比为C3的InGaN阱层和GaN垒层循环层叠形成;The light emitting layer is formed by cyclically laminating an InGaN well layer having an In/Ga content ratio of C3 and a GaN barrier layer;
    所述量子阱层表面的所述第一P型掺杂层为低浓度掺杂层,掺杂浓度为1×1017cm-3~3×1017cm-3The first P-type doped layer on the surface of the quantum well layer is a low concentration doped layer, and the doping concentration is 1×10 17 cm −3 to 3×10 17 cm −3 .
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113540301A (en) * 2021-07-09 2021-10-22 安徽三安光电有限公司 Light emitting diode and manufacturing method thereof
CN117497655A (en) * 2023-12-25 2024-02-02 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN117525237A (en) * 2024-01-03 2024-02-06 江西兆驰半导体有限公司 Green light Micro-LED epitaxial wafer and preparation method thereof, and green light Micro-LED
CN117525232A (en) * 2024-01-03 2024-02-06 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105702817B (en) * 2016-04-25 2018-07-27 安徽三安光电有限公司 A kind of light emitting diode and preparation method thereof
TWI717386B (en) * 2016-09-19 2021-02-01 新世紀光電股份有限公司 Semiconductor device containing nitrogen
CN107170865B (en) * 2017-05-27 2019-05-14 安徽三安光电有限公司 A kind of semiconductor light-emitting elements and preparation method thereof
CN109326691A (en) * 2018-08-31 2019-02-12 华灿光电(浙江)有限公司 A kind of manufacturing method of LED epitaxial slice
CN110911529B (en) * 2018-09-14 2021-07-30 宁波安芯美半导体有限公司 Growth method of epitaxial structure of light-emitting diode
CN109545913A (en) * 2018-10-30 2019-03-29 江苏晶曌半导体有限公司 A kind of optimization method of the high-power green light LED epitaxial structure of Si substrate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101488548A (en) * 2009-02-27 2009-07-22 上海蓝光科技有限公司 LED in high In ingredient multiple InGaN/GaN quantum wells structure
CN102903808A (en) * 2012-10-31 2013-01-30 合肥彩虹蓝光科技有限公司 Shallow quantum well growth method for increasing light emitting efficiency of GaN-based LED (Light-Emitting Diode)
CN104332545A (en) * 2014-09-02 2015-02-04 中国科学院半导体研究所 Low-electrical-resistivity p-type aluminum gallium nitrogen material and preparation method thereof
CN104362233A (en) * 2014-10-29 2015-02-18 华灿光电(苏州)有限公司 Epitaxial slice of GaN-based light emitting diode (LED) and preparation method thereof
CN105702817A (en) * 2016-04-25 2016-06-22 安徽三安光电有限公司 Light emitting diode and preparation method of light emitting diode

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101488550B (en) * 2009-02-27 2010-10-13 上海蓝光科技有限公司 Manufacturing method for LED in high In ingredient multiple InGaN/GaN quantum wells structure
CN102368525A (en) * 2011-10-27 2012-03-07 华灿光电股份有限公司 Composite quantum well structure raising carrier composite efficiency and preparation method thereof
KR101442809B1 (en) * 2012-11-20 2014-09-23 한국광기술원 Nitride semiconductor light emitting device and method for manufacturing thereof
CN104617194B (en) * 2015-02-03 2018-12-11 映瑞光电科技(上海)有限公司 The preparation method of GaN base LED epitaxial structure
CN105070807B (en) * 2015-07-10 2017-06-16 湘能华磊光电股份有限公司 A kind of epitaxial structure and its growing method for increasing GaN base backward voltage

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101488548A (en) * 2009-02-27 2009-07-22 上海蓝光科技有限公司 LED in high In ingredient multiple InGaN/GaN quantum wells structure
CN102903808A (en) * 2012-10-31 2013-01-30 合肥彩虹蓝光科技有限公司 Shallow quantum well growth method for increasing light emitting efficiency of GaN-based LED (Light-Emitting Diode)
CN104332545A (en) * 2014-09-02 2015-02-04 中国科学院半导体研究所 Low-electrical-resistivity p-type aluminum gallium nitrogen material and preparation method thereof
CN104362233A (en) * 2014-10-29 2015-02-18 华灿光电(苏州)有限公司 Epitaxial slice of GaN-based light emitting diode (LED) and preparation method thereof
CN105702817A (en) * 2016-04-25 2016-06-22 安徽三安光电有限公司 Light emitting diode and preparation method of light emitting diode

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113540301A (en) * 2021-07-09 2021-10-22 安徽三安光电有限公司 Light emitting diode and manufacturing method thereof
CN113540301B (en) * 2021-07-09 2022-12-16 安徽三安光电有限公司 Light emitting diode and manufacturing method thereof
CN117497655A (en) * 2023-12-25 2024-02-02 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN117497655B (en) * 2023-12-25 2024-03-22 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN117525237A (en) * 2024-01-03 2024-02-06 江西兆驰半导体有限公司 Green light Micro-LED epitaxial wafer and preparation method thereof, and green light Micro-LED
CN117525232A (en) * 2024-01-03 2024-02-06 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN117525232B (en) * 2024-01-03 2024-03-29 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN117525237B (en) * 2024-01-03 2024-03-29 江西兆驰半导体有限公司 Green light Micro-LED epitaxial wafer and preparation method thereof, and green light Micro-LED

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