WO2017177501A1 - Amoled像素驱动电路及像素驱动方法 - Google Patents

Amoled像素驱动电路及像素驱动方法 Download PDF

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WO2017177501A1
WO2017177501A1 PCT/CN2016/082126 CN2016082126W WO2017177501A1 WO 2017177501 A1 WO2017177501 A1 WO 2017177501A1 CN 2016082126 W CN2016082126 W CN 2016082126W WO 2017177501 A1 WO2017177501 A1 WO 2017177501A1
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thin film
film transistor
scan signal
electrically connected
node
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French (fr)
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蔡玉莹
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0871—Several active elements per pixel in active matrix panels with level shifting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G09G2310/0208—Simultaneous scanning of several lines in flat panels using active addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

  • the present invention relates to the field of OLED display technologies, and in particular, to an AMOLED pixel driving circuit and a pixel driving method.
  • OLED Organic Light Emitting Display
  • OLED Organic Light Emitting Display
  • the OLED display device can be divided into two types: passive matrix OLED (PMOLED) and active matrix OLED (AMOLED), namely direct addressing and thin film transistor (Thin Film Transistor, according to the driving method). TFT) matrix addressing two types.
  • the AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a high-definition large-sized display device.
  • the AMOLED is a current driving device. When a current flows through the organic light emitting diode, the organic light emitting diode emits light, and the luminance of the light is determined by the current flowing through the organic light emitting diode itself. Most existing integrated circuits (ICs) only transmit voltage signals, so the pixel driving circuit of AMOLED needs to complete the task of converting a voltage signal into a current signal.
  • ICs integrated circuits
  • the conventional AMOLED pixel driving circuit is usually 2T1C, that is, two thin film transistors plus one capacitor structure, which converts the voltage into current, but the threshold voltage of the driving thin film transistor in the conventional 2T1C pixel driving circuit drifts with the working time, thereby causing The illuminating of the organic light emitting diode is unstable, resulting in uneven illumination and uneven brightness between the pixels.
  • the main method for solving the brightness unevenness of the AMOLED display is to improve the pixel driving circuit and add a compensation function so that the current flowing through the organic light emitting diode is less affected by the threshold voltage variation of the driving thin film transistor.
  • a conventional AMOLED pixel driving circuit with a compensation function adopts a 5T2C structure, that is, a structure of five thin film transistors plus two capacitors, including: a first thin film transistor T10 and a second thin film transistor T20, The three thin film transistors T30, the fourth thin film transistor T40, the fifth thin film transistor T50, the first capacitor C10, the second capacitor C20, and the organic light emitting diode D10 are each a P-type thin film transistor.
  • the first thin film transistor T10 is a driving thin film transistor, and the gate thereof is electrically connected to one of the first capacitors C10 via the first node A0.
  • the source is connected to the power source positive voltage VDD, the drain level is electrically connected to the source of the fifth thin film transistor T50; the gate of the second thin film transistor T20 is connected to the scan signal SCAN, and the source level is connected to the data signal data, and the drain level is via the drain level.
  • the second node B0 is electrically connected to the other end of the first capacitor C10; the gate of the third thin film transistor T30 is connected to the light emission control signal EM, the source level is connected to the reference reference voltage Vref, and the drain level is electrically connected to the second node B0;
  • the gate of the fourth thin film transistor T40 is connected to the scan signal SCAN, the source is electrically connected to the first node A0, and the drain is electrically connected to the drain of the first thin film transistor T10 and the source of the fifth thin film transistor T50;
  • the gate of the thin film transistor T50 is connected to the light emission control signal EM, and the source is electrically connected to the drain of the first thin film transistor T10 and the drain of the fourth thin film transistor T40.
  • the drain is electrically connected to the anode of the organic light emitting diode D10.
  • One end of the first capacitor C10 is electrically connected to the first node A0, and the other end is electrically connected to the second node B0; one end of the second capacitor C20 is electrically connected to the first node A0, and the other end is connected to the power supply positive voltage VDD; Diode of diode D10 Electrically connected to the fifth drain of the thin film transistor T50, a negative cathode incoming power voltage VSS.
  • FIG. 2 is a timing diagram corresponding to the AMOLED pixel driving circuit of the conventional 5T2C structure shown in FIG. 1.
  • the working process of the AMOLED pixel driving circuit is divided into four stages according to the timing: an initialization stage 10, a threshold voltage sampling stage 20, and a hold. Stage 30, and illuminating stage 40. 2 and FIG. 3, in the initialization phase 10, the scan signal SCAN provides a low potential, and the second thin film transistor T20 and the fourth thin film transistor T40 controlled by the scan signal SCAN are turned on, and the light emission control signal EM provides a low potential and is controlled by illumination.
  • the third thin film transistor T30 and the fifth thin film transistor T50 controlled by the signal EM are turned on, the data signal data is transmitted to the second node B0 via the turned-on second thin film transistor T20, and the first capacitor C10 is charged, so that the second node B0
  • the voltage is the data signal voltage Vdata.
  • the scan signal SCAN still provides a low potential
  • the light emission control signal EM rises from a low potential to a high potential
  • the third thin film transistor T30 and the fifth thin film transistor T50 are turned off, the first node A0.
  • the voltage, that is, the gate voltage Vg of the first thin film transistor T10 is changed to VDD-Vth
  • Vth is the threshold voltage of the first thin film transistor T10. 2 and FIG.
  • the scan signal SCAN rises from a low potential to a high potential
  • the light emission control signal EM maintains a high potential
  • the light-emission control signal EM is lowered from a high potential to a low potential, the scan signal SCAN is still at a high potential, and the third thin film transistor T30 and the fifth thin film transistor T50 are turned on again, and the organic light-emitting diode is turned on. D10 starts to emit light.
  • the reference voltage Vref is turned on by the third thin film transistor T30 to make the second
  • the voltage of the node B0 drops to Vref, and the source voltage Vs of the first thin film transistor T10 is VDD at each stage.
  • I OLED 1/2Cox( ⁇ W/L)(Vgs+Vth) 2
  • I OLED is the current of the organic light emitting diode D10
  • ⁇ is the driving thin film crystal, that is, the carrier mobility of the first thin film transistor T10
  • W and L are the width and length of the channel of the driving thin film transistor, that is, the first thin film transistor T10, respectively.
  • Vgs is the gate-source voltage of the driving thin film transistor, that is, the first thin film transistor T10
  • Vth is the threshold voltage of the driving thin film transistor, that is, the first thin film transistor T10.
  • I OLED 1/2Cox( ⁇ W/L)( ⁇ V+Vref-Vdata) 2
  • the current flowing through the device LED D10 is independent of the threshold voltage Vth of the first thin film transistor T10, and the existing AMOLED pixel driving circuit realizes the compensation function.
  • the existing AMOLED pixel driving circuit needs to set two kinds of signals, such as a scan signal and an illumination control signal, to control the corresponding thin film transistors, which increases the number of signal traces and increases the load of the control IC, which is disadvantageous for cost saving.
  • Another object of the present invention is to provide a pixel driving method capable of reducing the number of control signals, simplifying the circuit structure, and reducing the cost.
  • the present invention first provides an AMOLED pixel driving circuit, including: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a second capacitor, and an organic light emitting diode.
  • Each thin film transistor is a P-type thin film transistor;
  • the first thin film transistor is a driving thin film transistor, the gate thereof is electrically connected to one end of the first capacitor via a first node, the source level is connected to a positive voltage of the power source, and the drain level is electrically connected to the anode of the organic light emitting diode;
  • the gate of the second thin film transistor is connected to the nth scan corresponding to the row of the pixel driving circuit a signal, the source is connected to the data signal, and the drain is electrically connected to the other end of the first capacitor via the second node;
  • the gate of the third thin film transistor is connected to the n+1th scan signal corresponding to the next row of the row of the pixel driving circuit, the source level is electrically connected to the second node, and the drain level is connected to the reference reference voltage;
  • the gate of the fourth thin film transistor is connected to the nth scan signal corresponding to the row of the pixel driving circuit, the source is electrically connected to the first node, and the drain is electrically connected to the anode of the organic light emitting diode;
  • One end of the first capacitor is electrically connected to the first node, and the other end is electrically connected to the second node;
  • One end of the second capacitor is electrically connected to the first node, and the other end is electrically connected to the positive voltage of the power source;
  • the anode of the organic light emitting diode is electrically connected to the drain of the first thin film crystal and the drain of the fourth thin film transistor, and the cathode is electrically connected to the negative voltage of the power supply.
  • the reference reference voltage is a constant voltage.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the scan signal is a pulse signal, and the falling edge of the n+1th scan signal is later than the rising edge of the nth scan signal.
  • the nth scan signal is combined with the n+1th scan signal, and corresponds to a threshold voltage sensing phase, a sustain phase, a programming phase, and an illumination phase;
  • the nth scan signal is low, and the n+1th scan signal is high;
  • the nth scan signal is high, and the n+1th scan signal is high;
  • the nth scan signal is high, and the n+1th scan signal is low;
  • the nth scan signal is at a high potential
  • the n+1th scan signal is at a high potential
  • the invention also provides an AMOLED pixel driving method, comprising the following steps:
  • Step 1 Providing an AMOLED pixel driving circuit
  • the AMOLED pixel driving circuit includes: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a second capacitor, and an organic light emitting diode; each of the thin film transistors is a P-type thin film transistor ;
  • the first thin film transistor is a driving thin film transistor, the gate thereof is electrically connected to one end of the first capacitor via a first node, the source level is connected to a positive voltage of the power source, and the drain level is electrically connected to the anode of the organic light emitting diode;
  • the gate of the second thin film transistor is connected to the nth scan signal corresponding to the row of the pixel driving circuit, the source is connected to the data signal, and the drain is electrically connected to the other end of the first capacitor via the second node;
  • the gate of the third thin film transistor is connected to the n+1th scan signal corresponding to the next row of the row of the pixel driving circuit, the source level is electrically connected to the second node, and the drain level is connected to the reference reference voltage;
  • the gate of the fourth thin film transistor is connected to the nth scan signal corresponding to the row of the pixel driving circuit, the source is electrically connected to the first node, and the drain is electrically connected to the anode of the organic light emitting diode;
  • One end of the first capacitor is electrically connected to the first node, and the other end is electrically connected to the second node;
  • One end of the second capacitor is electrically connected to the first node, and the other end is electrically connected to the positive voltage of the power source;
  • the anode of the organic light emitting diode is electrically connected to the drain of the first thin film crystal and the drain of the fourth thin film transistor, and the cathode is electrically connected to the negative voltage of the power supply;
  • Step 2 entering a threshold voltage sensing phase
  • the nth scan signal provides a low potential, the second thin film transistor and the fourth thin film transistor are turned on, the n+1th scan signal provides a high potential, and the third thin film transistor is turned off; the data signal is transmitted to the second node, the first The capacitor and the second capacitor start to be charged.
  • Step 3 Enter the maintenance phase
  • the nth scan signal provides a high potential
  • the second thin film transistor and the fourth thin film transistor are turned off
  • the n+1th scan signal provides a high potential
  • the third thin film transistor remains off
  • the first capacitor and the second capacitor begin to discharge.
  • ⁇ V1 represents the first voltage change caused by the coupling of the first capacitor and the second capacitor.
  • Step 4 enter the programming phase
  • the nth scan signal provides a high potential
  • the second thin film transistor and the fourth thin film transistor are turned off
  • the n+1th scan signal provides a low potential
  • the third thin film transistor is turned on
  • the reference voltage is transmitted to the second node
  • Vref represents a reference reference voltage
  • Vdata represents a data signal voltage
  • Step 5 entering the lighting stage
  • the nth scan signal provides a high potential
  • the second thin film transistor and the fourth thin film transistor are turned off
  • the n+1th scan signal provides a high potential
  • the third thin film transistor is turned off
  • the reference reference voltage is a constant voltage.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the present invention also provides an AMOLED pixel driving circuit, comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a second capacitor, and an organic light emitting diode; each of the thin film transistors a P-type thin film transistor;
  • the first thin film transistor is a driving thin film transistor, the gate thereof is electrically connected to one end of the first capacitor via a first node, the source level is connected to a positive voltage of the power source, and the drain level is electrically connected to the anode of the organic light emitting diode;
  • the gate of the second thin film transistor is connected to the nth scan signal corresponding to the row of the pixel driving circuit, the source is connected to the data signal, and the drain is electrically connected to the other end of the first capacitor via the second node;
  • the gate of the third thin film transistor is connected to the n+1th scan signal corresponding to the next row of the row of the pixel driving circuit, the source level is electrically connected to the second node, and the drain level is connected to the reference reference voltage;
  • the gate of the fourth thin film transistor is connected to the nth scan signal corresponding to the row of the pixel driving circuit, the source is electrically connected to the first node, and the drain is electrically connected to the anode of the organic light emitting diode;
  • One end of the first capacitor is electrically connected to the first node, and the other end is electrically connected to the second node;
  • One end of the second capacitor is electrically connected to the first node, and the other end is electrically connected to the positive voltage of the power source;
  • the anode of the organic light emitting diode is electrically connected to the drain of the first thin film crystal and the drain of the fourth thin film transistor, and the cathode is electrically connected to the negative voltage of the power supply;
  • the reference reference voltage is a constant voltage
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the invention has the beneficial effects that the AMOLED pixel driving circuit provided by the invention adopts the 4T2C structure, and only needs to set the scanning signal to control the corresponding thin film transistor, which not only compensates the pixel driving circuit of the existing 5T2C structure. , which reduces the number of control signals and simplifies the circuit structure and reduces the cost.
  • the invention provides an AMOLED pixel driving method, which can control the corresponding thin film transistor only by scanning signals, can reduce the number of control signals, simplify the circuit structure, and reduce the cost.
  • FIG. 1 is a circuit diagram of an existing 5T2C structure AMOLED pixel driving circuit
  • FIG. 2 is a timing diagram of the AMOLED pixel driving circuit shown in FIG. 1;
  • FIG. 3 is a schematic diagram of the AMOLED pixel driving circuit shown in FIG. 1 in an initialization phase
  • FIG. 4 is a schematic diagram of the AMOLED pixel driving circuit shown in FIG. 1 in a sampling phase
  • FIG. 5 is a schematic diagram of the AMOLED pixel driving circuit shown in FIG. 1 in a holding phase
  • FIG. 6 is a schematic diagram of the AMOLED pixel driving circuit shown in FIG. 1 in an illuminating phase
  • FIG. 7 is a circuit diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 8 is a timing diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 9 is a schematic diagram of a AMOLED pixel driving circuit of the present invention in a threshold voltage sensing phase and a schematic diagram of step 2 of the AMOLED pixel driving method of the present invention;
  • FIG. 10 is a schematic diagram of the AMOLED pixel driving circuit of the present invention in a holding phase and a schematic diagram of step 3 of the AMOLED pixel driving method of the present invention
  • FIG. 11 is a schematic diagram of an AMOLED pixel driving circuit of the present invention in a programming stage and a schematic diagram of step 4 of the AMOLED pixel driving method of the present invention
  • FIG. 12 is a schematic diagram of an AMOLED pixel driving circuit of the present invention in an illuminating phase and a schematic diagram of step 5 of the AMOLED pixel driving method of the present invention;
  • FIG. 13 is a schematic diagram showing the effect of the AMOLED pixel driving circuit for compensating the threshold voltage of the driving thin film transistor.
  • the present invention first provides an AMOLED pixel driving circuit.
  • the AMOLED pixel driving circuit is a 4T2C structure, and includes: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a first capacitor C1, a second capacitor C2, and an organic light emitting diode D1.
  • Each of the thin film transistors is a P-type thin film transistor.
  • the first thin film transistor T1 is a driving thin film transistor, and its gate is electrically connected via the first node A Connected to one end of the first capacitor C1, the source stage is connected to the power supply positive voltage VDD, the drain level is electrically connected to the anode of the organic light emitting diode D1; the gate of the second thin film transistor T2 is connected to the row corresponding to the pixel driving circuit.
  • the nth scan signal SCAN(n), the source level access data signal data, the drain is electrically connected to the other end of the first capacitor C1 via the second node B; the gate of the third thin film transistor T3 is connected to the pixel drive
  • the n+1th scan signal SCAN(n+1) corresponding to the next row of the row of the circuit, the source level is electrically connected to the second node B, the drain level is connected to the reference reference voltage Vref; and the gate of the fourth thin film transistor T4 Accessing the nth scan signal SCAN(n) corresponding to the row of the pixel driving circuit, the source is electrically connected to the first node A, and the drain is electrically connected to the anode of the organic light emitting diode D1; one end of the first capacitor C1 Electrically connected to the first node A, the other end is electrically connected to the second node B; one end of the second capacitor C2 is electrically connected to the first node A, and the other end is electrically connected to the power supply positive voltage V
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4 are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the reference reference voltage Vref is a constant voltage; let n be a positive integer, and the nth scan signal SCAN(n) and the n+1th scan signal SCAN(n+1) are The same timing controller outputs the scanning signals in the adjacent order, the nth row pixel driving circuit cascades the n+1th row pixel driving circuit, and the nth scanning signal SCAN(n) turns on the scanning of the nth row pixel driving circuit The n+1th scan signal SCAN(n+1) turns on the scanning of the n+1th row pixel driving circuit.
  • the scan signal is a pulse signal, but it is worth noting that the falling edge of the n+1th scan signal SCAN(n+1) is usually set at the same time as the rising edge of the nth scan signal SCAN(n). Differently, in the present invention, the falling edge of the n+1th scanning signal SCAN(n+1) is later than the rising edge of the nth scanning signal SCAN(n), and the combination of the two controls the pixel driving circuit, according to the timing Corresponding to a threshold voltage sensing phase 1, a holding phase 2, a programming phase 3, and a lighting phase 4.
  • the nth scan signal SCAN(n) is at a low potential, and the second thin film transistor T2 is controlled by the nth scan signal SCAN(n). Conducted with the fourth thin film transistor T4, the n+1th scan signal SCAN(n+1) is at a high potential, and the third thin film transistor T3 controlled by the n+1th scan signal SCAN(n+1) is turned off;
  • the signal data is transmitted to the second node B via the turned-on second thin film transistor T2, so that the voltage of the second node B is the data signal voltage Vdata; the first capacitor C1 and the second capacitor C2 start to be charged, because the fourth thin film transistor T4 leads Pass, the voltage of the first node A is the gate voltage of the first thin film transistor T1 Vg is:
  • Vg VDD-f(Vth) (1)
  • VDD represents a positive voltage of the power source
  • Vth represents a threshold voltage of the driving thin film transistor, that is, the first thin film transistor T1
  • f(Vth) is a function of Vth, and represents a first thin film transistor T1, a fourth thin film transistor T4, and an organic light emitting diode.
  • the source voltage Vs of the first thin film transistor T1 is VDD.
  • the nth scan signal SCAN(n) transitions to a high potential, and the second thin film transistor T2 and the fourth thin film transistor T4 are turned off, and the n+1th scan signal SCAN ( n+1) remains high, the third thin film transistor T3 remains off, the first capacitor C1 and the second capacitor C2 start to discharge and are coupled to each other;
  • the voltage of the first node A that is, the gate voltage of the first thin film transistor T1 is:
  • Vg VDD-f(Vth)+ ⁇ V1 (2)
  • ⁇ V1 represents the first voltage change amount due to the coupling action of the first capacitor C1 and the second capacitor C2;
  • the voltage of the second node B located at the other end of the first capacitor C1 varies correspondingly with the first node A by ⁇ V1.
  • the nth scan signal SCAN(n) is still at a high potential
  • the second thin film transistor T2 and the fourth thin film transistor T4 are turned off
  • the n+1th scan signal SCAN ( n+1) transitions to a low potential
  • the third thin film transistor T3 is turned on;
  • the reference reference voltage Vref is transmitted to the second node B via the turned-on third thin film transistor T3, and the voltage of the first node A at one end of the first capacitor C1 That is, the gate voltage of the first thin film transistor T1 is:
  • Vg VDD-f(Vth)+ ⁇ V1+Vref-Vdata (3)
  • Vref represents a reference reference voltage
  • Vdata represents a data signal voltage
  • the n-th scan signal SCAN(n) is still at a high potential, and the second thin film transistor T2 and the fourth thin film transistor T4 are turned off, and the n+1th scan signal (SCAN) (n+1)) transitions to a high potential, the third thin film transistor T3 is turned off; the first capacitor C1 and the second capacitor C2 are again discharged and coupled to each other, and the voltage of the first node A, that is, the gate voltage of the first thin film transistor T1 is :
  • Vg VDD-f(Vth)+ ⁇ V1+Vref-Vdata+ ⁇ V2 (4)
  • ⁇ V2 represents the second voltage change amount due to the coupling action of the first capacitor C1 and the second capacitor C2;
  • the source voltage of the first thin film transistor T1 is:
  • Vs VDD (5)
  • the voltage of the second node B located at the other end of the first capacitor C1 changes correspondingly with the first node A by ⁇ V2;
  • the organic light emitting diode D1 emits light.
  • I OLED 1/2Cox( ⁇ W/L)(Vgs+Vth) 2 (6)
  • I OLED is the current of the organic light emitting diode D1
  • ⁇ is the driving thin film crystal, that is, the carrier mobility of the first thin film transistor T1
  • W and L are respectively the width and length of the channel of the driving thin film transistor, that is, the first thin film transistor T1.
  • Vgs is the gate-source voltage of the driving thin film transistor, that is, the first thin film transistor T1
  • Vth is the threshold voltage of the driving thin film transistor, that is, the first thin film transistor T1.
  • I OLED 1/2Cox( ⁇ W/L)( ⁇ V1+Vref-Vdata+ ⁇ V2+Vth-f(Vth)) 2 (8)
  • the AMOLED pixel driving circuit of the present invention eliminates the thin film transistor connected between the driving thin film transistor and the anode of the organic light emitting diode, by the nth strip Scanning signal SCAN(n) controls second thin film transistor T2 and fourth thin film transistor T4, and replaces light-emitting control signal EM in the prior art by n+1th scan signal SCAN(n+1) to control third thin film transistor T3, that is, only need to set the scan signal to control the corresponding thin film transistor, which not only compensates, but also reduces the number of control signals, and simplifies the circuit structure and reduces the cost.
  • the present invention further provides an AMOLED pixel driving method, comprising the following steps:
  • Step 1 Provide an AMOLED pixel driving circuit.
  • the AMOLED pixel driving circuit includes: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a first capacitor C1, a second capacitor C2, and an organic Light-emitting diode D1.
  • Each of the thin film transistors is a P-type thin film transistor.
  • the first thin film transistor T1 is a driving thin film transistor, and its gate is electrically connected via the first node A Connected to one end of the first capacitor C1, the source stage is connected to the power supply positive voltage VDD, the drain level is electrically connected to the anode of the organic light emitting diode D1; the gate of the second thin film transistor T2 is connected to the row corresponding to the pixel driving circuit.
  • the nth scan signal SCAN(n), the source level access data signal data, the drain is electrically connected to the other end of the first capacitor C1 via the second node B; the gate of the third thin film transistor T3 is connected to the pixel drive
  • the n+1th scan signal SCAN(n+1) corresponding to the next row of the row of the circuit, the source level is electrically connected to the second node B, the drain level is connected to the reference reference voltage Vref; and the gate of the fourth thin film transistor T4 Accessing the nth scan signal SCAN(n) corresponding to the row of the pixel driving circuit, the source is electrically connected to the first node A, and the drain is electrically connected to the anode of the organic light emitting diode D1; one end of the first capacitor C1 Electrically connected to the first node A, the other end is electrically connected to the second node B; one end of the second capacitor C2 is electrically connected to the first node A, and the other end is electrically connected to the power supply positive voltage V
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4 are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the reference reference voltage Vref is a constant voltage; let n be a positive integer, and the nth scan signal SCAN(n) and the n+1th scan signal SCAN(n+1) are The same timing controller outputs the scanning signals in the adjacent order, the nth row pixel driving circuit cascades the n+1th row pixel driving circuit, and the nth scanning signal SCAN(n) turns on the scanning of the nth row pixel driving circuit The n+1th scan signal SCAN(n+1) turns on the scanning of the n+1th row pixel driving circuit.
  • the scan signal is a pulse signal, but it is worth noting that the falling edge of the n+1th scan signal SCAN(n+1) is usually set at the same time as the rising edge of the nth scan signal SCAN(n). Differently, in the present invention, the falling edge of the n+1th scanning signal SCAN(n+1) is later than the rising edge of the nth scanning signal SCAN(n).
  • Step 2 Enter threshold voltage sensing phase 1.
  • the nth scan signal SCAN(n) provides a low potential
  • the second thin film transistor T2 and the fourth thin film transistor T4 controlled by the nth scan signal SCAN(n) are turned on
  • the strip scan signal SCAN(n+1) provides a high potential
  • the third thin film transistor T3 controlled by the n+1th scan signal SCAN(n+1) is turned off;
  • the data signal data is transmitted to the second thin film transistor T2 which is turned on to
  • the second node B causes the voltage of the second node B to be the data signal voltage Vdata;
  • the first capacitor C1 and the second capacitor C2 start to charge, and the voltage of the first node A is the first thin film transistor because the fourth thin film transistor T4 is turned on.
  • the gate voltage Vg of T1 is:
  • Vg VDD-f(Vth) (1)
  • VDD represents a positive voltage of the power source
  • Vth represents a threshold voltage of the driving thin film transistor, that is, the first thin film transistor T1
  • f(Vth) is a function of Vth, and represents a first thin film transistor T1, a fourth thin film transistor T4, and an organic light emitting diode.
  • the source voltage Vs of the first thin film transistor T1 is VDD.
  • Step 3 Enter the hold phase 2.
  • the nth scan signal SCAN(n) provides a high potential
  • the second thin film transistor T2 and the fourth thin film transistor T4 are turned off
  • the n+1th scan signal SCAN(n+1) is kept at a high potential.
  • the third thin film transistor T3 is kept off, and the first capacitor C1 and the second capacitor C2 are discharged and coupled to each other; the voltage of the first node A, that is, the gate voltage of the first thin film transistor T1 is:
  • Vg VDD-f(Vth)+ ⁇ V1 (2)
  • ⁇ V1 represents the first voltage change amount due to the coupling action of the first capacitor C1 and the second capacitor C2;
  • the voltage of the second node B located at the other end of the first capacitor C1 varies correspondingly with the first node A by ⁇ V1.
  • Step 4 Enter programming phase 3.
  • the nth scan signal SCAN(n) provides a high potential
  • the second thin film transistor T2 and the fourth thin film transistor T4 are turned off
  • the n+1th scan signal SCAN(n+1) provides a low potential.
  • the third thin film transistor T3 is turned on; the reference reference voltage Vref is transmitted to the second node B via the turned-on third thin film transistor T3, and the voltage of the first node A at one end of the first capacitor C1 is the gate of the first thin film transistor T1.
  • the voltage is:
  • Vg VDD-f(Vth)+ ⁇ V1+Vref-Vdata (3)
  • Vref represents a reference reference voltage
  • Vdata represents a data signal voltage
  • Step 5 enter the lighting stage 4.
  • the nth scan signal SCAN(n) provides a high potential
  • the second thin film transistor T2 and the fourth thin film transistor T4 are turned off
  • the n+1th scan signal (SCAN(n+1)) provides high.
  • the third thin film transistor T3 is turned off; the first capacitor C1 and the second capacitor C2 are discharged again and coupled to each other, and the voltage of the first node A, that is, the gate voltage of the first thin film transistor T1 is:
  • Vg VDD-f(Vth)+ ⁇ V1+Vref-Vdata+ ⁇ V2 (4)
  • ⁇ V2 represents the second voltage change amount due to the coupling action of the first capacitor C1 and the second capacitor C2;
  • the source voltage of the first thin film transistor T1 is:
  • Vs VDD (5)
  • the voltage of the second node B located at the other end of the first capacitor C1 changes correspondingly with the first node A by ⁇ V2;
  • the organic light emitting diode D1 emits light.
  • I OLED 1/2Cox( ⁇ W/L)(Vgs+Vth) 2 (6)
  • I OLED is the current of the organic light emitting diode D1
  • ⁇ is the driving thin film crystal, that is, the carrier mobility of the first thin film transistor T1
  • W and L are respectively the width and length of the channel of the driving thin film transistor, that is, the first thin film transistor T1.
  • Vgs is the gate-source voltage of the driving thin film transistor, that is, the first thin film transistor T1
  • Vth is the threshold voltage of the driving thin film transistor, that is, the first thin film transistor T1.
  • I OLED 1/2Cox( ⁇ W/L)( ⁇ V1+Vref-Vdata+ ⁇ V2+Vth-f(Vth)) 2 (8)
  • the AMOLED pixel driving method of the present invention adopts a pixel driving circuit of a 4T2C structure, and controls the second thin film transistor T2 and the fourth thin film transistor T4 by using the nth scanning signal SCAN(n), and adopts the n+1th scanning signal SCAN(n).
  • the third thin film transistor T3 is controlled, that is, the corresponding thin film transistor is controlled only by the scan signal, which not only compensates but also reduces the number of control signals and simplifies the circuit structure. ,Reduce costs.
  • the AMOLED pixel driving circuit provided by the present invention adopts a 4T2C structure. Compared with the existing pixel driving circuit of the 5T2C structure, only the scanning signal needs to be set to control the corresponding thin film transistor, which not only compensates, but also plays a compensating role. It also reduces the number of control signals and simplifies the circuit structure and reduces the cost.
  • the invention provides an AMOLED pixel driving method, which can control the corresponding thin film transistor only by scanning signals, can reduce the number of control signals, simplify the circuit structure, and reduce the cost.

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Abstract

一种AMOLED像素驱动电路及像素驱动方法。该AMOLED像素驱动电路采用4T2C结构，包括：第一薄膜晶体管(T1)、第二薄膜晶体管(T2)、第三薄膜晶体管(T3)、第四薄膜晶体管(T4)、第一电容(C1)、第二电容(C2)、及有机发光二极管(D1)，通过对第n条扫描信号(SCAN(n))与第n+1条扫描信号(SCAN(n+1))相组合，先后对应于一阈值电压感测阶段（1）、一保持阶段（2）、一编程阶段（3）及一发光阶段（4），相比于现有的5T2C结构的像素驱动电路，仅需要设置扫描信号来控制相应的薄膜晶体管，既起到了补偿作用，又减少了控制信号数量，且简化了电路结构，降低了成本。

Description

AMOLED像素驱动电路及像素驱动方法 技术领域
本发明涉及OLED显示技术领域，尤其涉及一种AMOLED像素驱动电路及像素驱动方法。
背景技术
有机发光二极管(Organic Light Emitting Display，OLED)显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示装置。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)两大类，即直接寻址和薄膜晶体管(Thin Film Transistor，TFT)矩阵寻址两类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。
AMOLED是电流驱动器件，当有电流流过有机发光二极管时，有机发光二极管发光，且发光亮度由流过有机发光二极管自身的电流决定。大部分已有的集成电路(Integrated Circuit，IC)都只传输电压信号，故AMOLED的像素驱动电路需要完成将电压信号转变为电流信号的任务。传统的AMOLED像素驱动电路通常为2T1C，即两个薄膜晶体管加一个电容的结构，将电压变换为电流，但传统2T1C像素驱动电路中驱动薄膜晶体管的阈值电压会随着工作时间而漂移，从而导致有机发光二极管的发光不稳定，导致各个像素间的发光不均匀、亮度不一。
解决AMOLED显示亮度不均匀的主要方法是对像素驱动电路进行改进，加入补偿功能，使流经有机发光二极管的电流受驱动薄膜晶体管阈值电压变化的影响较小。
如图1所示，现有的一种具有补偿功能的AMOLED像素驱动电路采用5T2C结构，即五个薄膜晶体管加两个电容的结构，包括：第一薄膜晶体管T10、第二薄膜晶体管T20、第三薄膜晶体管T30、第四薄膜晶体管T40、第五薄膜晶体管T50、第一电容C10、第二电容C20、及有机发光二极管D10，各个薄膜晶体管均为P型薄膜晶体管。具体地，第一薄膜晶体管T10为驱动薄膜晶体管，其栅极经由第一节点A0电性连接第一电容C10的一 端，源级接入电源正电压VDD，漏级电性连接第五薄膜晶体管T50的源级；第二薄膜晶体管T20的栅极接入扫描信号SCAN，源级接入数据信号data，漏级经由第二节点B0电性连接第一电容C10的另一端；第三薄膜晶体管T30的栅极接入发光控制信号EM，源级接入基准参考电压Vref，漏级电性连接于第二节点B0；第四薄膜晶体管T40的栅极接入扫描信号SCAN，源级电性连接于第一节点A0，漏级电性连接于第一薄膜晶体管T10的漏级及第五薄膜晶体管T50的源级；第五薄膜晶体管T50的栅极接入发光控制信号EM，源级电性连接于第一薄膜晶体管T10的漏级及第四薄膜晶体管T40的漏级，漏级电性连接于有机发光二极管D10的阳极；第一电容C10的一端电性连接第一节点A0，另一端电性连接第二节点B0；第二电容C20的一端电性连接第一节点A0，另一端接入电源正电压VDD；有机发光二极管D10的阳极电性连接于第五薄膜晶体管T50的漏级，阴极接入电源负电压VSS。
图2为图1所示现有5T2C结构的AMOLED像素驱动电路所对应的时序图，该AMOLED像素驱动电路的工作过程按照时序依次分为四个阶段：初始化阶段10、阈值电压采样阶段20、保持阶段30、及发光阶段40。结合图2和图3，在初始化阶段10，扫描信号SCAN提供低电位，受扫描信号SCAN控制的第二薄膜晶体管T20和第四薄膜晶体管T40导通，发光控制信号EM提供低电位，受发光控制信号EM控制的第三薄膜晶体管T30和第五薄膜晶体管T50导通，数据信号data经导通的第二薄膜晶体管T20传输至第二节点B0，并对第一电容C10充电，使得第二节点B0的电压为数据信号电压Vdata，该阶段由于第四薄膜晶体管T40与第五薄膜晶体管T50均导通，第一节点A0的电压即第一薄膜晶体管T10的栅极电压Vg＝VOLED，VOLED为有机发光二级管D10的阳极电压。结合图2和图4，在阈值电压采样阶段20，扫描信号SCAN仍提供低电位，发光控制信号EM由低电位上升至高电位，第三薄膜晶体管T30和第五薄膜晶体管T50截止，第一节点A0的电压即第一薄膜晶体管T10的栅极电压Vg变化至VDD-Vth，Vth为第一薄膜晶体管T10的阈值电压。结合图2和图5，在保持阶段30，扫描信号SCAN由低电位上升至高电位，发光控制信号EM保持高电位，第二薄膜晶体管T20和第四薄膜晶体管T40也截止，在第一电容C10与第二电容C20的耦合作用下，第一节点A0和第二节点B0的电压均上升ΔV，相应的，第一薄膜晶体管T10的栅极电压Vg＝VDD-Vth+ΔV。结合图2和图6，在发光阶段40，发光控制信号EM由高电位下降至低电位，扫描信号SCAN仍为高电位，第三薄膜晶体管T30和第五薄膜晶体管 T50再次导通，有机发光二极管D10开始发光，此时第一节点A0的电压即第一薄膜晶体管T10的栅极电压Vg＝VDD-Vth+ΔV+Vref-Vdata，基准参考电压Vref经导通的第三薄膜晶体管T30使得第二节点B0的电压下降至Vref，第一薄膜晶体管T10的源极电压Vs在各个阶段均为VDD，该发光阶段第一薄膜晶体管T1的栅源极电压Vgs＝Vg-Vs＝VDD-Vth+ΔV+Vref-Vdata-VDD。已知当驱动薄膜晶体管为P型薄膜晶体管时计算流经有机发光二极管的电流的公式为：
IOLED＝1/2Cox(μW/L)(Vgs+Vth)2
其中IOLED为有机发光二极管D10的电流、μ为驱动薄膜晶体即第一薄膜晶体管T10的载流子迁移率、W和L分别为驱动薄膜晶体管即第一薄膜晶体管T10的沟道的宽度和长度、Vgs为驱动薄膜晶体管即第一薄膜晶体管T10的栅源极电压、Vth为驱动薄膜晶体管即第一薄膜晶体管T10的阈值电压。
将Vgs＝VDD-Vth+ΔV+Vref-Vdata–VDD代入电流计算公式，则有：
IOLED＝1/2Cox(μW/L)(ΔV+Vref-Vdata)2
由此可见，流经机发光二极管D10的电流与第一薄膜晶体管T10的阈值电压Vth无关，该现有的AMOLED像素驱动电路实现了补偿功能。
然而，该现有的AMOLED像素驱动电路需要设置扫描信号、及发光控制信号这两种信号来控制相应的薄膜晶体管，增加了信号走线的数量，加重了控制IC的负载，不利于节省成本。
发明内容
本发明的目的在于提供一种AMOLED像素驱动电路，能够减少控制信号数量，简化电路结构，降低成本。
本发明的另一目的在于提供一种像素驱动方法，能够使得控制信号数量减少，电路结构简化，成本降低。
为实现上述目的，本发明首先提供一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第一电容、第二电容、及有机发光二极管；各个薄膜晶体管均为P型薄膜晶体管；
所述第一薄膜晶体管为驱动薄膜晶体管，其栅极经由第一节点电性连接于第一电容的一端，源级接入电源正电压，漏级电性连接于有机发光二极管的阳极；
第二薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描 信号，源级接入数据信号，漏极经由第二节点电性连接于第一电容的另一端；
第三薄膜晶体管的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号，源级电性连接于第二节点，漏级接入基准参考电压；
第四薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级电性连接于第一节点，漏极电性连接于有机发光二极管的阳极；
第一电容的一端电性连接于第一节点，另一端电性连接于第二节点；
第二电容的一端电性连接于第一节点，另一端电性连接于电源正电压；
有机发光二极管的阳极电性连接于第一薄膜晶体的漏级和第四薄膜晶体管的漏级，阴极电性连接于电源负电压。
所述基准参考电压为一恒定电压。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、及第四薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
扫描信号为脉冲信号，所述第n+1条扫描信号的下降沿晚于第n条扫描信号的上升沿。
所述第n条扫描信号与第n+1条扫描信号相组合，先后对应于一阈值电压感测阶段、一保持阶段、一编程阶段、及一发光阶段；
在所述阈值电压感测阶段，第n条扫描信号为低电位，第n+1条扫描信号为高电位；
在所述保持阶段，第n条扫描信号为高电位，第n+1条扫描信号为高电位；
在所述编程阶段，第n条扫描信号为高电位，第n+1条扫描信号为低电位；
在所述发光阶段，第n条扫描信号为高电位，第n+1条扫描信号为高电位。
本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一AMOLED像素驱动电路；
所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第一电容、第二电容、及有机发光二极管；各个薄膜晶体管均为P型薄膜晶体管；
所述第一薄膜晶体管为驱动薄膜晶体管，其栅极经由第一节点电性连接于第一电容的一端，源级接入电源正电压，漏级电性连接于有机发光二极管的阳极；
第二薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级接入数据信号，漏极经由第二节点电性连接于第一电容的另一端；
第三薄膜晶体管的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号，源级电性连接于第二节点，漏级接入基准参考电压；
第四薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级电性连接于第一节点，漏极电性连接于有机发光二极管的阳极；
第一电容的一端电性连接于第一节点，另一端电性连接于第二节点；
第二电容的一端电性连接于第一节点，另一端电性连接于电源正电压；
有机发光二极管的阳极电性连接于第一薄膜晶体的漏级和第四薄膜晶体管的漏级，阴极电性连接于电源负电压；
步骤2、进入阈值电压感测阶段；
所述第n条扫描信号提供低电位，第二薄膜晶体管和第四薄膜晶体管导通，第n+1条扫描信号提供高电位，第三薄膜晶体管截止；数据信号传输至第二节点，第一电容与第二电容开始充电，第一节点的电压即第一薄膜晶体管的栅极电压Vg＝VDD-f(Vth)，VDD表示电源正电压，Vth表示第一薄膜晶体管的阈值电压，f(Vth)是关于Vth的函数，表示第一薄膜晶体管、第四薄膜晶体管、及有机发光二极管达到电流平衡时有机发光二极管的阳极电压；
步骤3、进入保持阶段；
所述第n条扫描信号提供高电位，第二薄膜晶体管和第四薄膜晶体管截止，第n+1条扫描信号提供高电位，第三薄膜晶体管保持截止，第一电容与第二电容开始放电并相互耦合，第一节点的电压即第一薄膜晶体管的栅极电压为Vg＝VDD-f(Vth)+ΔV1，ΔV1表示由于第一电容与第二电容的耦合作用引起的第一次电压变化量；
步骤4、进入编程阶段；
所述第n条扫描信号提供高电位，第二薄膜晶体管和第四薄膜晶体管截止，第n+1条扫描信号提供低电位，第三薄膜晶体管导通，基准参考电压传输至第二节点，第一节点的电压即第一薄膜晶体管的栅极电压为Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata，Vref表示基准参考电压，Vdata表示数据信号电压；
步骤5、进入发光阶段；
所述第n条扫描信号提供高电位，第二薄膜晶体管和第四薄膜晶体管截止，第n+1条扫描信号提供高电位，第三薄膜晶体管截止，第一电容与 第二电容再次放电并相互耦合，第一节点的电压即第一薄膜晶体管的栅极电压为Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata+ΔV2，ΔV2表示由于第一电容与第二电容的耦合作用引起的第二次电压变化量；有机发光二极管发光。
所述基准参考电压为一恒定电压。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、及第四薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
本发明还提供一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第一电容、第二电容、及有机发光二极管；各个薄膜晶体管均为P型薄膜晶体管；
所述第一薄膜晶体管为驱动薄膜晶体管，其栅极经由第一节点电性连接于第一电容的一端，源级接入电源正电压，漏级电性连接于有机发光二极管的阳极；
第二薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级接入数据信号，漏极经由第二节点电性连接于第一电容的另一端；
第三薄膜晶体管的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号，源级电性连接于第二节点，漏级接入基准参考电压；
第四薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级电性连接于第一节点，漏极电性连接于有机发光二极管的阳极；
第一电容的一端电性连接于第一节点，另一端电性连接于第二节点；
第二电容的一端电性连接于第一节点，另一端电性连接于电源正电压；
有机发光二极管的阳极电性连接于第一薄膜晶体的漏级和第四薄膜晶体管的漏级，阴极电性连接于电源负电压；
其中，所述基准参考电压为一恒定电压；
其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、及第四薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
本发明的有益效果：本发明提供的一种AMOLED像素驱动电路采用4T2C结构，相比于现有的5T2C结构的像素驱动电路，仅需要设置扫描信号来控制相应的薄膜晶体管，既起到了补偿作用，又减少了控制信号数量，且简化了电路结构，降低了成本。本发明提供的一种AMOLED像素驱动方法，仅通过扫描信号来控制相应的薄膜晶体管，能够使得控制信号数量减少，电路结构简化，成本降低。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的5T2C结构的AMOLED像素驱动电路的电路图；
图2为图1所示AMOLED像素驱动电路的时序图；
图3为图1所示AMOLED像素驱动电路在初始化阶段的示意图；
图4为图1所示AMOLED像素驱动电路在采样阶段的示意图；
图5为图1所示AMOLED像素驱动电路在保持阶段的示意图；
图6为图1所示AMOLED像素驱动电路在发光阶段的示意图；
图7为本发明的AMOLED像素驱动电路的电路图；
图8为本发明的AMOLED像素驱动电路的时序图；
图9为本发明的AMOLED像素驱动电路在阈值电压感测阶段的示意图暨本发明的AMOLED像素驱动方法的步骤2的示意图；
图10为本发明的AMOLED像素驱动电路在保持阶段的示意图暨本发明的AMOLED像素驱动方法的步骤3的示意图；
图11为本发明的AMOLED像素驱动电路在编程阶段的示意图暨本发明的AMOLED像素驱动方法的步骤4的示意图；
图12为本发明的AMOLED像素驱动电路在发光阶段的示意图暨本发明的AMOLED像素驱动方法的步骤5的示意图；
图13为本发明的AMOLED像素驱动电路对驱动薄膜晶体管的阈值电压进行补偿的效果示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请同时参阅图7与图8，本发明首先提供一种AMOLED像素驱动电路。该AMOLED像素驱动电路为4T2C结构，包括：第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4、第一电容C1、第二电容C2、及有机发光二极管D1。各个薄膜晶体管均为P型薄膜晶体管。
所述第一薄膜晶体管T1为驱动薄膜晶体管，其栅极经由第一节点A电 性连接于第一电容C1的一端，源级接入电源正电压VDD，漏级电性连接于有机发光二极管D1的阳极；第二薄膜晶体管T2的栅极接入该像素驱动电路所在行对应的第n条扫描信号SCAN(n)，源级接入数据信号data，漏极经由第二节点B电性连接于第一电容C1的另一端；第三薄膜晶体管T3的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号SCAN(n+1)，源级电性连接于第二节点B，漏级接入基准参考电压Vref；第四薄膜晶体管T4的栅极接入该像素驱动电路所在行对应的第n条扫描信号SCAN(n)，源级电性连接于第一节点A，漏极电性连接于有机发光二极管D1的阳极；第一电容C1的一端电性连接于第一节点A，另一端电性连接于第二节点B；第二电容C2的一端电性连接于第一节点A，另一端电性连接于电源正电压VDD；有机发光二极管D1的阳极电性连接于第一薄膜晶体T1的漏级和第四薄膜晶体管T4的漏级，阴极电性连接于电源负电压VSS。
具体地，所述第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、及第四薄膜晶体管T4均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
如图8所示，所述基准参考电压Vref为一恒定电压；设n为正整数，所述第n条扫描信号SCAN(n)与第n+1条扫描信号SCAN(n+1)是由同一时序控制器按先后相邻次序输出的扫描信号，第n行像素驱动电路级联第n+1行像素驱动电路，第n条扫描信号SCAN(n)开启对第n行像素驱动电路的扫描，第n+1条扫描信号SCAN(n+1)开启对第n+1行像素驱动电路的扫描。
所述扫描信号为脉冲信号，但值得注意的是，与现有技术通常设置第n+1条扫描信号SCAN(n+1)的下降沿与第n条扫描信号SCAN(n)的上升沿同时产生不同，本发明中第n+1条扫描信号SCAN(n+1)的下降沿晚于第n条扫描信号SCAN(n)的上升沿，二者相组合对像素驱动电路进行控制，按时序先后对应于一阈值电压感测阶段1、一保持阶段2、一编程阶段3、及一发光阶段4。
进一步地，结合图8与图9，在所述阈值电压感测阶段1，第n条扫描信号SCAN(n)为低电位，受第n条扫描信号SCAN(n)控制的第二薄膜晶体管T2与第四薄膜晶体管T4导通，第n+1条扫描信号SCAN(n+1)为高电位，受第n+1条扫描信号SCAN(n+1)控制的第三薄膜晶体管T3截止；数据信号data经导通的第二薄膜晶体管T2传输至第二节点B，使第二节点B的电压为数据信号电压Vdata；第一电容C1与第二电容C2开始充电，由于第四薄膜晶体管T4导通，第一节点A的电压即第一薄膜晶体管T1的栅极电压 Vg为：
Vg＝VDD-f(Vth)   (1)
其中，VDD表示电源正电压，Vth表示驱动薄膜晶体管即第一薄膜晶体管T1的阈值电压，f(Vth)是关于Vth的函数，表示第一薄膜晶体管T1、第四薄膜晶体管T4、及有机发光二极管D1达到电流平衡时有机发光二极管D1的阳极电压；
第一薄膜晶体管T1的源极电压Vs＝VDD。
结合图8与图10，在所述保持阶段2，第n条扫描信号SCAN(n)转变为高电位，第二薄膜晶体管T2与第四薄膜晶体管T4截止，第n+1条扫描信号SCAN(n+1)保持高电位，第三薄膜晶体管T3保持截止，第一电容C1与第二电容C2开始放电并相互耦合；第一节点A的电压即第一薄膜晶体管T1的栅极电压为：
Vg＝VDD-f(Vth)+ΔV1   (2)
其中，ΔV1表示由于第一电容C1与第二电容C2的耦合作用引起的第一次电压变化量；
第一薄膜晶体管T1的源极电压为Vs＝VDD；
位于第一电容C1另一端的第二节点B的电压随着第一节点A相应变化ΔV1。
结合图8与图11，在所述编程阶段3，第n条扫描信号SCAN(n)仍为高电位，第二薄膜晶体管T2与第四薄膜晶体管T4截止，第n+1条扫描信号SCAN(n+1)转变为低电位，第三薄膜晶体管T3导通；基准参考电压Vref经由导通的第三薄膜晶体管T3传输至第二节点B，位于第一电容C1一端的第一节点A的电压即第一薄膜晶体管T1的栅极电压为：
Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata   (3)
其中，Vref表示基准参考电压，Vdata表示数据信号电压；
第一薄膜晶体管T1的源极电压为Vs＝VDD。
结合图8与图12，在所述发光阶段4，第n条扫描信号SCAN(n)仍为高电位，第二薄膜晶体管T2与第四薄膜晶体管T4截止，第n+1条扫描信号(SCAN(n+1))转变为高电位，第三薄膜晶体管T3截止；第一电容C1与第二电容C2再次放电并相互耦合，第一节点A的电压即第一薄膜晶体管T1的栅极电压为：
Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata+ΔV2   (4)
其中，ΔV2表示由于第一电容C1与第二电容C2的耦合作用引起的第二次电压变化量；
第一薄膜晶体管T1的源极电压为：
Vs＝VDD   (5)
位于第一电容C1另一端的第二节点B的电压随着第一节点A相应变化ΔV2；
有机发光二极管D1发光。
已知当驱动薄膜晶体管为P型薄膜晶体管时计算流经有机发光二极管的电流的公式为：
IOLED＝1/2Cox(μW/L)(Vgs+Vth)2   (6)
其中IOLED为有机发光二极管D1的电流、μ为驱动薄膜晶体即第一薄膜晶体管T1的载流子迁移率、W和L分别为驱动薄膜晶体管即第一薄膜晶体管T1的沟道的宽度和长度、Vgs为驱动薄膜晶体管即第一薄膜晶体管T1的栅源极电压、Vth为驱动薄膜晶体管即第一薄膜晶体管T1的阈值电压。
Vgs＝Vg-Vs＝VDD-f(Vth)+ΔV1+Vref-Vdata+ΔV2-VDD
＝ΔV1+Vref-Vdata+ΔV2-f(Vth)   (7)
将(7)式代入(6)式得：
IOLED＝1/2Cox(μW/L)(ΔV1+Vref-Vdata+ΔV2+Vth-f(Vth))2   (8)
如图13所示，由于-f(Vth)抵消掉了部分Vth，使得流经机发光二极管D1的电流受第一薄膜晶体管T1的阈值电压Vth的影响较小，实现了补偿功能。
相比与图1所示现有的5T2C结构的AMOLED像素驱动电路，本发明的AMOLED像素驱动电路省掉了连接于驱动薄膜晶体管与有机发光二极管阳极之间的那颗薄膜晶体管，由第n条扫描信号SCAN(n)来控制第二薄膜晶体管T2与第四薄膜晶体管T4，由第n+1条扫描信号SCAN(n+1)取代现有技术中的发光控制信号EM来控制第三薄膜晶体管T3，即仅需要设置扫描信号来控制相应的薄膜晶体管，既起到了补偿作用，又减少了控制信号数量，且简化了电路结构，降低了成本。
基于同一发明构思，本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一AMOLED像素驱动电路。
如图7所示，所述AMOLED像素驱动电路包括：第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4、第一电容C1、第二电容C2、及有机发光二极管D1。各个薄膜晶体管均为P型薄膜晶体管。
所述第一薄膜晶体管T1为驱动薄膜晶体管，其栅极经由第一节点A电 性连接于第一电容C1的一端，源级接入电源正电压VDD，漏级电性连接于有机发光二极管D1的阳极；第二薄膜晶体管T2的栅极接入该像素驱动电路所在行对应的第n条扫描信号SCAN(n)，源级接入数据信号data，漏极经由第二节点B电性连接于第一电容C1的另一端；第三薄膜晶体管T3的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号SCAN(n+1)，源级电性连接于第二节点B，漏级接入基准参考电压Vref；第四薄膜晶体管T4的栅极接入该像素驱动电路所在行对应的第n条扫描信号SCAN(n)，源级电性连接于第一节点A，漏极电性连接于有机发光二极管D1的阳极；第一电容C1的一端电性连接于第一节点A，另一端电性连接于第二节点B；第二电容C2的一端电性连接于第一节点A，另一端电性连接于电源正电压VDD；有机发光二极管D1的阳极电性连接于第一薄膜晶体T1的漏级和第四薄膜晶体管T4的漏级，阴极电性连接于电源负电压VSS。
具体地，所述第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、及第四薄膜晶体管T4均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
如图8所示，所述基准参考电压Vref为一恒定电压；设n为正整数，所述第n条扫描信号SCAN(n)与第n+1条扫描信号SCAN(n+1)是由同一时序控制器按先后相邻次序输出的扫描信号，第n行像素驱动电路级联第n+1行像素驱动电路，第n条扫描信号SCAN(n)开启对第n行像素驱动电路的扫描，第n+1条扫描信号SCAN(n+1)开启对第n+1行像素驱动电路的扫描。
所述扫描信号为脉冲信号，但值得注意的是，与现有技术通常设置第n+1条扫描信号SCAN(n+1)的下降沿与第n条扫描信号SCAN(n)的上升沿同时产生不同，本发明中第n+1条扫描信号SCAN(n+1)的下降沿晚于第n条扫描信号SCAN(n)的上升沿。
步骤2、进入阈值电压感测阶段1。
结合图8与图9，第n条扫描信号SCAN(n)提供低电位，受第n条扫描信号SCAN(n)控制的第二薄膜晶体管T2与第四薄膜晶体管T4导通，第n+1条扫描信号SCAN(n+1)提供高电位，受第n+1条扫描信号SCAN(n+1)控制的第三薄膜晶体管T3截止；数据信号data经导通的第二薄膜晶体管T2传输至第二节点B，使第二节点B的电压为数据信号电压Vdata；第一电容C1与第二电容C2开始充电，由于第四薄膜晶体管T4导通，第一节点A的电压即第一薄膜晶体管T1的栅极电压Vg为：
Vg＝VDD-f(Vth)   (1)
其中，VDD表示电源正电压，Vth表示驱动薄膜晶体管即第一薄膜晶体管T1的阈值电压，f(Vth)是关于Vth的函数，表示第一薄膜晶体管T1、第四薄膜晶体管T4、及有机发光二极管D1达到电流平衡时有机发光二极管D1的阳极电压；
第一薄膜晶体管T1的源极电压Vs＝VDD。
步骤3、进入保持阶段2。
结合图8与图10，第n条扫描信号SCAN(n)提供高电位，第二薄膜晶体管T2与第四薄膜晶体管T4截止，第n+1条扫描信号SCAN(n+1)保持高电位，第三薄膜晶体管T3保持截止，第一电容C1与第二电容C2开始放电并相互耦合；第一节点A的电压即第一薄膜晶体管T1的栅极电压为：
Vg＝VDD-f(Vth)+ΔV1   (2)
其中，ΔV1表示由于第一电容C1与第二电容C2的耦合作用引起的第一次电压变化量；
第一薄膜晶体管T1的源极电压为Vs＝VDD；
位于第一电容C1另一端的第二节点B的电压随着第一节点A相应变化ΔV1。
步骤4、进入编程阶段3。
结合图8与图11，第n条扫描信号SCAN(n)提供高电位，第二薄膜晶体管T2与第四薄膜晶体管T4截止，第n+1条扫描信号SCAN(n+1)提供低电位，第三薄膜晶体管T3导通；基准参考电压Vref经由导通的第三薄膜晶体管T3传输至第二节点B，位于第一电容C1一端的第一节点A的电压即第一薄膜晶体管T1的栅极电压为：
Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata   (3)
其中，Vref表示基准参考电压，Vdata表示数据信号电压；
第一薄膜晶体管T1的源极电压为Vs＝VDD。
步骤5、进入发光阶段4。
结合图8与图12，第n条扫描信号SCAN(n)提供高电位，第二薄膜晶体管T2与第四薄膜晶体管T4截止，第n+1条扫描信号(SCAN(n+1))提供高电位，第三薄膜晶体管T3截止；第一电容C1与第二电容C2再次放电并相互耦合，第一节点A的电压即第一薄膜晶体管T1的栅极电压为：
Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata+ΔV2   (4)
其中，ΔV2表示由于第一电容C1与第二电容C2的耦合作用引起的第二次电压变化量；
第一薄膜晶体管T1的源极电压为：
Vs＝VDD   (5)
位于第一电容C1另一端的第二节点B的电压随着第一节点A相应变化ΔV2；
有机发光二极管D1发光。
已知当驱动薄膜晶体管为P型薄膜晶体管时计算流经有机发光二极管的电流的公式为：
IOLED＝1/2Cox(μW/L)(Vgs+Vth)2   (6)
其中IOLED为有机发光二极管D1的电流、μ为驱动薄膜晶体即第一薄膜晶体管T1的载流子迁移率、W和L分别为驱动薄膜晶体管即第一薄膜晶体管T1的沟道的宽度和长度、Vgs为驱动薄膜晶体管即第一薄膜晶体管T1的栅源极电压、Vth为驱动薄膜晶体管即第一薄膜晶体管T1的阈值电压。
Vgs＝Vg-Vs＝VDD-f(Vth)+ΔV1+Vref-Vdata+ΔV2-VDD
＝ΔV1+Vref-Vdata+ΔV2-f(Vth)   (7)
将(7)式代入(6)式得：
IOLED＝1/2Cox(μW/L)(ΔV1+Vref-Vdata+ΔV2+Vth-f(Vth))2   (8)
如图13所示，由于-f(Vth)抵消掉了部分Vth，使得该步骤5中流经机发光二极管D1的电流受第一薄膜晶体管T1的阈值电压Vth的影响较小，实现了补偿功能。
本发明的AMOLED像素驱动方法采用4T2C结构的像素驱动电路，采用第n条扫描信号SCAN(n)来控制第二薄膜晶体管T2与第四薄膜晶体管T4，采用第n+1条扫描信号SCAN(n+1)取代现有技术中的发光控制信号EM来控制第三薄膜晶体管T3，即仅由扫描信号来控制相应的薄膜晶体管，既起到了补偿作用，又能够使得控制信号数量减少，电路结构简化，成本降低。
综上所述，本发明提供的一种AMOLED像素驱动电路采用4T2C结构，相比于现有的5T2C结构的像素驱动电路，仅需要设置扫描信号来控制相应的薄膜晶体管，既起到了补偿作用，又减少了控制信号数量，且简化了电路结构，降低了成本。本发明提供的一种AMOLED像素驱动方法，仅通过扫描信号来控制相应的薄膜晶体管，能够使得控制信号数量减少，电路结构简化，成本降低。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (11)

  1. 一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第一电容、第二电容、及有机发光二极管；各个薄膜晶体管均为P型薄膜晶体管；
    所述第一薄膜晶体管为驱动薄膜晶体管，其栅极经由第一节点电性连接于第一电容的一端，源级接入电源正电压，漏级电性连接于有机发光二极管的阳极；
    第二薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级接入数据信号，漏极经由第二节点电性连接于第一电容的另一端；
    第三薄膜晶体管的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号，源级电性连接于第二节点，漏级接入基准参考电压；
    第四薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级电性连接于第一节点，漏极电性连接于有机发光二极管的阳极；
    第一电容的一端电性连接于第一节点，另一端电性连接于第二节点；
    第二电容的一端电性连接于第一节点，另一端电性连接于电源正电压；
    有机发光二极管的阳极电性连接于第一薄膜晶体的漏级和第四薄膜晶体管的漏级，阴极电性连接于电源负电压。
  2. 如权利要求1所述的AMOLED像素驱动电路，其中，所述基准参考电压为一恒定电压。
  3. 如权利要求1所述的AMOLED像素驱动电路，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、及第四薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  4. 如权利要求1所述的AMOLED像素驱动电路，其中，扫描信号为脉冲信号，所述第n+1条扫描信号的下降沿晚于第n条扫描信号的上升沿。
  5. 如权利要求4所述的AMOLED像素驱动电路，其中，所述第n条扫描信号与第n+1条扫描信号相组合，先后对应于一阈值电压感测阶段、一保持阶段、一编程阶段、及一发光阶段；
    在所述阈值电压感测阶段，第n条扫描信号为低电位，第n+1条扫描信号为高电位；
    在所述保持阶段，第n条扫描信号为高电位，第n+1条扫描信号为高电位；
    在所述编程阶段，第n条扫描信号为高电位，第n+1条扫描信号为低电位；
    在所述发光阶段，第n条扫描信号为高电位，第n+1条扫描信号为高电位。
  6. 一种AMOLED像素驱动方法，包括如下步骤：
    步骤1、提供一AMOLED像素驱动电路；
    所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第一电容、第二电容、及有机发光二极管；各个薄膜晶体管均为P型薄膜晶体管；
    所述第一薄膜晶体管为驱动薄膜晶体管，其栅极经由第一节点电性连接于第一电容的一端，源级接入电源正电压，漏级电性连接于有机发光二极管的阳极；
    第二薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级接入数据信号，漏极经由第二节点电性连接于第一电容的另一端；
    第三薄膜晶体管的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号，源级电性连接于第二节点，漏级接入基准参考电压；
    第四薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级电性连接于第一节点，漏极电性连接于有机发光二极管的阳极；
    第一电容的一端电性连接于第一节点，另一端电性连接于第二节点；
    第二电容的一端电性连接于第一节点，另一端电性连接于电源正电压；
    有机发光二极管的阳极电性连接于第一薄膜晶体的漏级和第四薄膜晶体管的漏级，阴极电性连接于电源负电压；
    步骤2、进入阈值电压感测阶段；
    所述第n条扫描信号提供低电位，第二薄膜晶体管和第四薄膜晶体管导通，第n+1条扫描信号提供高电位，第三薄膜晶体管截止；数据信号传输至第二节点，第一电容与第二电容开始充电，第一节点的电压即第一薄膜晶体管的栅极电压Vg＝VDD-f(Vth)，VDD表示电源正电压，Vth表示第一薄膜晶体管的阈值电压，f(Vth)是关于Vth的函数，表示第一薄膜晶体管、第四薄膜晶体管、及有机发光二极管达到电流平衡时有机发光二极管的阳极电压；
    步骤3、进入保持阶段；
    所述第n条扫描信号提供高电位，第二薄膜晶体管和第四薄膜晶体管截止，第n+1条扫描信号提供高电位，第三薄膜晶体管保持截止，第一电 容与第二电容开始放电并相互耦合，第一节点的电压即第一薄膜晶体管的栅极电压为Vg＝VDD-f(Vth)+ΔV1，ΔV1表示由于第一电容与第二电容的耦合作用引起的第一次电压变化量；
    步骤4、进入编程阶段；
    所述第n条扫描信号提供高电位，第二薄膜晶体管和第四薄膜晶体管截止，第n+1条扫描信号提供低电位，第三薄膜晶体管导通，基准参考电压传输至第二节点，第一节点的电压即第一薄膜晶体管的栅极电压为Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata，Vref表示基准参考电压，Vdata表示数据信号电压；
    步骤5、进入发光阶段；
    所述第n条扫描信号提供高电位，第二薄膜晶体管和第四薄膜晶体管截止，第n+1条扫描信号提供高电位，第三薄膜晶体管截止，第一电容与第二电容再次放电并相互耦合，第一节点的电压即第一薄膜晶体管的栅极电压为Vg＝VDD-f(Vth)+ΔV1+Vref-Vdata+ΔV2，ΔV2表示由于第一电容与第二电容的耦合作用引起的第二次电压变化量；有机发光二极管发光。
  7. 如权利要求6所述的AMOLED像素驱动方法，其中，所述基准参考电压为一恒定电压。
  8. 如权利要求6所述的AMOLED像素驱动方法，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、及第四薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  9. 一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第一电容、第二电容、及有机发光二极管；各个薄膜晶体管均为P型薄膜晶体管；
    所述第一薄膜晶体管为驱动薄膜晶体管，其栅极经由第一节点电性连接于第一电容的一端，源级接入电源正电压，漏级电性连接于有机发光二极管的阳极；
    第二薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级接入数据信号，漏极经由第二节点电性连接于第一电容的另一端；
    第三薄膜晶体管的栅极接入该像素驱动电路所在行的下一行对应的第n+1条扫描信号，源级电性连接于第二节点，漏级接入基准参考电压；
    第四薄膜晶体管的栅极接入该像素驱动电路所在行对应的第n条扫描信号，源级电性连接于第一节点，漏极电性连接于有机发光二极管的阳极；
    第一电容的一端电性连接于第一节点，另一端电性连接于第二节点；
    第二电容的一端电性连接于第一节点，另一端电性连接于电源正电压；
    有机发光二极管的阳极电性连接于第一薄膜晶体的漏级和第四薄膜晶体管的漏级，阴极电性连接于电源负电压；
    其中，所述基准参考电压为一恒定电压；
    其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、及第四薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  10. 如权利要求9所述的AMOLED像素驱动电路，其中，扫描信号为脉冲信号，所述第n+1条扫描信号的下降沿晚于第n条扫描信号的上升沿。
  11. 如权利要求10所述的AMOLED像素驱动电路，其中，所述第n条扫描信号与第n+1条扫描信号相组合，先后对应于一阈值电压感测阶段、一保持阶段、一编程阶段、及一发光阶段；
    在所述阈值电压感测阶段，第n条扫描信号为低电位，第n+1条扫描信号为高电位；
    在所述保持阶段，第n条扫描信号为高电位，第n+1条扫描信号为高电位；
    在所述编程阶段，第n条扫描信号为高电位，第n+1条扫描信号为低电位；
    在所述发光阶段，第n条扫描信号为高电位，第n+1条扫描信号为高电位。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI685833B (zh) * 2018-06-27 2020-02-21 友達光電股份有限公司 畫素電路

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102561294B1 (ko) 2016-07-01 2023-08-01 삼성디스플레이 주식회사 화소 및 스테이지 회로와 이를 가지는 유기전계발광 표시장치
KR102570976B1 (ko) * 2016-11-25 2023-08-28 엘지디스플레이 주식회사 표시장치와 그 소자 특성 센싱 방법
US10074309B2 (en) * 2017-02-14 2018-09-11 Shenzhen China Star Optoelectronics Technology Co., Ltd. AMOLED pixel driving circuit and AMOLED pixel driving method
CN106652904B (zh) * 2017-03-17 2019-01-18 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示装置
US10311794B2 (en) 2017-08-23 2019-06-04 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Pixel driver circuit and driving method thereof
CN107393476A (zh) * 2017-08-23 2017-11-24 深圳市华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法
CN107516489A (zh) * 2017-10-24 2017-12-26 深圳市华星光电半导体显示技术有限公司 Oled像素驱动电路及其驱动方法
US10460665B2 (en) 2017-10-24 2019-10-29 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. OLED pixel driving circuit and driving method thereof
CN108389551B (zh) * 2018-03-28 2021-03-02 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
US11120741B2 (en) * 2018-07-04 2021-09-14 Sharp Kabushiki Kaisha Display device and method for driving same
CN109786434B (zh) 2019-03-28 2022-04-22 京东方科技集团股份有限公司 阵列基板、其制备方法、显示面板、装置和像素驱动电路
US11581385B2 (en) 2019-03-28 2023-02-14 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate having additional pad layer
CN109979383B (zh) * 2019-04-24 2021-04-02 深圳市华星光电半导体显示技术有限公司 像素驱动电路以及显示面板
CN111613180A (zh) * 2020-05-18 2020-09-01 武汉华星光电半导体显示技术有限公司 Amoled像素补偿驱动电路、方法及显示面板
CN113160750B (zh) 2021-03-09 2023-04-28 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置
CN113257194B (zh) * 2021-03-26 2022-03-29 东南大学 一种有源矩阵有机发光二极管像素补偿电路及其驱动方法
CN113628585B (zh) 2021-08-31 2022-10-21 上海视涯技术有限公司 像素驱动电路及其驱动方法、硅基显示面板和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1595484A (zh) * 2003-09-08 2005-03-16 三星Sdi株式会社 驱动有机场致发光显示器像素的电路和方法
CN1601594A (zh) * 2003-09-22 2005-03-30 统宝光电股份有限公司 有源阵列有机发光二极管像素驱动电路及其驱动方法
CN101123070A (zh) * 2006-08-08 2008-02-13 三星Sdi株式会社 像素、有机发光显示器及其驱动方法
CN103077680A (zh) * 2013-01-10 2013-05-01 上海和辉光电有限公司 一种oled像素驱动电路
US20140320544A1 (en) * 2013-04-24 2014-10-30 Samsung Display Co., Ltd. Organic light emitting diode display

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101080351B1 (ko) * 2004-06-22 2011-11-04 삼성전자주식회사 표시 장치 및 그 구동 방법
KR100873076B1 (ko) * 2007-03-14 2008-12-09 삼성모바일디스플레이주식회사 화소 및 이를 이용한 유기전계발광 표시장치 및 그의구동방법
KR101361981B1 (ko) * 2008-02-19 2014-02-21 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동방법
KR101030002B1 (ko) * 2009-10-08 2011-04-20 삼성모바일디스플레이주식회사 화소 회로 및 이를 이용한 유기전계발광 표시 장치
KR101517035B1 (ko) * 2011-12-05 2015-05-06 엘지디스플레이 주식회사 유기발광 다이오드 표시장치 및 그 구동방법
CN103310729B (zh) * 2013-05-29 2015-05-27 京东方科技集团股份有限公司 发光二极管像素单元电路和显示面板
CN104064139B (zh) * 2014-06-05 2016-06-29 上海天马有机发光显示技术有限公司 一种有机发光二极管像素补偿电路、显示面板和显示装置
CN104809989A (zh) * 2015-05-22 2015-07-29 京东方科技集团股份有限公司 一种像素电路、其驱动方法及相关装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1595484A (zh) * 2003-09-08 2005-03-16 三星Sdi株式会社 驱动有机场致发光显示器像素的电路和方法
CN1601594A (zh) * 2003-09-22 2005-03-30 统宝光电股份有限公司 有源阵列有机发光二极管像素驱动电路及其驱动方法
CN101123070A (zh) * 2006-08-08 2008-02-13 三星Sdi株式会社 像素、有机发光显示器及其驱动方法
CN103077680A (zh) * 2013-01-10 2013-05-01 上海和辉光电有限公司 一种oled像素驱动电路
US20140320544A1 (en) * 2013-04-24 2014-10-30 Samsung Display Co., Ltd. Organic light emitting diode display

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI685833B (zh) * 2018-06-27 2020-02-21 友達光電股份有限公司 畫素電路

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