WO2017150913A1 - Semiconductor light emitting element and manufacturing method therefor - Google Patents

Semiconductor light emitting element and manufacturing method therefor Download PDF

Info

Publication number
WO2017150913A1
WO2017150913A1 PCT/KR2017/002266 KR2017002266W WO2017150913A1 WO 2017150913 A1 WO2017150913 A1 WO 2017150913A1 KR 2017002266 W KR2017002266 W KR 2017002266W WO 2017150913 A1 WO2017150913 A1 WO 2017150913A1
Authority
WO
WIPO (PCT)
Prior art keywords
light emitting
semiconductor light
emitting device
metal substrate
circuit layer
Prior art date
Application number
PCT/KR2017/002266
Other languages
French (fr)
Korean (ko)
Inventor
김경민
김봉환
전수근
Original Assignee
주식회사 세미콘라이트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 세미콘라이트 filed Critical 주식회사 세미콘라이트
Publication of WO2017150913A1 publication Critical patent/WO2017150913A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present disclosure relates to a semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device used in a bulb lamp and a manufacturing method thereof.
  • FIG. 1 is a view showing an example of a conventional semiconductor light emitting device chip.
  • the semiconductor light emitting device chip may include a growth substrate 10 (eg, a sapphire substrate), a growth layer 10, a buffer layer 11, a first semiconductor layer 12 having a first conductivity (eg, an n-type GaN layer), and electrons.
  • the active layer 13 eg, INGaN / (In) GaN MQWs
  • the second semiconductor layer 14 eg, p-type GaN layer having a second conductivity different from the first conductivity are sequentially And a transmissive conductive film 15 for spreading current and an electrode 21 serving as a bonding pad, and serving as a bonding pad on the etched and exposed first semiconductor layer 12.
  • An electrode 20 (for example, a Cr / Ni / Au laminated metal pad) is formed.
  • the semiconductor light emitting device of the form as shown in FIG. 1 is particularly called a lateral chip.
  • the substrate 10 functions as a mounting surface when the substrate 10 side is electrically connected to the outside (eg, a printed circuit board, a submount, etc.).
  • FIG. 2 is a view showing another example of the semiconductor light emitting device chip disclosed in US Patent No. 7,262,436. For convenience of description, reference numerals have been changed.
  • the semiconductor light emitting device chip includes a growth substrate 10 and a growth substrate 10, a first semiconductor layer 12 having a first conductivity, an active layer 13 that generates light through recombination of electrons and holes, and a first conductivity.
  • the second semiconductor layer 14 having a second conductivity different from that of the second semiconductor layer 14 is sequentially deposited, and three electrode layers 22, 23, and 24 are formed on the growth substrate 10 to reflect light. have.
  • the first electrode layer 22 may be an Ag reflecting layer
  • the second electrode layer 23 may be a Ni diffusion barrier layer
  • the third electrode layer 24 may be an Au bonding layer.
  • An electrode 20 serving as a bonding pad is formed on the etched and exposed first semiconductor layer 12.
  • the electrode film 22, 23, 24 side when the electrode film 22, 23, 24 side is electrically connected to the outside, it functions as a mounting surface.
  • the semiconductor light emitting device of the type shown in FIG. 2 is particularly called a flip chip.
  • the electrode 20 formed on the first semiconductor layer 12 is at a lower level than the electrode films 22, 23, and 24 formed on the second semiconductor layer, but may be formed at the same height. You can also do that.
  • the height reference may be the height from the growth substrate 10.
  • the semiconductor light emitting device chips include vertical chips.
  • FIG. 3 is a view showing an example of a bulb-type lamp and a semiconductor light emitting device using the semiconductor light emitting device described in US Patent Publication No. 2013-0058080. For convenience of description, some of the reference symbols and terms have been changed.
  • the bulb-shaped lamp 30 using the semiconductor light emitting device described in FIG. 3 (a) includes a semiconductor light emitting device 40, a lamp cover 31, a core pillar 32, a driver 33, and an electrical connector 34. Include.
  • the core pillar 32 includes a frame 50, a fallopian tube 51, and an exhaust pipe 52.
  • the frame 50 includes a strut 53, an electrical output leader 54, and a metal wire 55.
  • the frame 50 fixes the semiconductor light emitting device 40 and is used to supply electricity.
  • the semiconductor light emitting device 40 illustrated in FIG. 3B includes a transparent substrate 41, a semiconductor light emitting device chip 42, an electrical connection line 43, and an electrode lead line 44. And a fixing device 45 for fixing the electrical lead wire 44 to the transparent substrate 41.
  • an encapsulant covering the semiconductor light emitting device chip 42 may be included. In the semiconductor light emitting device chip 42, lateral chips are connected in series, and the electrical connection line 43 is formed by wire bonding.
  • FIG. 4 is a view showing an example of a semiconductor light emitting device used in the bulb-type lamp described in US Patent Publication No. 2014-0369036. For convenience of description, some of the reference symbols and terms have been changed.
  • the semiconductor light emitting device 60 includes a transparent substrate 61, a semiconductor light emitting device chip 62, a metal lead 63, an encapsulant 64, and an electrode lead line 65.
  • the semiconductor light emitting device chip 62 is a lateral chip, and the metal conductor 63 is formed by wire bonding.
  • the semiconductor light emitting device chips 62 are connected in series.
  • the present disclosure improves the heat dissipation effect by using a metal substrate, and provides a semiconductor light emitting device used in a bulb type lamp that does not require wire bonding.
  • a semiconductor light emitting device comprising: an opaque metal substrate, the metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; And a sealing material covering a plurality of semiconductor light emitting device chips, wherein the circuit layer and the metal substrate are provided with at least one end portion of both end portions in the longitudinal direction from the sealing material.
  • a semiconductor light emitting device comprising: an opaque metal substrate, the metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; An encapsulant covering a plurality of semiconductor light emitting device chips; And, there is provided a semiconductor light-emitting device comprising a; electrical lead wire located in at least one of the both ends of the longitudinal direction of the metal substrate.
  • a method of manufacturing a semiconductor light emitting device comprising: forming a hole in a width direction in a metal substrate (S1); Bonding an electrically conductive substrate on the metal substrate on which the hole is formed to form an insulating layer (S2); wherein the adhesive insulating material fills the hole to form an insulating layer (S2); Forming a circuit layer from the conductive substrate (S3); Mounting a semiconductor light emitting device chip on the circuit layer (S4);
  • the semiconductor light emitting device chip is provided with a sealing material (S6); there is provided a semiconductor light emitting device manufacturing method comprising a.
  • FIG. 1 is a view showing an example of a conventional semiconductor light emitting device chip
  • FIG. 2 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent No. 7,262,436;
  • FIG. 3 is a view showing an example of a bulb-type lamp and a semiconductor light emitting device using the semiconductor light emitting device described in US Patent Publication No. 2013-0058080,
  • FIG. 4 is a view showing an example of a semiconductor light emitting device used in the bulb lamp described in US Patent Publication No. 2014-0369036,
  • FIG. 5 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 6 illustrates another example of a semiconductor light emitting device according to the present disclosure
  • FIG. 7 is a view showing still another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 8 illustrates another example of a semiconductor light emitting device according to the present disclosure
  • FIG. 9 illustrates another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 10 is a view showing still another example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 11 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • FIG. 5 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
  • FIG. 5 (a) is a cross-sectional view taken along the line AA ′ of FIG. 5 (b), and FIG. 5 (b) is a plan view.
  • the semiconductor light emitting device 100 includes a metal substrate 110, an insulating layer 120, a circuit layer 130, a plurality of semiconductor light emitting device chips 140, an encapsulant 150, and an electrical lead line 160.
  • the metal substrate 110 may be, for example, aluminum (Al), magnesium (Mg), zinc (Zn), titanium (Ti), or the like. Among them, an aluminum (Al) substrate is preferable in consideration of thermal conductivity and reflectance.
  • the metal substrate 110 includes an insulating portion 111.
  • the insulating part 111 is formed in the width direction 171 of the metal substrate 110 to electrically separate the metal substrate 110.
  • the metal substrate 110 needs a constant thickness as a support plate, preferably 150um to 200umm.
  • the metal substrate 110 is opaque because of its constant thickness.
  • the insulating layer 120 is formed of an insulating material on the metal substrate 110.
  • the insulating material may be a silicone resin, an epoxy resin, or the like.
  • the circuit layer 130 is formed of a conductive material on the insulating layer 120.
  • the conductive material may be silver (Ag), copper (Cu), or the like.
  • the plurality of semiconductor light emitting device chips 140 may be mounted on the circuit layer 130 and may be lateral chips, vertical chips, flip chips, or the like. However, a flip chip is preferable in order for the electrode 141 of the semiconductor light emitting device chip 140 to be connected to the circuit layer 130 without wire bonding. In Figure 5 a flip chip is used.
  • a conductive adhesive may be positioned between the semiconductor light emitting device chip 140 and the circuit layer 130.
  • the plurality of semiconductor light emitting device chips 140 are connected in series on the circuit layer 130 along the longitudinal direction 170 as shown in FIG.
  • the semiconductor light emitting device 100 has a narrow elongated shape in the width direction 171 and a long length 170 as shown in FIG. 5 (b).
  • the encapsulant 150 stably fixes the semiconductor light emitting device chip 140 to the metal substrate 110, and protects the semiconductor light emitting device chip 140.
  • the encapsulant 150 is made of, for example, a silicone resin, an epoxy resin, or the like.
  • the encapsulant 150 may include a wavelength converting member 151 that emits a predetermined color by converting a wavelength of a part of the light emitted from the semiconductor light emitting device chip 140, so that the semiconductor light emitting device 100 may emit white light.
  • the semiconductor light emitting device chip 140 may produce blue light, and the light generated by being excited by the wavelength converting material 151 may be yellow light, and blue light and yellow light may be mixed to produce white light.
  • the wavelength converting material 151 may be any type as long as it converts the light emitted from the semiconductor light emitting device chip 140 into light having a different wavelength (eg, pigments, dyes, etc.). , (Sr, Ba, Ca) 2 SiO 4 : Eu and the like).
  • the electrical lead line 160 is connected to both longitudinal ends 131 of the circuit layer 130, and is also connected to both longitudinal ends 112 of the metal substrate 110.
  • the electrode lead line 160 is connected to the circuit layer 130 to supply electricity to the semiconductor light emitting device chip 140, and at the same time, the electrode lead line 160 is connected to the metal substrate 110 to connect the electrode lead line 160. Is fixed stably. Although the electrode lead line 160 is connected to the metal substrate 110, an electrical short problem may occur, but the insulation 111 formed in the width direction 171 solves the problem. Since the electrical lead wire 160 is directly connected to the metal substrate 110, it is also effective for heat radiation. In FIG. 5, the electrical lead line 160 is connected to both the circuit layer 130 and the both ends of the metal substrate 110 in the longitudinal direction of both ends 131 and 112, but may be formed only on one side of both ends.
  • FIG 6 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • an encapsulant 250 surrounds the metal substrate 210 and the plurality of semiconductor light emitting device chips 240.
  • the metal substrate 210 is opaque, light emitted from the semiconductor light emitting device 100 may not go out in all directions. That is, light may not be emitted in a direction opposite to the direction in which the semiconductor light emitting device chip 140 is located. This problem can be even worse, especially when using flip chips.
  • an encapsulant 250 surrounds the metal substrate 210 and the plurality of semiconductor light emitting device chips 240.
  • the encapsulant 250 may further include a light scattering material 252 in addition to the wavelength converter 251.
  • the semiconductor light emitting device 200 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
  • FIG 7 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 300 includes a metal substrate 310 and a diffusion tube 360 surrounding the semiconductor light emitting device chip 340.
  • the diffusion tube 360 has the same function as the encapsulant 250 surrounding the metal substrate 210 and the plurality of semiconductor light emitting device chips 240 in FIG. 6. That is, the semiconductor light emitting device 300 having the opaque metal substrate 310 may emit light in all directions. Except as illustrated in FIG. 7, the semiconductor light emitting device 300 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
  • FIG 8 illustrates another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 400 includes a semiconductor light emitting device chip 440 on both top and bottom surfaces 411 and 412 of the metal substrate 410.
  • the insulating layer 420 and the circuit layer 430 are also formed on both sides.
  • the encapsulant 450 surrounds the metal substrate 410 and the semiconductor light emitting device chip 440.
  • the semiconductor light emitting device chips 440 may be disposed on both surfaces 411 and 412 of the metal substrate 400, so that the semiconductor light emitting devices 400 may emit light in all directions. Except as illustrated in FIG. 8, the semiconductor light emitting device 400 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
  • FIG 9 is a view illustrating still another example of the semiconductor light emitting device according to the present disclosure.
  • the semiconductor light emitting device 500 includes a metal substrate 510 including a plurality of insulating portions 511.
  • the insulating part 511 may be filled with an insulating material having elasticity. It is also possible to form a space without filling the insulating material (not shown).
  • the metal substrate 510 may be bent as shown in FIG. 9B through the plurality of insulating parts 511. Except as illustrated in FIG. 9, the semiconductor light emitting device 500 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
  • FIG 10 is a view illustrating still another example of the semiconductor light emitting device according to the present disclosure.
  • the circuit layers 630 and both ends 631 and 612 in the longitudinal direction of the metal substrate 610 are exposed from the encapsulant 650.
  • an external electric wire (not shown) such as the electric output lead wire shown in FIG. 3 may be connected to the semiconductor light emitting device to supply electricity to the semiconductor light emitting device 600.
  • the external electric wire is connected to the longitudinal end portion 631 of the circuit layer 630 and at the same time the metal substrate 610. It is also necessary to be connected to the longitudinal distal end 612 of.
  • the semiconductor light emitting device 600 may include the circuit layer 630 and the metal substrate 610 to simultaneously connect an external electric line (not shown) to the circuit layer 630 and the metal substrate 610 of the semiconductor light emitting device 600. Longitudinal both side ends 631 and 612 of are exposed from the encapsulant 650. In FIG. 10A, both end portions 631 and 612 in the longitudinal direction of the circuit layer 630 and the metal substrate 610 are exposed from the encapsulant 650, but only one side of both end portions may be exposed. In addition, as illustrated in FIG. 10B, the metal substrate 610 and the circuit layer 630 may include an electrical connection 660.
  • the electrical connection 660 electrically connects the metal substrate 610 and the two ends 612 and 631 in the longitudinal direction of the circuit layer 630.
  • electricity may be supplied to the semiconductor light emitting device chip 640. That is, even if both ends of the longitudinal direction 631 of the circuit layer 630 are exposed from the encapsulant 650, only the both ends of the longitudinal direction of the metal substrate 610 are exposed from the encapsulant 650.
  • the semiconductor light emitting device chip 640 may be supplied.
  • the encapsulant 650 surrounds the metal substrate 610 as shown in FIG. 6.
  • the semiconductor light emitting device 600 is substantially the same as the semiconductor light emitting device 200 of FIG. 6.
  • FIG. 11 is a diagram illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
  • the metal substrate 700 is prepared. Afterwards, holes 710 are formed in the width direction in the metal substrate 700 (S1). The hole 710 may be formed by a punching method or a drill. Thereafter, the conductive substrate 720 for forming the circuit layer 740 is formed on the metal substrate 700 on which the hole 710 is formed by using an adhesive insulating material to form an insulating layer 730 (S2).
  • the conductive substrate 720 is preferably a copper (Cu) substrate.
  • the insulating layer 730 is formed of an adhesive insulating material, and in the bonding process, the adhesive insulating material is filled in the hole 710 to form the insulating part 711.
  • step S2 is shown as a cross-sectional view along AA 'in the plan view of step S1, and subsequent steps will be described as cross-sectional views.
  • the circuit layer 740 is formed from the conductive substrate 720 bonded on the insulating layer 730 by using an etching method (S3).
  • the semiconductor light emitting device chip 750 is mounted on the circuit layer 740 (S4). Since the electrical lead line 760 is formed to be connected to the circuit layer 740 and the metal substrate 700 at the same time (S5). Then covered with an encapsulant 770 (S6). After cutting along the cutting line 780 in the longitudinal direction to obtain a semiconductor light emitting device used in the bulb lamp (S7).
  • the thickness of the metal substrate 700 which is used as a support substrate and has a heat dissipation function, is 150 ⁇ m or more and 200 ⁇ m, the hole 710 is impossible by etching or the like.
  • the metal substrate 700 having the insulating portion 711 can be easily obtained.
  • step S5 is omitted and step S6 is performed.
  • the encapsulant is formed in step S6 so as not to cover the longitudinal end portions of the metal substrate 700 and the circuit layer 740 (not shown).
  • a semiconductor light emitting device comprising: an opaque metal substrate, comprising: a metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; And an encapsulation material covering the plurality of semiconductor light emitting device chips, wherein the circuit layer and the metal substrate have at least one end portion of both end portions in the longitudinal direction exposed from the encapsulant.
  • the semiconductor light emitting element characterized in that the insulating portion is formed in the width direction of the metal substrate.
  • a semiconductor light emitting element characterized in that a plurality of insulating portions are formed.
  • a plurality of semiconductor light emitting device chips are a plurality of flip chip.
  • a semiconductor light emitting element comprising a plurality of flip chips connected in series.
  • a semiconductor light emitting element wherein an encapsulant surrounds a metal substrate.
  • a semiconductor light emitting device comprising: an opaque metal substrate, comprising: a metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; An encapsulant covering a plurality of semiconductor light emitting device chips; And electrical lead wires positioned at at least one of both ends of the metal substrate in the longitudinal direction thereof.
  • a method of manufacturing a semiconductor light emitting device comprising: forming a hole in a width direction in a metal substrate (S1); Bonding an electrically conductive substrate on the metal substrate on which the hole is formed to form an insulating layer (S2); wherein the adhesive insulating material fills the hole to form an insulating layer (S2); Forming a circuit layer from the conductive substrate (S3); Mounting a semiconductor light emitting device chip on the circuit layer (S4); And covering the semiconductor light emitting device chip with an encapsulant (S6).
  • step S6 covers the encapsulant so that the longitudinal end portions of the circuit layer and the metal substrate are exposed.
  • the semiconductor light emitting device According to the semiconductor light emitting device according to the present disclosure, it is possible to obtain a semiconductor light emitting device that is excellent in heat dissipation performance and is used in a lamp for a bulb that does not require wire bonding.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)

Abstract

Disclosed are a semiconductor light emitting element and a manufacturing method therefor, the semiconductor light emitting element comprising: a metal substrate, which is opaque and includes an insulating part for electrically separating the metal substrate; an insulating layer formed on the metal substrate; a circuit layer formed on the insulating layer; a plurality of semiconductor light emitting element chips located on the circuit layer; and a sealant for covering the plurality of semiconductor light emitting element chips, wherein the circuit layer and the metal substrate have at least one end part, which is exposed from the sealant, of both end parts in the longitudinal direction thereof.

Description

반도체 발광소자 및 이의 제조방법Semiconductor light emitting device and manufacturing method thereof
본 개시(Disclosure)는 전체적으로 반도체 발광소자에 관한 것으로, 특히 전구형 램프에 사용되는 반도체 발광소자와 이의 제조방법에 관한 것이다. The present disclosure relates to a semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device used in a bulb lamp and a manufacturing method thereof.
여기서는, 본 개시에 관한 배경기술이 제공되며, 이들이 반드시 공지기술을 의미하는 것은 아니다(This section provides background information related to the present disclosure which is not necessarily prior art). 또한 본 명세서에서 상측/하측, 위/아래, 길이 방향/폭 방향 등과 같은 방향 표시는 도면을 기준으로 한다. This section provides background information related to the present disclosure which is not necessarily prior art. In addition, in the present specification, direction indications such as upper / lower side, up / down, longitudinal direction / width direction, etc., are based on the drawings.
도 1은 종래의 반도체 발광소자 칩의 일 예를 나타내는 도면이다.1 is a view showing an example of a conventional semiconductor light emitting device chip.
반도체 발광소자 칩은 성장기판(10; 예: 사파이어 기판), 성장기판(10) 위에, 버퍼층(11), 제1 도전성을 가지는 제1 반도체층(12; 예: n형 GaN층), 전자와 정공의 재결합을 통해 빛을 생성하는 활성층(13; 예; INGaN/(In)GaN MQWs), 제1 도전성과 다른 제2 도전성을 가지는 제2 반도체층(14; 예: p형 GaN층)이 순차로 증착되어 있으며, 그 위에 전류 확산을 위한 투광성 전도막(15)과, 본딩 패드로 역할하는 전극(21)이 형성되어 있고, 식각되어 노출된 제1 반도체층(12) 위에 본딩 패드로 역할하는 전극(20: 예: Cr/Ni/Au 적층 금속 패드)이 형성되어 있다. 도 1과 같은 형태의 반도체 발광소자를 특히 레터럴 칩(Lateral Chip)이라고 한다. 여기서, 기판(10) 측이 외부(예; 인쇄회로기판, 서브마운트 등)와 전기적으로 연결될 때 장착면으로 기능한다.The semiconductor light emitting device chip may include a growth substrate 10 (eg, a sapphire substrate), a growth layer 10, a buffer layer 11, a first semiconductor layer 12 having a first conductivity (eg, an n-type GaN layer), and electrons. The active layer 13 (eg, INGaN / (In) GaN MQWs) that generates light through recombination of holes, and the second semiconductor layer 14 (eg, p-type GaN layer) having a second conductivity different from the first conductivity are sequentially And a transmissive conductive film 15 for spreading current and an electrode 21 serving as a bonding pad, and serving as a bonding pad on the etched and exposed first semiconductor layer 12. An electrode 20 (for example, a Cr / Ni / Au laminated metal pad) is formed. The semiconductor light emitting device of the form as shown in FIG. 1 is particularly called a lateral chip. Here, the substrate 10 functions as a mounting surface when the substrate 10 side is electrically connected to the outside (eg, a printed circuit board, a submount, etc.).
도 2는 미국 등록특허공보 제7,262,436호에 제시된 반도체 발광소자 칩의 다른 예를 나타내는 도면이다. 설명의 편의를 위해 도면기호를 변경하였다.2 is a view showing another example of the semiconductor light emitting device chip disclosed in US Patent No. 7,262,436. For convenience of description, reference numerals have been changed.
반도체 발광소자 칩은 성장기판(10), 성장기판(10) 위에, 제1 도전성을 가지는 제1 반도체층(12), 전자와 정공의 재결합을 통해 빛을 생성하는 활성층(13), 제1 도전성과 다른 제2 도전성을 가지는 제2 반도체층(14)이 순차로 증착되어 있으며, 그 위에 성장기판(10) 측으로 빛을 반사시키기 위한 3층으로 된 전극막(22, 23, 24)이 형성되어 있다. 제1 전극막(22)은 Ag 반사막, 제2 전극막(23)은 Ni 확산 방지막, 제3 전극막(24)은 Au 본딩층일 수 있다. 식각되어 노출된 제1 반도체층(12) 위에 본딩 패드로 기능하는 전극(20)이 형성되어 있다. 여기서, 전극막(22, 23, 24) 측이 외부와 전기적으로 연결될 때 장착면으로 기능한다. 도 2와 같은 형태의 반도체 발광소자를 특히 플립 칩(Flip Chip)이라고 한다. 도 2에 도시된 플립 칩의 경우 제1 반도체층(12) 위에 형성된 전극(20)이 제2 반도체층 위에 형성된 전극막(22, 23, 24)보다 낮은 높이에 있지만, 동일한 높이에 형성될 수 있도록 할 수도 있다. 여기서 높이의 기준은 성장기판(10)으로부터의 높이일 수 있다. 반도체 발광소자 칩의 종류에는 도 1 및 도 2에 도시하지는 않았지만, 수직 칩도 있다.The semiconductor light emitting device chip includes a growth substrate 10 and a growth substrate 10, a first semiconductor layer 12 having a first conductivity, an active layer 13 that generates light through recombination of electrons and holes, and a first conductivity. The second semiconductor layer 14 having a second conductivity different from that of the second semiconductor layer 14 is sequentially deposited, and three electrode layers 22, 23, and 24 are formed on the growth substrate 10 to reflect light. have. The first electrode layer 22 may be an Ag reflecting layer, the second electrode layer 23 may be a Ni diffusion barrier layer, and the third electrode layer 24 may be an Au bonding layer. An electrode 20 serving as a bonding pad is formed on the etched and exposed first semiconductor layer 12. Here, when the electrode film 22, 23, 24 side is electrically connected to the outside, it functions as a mounting surface. The semiconductor light emitting device of the type shown in FIG. 2 is particularly called a flip chip. In the flip chip illustrated in FIG. 2, the electrode 20 formed on the first semiconductor layer 12 is at a lower level than the electrode films 22, 23, and 24 formed on the second semiconductor layer, but may be formed at the same height. You can also do that. The height reference may be the height from the growth substrate 10. Although not shown in Figs. 1 and 2, the semiconductor light emitting device chips include vertical chips.
도 3은 미국 공개특허공보 제2013-0058080호에 기재된 반도체 발광소자를 사용한 전구형 램프 및 반도체 발광소자의 일 예를 보여주는 도면이다. 설명의 편의를 위해 도면기호 및 용어의 일부를 변경하였다.3 is a view showing an example of a bulb-type lamp and a semiconductor light emitting device using the semiconductor light emitting device described in US Patent Publication No. 2013-0058080. For convenience of description, some of the reference symbols and terms have been changed.
도 3(a)에 기재된 반도체 발광소자를 사용한 전구형 램프(30)는 반도체 발광소자(40), 램프 커버(31), 코어 기둥체(32), 구동기(33) 및 전기 접속기(34)를 포함한다. 코어 기둥체(32)는 프레임(50), 나팔관(51) 및 배기관(52)을 포함한다. 프레임(50)은 지주(53), 전기 출력 인출선(54) 및 금속선(55)을 포함한다. 프레임(50)이 반도체 발광소자(40)를 고정하며, 전기를 공급하는데 사용된다. 도 3(b)에 기재된 반도체 발광소자(40)는 투명 기판(41), 반도체 발광소자 칩(42), 전기 연결선(43) 및 전극 인출선(44)을 포함한다. 전기 인출선(44)을 투명 기판(41)에 고정하기 위한 고정 장치(45)를 포함한다. 도시되지는 않았지만, 반도체 발광소자 칩(42)을 덮는 봉지재를 포함할 수 있다. 반도체 발광소자 칩(42)은 래터럴 칩이 직렬로 연결되어 있으며, 전기 연결선(43)은 와이어 본딩으로 형성된다.The bulb-shaped lamp 30 using the semiconductor light emitting device described in FIG. 3 (a) includes a semiconductor light emitting device 40, a lamp cover 31, a core pillar 32, a driver 33, and an electrical connector 34. Include. The core pillar 32 includes a frame 50, a fallopian tube 51, and an exhaust pipe 52. The frame 50 includes a strut 53, an electrical output leader 54, and a metal wire 55. The frame 50 fixes the semiconductor light emitting device 40 and is used to supply electricity. The semiconductor light emitting device 40 illustrated in FIG. 3B includes a transparent substrate 41, a semiconductor light emitting device chip 42, an electrical connection line 43, and an electrode lead line 44. And a fixing device 45 for fixing the electrical lead wire 44 to the transparent substrate 41. Although not shown, an encapsulant covering the semiconductor light emitting device chip 42 may be included. In the semiconductor light emitting device chip 42, lateral chips are connected in series, and the electrical connection line 43 is formed by wire bonding.
도 4는 미국 공개특허공보 제2014-0369036호에 기재된 전구형 램프에 사용되는 반도체 발광소자의 일 예를 보여주는 도면이다. 설명의 편의를 위해 도면기호 및 용어의 일부를 변경하였다.4 is a view showing an example of a semiconductor light emitting device used in the bulb-type lamp described in US Patent Publication No. 2014-0369036. For convenience of description, some of the reference symbols and terms have been changed.
반도체 발광소자(60)는 투명 기판(61), 반도체 발광소자 칩(62), 금속 도선(63), 봉지재(64) 및 전극 인출선(65)을 포함한다. 반도체 발광소자 칩(62)은 래터럴 칩이며, 금속 도선(63)은 와이어 본딩으로 형성된다. 반도체 발광소자 칩(62)은 직렬로 연결되어 있다. The semiconductor light emitting device 60 includes a transparent substrate 61, a semiconductor light emitting device chip 62, a metal lead 63, an encapsulant 64, and an electrode lead line 65. The semiconductor light emitting device chip 62 is a lateral chip, and the metal conductor 63 is formed by wire bonding. The semiconductor light emitting device chips 62 are connected in series.
종래의 전구형 램프에 사용되는 반도체 발광소자는 투명 기판 위에 실장되어 방열에 어려움이 있었으며, 또한 복수의 반도체 발광소자 칩을 직렬로 연결하기 위해 와이어 본딩을 사용함에 따라 와이어 본딩이 끊어지거나 와이어 본딩 공정의 번거로움이 있었다.Since the semiconductor light emitting device used in the conventional bulb type lamp is mounted on a transparent substrate, there is a difficulty in heat dissipation, and wire bonding is broken or wire bonding process by using wire bonding to connect a plurality of semiconductor light emitting device chips in series. There was a hassle.
본 개시는 금속 기판을 사용함으로써 방열 효과를 향상시키고, 와이어 본딩이 필요없는 전구형 램프에 사용되는 반도체 발광소자를 제공한다.The present disclosure improves the heat dissipation effect by using a metal substrate, and provides a semiconductor light emitting device used in a bulb type lamp that does not require wire bonding.
이에 대하여 '발명의 실시를 위한 형태'의 후단에 기술한다.This will be described later in the section on Embodiments of the Invention.
여기서는, 본 개시의 전체적인 요약(Summary)이 제공되며, 이것이 본 개시의 외연을 제한하는 것으로 이해되어서는 아니된다(This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all, provided that this is a summary of the disclosure. of its features).
본 개시에 따른 일 태양에 의하면(According to one aspect of the present disclosure), 반도체 발광소자에 있어서, 불투광성의 금속 기판;으로서, 금속 기판을 전기적으로 분리하는 절연부를 포함하는 금속 기판; 금속 기판 위에 형성된 절연층; 절연층 위에 형성된 회로층; 회로층 위에 위치하는 복수의 반도체 발광소자 칩; 그리고, 복수의 반도체 발광소자 칩을 덮는 봉지재;를 포함하며, 회로층 및 금속 기판은 길이 방향의 양측 말단부 중 적어도 일측 말단부가 봉지재로부터 노출된 것을 특징으로 하는 반도체 발광소자가 제공된다.According to one aspect of the present disclosure, there is provided a semiconductor light emitting device, comprising: an opaque metal substrate, the metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; And a sealing material covering a plurality of semiconductor light emitting device chips, wherein the circuit layer and the metal substrate are provided with at least one end portion of both end portions in the longitudinal direction from the sealing material.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자에 있어서, 불투광성의 금속 기판;으로서, 금속 기판을 전기적으로 분리하는 절연부를 포함하는 금속 기판; 금속 기판 위에 형성된 절연층; 절연층 위에 형성된 회로층; 회로층 위에 위치하는 복수의 반도체 발광소자 칩; 복수의 반도체 발광소자 칩을 덮는 봉지재; 그리고, 금속 기판의 길이 방향 양측 말단부 중 적어도 하나에 위치하는 전기 인출선;을 포함하는 것을 특징으로 하는 반도체 발광소자가 제공된다.According to another aspect of the present disclosure, there is provided a semiconductor light emitting device, comprising: an opaque metal substrate, the metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; An encapsulant covering a plurality of semiconductor light emitting device chips; And, there is provided a semiconductor light-emitting device comprising a; electrical lead wire located in at least one of the both ends of the longitudinal direction of the metal substrate.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 반도체 발광소자 제조 방법에 있어서, 금속 기판에 폭 방향으로 홀(hole)을 형성하는 단계(S1); 홀이 형성된 금속 기판 위에 도전성 기판을 접착성 절연 물질로 접합하여 절연층을 형성하는 단계(S2);로서, 접착성 절연 물질이 홀을 채우며 절연층을 형성하는 단계(S2); 도전성 기판으로부터 회로층을 형성하는 단계(S3); 회로층 위에 반도체 발광소자 칩을 실장하는 단계(S4); 그리고, 반도체 발광소자 칩을 봉지재로 덮는 단계(S6);를 포함하는 것을 특징으로 하는 반도체 발광소자 제조 방법이 제공된다.According to another aspect of the present disclosure (According to another aspect of the present disclosure), a method of manufacturing a semiconductor light emitting device, comprising: forming a hole in a width direction in a metal substrate (S1); Bonding an electrically conductive substrate on the metal substrate on which the hole is formed to form an insulating layer (S2); wherein the adhesive insulating material fills the hole to form an insulating layer (S2); Forming a circuit layer from the conductive substrate (S3); Mounting a semiconductor light emitting device chip on the circuit layer (S4); In addition, the semiconductor light emitting device chip is provided with a sealing material (S6); there is provided a semiconductor light emitting device manufacturing method comprising a.
이에 대하여 '발명의 실시를 위한 형태'의 후단에 기술한다.This will be described later in the section on Embodiments of the Invention.
도 1은 종래의 반도체 발광소자 칩의 일 예를 나타내는 도면, 1 is a view showing an example of a conventional semiconductor light emitting device chip;
도 2는 미국 등록특허공보 제7,262,436호에 제시된 반도체 발광소자 칩의 다른 예를 나타내는 도면,2 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent No. 7,262,436;
도 3은 미국 공개특허공보 제2013-0058080호에 기재된 반도체 발광소자를 사용한 전구형 램프 및 반도체 발광소자의 일 예를 보여주는 도면,3 is a view showing an example of a bulb-type lamp and a semiconductor light emitting device using the semiconductor light emitting device described in US Patent Publication No. 2013-0058080,
도 4는 미국 공개특허공보 제2014-0369036호에 기재된 전구형 램프에 사용되는 반도체 발광소자의 일 예를 보여주는 도면,4 is a view showing an example of a semiconductor light emitting device used in the bulb lamp described in US Patent Publication No. 2014-0369036,
도 5는 본 개시에 따른 반도체 발광소자의 일 예를 나타내는 도면,5 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure;
도 6은 본 개시에 따른 반도체 발광소자의 다른 일 예를 나타내는 도면,6 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 7은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면,7 is a view showing still another example of a semiconductor light emitting device according to the present disclosure;
도 8은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면,8 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 9는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면,9 illustrates another example of a semiconductor light emitting device according to the present disclosure;
도 10은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면,10 is a view showing still another example of a semiconductor light emitting device according to the present disclosure;
도 11은 본 개시에 따른 반도체 발광소자를 제조하는 방법의 일 예를 보여주는 도면.11 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
이하, 본 개시를 첨부된 도면을 참고로 하여 자세하게 설명한다(The present disclosure will now be described in detail with reference to the accompanying drawing(s)). The present disclosure will now be described in detail with reference to the accompanying drawing (s).
도 5는 본 개시에 따른 반도체 발광소자의 일 예를 나타내는 도면이다. 5 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
5(a)는 도 5(b)의 AA'선을 따라 자른 단면도이며, 도 5(b)는 평면도이다.5 (a) is a cross-sectional view taken along the line AA ′ of FIG. 5 (b), and FIG. 5 (b) is a plan view.
반도체 발광소자(100)는 금속 기판(110), 절연층(120), 회로층(130), 복수의 반도체 발광소자 칩(140), 봉지재(150) 및 전기 인출선(160)을 포함한다. 금속 기판(110)은 예를 들어 알루미늄(Al), 마그네슘(Mg), 아연(Zn), 티타늄(Ti) 등일 수 있지만, 그 중에서도 열 전도성, 반사율 등을 고려할 때 알루미늄(Al) 기판이 바람직하다. 또한 금속 기판(110)은 절연부(111)를 포함한다. 절연부(111)는 금속 기판(110)의 폭 방향(171)으로 형성되어 금속 기판(110)을 전기적으로 분리한다. 금속 기판(110)은 지지판으로서 일정한 두께가 필요하며, 150um 내지 200umm가 바람직하다. 일정한 두께를 갖기 때문에 금속 기판(110)은 불투광성이다. 절연층(120)은 금속 기판(110) 위에 절연 물질로 형성된다. 예를 들어 절연 물질은 실리콘 수지, 에폭시 수지 등일 수 있다. 회로층(130)은 절연층(120) 위에 도전 물질로 형성된다. 예를 들어 도전 물질은 은(Ag), 구리(Cu) 등일 수 있다. 복수의 반도체 발광소자 칩(140)은 회로층(130) 위에 실장되며, 래터럴 칩, 수직 칩, 플립 칩 등이 될 수 있다. 다만 반도체 발광소자 칩(140)의 전극(141)이 회로층(130)과 와이어 본딩 없이 연결되기 위해 플립 칩이 바람직하다. 도 5에서는 플립 칩이 사용되었다. 도시하지는 않았지만 반도체 발광소자 칩(140)과 회로층(130) 사이는 도전성 접착제가 위치할 수 있다. 또한 복수의 반도체 발광소자 칩(140)은 도 5(b)와 같이 길이방향(170)을 따라 회로층(130) 위에 직렬로 연결된다. 또한 반도체 발광소자(100)는 도 5(b)와 같이 폭 방향(171)은 좁고 길이 방향(170)은 긴 가늘고 긴 형상이다. 봉지재(150)는 반도체 발광소자 칩(140)을 금속 기판(110)에 안정적으로 고정시키며, 반도체 발광소자 칩(140)을 보호한다. 봉지재(150)는 예를 들어 실리콘 수지, 에폭시 수지 등으로 형성된다. 또한 봉지재(150)는 반도체 발광소자 칩(140)에서 나오는 광의 일부의 파장을 변환시켜 일정한 색을 발광하는 파장 변환재(151)를 포함하여 반도체 발광소자(100)가 백색광을 발광할 수 있다. 예를 들어 반도체 발광소자 칩(140)은 청색광을 만들고 파장 변환재(151)에 여기 되어 만들어진 광은 황색광이며, 청색광과 황색광이 혼합되어 백색광을 만들 수 있다. 파장 변환재(151)는 반도체 발광소자 칩(140)에서 나오는 광을 다른 파장의 광으로 변환하는 것이라면 어떠한 것이라도 좋지만(예: 안료, 염료 등), 광 변환 효율을 고려할 때 형광체(예: YAG, (Sr,Ba,Ca)2SiO4:Eu 등)를 사용하는 것이 바람직하다. 전기 인출선(160)은 회로층(130)의 길이 방향 양측 말단부(131)에 연결되면서 동시에 금속 기판(110)의 길이 방향 양측 말단부(112)에도 연결된다. 회로층(130)에 전극 인출선(160)이 연결되어 전기를 반도체 발광소자 칩(140)에 공급하고, 동시에 금속 기판(110)에 전극 인출선(160)이 연결되어 전극 인출선(160)은 안정적으로 고정된다. 전극 인출선(160)이 금속 기판(110)과 연결되어 전기적 쇼트 문제가 발생할 수 있지만, 폭 방향(171)으로 형성된 절연부(111)가 이러한 문제를 해결한다. 전기 인출선(160)이 금속 기판(110)과 직접 연결되어 있기 때문에, 방열에도 효과적이다. 도 5에서는 전기 인출선(160)이 회로층(130) 및 금속 기판(110)의 길이 방향 양측 말단부(131, 112)에 모두 연결되어 있지만, 양측 말단부 중 일측에만 형성될 수도 있다.The semiconductor light emitting device 100 includes a metal substrate 110, an insulating layer 120, a circuit layer 130, a plurality of semiconductor light emitting device chips 140, an encapsulant 150, and an electrical lead line 160. . The metal substrate 110 may be, for example, aluminum (Al), magnesium (Mg), zinc (Zn), titanium (Ti), or the like. Among them, an aluminum (Al) substrate is preferable in consideration of thermal conductivity and reflectance. . In addition, the metal substrate 110 includes an insulating portion 111. The insulating part 111 is formed in the width direction 171 of the metal substrate 110 to electrically separate the metal substrate 110. The metal substrate 110 needs a constant thickness as a support plate, preferably 150um to 200umm. The metal substrate 110 is opaque because of its constant thickness. The insulating layer 120 is formed of an insulating material on the metal substrate 110. For example, the insulating material may be a silicone resin, an epoxy resin, or the like. The circuit layer 130 is formed of a conductive material on the insulating layer 120. For example, the conductive material may be silver (Ag), copper (Cu), or the like. The plurality of semiconductor light emitting device chips 140 may be mounted on the circuit layer 130 and may be lateral chips, vertical chips, flip chips, or the like. However, a flip chip is preferable in order for the electrode 141 of the semiconductor light emitting device chip 140 to be connected to the circuit layer 130 without wire bonding. In Figure 5 a flip chip is used. Although not shown, a conductive adhesive may be positioned between the semiconductor light emitting device chip 140 and the circuit layer 130. In addition, the plurality of semiconductor light emitting device chips 140 are connected in series on the circuit layer 130 along the longitudinal direction 170 as shown in FIG. In addition, the semiconductor light emitting device 100 has a narrow elongated shape in the width direction 171 and a long length 170 as shown in FIG. 5 (b). The encapsulant 150 stably fixes the semiconductor light emitting device chip 140 to the metal substrate 110, and protects the semiconductor light emitting device chip 140. The encapsulant 150 is made of, for example, a silicone resin, an epoxy resin, or the like. In addition, the encapsulant 150 may include a wavelength converting member 151 that emits a predetermined color by converting a wavelength of a part of the light emitted from the semiconductor light emitting device chip 140, so that the semiconductor light emitting device 100 may emit white light. . For example, the semiconductor light emitting device chip 140 may produce blue light, and the light generated by being excited by the wavelength converting material 151 may be yellow light, and blue light and yellow light may be mixed to produce white light. The wavelength converting material 151 may be any type as long as it converts the light emitted from the semiconductor light emitting device chip 140 into light having a different wavelength (eg, pigments, dyes, etc.). , (Sr, Ba, Ca) 2 SiO 4 : Eu and the like). The electrical lead line 160 is connected to both longitudinal ends 131 of the circuit layer 130, and is also connected to both longitudinal ends 112 of the metal substrate 110. The electrode lead line 160 is connected to the circuit layer 130 to supply electricity to the semiconductor light emitting device chip 140, and at the same time, the electrode lead line 160 is connected to the metal substrate 110 to connect the electrode lead line 160. Is fixed stably. Although the electrode lead line 160 is connected to the metal substrate 110, an electrical short problem may occur, but the insulation 111 formed in the width direction 171 solves the problem. Since the electrical lead wire 160 is directly connected to the metal substrate 110, it is also effective for heat radiation. In FIG. 5, the electrical lead line 160 is connected to both the circuit layer 130 and the both ends of the metal substrate 110 in the longitudinal direction of both ends 131 and 112, but may be formed only on one side of both ends.
도 6은 본 개시에 따른 반도체 발광소자의 다른 일 예를 나타내는 도면이다. 6 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(200)는 봉지재(250)가 금속 기판(210) 및 복수의 반도체 발광소자 칩(240)을 감싸고 있다. 도 5에 기재된 반도체 발광소자(100)의 경우 금속 기판(210)이 불투광성이기 때문에 반도체 발광소자(100)에서 나오는 광은 모든 방향으로 나가지 않을 수 있다. 즉 반도체 발광소자 칩(140)이 위치하는 방향의 반대 방향으로는 광이 나가지 않을 수 있다. 특히 플립 칩을 사용하는 경우 이러한 문제는 더 심해질 수 있다. 이를 해결하기 위해 도 6에 기재된 반도체 발광소자(200)는 봉지재(250)가 금속 기판(210) 및 복수의 반도체 발광소자 칩(240)을 감싸고 있다. 봉지재(250) 내에서 광이 산란하여 반도체 발광소자 칩(240)이 위치하는 반대 방향으로도 광(260)이 나갈 수 있다. 봉지재(250) 내에서 광이 더 잘 산란할 수 있도록 하기 위해 봉지재(250)는 파장 변환재(251) 이외에 광산란재(252)를 추가로 포함할 수 있다. 도 6에서 설명하는 것을 제외하고 반도체 발광소자(200)는 도 5에 기재된 반도체 발광소자(100)와 실질적으로 동일하다.In the semiconductor light emitting device 200, an encapsulant 250 surrounds the metal substrate 210 and the plurality of semiconductor light emitting device chips 240. In the case of the semiconductor light emitting device 100 of FIG. 5, since the metal substrate 210 is opaque, light emitted from the semiconductor light emitting device 100 may not go out in all directions. That is, light may not be emitted in a direction opposite to the direction in which the semiconductor light emitting device chip 140 is located. This problem can be even worse, especially when using flip chips. In order to solve this problem, in the semiconductor light emitting device 200 of FIG. 6, an encapsulant 250 surrounds the metal substrate 210 and the plurality of semiconductor light emitting device chips 240. Light may be scattered in the encapsulant 250 so that the light 260 may go out in the opposite direction in which the semiconductor light emitting device chip 240 is positioned. In order to better scatter light in the encapsulant 250, the encapsulant 250 may further include a light scattering material 252 in addition to the wavelength converter 251. Except as illustrated in FIG. 6, the semiconductor light emitting device 200 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
도 7은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면이다. 7 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(300)는 금속 기판(310) 및 반도체 발광소자 칩(340)을 감싸고 있는 확산관(360)을 포함한다. 확산관(360)은 도 6에서 금속 기판(210) 및 복수의 반도체 발광소자 칩(240)을 감싸고 있는 봉지재(250)와 동일한 기능을 갖는다. 즉 불투명한 금속 기판(310)을 갖는 반도체 발광소자(300)가 모든 방향으로 광이 나갈 수 있도록 한다. 도 7에서 설명하는 것을 제외하고 반도체 발광소자(300)는 도 5에 기재된 반도체 발광소자(100)와 실질적으로 동일하다.The semiconductor light emitting device 300 includes a metal substrate 310 and a diffusion tube 360 surrounding the semiconductor light emitting device chip 340. The diffusion tube 360 has the same function as the encapsulant 250 surrounding the metal substrate 210 and the plurality of semiconductor light emitting device chips 240 in FIG. 6. That is, the semiconductor light emitting device 300 having the opaque metal substrate 310 may emit light in all directions. Except as illustrated in FIG. 7, the semiconductor light emitting device 300 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
도 8은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면이다. 8 illustrates another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(400)는 금속 기판(410)의 상면(411)과 하면(412) 양쪽 면에 반도체 발광소자 칩(440)을 포함한다. 절연층(420) 및 회로층(430)도 양쪽 면에 형성된다. 봉지재(450)는 금속 기판(410) 및 반도체 발광소자 칩(440)을 감싸고 있다. 금속 기판(400)의 양쪽 면(411, 412)에 반도체 발광소자 칩(440)이 위치하여 반도체 발광소자(400)는 모든 방향으로 광을 나가게 할 수 있다. 도 8에서 설명하는 것을 제외하고 반도체 발광소자(400)는 도 5에 기재된 반도체 발광소자(100)와 실질적으로 동일하다.The semiconductor light emitting device 400 includes a semiconductor light emitting device chip 440 on both top and bottom surfaces 411 and 412 of the metal substrate 410. The insulating layer 420 and the circuit layer 430 are also formed on both sides. The encapsulant 450 surrounds the metal substrate 410 and the semiconductor light emitting device chip 440. The semiconductor light emitting device chips 440 may be disposed on both surfaces 411 and 412 of the metal substrate 400, so that the semiconductor light emitting devices 400 may emit light in all directions. Except as illustrated in FIG. 8, the semiconductor light emitting device 400 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
도 9는 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면이다. 9 is a view illustrating still another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(500)는 복수의 절연부(511)를 포함하는 금속 기판(510)을 포함한다. 절연부(511)에는 탄성력이 있는 절연 물질이 채워질 수 있다. 또한 절연 물질이 채워지지 않고 공간을 형성할 수도 있다(미도시). 복수의 절연부(511)를 통해 금속 기판(510)이 도 9(b)와 같이 잘 휘어질 수 있다. 도 9에서 설명하는 것을 제외하고 반도체 발광소자(500)는 도 5에 기재된 반도체 발광소자(100)와 실질적으로 동일하다.The semiconductor light emitting device 500 includes a metal substrate 510 including a plurality of insulating portions 511. The insulating part 511 may be filled with an insulating material having elasticity. It is also possible to form a space without filling the insulating material (not shown). The metal substrate 510 may be bent as shown in FIG. 9B through the plurality of insulating parts 511. Except as illustrated in FIG. 9, the semiconductor light emitting device 500 is substantially the same as the semiconductor light emitting device 100 of FIG. 5.
도 10은 본 개시에 따른 반도체 발광소자의 또 다른 일 예를 나타내는 도면이다.10 is a view illustrating still another example of the semiconductor light emitting device according to the present disclosure.
반도체 발광소자(600)는 회로층(630) 및 금속 기판(610)의 길이 방향 양측 말단부(631, 612)가 봉지재(650)로부터 노출되어 있다. 반도체 발광소자(600)가 전기 인출선을 포함하지 않은 경우, 반도체 발광소자(600)에 전기를 공급하기 위해 도 3에 기재된 전기 출력 인출선 등과 같은 외부 전기선(미도시)이 반도체 발광소자에 연결될 수 있다. 외부 전기선이 전기를 반도체 발광소자(600)에 공급하면서 반도체 발광소자(600)에 안정적으로 고정되기 위해 외부 전기선은 회로층(630)의 길이 방향 말단부(631)에 연결되면서 동시에 금속 기판(610)의 길이 방향 말단부(612)에도 연결되도록 할 필요가 있다. 따라서 외부 전기선(미도시)이 반도체 발광소자(600)의 회로층(630) 및 금속 기판(610)에 동시에 연결되도록 하기 위해 반도체 발광소자(600)는 회로층(630) 및 금속 기판(610)의 길이 방향 양측 말단부(631, 612)가 봉지재(650)로부터 노출된다. 도 10(a)에서는 회로층(630) 및 금속 기판(610)의 길이 방향 양측 말단부(631, 612)가 모두 봉지재(650)로부터 노출되어 있지만, 양측 말단부 중 일측만 노출될 수도 있다. 또한 도 10(b)와 같이 금속 기판(610)과 회로층(630)을 연결하는 전기적 연결(660)을 포함할 수 있다. 전기적 연결(660)은 금속 기판(610)과 회로층(630)의 길이 방향 양측 말단부(612, 631)를 전기적으로 연결한다. 전기적 연결(660)에 의해, 외부 전기선이 봉지재(650)로부터 노출된 금속 기판(610)에만 연결되어도 반도체 발광소자 칩(640)에 전기를 공급할 수 있다. 즉 회로층(630)의 길이 방향 양측 말단부(631)가 봉지재(650)로부터 노출 여부와 관계없이 금속 기판(610)의 길이 방향 양측 말단부(612)만 봉지재(650)로부터 노출되어도 전기를 반도체 발광소자 칩(640)에 공급할 수 있다. 도 10에서는 도 6과 같이 봉지재(650)가 금속 기판(610)을 감싸고 있는 경우에 대해서 설명하고 있지만, 도 5와 같이 봉지재(150)가 반도체 발광소자 칩(140)만을 덮고 있는 경우에도 반도체 발광소자가 전기 인출선을 포함하지 않는 경우에는 적용될 수 있다. 도 10에서 설명하는 것을 제외하고 반도체 발광소자(600)는 도 6에 기재된 반도체 발광소자(200)와 실질적으로 동일하다.In the semiconductor light emitting device 600, the circuit layers 630 and both ends 631 and 612 in the longitudinal direction of the metal substrate 610 are exposed from the encapsulant 650. When the semiconductor light emitting device 600 does not include an electric lead wire, an external electric wire (not shown) such as the electric output lead wire shown in FIG. 3 may be connected to the semiconductor light emitting device to supply electricity to the semiconductor light emitting device 600. Can be. In order to stably fix the external electric wire to the semiconductor light emitting device 600 while supplying electricity to the semiconductor light emitting device 600, the external electric wire is connected to the longitudinal end portion 631 of the circuit layer 630 and at the same time the metal substrate 610. It is also necessary to be connected to the longitudinal distal end 612 of. Accordingly, the semiconductor light emitting device 600 may include the circuit layer 630 and the metal substrate 610 to simultaneously connect an external electric line (not shown) to the circuit layer 630 and the metal substrate 610 of the semiconductor light emitting device 600. Longitudinal both side ends 631 and 612 of are exposed from the encapsulant 650. In FIG. 10A, both end portions 631 and 612 in the longitudinal direction of the circuit layer 630 and the metal substrate 610 are exposed from the encapsulant 650, but only one side of both end portions may be exposed. In addition, as illustrated in FIG. 10B, the metal substrate 610 and the circuit layer 630 may include an electrical connection 660. The electrical connection 660 electrically connects the metal substrate 610 and the two ends 612 and 631 in the longitudinal direction of the circuit layer 630. By the electrical connection 660, even when an external electric line is connected only to the metal substrate 610 exposed from the encapsulant 650, electricity may be supplied to the semiconductor light emitting device chip 640. That is, even if both ends of the longitudinal direction 631 of the circuit layer 630 are exposed from the encapsulant 650, only the both ends of the longitudinal direction of the metal substrate 610 are exposed from the encapsulant 650. The semiconductor light emitting device chip 640 may be supplied. In FIG. 10, the encapsulant 650 surrounds the metal substrate 610 as shown in FIG. 6. However, even when the encapsulant 150 covers only the semiconductor light emitting device chip 140 as illustrated in FIG. 5. It can be applied when the semiconductor light emitting element does not include an electric lead line. Except as illustrated in FIG. 10, the semiconductor light emitting device 600 is substantially the same as the semiconductor light emitting device 200 of FIG. 6.
도 11은 본 개시에 따른 반도체 발광소자를 제조하는 방법의 일 예를 보여주는 도면이다.11 is a diagram illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.
먼저 금속 기판(700)을 준비한다. 이후 금속 기판(700)에 폭 방향으로 홀(Hole : 710)을 형성한다(S1). 홀(710)은 펀칭이나 드릴 등의 방법으로 형성할 수 있다. 이후 홀(710)이 형성된 금속 기판(700) 위에 회로층(740)을 형성하기 위한 도전성 기판(720)을 접착성 절연 물질을 사용하여 접합하여 절연층(730)을 형성한다(S2). 도전성 기판(720)은 구리(Cu) 기판이 바람직하다. 절연층(730)은 접착성 절연 물질로 형성되며, 접합 과정에서 접착성 절연 물질이 홀(710)에 채워져 절연부(711)를 형성한다. 설명을 위해 S1 단계의 평면도에서 AA' 따른 단면도로 S2 단계를 도시하였으며 이후 단계는 단면도로 설명한다. 이후 절연층(730) 위에 접합된 도전성 기판(720)으로부터 에칭 등의 방법을 사용하여 회로층(740)을 형성한다(S3). 이후 회로층(740) 위에 반도체 발광소자 칩(750)을 실장한다(S4). 이후 전기 인출선(760)이 회로층(740) 및 금속 기판(700)에 동시에 연결되도록 형성한다(S5). 이후 봉지재(770)로 덮는다(S6). 이후 길이 방향으로 절단선(780)에 따라 절단하여 전구형 램프에 사용되는 반도체 발광소자를 얻는다(S7). 지지 기판으로 사용되며, 방열 기능을 갖는 금속 기판(700)의 두께는 150 um 이상 200umm 으로 두껍기 때문에, 홀(710)은 에칭 등으로 방법으로는 불가능하다. 펀칭 등의 방법으로 미리 금속 기판(700)에 홀(710)을 형성한 후, 절연층(730)을 형성함으로써, 절연부(711)를 갖는 금속 기판(700)을 용이하게 얻을 수 있다. 전기 인출선(760)이 없는 도 10에 기재된 반도체 발광소자(600)의 경우 S5 단계를 생략하고 S6 단계를 실시한다. 이 경우 S6 단계에서 봉지재가 금속 기판(700) 및 회로층(740)의 길이 방향 말단부를 덮지 않도록 형성한다(미도시).First, the metal substrate 700 is prepared. Afterwards, holes 710 are formed in the width direction in the metal substrate 700 (S1). The hole 710 may be formed by a punching method or a drill. Thereafter, the conductive substrate 720 for forming the circuit layer 740 is formed on the metal substrate 700 on which the hole 710 is formed by using an adhesive insulating material to form an insulating layer 730 (S2). The conductive substrate 720 is preferably a copper (Cu) substrate. The insulating layer 730 is formed of an adhesive insulating material, and in the bonding process, the adhesive insulating material is filled in the hole 710 to form the insulating part 711. For illustration, step S2 is shown as a cross-sectional view along AA 'in the plan view of step S1, and subsequent steps will be described as cross-sectional views. Thereafter, the circuit layer 740 is formed from the conductive substrate 720 bonded on the insulating layer 730 by using an etching method (S3). Thereafter, the semiconductor light emitting device chip 750 is mounted on the circuit layer 740 (S4). Since the electrical lead line 760 is formed to be connected to the circuit layer 740 and the metal substrate 700 at the same time (S5). Then covered with an encapsulant 770 (S6). After cutting along the cutting line 780 in the longitudinal direction to obtain a semiconductor light emitting device used in the bulb lamp (S7). Since the thickness of the metal substrate 700, which is used as a support substrate and has a heat dissipation function, is 150 μm or more and 200 μm, the hole 710 is impossible by etching or the like. By forming the holes 710 in the metal substrate 700 in advance by a punching method or the like, and then forming the insulating layer 730, the metal substrate 700 having the insulating portion 711 can be easily obtained. In the case of the semiconductor light emitting device 600 shown in FIG. 10 without the leader line 760, step S5 is omitted and step S6 is performed. In this case, the encapsulant is formed in step S6 so as not to cover the longitudinal end portions of the metal substrate 700 and the circuit layer 740 (not shown).
이하 본 개시의 다양한 실시 형태에 대하여 설명한다.Hereinafter, various embodiments of the present disclosure will be described.
(1) 반도체 발광소자에 있어서, 불투광성의 금속 기판;으로서, 금속 기판을 전기적으로 분리하는 절연부를 포함하는 금속 기판; 금속 기판 위에 형성된 절연층; 절연층 위에 형성된 회로층; 회로층 위에 위치하는 복수의 반도체 발광소자 칩; 그리고, 복수의 반도체 발광소자 칩을 덮는 봉지재;를 포함하며, 회로층 및 금속 기판은 길이 방향의 양측 말단부 중 적어도 일측 말단부가 봉지재로부터 노출된 것을 특징으로 하는 반도체 발광소자.(1) A semiconductor light emitting device comprising: an opaque metal substrate, comprising: a metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; And an encapsulation material covering the plurality of semiconductor light emitting device chips, wherein the circuit layer and the metal substrate have at least one end portion of both end portions in the longitudinal direction exposed from the encapsulant.
(2) 절연부는 금속 기판의 폭 방향으로 형성된 것을 특징으로 하는 반도체 발광소자.(2) The semiconductor light emitting element, characterized in that the insulating portion is formed in the width direction of the metal substrate.
(3) 절연부는 복수 개 형성된 것을 특징으로 하는 반도체 발광소자.(3) A semiconductor light emitting element, characterized in that a plurality of insulating portions are formed.
(4) 복수의 반도체 발광소자 칩은 복수의 플립 칩인 것을 특징으로 하는 반도체 발광소자.(4) A plurality of semiconductor light emitting device chips are a plurality of flip chip.
(5) 복수의 플립 칩이 직렬로 연결되어 있는 것을 특징으로 하는 반도체 발광소자.(5) A semiconductor light emitting element comprising a plurality of flip chips connected in series.
(6) 봉지재가 금속 기판을 감싸고 있는 것을 특징으로 하는 반도체 발광소자.(6) A semiconductor light emitting element, wherein an encapsulant surrounds a metal substrate.
(7) 회로층과 금속 기판을 전기적으로 연결하는 전기적 연결;을 추가로 포함하는 것을 특징으로 하는 반도체 발광소자.(7) an electrical connection for electrically connecting the circuit layer and the metal substrate.
(8) 복수의 반도체 발광소자 칩 및 금속 기판을 감싸는 확산관;을 추가로 포함하는 것을 특징으로 하는 반도체 발광소자.And (8) a plurality of semiconductor light emitting device chips and a diffusion tube surrounding the metal substrate.
(9) 반도체 발광소자에 있어서, 불투광성의 금속 기판;으로서, 금속 기판을 전기적으로 분리하는 절연부를 포함하는 금속 기판; 금속 기판 위에 형성된 절연층; 절연층 위에 형성된 회로층; 회로층 위에 위치하는 복수의 반도체 발광소자 칩; 복수의 반도체 발광소자 칩을 덮는 봉지재; 그리고, 금속 기판의 길이 방향 양측 말단부 중 적어도 하나에 위치하는 전기 인출선;을 포함하는 것을 특징으로 하는 반도체 발광소자.(9) A semiconductor light emitting device comprising: an opaque metal substrate, comprising: a metal substrate including an insulating portion for electrically separating the metal substrate; An insulating layer formed on the metal substrate; A circuit layer formed on the insulating layer; A plurality of semiconductor light emitting device chips on the circuit layer; An encapsulant covering a plurality of semiconductor light emitting device chips; And electrical lead wires positioned at at least one of both ends of the metal substrate in the longitudinal direction thereof.
(10) 전기 인출선은 회로층 및 금속 기판에 동시에 연결되는 것을 특징으로 하는 반도체 발광소자.(10) A semiconductor light emitting element, wherein the lead wire is simultaneously connected to the circuit layer and the metal substrate.
(11) 반도체 발광소자 제조 방법에 있어서, 금속 기판에 폭 방향으로 홀(hole)을 형성하는 단계(S1); 홀이 형성된 금속 기판 위에 도전성 기판을 접착성 절연 물질로 접합하여 절연층을 형성하는 단계(S2);로서, 접착성 절연 물질이 홀을 채우며 절연층을 형성하는 단계(S2); 도전성 기판으로부터 회로층을 형성하는 단계(S3); 회로층 위에 반도체 발광소자 칩을 실장하는 단계(S4); 그리고, 반도체 발광소자 칩을 봉지재로 덮는 단계(S6);를 포함하는 것을 특징으로 하는 반도체 발광소자 제조 방법.(11) A method of manufacturing a semiconductor light emitting device, comprising: forming a hole in a width direction in a metal substrate (S1); Bonding an electrically conductive substrate on the metal substrate on which the hole is formed to form an insulating layer (S2); wherein the adhesive insulating material fills the hole to form an insulating layer (S2); Forming a circuit layer from the conductive substrate (S3); Mounting a semiconductor light emitting device chip on the circuit layer (S4); And covering the semiconductor light emitting device chip with an encapsulant (S6).
(12) 홀은 펀칭으로 형성하는 것을 특징으로 하는 반도체 발광소자 제조 방법.(12) A method of manufacturing a semiconductor light emitting device, characterized in that the hole is formed by punching.
(13) S4 단계와 S6 단계 사이에 전기 인출선을 형성하는 단계(S5);로서, 전기 인출선이 회로층과 금속 기판에 동시에 연결되게 전기 인출선을 형성하는 단계(S5);를 추가로 포함하는 것을 특징으로 하는 반도체 발광소자 제조 방법.(13) forming an electrical leader line between the step S4 and the step S6 (S5); forming the electrical leader line so that the electrical leader line is simultaneously connected to the circuit layer and the metal substrate (S5); Method of manufacturing a semiconductor light emitting device comprising a.
(14) S6 단계는 회로층 및 금속 기판의 길이 방향 말단부가 노출되도록 봉지재를 덮는 것을 특징으로 하는 반도체 발광소자 제조 방법.(14) The method of manufacturing a semiconductor light emitting device, characterized in that step S6 covers the encapsulant so that the longitudinal end portions of the circuit layer and the metal substrate are exposed.
본 개시에 따른 반도체 발광소자에 따르면, 방열 성능이 우수하며 와이어 본딩이 필요없는 전구용 램프에 사용되는 반도체 발광소자를 얻을 수 있다.According to the semiconductor light emitting device according to the present disclosure, it is possible to obtain a semiconductor light emitting device that is excellent in heat dissipation performance and is used in a lamp for a bulb that does not require wire bonding.

Claims (15)

  1. 반도체 발광소자에 있어서,In a semiconductor light emitting device,
    불투광성의 금속 기판;으로서, 금속 기판을 전기적으로 분리하는 절연부를 포함하는 금속 기판;An opaque metal substrate, comprising: a metal substrate including an insulating portion for electrically separating the metal substrate;
    금속 기판 위에 형성된 절연층;An insulating layer formed on the metal substrate;
    절연층 위에 형성된 회로층;A circuit layer formed on the insulating layer;
    회로층 위에 위치하는 복수의 반도체 발광소자 칩; 그리고,A plurality of semiconductor light emitting device chips on the circuit layer; And,
    복수의 반도체 발광소자 칩을 덮는 봉지재;를 포함하며,It includes; a sealing material covering a plurality of semiconductor light emitting device chips,
    회로층 및 금속 기판은 길이 방향의 양측 말단부 중 적어도 일측 말단부가 봉지재로부터 노출된 것을 특징으로 하는 반도체 발광소자.The circuit layer and the metal substrate are semiconductor light emitting devices, characterized in that at least one end portion of the both ends in the longitudinal direction is exposed from the encapsulant.
  2. 청구항 1에 있어서,The method according to claim 1,
    절연부는 금속 기판의 폭 방향으로 형성된 것을 특징으로 하는 반도체 발광소자.The insulating portion is a semiconductor light emitting device, characterized in that formed in the width direction of the metal substrate.
  3. 청구항 2에 있어서,The method according to claim 2,
    절연부는 복수 개 형성된 것을 특징으로 하는 반도체 발광소자.A semiconductor light emitting device, characterized in that a plurality of insulating portions are formed.
  4. 청구항 1에 있어서,The method according to claim 1,
    복수의 반도체 발광소자 칩은 복수의 플립 칩인 것을 특징으로 하는 반도체 발광소자.A plurality of semiconductor light emitting device chip is a semiconductor light emitting device, characterized in that a plurality of flip chip.
  5. 청구항 4에 있어서, The method according to claim 4,
    복수의 플립 칩이 직렬로 연결되어 있는 것을 특징으로 하는 반도체 발광소자.A semiconductor light emitting device, characterized in that a plurality of flip chips are connected in series.
  6. 청구항 1에 있어서,The method according to claim 1,
    봉지재가 금속 기판을 감싸고 있는 것을 특징으로 하는 반도체 발광소자.An encapsulation material surrounds a metal substrate.
  7. 청구항 1에 있어서, The method according to claim 1,
    회로층과 금속 기판을 전기적으로 연결하는 전기적 연결;을 추가로 포함하는 것을 특징으로 하는 반도체 발광소자.And an electrical connection for electrically connecting the circuit layer and the metal substrate.
  8. 청구항 1에 있어서, The method according to claim 1,
    복수의 반도체 발광소자 칩 및 금속 기판을 감싸는 확산관;을 추가로 포함하는 것을 특징으로 하는 반도체 발광소자.And a diffusion tube surrounding the plurality of semiconductor light emitting device chips and the metal substrate.
  9. 반도체 발광소자에 있어서,In a semiconductor light emitting device,
    불투광성의 금속 기판;으로서, 금속 기판을 전기적으로 분리하는 절연부를 포함하는 금속 기판;An opaque metal substrate, comprising: a metal substrate including an insulating portion for electrically separating the metal substrate;
    금속 기판 위에 형성된 절연층;An insulating layer formed on the metal substrate;
    절연층 위에 형성된 회로층;A circuit layer formed on the insulating layer;
    회로층 위에 위치하는 복수의 반도체 발광소자 칩;A plurality of semiconductor light emitting device chips on the circuit layer;
    복수의 반도체 발광소자 칩을 덮는 봉지재; 그리고,An encapsulant covering a plurality of semiconductor light emitting device chips; And,
    금속 기판의 길이 방향 양측 말단부 중 적어도 하나에 위치하는 전기 인출선;을 포함하는 것을 특징으로 하는 반도체 발광소자.And a lead wire positioned at at least one of both ends of the metal substrate in the length direction of the metal substrate.
  10. 청구항 9에 있어서,The method according to claim 9,
    절연부는 금속 기판의 폭 방향으로 형성된 것을 특징으로 하는 반도체 발광소자.The insulating portion is a semiconductor light emitting device, characterized in that formed in the width direction of the metal substrate.
  11. 청구항 9에 있어서,The method according to claim 9,
    전기 인출선은 회로층 및 금속 기판에 동시에 연결되는 것을 특징으로 하는 반도체 발광소자.The lead-out line is a semiconductor light emitting device, characterized in that connected to the circuit layer and the metal substrate at the same time.
  12. 반도체 발광소자 제조 방법에 있어서,In the method of manufacturing a semiconductor light emitting device,
    금속 기판에 폭 방향으로 홀(hole)을 형성하는 단계(S1);Forming a hole in the width direction in the metal substrate (S1);
    홀이 형성된 금속 기판 위에 도전성 기판을 접착성 절연 물질로 접합하여 절연층을 형성하는 단계(S2);로서, 접착성 절연 물질이 홀을 채우며 절연층을 형성하는 단계(S2);Bonding an electrically conductive substrate on the metal substrate on which the hole is formed to form an insulating layer (S2); wherein the adhesive insulating material fills the hole to form an insulating layer (S2);
    도전성 기판으로부터 회로층을 형성하는 단계(S3);Forming a circuit layer from the conductive substrate (S3);
    회로층 위에 반도체 발광소자 칩을 실장하는 단계(S4); 그리고,Mounting a semiconductor light emitting device chip on the circuit layer (S4); And,
    반도체 발광소자 칩을 봉지재로 덮는 단계(S6);를 포함하는 것을 특징으로 하는 반도체 발광소자 제조 방법.Covering the semiconductor light emitting device chip with an encapsulant (S6); manufacturing method of a semiconductor light emitting device comprising a.
  13. 청구항 12에 있어서,The method according to claim 12,
    홀은 펀칭으로 형성하는 것을 특징으로 하는 반도체 발광소자 제조 방법.The hole is formed by punching a semiconductor light emitting device manufacturing method characterized in that.
  14. 청구항 12에 있어서,The method according to claim 12,
    S4 단계와 S6 단계 사이에 전기 인출선을 형성하는 단계(S5);로서, 전기 인출선이 회로층과 금속 기판에 동시에 연결되게 전기 인출선을 형성하는 단계(S5);를 추가로 포함하는 것을 특징으로 하는 반도체 발광소자 제조 방법.Forming an electrical lead line between the step S4 and the step S6 (S5); further comprising forming the electrical lead line such that the electrical lead line is simultaneously connected to the circuit layer and the metal substrate (S5); A method of manufacturing a semiconductor light emitting device.
  15. 청구항 12에 있어서,The method according to claim 12,
    S6 단계는S6 steps
    회로층 및 금속 기판의 길이 방향 말단부가 노출되도록 봉지재를 덮는 것을 특징으로 하는 반도체 발광소자 제조 방법.A method of manufacturing a semiconductor light emitting device, characterized in that the sealing material is covered so that the longitudinal end portions of the circuit layer and the metal substrate are exposed.
PCT/KR2017/002266 2016-03-02 2017-03-02 Semiconductor light emitting element and manufacturing method therefor WO2017150913A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2016-0025151 2016-03-02
KR1020160025151A KR101778140B1 (en) 2016-03-02 2016-03-02 Semiconductor light emitting device and method of the same

Publications (1)

Publication Number Publication Date
WO2017150913A1 true WO2017150913A1 (en) 2017-09-08

Family

ID=59744203

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2017/002266 WO2017150913A1 (en) 2016-03-02 2017-03-02 Semiconductor light emitting element and manufacturing method therefor

Country Status (2)

Country Link
KR (1) KR101778140B1 (en)
WO (1) WO2017150913A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10386978B2 (en) * 2016-11-03 2019-08-20 Samsung Display Co., Ltd. Display apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102527952B1 (en) 2017-11-10 2023-05-03 서울반도체 주식회사 Light emitting device filament

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010251441A (en) * 2009-04-14 2010-11-04 Denki Kagaku Kogyo Kk Led module for illumination
JP2011040488A (en) * 2009-08-07 2011-02-24 Denka Agsp Kk Light-emitting element-mounting substrate and light-emitting device
KR20120063016A (en) * 2010-12-07 2012-06-15 엘지디스플레이 주식회사 Light source module
KR101356475B1 (en) * 2013-03-27 2014-01-29 한국생산기술연구원 High performance led substrate and method of manufacturing the same
JP2015002346A (en) * 2013-06-17 2015-01-05 深▲セン▼市源磊科技有限公司Ｓｈｅｎｚｈｅｎ Ｒｕｎｌｉｔｅ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏ．， Ｌｔｄ． Led lamp and filament thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010251441A (en) * 2009-04-14 2010-11-04 Denki Kagaku Kogyo Kk Led module for illumination
JP2011040488A (en) * 2009-08-07 2011-02-24 Denka Agsp Kk Light-emitting element-mounting substrate and light-emitting device
KR20120063016A (en) * 2010-12-07 2012-06-15 엘지디스플레이 주식회사 Light source module
KR101356475B1 (en) * 2013-03-27 2014-01-29 한국생산기술연구원 High performance led substrate and method of manufacturing the same
JP2015002346A (en) * 2013-06-17 2015-01-05 深▲セン▼市源磊科技有限公司Ｓｈｅｎｚｈｅｎ Ｒｕｎｌｉｔｅ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏ．， Ｌｔｄ． Led lamp and filament thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10386978B2 (en) * 2016-11-03 2019-08-20 Samsung Display Co., Ltd. Display apparatus

Also Published As

Publication number Publication date
KR20170103068A (en) 2017-09-13
KR101778140B1 (en) 2017-09-14

Similar Documents

Publication Publication Date Title
US10950759B2 (en) LED module
US10177283B2 (en) LED packages and related methods
JP5132234B2 (en) Light emitting module
US7855389B2 (en) Semiconductor light-emitting device
JP4325412B2 (en) LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE MANUFACTURING METHOD
JP3736366B2 (en) Surface mount type light emitting device and light emitting device using the same
JP5279225B2 (en) Light emitting module and manufacturing method thereof
US8399267B2 (en) Methods for packaging light emitting devices and related microelectronic devices
WO2012039528A1 (en) Light-emitting diode package and method of fabricating the same
US11605765B2 (en) LED module
TWI508334B (en) Light emitting semiconductor element and mathod of manufacturing the same
WO2017150913A1 (en) Semiconductor light emitting element and manufacturing method therefor
JP5401025B2 (en) Light emitting module and manufacturing method thereof
JP2007280983A (en) Light-emitting device
JP5039474B2 (en) Light emitting module and manufacturing method thereof
KR102100752B1 (en) Semiconductor light emitting device and method of manufacturing the same
CN210443581U (en) Semiconductor light emitting device
KR101815963B1 (en) Chip package and manufacturing method of chip package
WO2021010618A1 (en) Semiconductor light-emitting device and manufacturing method therefor
WO2017160081A2 (en) Semiconductor light emitting device
JP5227116B2 (en) Light emitting module
KR20160059451A (en) Package structure and method of manufacture thereof, and carrier
WO2014081190A1 (en) Semiconductor light-emitting device and method for encapsulating same
JP2006173196A (en) Light emitting device and light emitting diode using the same
KR102017733B1 (en) Semiconductor light emitting device and method of manufacturing the same

Legal Events

Date Code Title Description
NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17760317

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 17760317

Country of ref document: EP

Kind code of ref document: A1