WO2017143669A1 - Mura补偿电路和方法、驱动电路和显示装置 - Google Patents

Mura补偿电路和方法、驱动电路和显示装置 Download PDF

Info

Publication number
WO2017143669A1
WO2017143669A1 PCT/CN2016/081867 CN2016081867W WO2017143669A1 WO 2017143669 A1 WO2017143669 A1 WO 2017143669A1 CN 2016081867 W CN2016081867 W CN 2016081867W WO 2017143669 A1 WO2017143669 A1 WO 2017143669A1
Authority
WO
WIPO (PCT)
Prior art keywords
mura
horizontal
region
display panel
vertical
Prior art date
Application number
PCT/CN2016/081867
Other languages
English (en)
French (fr)
Inventor
赵剑
陈沫
刘玉东
熊雄
Original Assignee
京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 合肥鑫晟光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/515,922 priority Critical patent/US10403218B2/en
Publication of WO2017143669A1 publication Critical patent/WO2017143669A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306Circuit arrangements or driving methods for the control of single liquid crystal cells
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3688Details of drivers for data electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0271Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0693Calibration of display systems

Definitions

  • the present disclosure relates to a Mura compensation circuit and method, a drive circuit, and a display device.
  • the liquid crystal display Compared with the traditional cathode ray tube display, the liquid crystal display has the advantages of light body, low power consumption, no radiation, and long service life. Because of the above advantages, the liquid crystal display, as a flat panel display device, is widely used in electronic products such as mobile phones, computers, televisions, digital cameras, etc., and has occupied a dominant position in the flat panel display market.
  • a large-size liquid crystal display panel design uses a driver IC (Integrated Circuit) including more channels, or a dual gate (Dual Gate)/three-state Triple Gate drive design.
  • the difference in impedance between the fan-out zone traces of this design becomes large, which may result in blockiness (Mura) in the vertical direction and/or the horizontal direction (Mura refers to display brightness) Uneven phenomena such as unevenness.
  • the common method used by the designer is to design the fan-out area trace as a serpentine/double-layer trace, or to drive the IC internal impedance and the peripheral fan-out area trace impedance. Matching, the integrated impedance reaches the purpose of equal resistance.
  • the above method cannot achieve the desired effect due to design limitations, etc., and the occurrence of Mura defects cannot be completely eliminated, and the picture quality of the liquid crystal display panel is lowered.
  • the present disclosure provides a Mura compensation circuit and method, a drive circuit, and a display device.
  • a Mura compensation circuit comprising:
  • the vertical Mura compensation unit compensates for the vertical Mura phenomenon by respectively supplying corresponding gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel; and/or,
  • the horizontal Mura compensation unit compensates for the horizontal Mura phenomenon by providing respective gate drive signals and/or corresponding charge and discharge control signals to the horizontal bulk Mura region and the horizontal non-Mura region of the display panel, respectively.
  • the horizontal Mura compensation unit is configured to provide a first gate driving signal to the horizontal bulk Mura region and a second gate driving signal to the horizontal non-Mura region;
  • the low level value of the first gate driving signal and the low level value of the second gate driving signal are different.
  • the horizontal Mura compensation unit is configured to provide a charge and discharge control signal having a different duty ratio to the horizontal bulk Mura region and the horizontal non-Mura region;
  • the charge and discharge control signal includes a data source row latch signal and/or an output enable signal.
  • the vertical Mura compensation unit includes a plurality of gamma voltage registers; the plurality of gamma voltage registers are disposed in the source driver.
  • the horizontal Mura compensation unit includes a plurality of shift register units, each of which outputs a corresponding gate drive signal.
  • the present disclosure also provides a Mura compensation method, including:
  • the vertical Mura compensation unit respectively supplies corresponding gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel to compensate for the vertical Mura phenomenon; and/or,
  • the horizontal Mura compensation unit supplies corresponding gate drive signals and/or corresponding charge and discharge control signals to the horizontal bulk Mura region and the horizontal non-Mura region of the display panel, respectively, to compensate for the horizontal Mura phenomenon.
  • the horizontal Mura compensation unit respectively providing the corresponding horizontal gate driving signal to the horizontal block Mura region and the horizontal non-Mura region of the display panel includes: the horizontal Mura compensation unit providing the horizontal block Mura region a gate driving signal, providing a second gate driving signal to the horizontal non-Mura region;
  • the high level value of the first gate driving signal is different from the high level value of the second gate driving signal; and/or,
  • the low level value of the first gate driving signal and the low level value of the second gate driving signal are different.
  • the horizontal Mura compensation unit respectively provides a corresponding charging and discharging control signal to the horizontal block Mura region and the horizontal non-Mura region of the display panel, including: the horizontal Mura compensation unit to the horizontal block Mura region and the The horizontal non-Mura region provides charge and discharge control signals having different duty cycles; the charge and discharge control signals include data source row latch signals and/or output enable signals.
  • the Mura compensation method provided by the present disclosure further includes: sampling a gamma voltage of a Mura region on the display panel to obtain a corresponding sampling gamma curve, and the sampling gamma curve and the standard The quasi-gamma curve is compared and the gamma voltage supplied to the Mura region is adjusted according to the comparison result until the adjusted gamma curve of the Mura region coincides with the standard gamma curve.
  • the present disclosure also provides a driving circuit for a display panel, including the above-described Mura compensation circuit.
  • the driving circuit of the display panel provided by the present disclosure further includes N source drivers disposed along the horizontal direction on the side or lower side of the display panel; N is a positive integer;
  • the vertical Mura compensation unit in the Mura compensation circuit includes M gamma voltage registers; M is an integer greater than one;
  • a plurality of gamma voltage registers disposed along a horizontal direction are disposed in each of the source drivers.
  • the driving circuit of the display panel provided by the present disclosure further includes a gate driver
  • the horizontal Mura compensation unit in the Mura compensation circuit includes a plurality of shift register units arranged in order from the top left or the right side of the display panel, each of the shift register units outputting a corresponding gate Drive signal
  • the plurality of shift register units are disposed in the gate driver.
  • the present disclosure also provides a display device including a display panel and a driving circuit of the above display panel.
  • the Mura compensation circuit and method, the driving circuit and the display device provided by the present disclosure compensate the vertical Mura phenomenon by using a vertical Mura compensation unit to supply different values of gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel.
  • the different regions of the display panel may have the same
  • the display effect can improve the display quality degradation caused by the difference in impedance between different positions in the display panel, improve the quality of the picture, solve the problem of design limitation, etc., can not achieve the desired effect, can not completely eliminate the occurrence of Mura undesirable phenomenon, reduce the liquid crystal
  • the problem of the picture quality of the display panel. Can be widely promoted and used.
  • FIG. 1 is a structural block diagram of a Mura compensation circuit according to an embodiment of the present disclosure
  • FIG. 2 is a schematic view showing a vertical block Mura defect on a liquid crystal display panel
  • FIG. 3 is a schematic structural diagram of a first embodiment of a Mura compensation circuit according to an embodiment of the present disclosure including a vertical Mura compensation unit;
  • FIG. 4 is a flowchart of a gamma curve comparison adjustment method included in a Mura compensation method according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of a gamma curve of a liquid crystal display panel
  • FIG. 6 is a schematic diagram of a first embodiment of a Mura compensation circuit provided by an embodiment of the present disclosure, including a plurality of source drivers, including a structure of M gamma registers disposed in each of the source drivers;
  • FIG. 7A is a schematic view showing a horizontal block Mura defect on a liquid crystal display panel
  • FIG. 7B is a schematic structural diagram of a second embodiment of a Mura compensation circuit according to an embodiment of the present disclosure, including a horizontal Mura compensation unit;
  • FIG. 8 is a schematic diagram of a second embodiment of a Mura compensation circuit provided by an embodiment of the present disclosure, including a plurality of gate drivers, including a plurality of shift registers disposed in each of the gate drivers;
  • Figure 9 is a waveform diagram of a gate drive signal output from a shift register
  • Fig. 10 is a schematic view showing the simultaneous occurrence of a vertical bulk Mura defect and a horizontal bulk Mura defect on a liquid crystal display panel.
  • FIG. 1 is a structural block diagram of a Mura compensation circuit provided by an embodiment of the present disclosure. As shown in FIG. 1 , the Mura compensation circuit provided by the embodiment of the present disclosure includes:
  • the vertical Mura compensation unit 11 compensates the vertical Mura phenomenon by respectively supplying corresponding gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel 10; and/or
  • the horizontal Mura compensation unit 12 compensates for the horizontal Mura phenomenon by supplying respective gate drive signals and/or corresponding charge and discharge control signals to the horizontal bulk Mura region and the horizontal non-Mura region of the display panel 10, respectively.
  • the Mura compensation circuit compensates the vertical Mura phenomenon by using the vertical Mura compensation unit 11 to supply different values of gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel 10, through the horizontal Mura compensation unit. 12 provides different gate drive signals and/or different charge and discharge controls to the horizontal bulk Mura region and the horizontal non-Mura region of the display panel 10. The signal is compensated for the horizontal Mura phenomenon, so that different regions of the display panel have the same display effect, which can improve the display quality degradation caused by the difference in impedance between different positions in the display panel, improve the quality of the picture, and can be widely promoted and use.
  • the vertical Mura compensation unit may include a plurality of gamma voltage registers to facilitate providing respective gamma voltages for the vertical block Mura region and the vertical non-Mura region of the display panel;
  • the plurality of gamma voltage registers are disposed in a source driver.
  • the plurality of gamma voltage registers may be arranged in order from left to right on the upper side or the lower side of the display panel.
  • the horizontal Mura compensation unit is configured to provide a first gate driving signal to the horizontal bulk Mura region and a second gate driving signal to the horizontal non-Mura region;
  • the high level value Vgh1 of the first gate driving signal is different from the high level value Vgh2 of the second gate driving signal; and/or,
  • the low level value Vgl1 of the first gate driving signal and the low level value Vgl2 of the second gate driving signal are different.
  • the horizontal Mura compensation unit provides different gate drive signals to compensate for Mura
  • the effect of changing the charge and discharge is achieved by adjusting the high level value Vgh and/or the low level value Vgl of the gate drive signal, thereby causing the display
  • Different areas on the panel have the same display effect, which improves the defect and improves the picture quality of the display panel.
  • the vertical block-shaped Mura region refers to a block-shaped region in the vertical direction on the display panel 10 in which the Mura phenomenon exists, and the vertical non-Mura region refers to a region on the display panel 10 in which the Mura phenomenon does not exist in the vertical direction;
  • the Mura region refers to a region where the Mura phenomenon exists in the horizontal direction on the display panel 10, and the horizontal non-Mura region refers to a region on the display panel 10 where the Mura phenomenon does not exist in the vertical direction.
  • the horizontal Mura compensation unit may include a plurality of shift register units, each of which outputs a corresponding gate drive signal to be conveniently a horizontal block-shaped Mura region and a horizontal non-Mura of the display panel.
  • the region provides a gate drive signal having a corresponding high level and/or low value.
  • the plurality of shift register units may be disposed in a gate driver, and the plurality of shift register units are sequentially disposed from the top to the bottom on a left side or a right side of the display panel.
  • the horizontal Mura compensation unit is used to the horizontal block
  • the Mura region and the horizontal non-Mura region provide charge and discharge control signals having different duty cycles.
  • the charge and discharge control signal may include a data source line latch (TP) signal and/or an output enable (OE) signal.
  • TP data source line latch
  • OE output enable
  • the horizontal Mura compensation unit can also affect the charging and discharging effects of different regions on the display panel by changing the duty ratio of the charging and discharging control signals, thereby achieving the purpose of compensation.
  • the charge and discharge control signal may be not only a TP (Data Source Line Latch) signal supplied from the timing controller to the source driver, but also an OE signal supplied from the timing controller to the gate driver.
  • TP Data Source Line Latch
  • the vertical Mura compensation unit respectively supplies corresponding gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel to compensate for the vertical Mura phenomenon;
  • the horizontal Mura compensation unit respectively supplies corresponding gate drive signals and/or corresponding charge and discharge control signals to the horizontal block Mura region and the horizontal non-Mura region of the display panel to compensate for the horizontal Mura phenomenon.
  • the Mura compensation method compensates the vertical Mura phenomenon by using a vertical Mura compensation unit to provide different values of gamma voltages to the vertical block Mura region and the vertical non-Mura region of the display panel, and the horizontal Mura compensation unit is
  • the horizontal block Mura region and the horizontal non-Mura region of the display panel provide different gate drive signals and/or different charge and discharge control signals to compensate for the horizontal Mura phenomenon, which can make different regions of the display panel have the same display effect, and can improve
  • the display quality degradation caused by the difference in impedance between different positions in the display panel improves the quality of the picture and can be widely promoted and used.
  • the step of the horizontal Mura compensation unit providing a corresponding gate drive signal to the horizontal block Mura region and the horizontal non-Mura region of the display panel respectively includes: the horizontal Mura compensation unit providing the first horizontal bulk Mura region a gate driving signal, providing a second gate driving signal to the horizontal non-Mura region;
  • the high level value of the first gate driving signal is different from the high level value of the second gate driving signal; and/or,
  • the low level value of the first gate driving signal and the low level value of the second gate driving signal are different.
  • the horizontal Mura compensation unit provides different gate drive signals to compensate for Mura
  • the high-level value Vgh and/or the low-level value Vgl of the gate drive signal are adjusted to achieve the effect of changing the charge and discharge, thereby causing the display
  • Different areas on the panel have the same display effect, resulting in poor improvement.
  • the step of the horizontal Mura compensation unit providing a corresponding charging and discharging control signal to the horizontal bulk Mura region and the horizontal non-Mura region of the display panel respectively includes: the horizontal Mura compensation unit to the horizontal bulk Mura region and the The horizontal non-Mura region provides charge and discharge control signals having different duty cycles; the charge and discharge control signals include TP signals and/or OE signals.
  • the horizontal Mura compensation unit can also affect the charging and discharging effects of different regions on the display panel by changing the duty ratio of the charging and discharging control signals, thereby achieving the purpose of compensation.
  • the Mura compensation method provided by the embodiment of the present disclosure further includes: sampling a gamma voltage of the Mura region on the display panel to obtain a corresponding sampling gamma curve (the gamma curve is a relationship between transmittance and gray scale) Curve), compare the sampled gamma curve with the standard gamma curve, and adjust the gamma voltage provided by the Mura region according to the comparison result until the adjusted gamma curve of the Mura region coincides with the standard gamma curve.
  • the Mura compensation method provided by the embodiment of the present disclosure increases the steps of gamma curve sampling and contrast, so that the gamma curves of the respective regions on the display panel coincide with the standard gamma curve to optimize the display effect.
  • the driving circuit of the display panel provided by the embodiment of the present disclosure includes the above-described Mura compensation circuit.
  • the driving circuit of the display panel of the present disclosure further includes N source drivers disposed along the horizontal direction on the upper side or the lower side of the display panel; N is a positive integer;
  • the vertical Mura compensation unit in the Mura compensation circuit includes M gamma voltage registers; M is an integer greater than one;
  • a plurality of gamma voltage registers disposed along a horizontal direction are disposed in each of the source drivers.
  • the driving circuit of the display panel according to the embodiment of the present disclosure further includes a gate driver
  • the horizontal Mura compensation unit in the Mura compensation circuit includes a plurality of shift register units arranged in order from the top left or the right side of the display panel, each of the shift register units outputting a corresponding gate Drive signal
  • the plurality of shift register units are disposed in the gate driver.
  • the Mura compensation circuit provided by the present disclosure will be described below by three specific embodiments.
  • Fig. 2 is a view showing the appearance of a vertical block-shaped Mura defect on a liquid crystal display panel.
  • a vertical block (block) Mura defect has appeared on the liquid crystal display panel.
  • 201 denotes a first vertical block-shaped Mura region
  • 202 denotes a second vertical block-shaped Mura region
  • 212 indicates a second vertical non-Mura region
  • 213 indicates a third vertical non-Mura region.
  • the first embodiment of the Mura compensation circuit of the present disclosure inputs different gamma voltages in the vertical block Mura region and the vertical non-Mura region, so that different regions of the liquid crystal display panel have the same display effect, thereby improving defects and improving picture quality. the goal of;
  • FIG. 3 is a schematic structural diagram of a first embodiment of a Mura compensation circuit according to an embodiment of the present disclosure including a vertical Mura compensation unit.
  • the vertical Mura compensation unit includes M gamma voltage registers
  • the display device includes a source driver 30, and M gamma voltage registers are disposed in the source driver. 30 in.
  • M gamma voltage registers are sequentially disposed in the source driver 30 from left to right.
  • labeled 321 is the first gamma voltage register
  • labeled 322 is the second gamma voltage register
  • labeled 32m is the mth gamma voltage register
  • labeled 32M is the Mth gamma voltage register.
  • M is a positive integer greater than 4
  • m is a positive integer
  • m is equal to M-1. For example, when M is equal to 5, m is equal to 4.
  • Ouput 1 is the first output end of the source driver 30 (ie, the leftmost output terminal), and the output N is labeled as the Nth output terminal of the source driver 30 (ie, the rightmost output terminal); N is the source The number of outputs of the pole driver 30, N is a positive integer.
  • the gamma voltage output from the source driver 30 is set to M groups, and in hardware, only the original The gamma voltage register conversion with a single block is divided into M gamma voltage registers.
  • a first embodiment of the Mura compensation circuit of the present disclosure utilizes the selectivity of the gamma voltage output from the source driver to provide a multi-region adjustable/continuously adjustable output.
  • the gamma curve of the measured vertical block-shaped Mura region (for example, the first vertical block-shaped Mura region 201 and the second vertical block-shaped Mura region 202) definitely deviates from the gamma value.
  • a standard gamma curve of 2.2. Adjusting the gamma curve in the vertical block Mura region by changing the gamma voltage in the gamma voltage register in the source driver 30 corresponding to the vertical bulk Mura region, so that the measured gamma of the vertical bulk Mura region The curve coincides with a standard gamma curve with a gamma value of 2.2. That is, the display effect of controlling the vertical block-shaped Mura region is the same as that of the vertical non-Mura region, and the purpose of improving the defect and improving the picture quality is achieved.
  • step S401 it is necessary to capture the vertical block shape Mura of the liquid crystal display panel.
  • a display image at a particular series of gray scale voltages within the region is fitted to the measured gamma curve 503 (the measured gamma curve 503 is shown in FIG. 5) and the gamma value in the vertical bulk Mura region.
  • step S402 the embodiment analyzes the gamma curve of the vertical block-shaped Mura region as a gamma curve with a gamma value less than 2.2, and the measured gamma curve is the gamma curve 503 in FIG.
  • the measured gamma curve 503 is compared to a standard gamma curve 501. It can be seen that the measured gamma curve 503 in the vertical bulk Mura region deviates from the standard gamma curve 501 with a gamma value of 2.2, resulting in display unevenness. It is necessary to separately output the gamma voltage of the vertical bulk Mura region and the gamma voltage of the vertical non-Mura curve, and perform separate control.
  • the gamma voltage value corresponding to the horse curve 502 controls the vertical block Mura region.
  • the purpose of such control is to cause the gamma curve in the vertical bulk Mura region to be offset from the gamma curve 503 with a previous gamma value of less than 2.2 to the standard gamma curve 501 with a gamma value equal to 2.2.
  • step S403 a display image under a specific series of gray scale voltages in the vertical block Mura region of the adjusted liquid crystal display panel is captured, and the adjusted measured gamma curve in the vertical block Mura region is fitted and Gamma value.
  • step S404 it is determined whether the adjusted gamma curve of the vertical block-shaped Mura region coincides with a standard gamma curve.
  • the adjustment ends.
  • the display effect of the vertical block-shaped Mura region on the liquid crystal display panel is the same as that of the vertical non-Mura region on the liquid crystal display panel, and the vertical Mura phenomenon cannot be observed, and the vertical Mura defect is improved.
  • the gamma voltage adjustment of the vertical bulk Mura region needs to be performed again.
  • the adjustment method is as follows: 1) If the gamma value of the adjusted gamma curve of the vertical block Mura region is less than 2.2, it needs to be adjusted with reference to the gamma voltage corresponding to the gamma curve with a gamma value greater than 2.2; 2) if vertical The gamma value of the adjusted gamma curve in the bulk Mura region is greater than 2.2, and is adjusted by referring to the gamma voltage corresponding to the gamma curve having a gamma value of less than 2.2. The gamma voltage is selected according to the specific deviation state of the gamma curve of the vertical bulk Mura region from the standard gamma curve until the adjusted vertical bulk Mura region gamma curve coincides with the standard gamma curve.
  • the initial measured gamma in the vertical block-shaped Mura region is shown.
  • the gamma value of the horse curve is less than 2.2 for explanation.
  • the gamma value of the initial measured gamma curve of the vertical block Mura region is greater than 2.2.
  • the vertical block Mura phenomenon can also be improved by the above steps.
  • the gamma curve of the liquid crystal display panel is as shown in FIG. 5, where 501 is a standard gamma curve with a gamma value of 2.2. According to requirements, the gamma curve of the normal display area coincides with the standard gamma curve with a gamma value of 2.2, while the area of the block Mura exists, and the gamma curve offset gamma value of 2.2 in this area is due to display abnormality.
  • Standard gamma curve. 502 indicates a gamma curve with a gamma value greater than 2.2
  • 503 indicates a gamma curve with a gamma value less than 2.2.
  • a gamma curve 502 having a gamma value greater than 2.2 is a gamma curve for reference correction input in advance; in actual operation, actual The measured gamma curve may also be a gamma curve 502 having a gamma value greater than 2.2, and then the gamma curve 503 having a gamma value less than 2.2 is a gamma curve for reference correction input in advance.
  • a plurality of gamma voltage registers may be respectively disposed in the respective source drivers to further compensate for differences in gamma voltages of different regions on the display panel.
  • the display device includes K source drivers (K is an integer greater than 12) disposed on the lower side of the liquid crystal display panel 60 from left to right as an example, and may be corresponding to different source drivers.
  • K is an integer greater than 12
  • Different vertical block Mura regions set different gamma voltages to compensate for display differences.
  • reference numeral 61 is the first source driver
  • 62 is the second source driver
  • 6K is the Kth source driver.
  • M gamma voltage registers (M is an integer greater than 1) are provided from left to right in each source driver.
  • Reference numeral 11 is a first gamma register disposed in the first source driver 61
  • reference numeral 1M is an Mth gamma register disposed in the first source register 61
  • reference numeral 21 is disposed at the second source.
  • the first gamma register in the register 62, the label 2M is the Mth gamma register set in the second source register 62;
  • the label K1 is the first gamma register set in the Kth source driver 6K.
  • the label KM is the Mth gamma register set in the Kth source driver 6K.
  • Fig. 7A is a view showing a horizontal block Mura failure occurring on a liquid crystal display panel. As shown in Fig. 7A, a horizontal block Mura defect appears on the liquid crystal display panel.
  • 701 designates a first horizontal block-shaped Mura region
  • 711 designates a first horizontal non-Mura region
  • 712 designates a second horizontal non-Mura region
  • a second embodiment of the Mura compensation circuit provided by an embodiment of the present disclosure is in a horizontal block shape Mura
  • the regional and horizontal non-Mura regions input different gate drive signals, and the gate drive signals may have different high level values Vgh and/or low level values Vgl to achieve a change in charge and discharge effects, so that different regions have the same
  • the display effect achieves the purpose of improving the improvement and improving the picture quality.
  • FIG. 7B is a schematic structural diagram of a second embodiment of a Mura compensation circuit according to an embodiment of the present disclosure including a horizontal Mura compensation unit.
  • Output1-Outputn is the n gate drive signal output terminals of the source driver
  • 703 is the gate driver
  • n is a positive integer.
  • a second embodiment of the Mura compensation circuit of the present disclosure includes a horizontal Mura compensation unit.
  • the horizontal Mura compensation unit includes m shift registers disposed in the gate driver 703 included in the display device, and m is an integer greater than 3.
  • the m shift registers are sequentially disposed in the gate driver 703 from top to bottom.
  • the first shift register is labeled 721
  • the second shift register is labeled 722
  • the Mth shift register is labeled 72M
  • the mth shift register is labeled 72m
  • M is equal to m-1; for example, when m is equal to 4, M is equal to 3.
  • a second embodiment of the Mura compensation circuit of the present disclosure sets the gate drive signal to a high level and/or a low level for a gate driver including n gate drive signal outputs.
  • Multiple groups of different values m groups). In hardware, only the shift register conversion of the original single block is required to be divided into m shift registers, and the high level value Vgh and/or the low level value Vgl of the gate drive signal output by each shift register may be different. .
  • FIG. 8 shows a second embodiment of a Mura compensation circuit provided by an embodiment of the present disclosure when the display panel includes a plurality of gate drivers, including a structural schematic diagram of m shift registers disposed in each of the gate drivers.
  • the left side of the liquid crystal display panel 80 is provided with k gate drivers arranged in order from top to bottom, and k is a positive integer.
  • 11 denotes a first shift register disposed in the first gate driver 81
  • 1m denotes an mth shift register disposed in the first gate driver 81, and is disposed in the first gate driver 81.
  • the m shift registers are sequentially disposed in the first gate driver 81 from top to bottom; k1 indicates the first shift register unit disposed in the kth gate driver 8k, and km indicates the setting on the kth gate driver 8k.
  • the mth shift register unit in the mth shift register provided in the kth gate driver 8k is sequentially disposed in the kth gate driver 8k from top to bottom.
  • Fig. 9 is a waveform diagram showing a gate drive signal output from a shift register.
  • Gate11 is a gate drive signal output from the shift register 11
  • Gate1m is a gate drive signal output from the shift register 1m.
  • the high level of Gate11 is Vgh11
  • the low level of Gate11 is Vgl11, Gate1m.
  • the high level value is Vgh1m
  • the low level value of Gate1m is Vgl1m.
  • Vgh11 is not equal to Vghm1, and Vgl11 may not be equal to Vglm1.
  • the plurality of shift registers provided in the gate driver can not only compensate the charge/discharge effect by changing the high level value Vgh and/or the low level value Vgl of the output gate drive signal. It is also possible to achieve a compensation effect by changing the duty ratio of the charge/discharge control signal that affects the charge and discharge effects of the liquid crystal display panel, such as the TP signal and the OE signal.
  • Fig. 10 is a view showing the simultaneous occurrence of vertical bulk Mura failure and horizontal bulk Mura failure on the liquid crystal display panel.
  • a vertical block-shaped Mura region and a horizontal block-shaped Mura region appear simultaneously on the display panel.
  • a vertical block-shaped Mura region labeled as 101 on the display panel is indicated as 102.
  • the third embodiment of the Mura compensation circuit provided by the present disclosure simultaneously employs a vertical Mura compensation unit and a horizontal Mura compensation unit.
  • the structure of the vertical Mura compensation unit may be the same as the structure of the first embodiment of the Mura compensation circuit provided by the present disclosure, and the structure of the horizontal Mura compensation unit may be compared with the second embodiment of the Mura compensation circuit provided by the present disclosure.
  • the structure is the same. It is to be noted that, in FIG. 10, there are regions where the horizontal Mura phenomenon and the vertical Mura phenomenon occur simultaneously, that is, the regions where the vertical bulk Mura region 101 and the horizontal bulk Mura region 102 overlap.
  • the Mura phenomenon compensation for this region not only compensates for the vertical Mura phenomenon by providing different gamma voltages through the gamma voltage registers provided in the source driver, but also provides high power through the shift register provided in the gate driver.
  • the gate drive signal having a different value of flat value and/or low level (or by changing the duty ratio of the charge and discharge control signal) compensates for the horizontal Mura phenomenon.
  • a display device provided by an embodiment of the present disclosure includes a display panel and a driving circuit of the above display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种Mura补偿电路和方法、驱动电路和显示装置。该Mura补偿电路包括:垂直Mura补偿单元(11),通过分别向显示面板(10)的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,以补偿垂直Mura现象;和/或,水平Mura补偿单元(12),通过分别向显示面板(10)的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,以补偿水平Mura现象。该补偿电路可以使得显示面板(10)的不同区域具有相同的显示效果,能够改善由于显示面板(10)内不同位置阻抗差异造成的显示质量的下降,提高了画面的品质,可以广泛的推广和使用。

Description

Mura补偿电路和方法、驱动电路和显示装置 技术领域
本公开涉及一种Mura补偿电路和方法、驱动电路和显示装置。
背景技术
液晶显示器相比于传统的阴极射线管显示器,具有机身轻薄、耗电低、无辐射、使用寿命长等优点。正是由于具有上述优点,液晶显示器作为一种平板显示装置,被广泛应用于手机、计算机、电视、数码相机等电子产品中,已占据平板显示市场的主导地位。
随着平板显示技术的快速发展,为了降低生产成本,大尺寸液晶显示面板的设计中会采用包括更多通道的驱动IC(Integrated Circuit,集成电路),或者采用双栅(Dual Gate)/三态门(Triple Gate)驱动设计。这种设计的扇出(Fan-out)区走线之间的阻抗差异变大,因此可能导致垂直方向和/或水平方向的块状(Block)不匀(Mura)(Mura指的是显示器亮度不均匀)等不良现象。为了解决这类由于阻抗差异导致的不良现象,设计者常用的方法就是将扇出区走线设计为蛇形走线/双层走线,或将驱动IC内部阻抗与外围扇出区走线阻抗相匹配,综合阻抗达到等电阻的目的。上述方法由于设计限制等原因,无法达到理想效果,不能完全消除Mura不良现象的发生,降低液晶显示面板的画面品质。
发明内容
本公开提供一种Mura补偿电路和方法、驱动电路和显示装置。
按照本公开的一个方面,提供了一种Mura补偿电路,包括:
垂直Mura补偿单元,通过分别向显示面板的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,来补偿垂直Mura现象;和/或,
水平Mura补偿单元,通过分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,来补偿水平Mura现象。
可替换地,所述水平Mura补偿单元用于向所述水平块状Mura区域提供第一栅极驱动信号,向所述水平非Mura区域提供第二栅极驱动信号;
所述第一栅极驱动信号的高电平值和所述第二栅极驱动信号的高电平值 不同;和/或,
所述第一栅极驱动信号的低电平值和所述第二栅极驱动信号的低电平值不同。
可替换地,所述水平Mura补偿单元用于向所述水平块状Mura区域和所述水平非Mura区域提供占空比不同的充放电控制信号;
所述充放电控制信号包括数据源行锁存信号和/或输出使能信号。
可替换地,所述垂直Mura补偿单元包括多个伽马电压寄存器;所述多个伽马电压寄存器设置于源极驱动器中。
可替换地,所述水平Mura补偿单元包括多个移位寄存器单元,每个所述移位寄存器单元输出相应的栅极驱动信号。
本公开还提供了一种Mura补偿方法,包括:
垂直Mura补偿单元分别向显示面板的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,以补偿垂直Mura现象;和/或,
水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,以补偿水平Mura现象。
可替换地,所述水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号包括:所述水平Mura补偿单元向所述水平块状Mura区域提供第一栅极驱动信号,向所述水平非Mura区域提供第二栅极驱动信号;
所述第一栅极驱动信号的高电平值和所述第二栅极驱动信号的高电平值不同;和/或,
所述第一栅极驱动信号的低电平值和所述第二栅极驱动信号的低电平值不同。
可替换地,所述水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的充放电控制信号包括:所述水平Mura补偿单元向所述水平块状Mura区域和所述水平非Mura区域提供占空比不同的充放电控制信号;所述充放电控制信号包括数据源行锁存信号和/或输出使能信号。
可替换地,本公开提供的Mura补偿方法还包括:对显示面板上的Mura区域的伽马电压进行采样,得到相应的采样伽马曲线,将该采样伽马曲线与标 准伽马曲线对比,根据对比结果调整为Mura区域提供的伽马电压,直至调整后的Mura区域的伽马曲线与标准伽马曲线重合。
本公开还提供了一种显示面板的驱动电路,包括上述的Mura补偿电路。
可替换地,本公开提供的显示面板的驱动电路还包括在显示面板上侧边或下侧边沿着水平方向设置的N个源极驱动器;N为正整数;
所述Mura补偿电路中的垂直Mura补偿单元包括M个伽马电压寄存器;M为大于1的整数;
每一所述源极驱动器中都设置有沿着水平方向设置的多个伽马电压寄存器。
可替换地,本公开提供的显示面板的驱动电路还包括栅极驱动器;
所述Mura补偿电路中的水平Mura补偿单元包括沿着显示面板左侧边或右侧边从上至下依次设置的多个移位寄存器单元,每个所述移位寄存器单元输出相应的栅极驱动信号;
所述多个移位寄存器单元设置于所述栅极驱动器中。
本公开还提供了一种显示装置,包括显示面板和上述的显示面板的驱动电路。
本公开提供的Mura补偿电路和方法、驱动电路和显示装置,通过采用垂直Mura补偿单元向显示面板的垂直块状Mura区域和垂直非Mura区域提供不同值的伽马电压,以补偿垂直Mura现象,通过水平Mura补偿单元向显示面板的水平块状Mura区域和水平非Mura区域提供不同的栅极驱动信号和/不同的充放电控制信号以补偿水平Mura现象,可以使得显示面板的不同区域具有相同的显示效果,能够改善由于显示面板内不同位置阻抗差异造成的显示质量的下降,提高了画面的品质,解决了由于设计限制等原因,无法达到理想效果,不能完全消除Mura不良现象的发生,降低液晶显示面板的画面品质的问题。可以广泛的推广和使用。
附图说明
图1是本公开实施例提供的Mura补偿电路的结构框图;
图2是液晶显示面板上出现垂直块状Mura不良的示意图;
图3是本公开实施例提供的Mura补偿电路的第一具体实施例包括垂直Mura补偿单元的结构示意图;
图4是本公开实施例提供的Mura补偿方法包括的伽马曲线对比调整方法的流程图;
图5是液晶显示面板的伽马曲线示意图;
图6是显示面板包括多个源极驱动器时本公开实施例提供的Mura补偿电路的第一具体实施例包括设置于每一个源极驱动器中的M个伽马寄存器的结构示意图;
图7A是液晶显示面板上出现水平块状Mura不良的示意图;
图7B是本公开实施例提供的Mura补偿电路的第二具体实施例包括水平Mura补偿单元的结构示意图;
图8是显示面板包括多个栅极驱动器时本公开实施例提供的Mura补偿电路的第二具体实施例包括设置于每一个栅极驱动器中的m个移位寄存器的结构示意图;
图9是移位寄存器输出的栅极驱动信号的波形图;
图10是液晶显示面板上同时出现垂直块状Mura不良和水平块状Mura不良的示意图。
具体实施方式
下面将结合本公开实施例中的附图,对本公开实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本公开一部分实施例,而不是全部的实施例。
图1示出了本公开实施例提供的Mura补偿电路的结构框图。如图1所示,本公开实施例提供的Mura补偿电路包括:
垂直Mura补偿单元11,通过分别向显示面板10的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,以补偿垂直Mura现象;和/或,
水平Mura补偿单元12,通过分别向显示面板10的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,以补偿水平Mura现象。
本公开实施例提供的Mura补偿电路通过采用垂直Mura补偿单元11向显示面板10的垂直块状Mura区域和垂直非Mura区域提供不同值的伽马电压,来补偿垂直Mura现象,通过水平Mura补偿单元12向显示面板10的水平块状Mura区域和水平非Mura区域提供不同的栅极驱动信号和/不同的充放电控 制信号来补偿水平Mura现象,从而可以使得显示面板的不同区域具有相同的显示效果,能够改善由于显示面板内不同位置阻抗差异造成的显示质量的下降,提高了画面的品质,可以广泛的推广和使用。
例如,所述垂直Mura补偿单元可以包括多个伽马电压寄存器,以方便为显示面板的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压;
所述多个伽马电压寄存器设置于源极驱动器中。
在实际操作时,所述多个伽马电压寄存器可以从左至右依次排列于显示面板的上侧边或下侧边。
根据一种具体实施方式,所述水平Mura补偿单元用于向所述水平块状Mura区域提供第一栅极驱动信号,向所述水平非Mura区域提供第二栅极驱动信号;
所述第一栅极驱动信号的高电平值Vgh1和所述第二栅极驱动信号的高电平值Vgh2不同;和/或,
所述第一栅极驱动信号的低电平值Vgl1和所述第二栅极驱动信号的低电平值Vgl2不同。
当水平Mura补偿单元提供不同的栅极驱动信号来补偿Mura时,是通过调节栅极驱动信号的高电平值Vgh和/或低电平值Vgl,来达到改变充放电的效果,从而使得显示面板上的不同区域具有相同的显示效果,达到改善不良,提高显示面板的画面品质的效果。
其中,垂直块状Mura区域是指显示面板10上的垂直方向的块状的存在Mura现象的区域,垂直非Mura区域是指显示面板10上在垂直方向上不存在Mura现象的区域;水平块状Mura区域是指显示面板10上水平方向的存在Mura现象的区域,水平非Mura区域是指显示面板10上在垂直方向上不存在Mura现象的区域。
例如,所述水平Mura补偿单元可以包括多个移位寄存器单元,每个所述移位寄存器单元输出相应的栅极驱动信号,以能够方便的为显示面板的水平块状Mura区域和水平非Mura区域提供具有相应的高电平值和/或低电平值的栅极驱动信号。
在实际操作时,所述多个移位寄存器单元可以设置于栅极驱动器中,所述多个移位寄存器单元从上至下依次设置于所述显示面板的左侧边或右侧边。
根据另一种具体实施方式,所述水平Mura补偿单元用于向所述水平块状 Mura区域和所述水平非Mura区域提供占空比不同的充放电控制信号。
所述充放电控制信号可以包括数据源行锁存(TP)信号和/或输出使能(OE)信号。
在实际操作时,水平Mura补偿单元也可以通过改变充放电控制信号的占空比来影响显示面板上的不同区域的充放电效果,达到补偿目的。
充放电控制信号不仅可以是由时序控制器提供给源极驱动器的TP(数据源行锁存)信号,也可以是由时序控制器提供给栅极驱动器的OE信号。
本公开实施例提供的Mura补偿方法执行以下操作:
S1:垂直Mura补偿单元分别向显示面板的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,以补偿垂直Mura现象;和/或,
S2:水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,以补偿水平Mura现象。
本公开实施例所述的Mura补偿方法通过采用垂直Mura补偿单元向显示面板的垂直块状Mura区域和垂直非Mura区域提供不同值的伽马电压,以补偿垂直Mura现象,通过水平Mura补偿单元向显示面板的水平块状Mura区域和水平非Mura区域提供不同的栅极驱动信号和/不同的充放电控制信号以补偿水平Mura现象,可以使得显示面板的不同区域具有相同的显示效果,能够改善由于显示面板内不同位置阻抗差异造成的显示质量的下降,提高了画面的品质,可以广泛的推广和使用。
例如,所述水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号步骤包括:所述水平Mura补偿单元向所述水平块状Mura区域提供第一栅极驱动信号,向所述水平非Mura区域提供第二栅极驱动信号;
所述第一栅极驱动信号的高电平值和所述第二栅极驱动信号的高电平值不同;和/或,
所述第一栅极驱动信号的低电平值和所述第二栅极驱动信号的低电平值不同。
当水平Mura补偿单元提供不同的栅极驱动信号来补偿Mura时,是通过调节栅极驱动信号的高电平值Vgh和/或低电平值Vgl,以达到改变充放电的效果,从而使得显示面板上的不同区域具有相同的显示效果,达到改善不良, 提高显示面板的画面品质的效果。
例如,所述水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的充放电控制信号步骤包括:所述水平Mura补偿单元向所述水平块状Mura区域和所述水平非Mura区域提供占空比不同的充放电控制信号;所述充放电控制信号包括TP信号和/或OE信号。
在实际操作时,水平Mura补偿单元也可以通过改变充放电控制信号的占空比来影响显示面板上的不同区域的充放电效果,达到补偿目的。
可替换地,本公开实施例提供的Mura补偿方法还包括:对显示面板上的Mura区域的伽马电压进行采样,得到相应的采样伽马曲线(伽马曲线是透过率与灰阶的关系曲线),将该采样伽马曲线与标准伽马曲线对比,根据对比结果调整为Mura区域提供的伽马电压,直至调整后的Mura区域的伽马曲线与标准伽马曲线重合。
本公开实施例提供的Mura补偿方法增加了伽马曲线采样和对比的步骤,以使得显示面板上的各个区域的伽马曲线都与标准伽马曲线重合,优化显示效果。
本公开实施例提供的显示面板的驱动电路包括上述的Mura补偿电路。
例如,本公开的显示面板的驱动电路还包括在显示面板上侧或下侧沿着水平方向设置的N个源极驱动器;N为正整数;
所述Mura补偿电路中的垂直Mura补偿单元包括M个伽马电压寄存器;M为大于1的整数;
每一所述源极驱动器中都设置有沿着水平方向设置的多个伽马电压寄存器。
例如,本公开实施例所述的显示面板的驱动电路还包括栅极驱动器;
所述Mura补偿电路中的水平Mura补偿单元包括沿着显示面板左侧边或右侧边从上至下依次设置的多个移位寄存器单元,每个所述移位寄存器单元输出相应的栅极驱动信号;
所述多个移位寄存器单元设置于所述栅极驱动器中。
下面通过三个具体实施例来说明本公开提供的Mura补偿电路。
图2示出了液晶显示面板上出现垂直块状Mura不良的示意图。如图2所示,液晶显示面板上已经出现了垂直Block(块状)Mura不良。在图2中,201标示第一垂直块状Mura区域,202标示第二垂直块状Mura区域;211标示第 一垂直非Mura区域,212标示第二垂直非Mura区域,213标示第三垂直非Mura区域。
本公开的Mura补偿电路的第一具体实施例在垂直块状Mura区域和垂直非Mura区域输入不同的伽马电压,使得液晶显示面板的不同区域具有相同的显示效果,达到改善不良,提高画面品质的目的;
图3示出了本公开实施例提供的Mura补偿电路的第一具体实施例包括垂直Mura补偿单元的结构示意图。如图3所示,在该Mura补偿电路的第一具体实施例中,垂直Mura补偿单元包括M个伽马电压寄存器,显示装置包括源极驱动器30,M个伽马电压寄存器设置于源极驱动器30中。
M个伽马电压寄存器从左至右依次设置于所述源极驱动器30中。
在图3中,标示为321的为第一伽马电压寄存器,标示为322的为第二伽马电压寄存器,标示为32m的为第m伽马电压寄存器,标示为32M为第M伽马电压寄存器。M为大于4的正整数,m为正整数,m等于M-1。例如,当M等于5时,m等于4。
Ouput 1为源极驱动器30的第一输出端(即最左端的输出端子),标示为Output N的为源极驱动器30的第N输出端(即最右端的输出端子);N为所述源极驱动器30的输出端的个数,N为正整数。
在本公开的Mura补偿电路的第一具体实施例中,对于具有N个输出端的源极驱动器30,将源极驱动器30输出的伽马电压设定为M组,在硬件上,仅需要将原有单区块的伽马电压寄存器转换分割为M个伽马电压寄存器。
本公开所述的Mura补偿电路的第一具体实施例利用源极驱动器内部输出的伽马电压的可选择性,设置多区域可调/连续可调的输出端。
以图2中出现的垂直块状Mura为例,实测得到的垂直块状Mura区域(例如第一垂直块状Mura区域201、第二垂直块状Mura区域202)的伽马曲线肯定偏离伽马值为2.2的标准伽马曲线。通过改变该垂直块状Mura区域对应的源极驱动器30中的伽马电压寄存器内的伽马电压,调节该垂直块状Mura区域内的伽马曲线,使得该垂直块状Mura区域的实测伽马曲线与伽马值为2.2的标准伽马曲线重合。即控制垂直块状Mura区域的显示效果和垂直非Mura区域的显示效果相同,达到改善不良,提高画面品质的目的。
伽马曲线校准的流程图如图4所示。
如图4所示,在步骤S401中,需要捕获液晶显示面板的垂直块状Mura 区域内在特定的一系列灰阶电压下的显示图像,拟合出该垂直块状Mura区域内的实测伽马曲线503(该实测伽马曲线503在图5中示出)及伽马值。
在步骤S402中,本实施例以该垂直块状Mura区域的实测伽马曲线为伽马值小于2.2的伽马曲线为例进行分析,实测伽马曲线为图5中的伽马曲线503。将该实测伽马曲线503与标准伽马曲线501进行对比。可以看出该垂直块状Mura区域内的实测伽马曲线503偏离伽马值为2.2的标准伽马曲线501,造成显示不均。需要对所述垂直块状Mura区域的伽马电压与垂直非Mura曲线的伽马电压分别输出,进行单独控制。相应调整所述垂直块状Mura区域对应的源极驱动器中相应的伽马电压寄存器,使伽马电压寄存器输出的伽马电压参考图5中伽马曲线502,即参考伽马值大于2.2的伽马曲线502所对应的伽马电压值,对所述垂直块状Mura区域进行控制。这样控制的目的是使所述垂直块状Mura区域内的伽马曲线由先前伽马值小于2.2的伽马曲线503向伽马值等于2.2的标准伽马曲线501方向偏移。
在步骤S403中,捕获调整后的液晶显示面板的垂直块状Mura区域内在特定的一系列灰阶电压下的显示图像,拟合出该垂直块状Mura区域内的调整后的实测伽马曲线及伽马值。
在步骤S404中,判断所述垂直块状Mura区域的调整后的伽马曲线是否与标准伽马曲线重合。
如果垂直块状Mura区域的经过调整后的伽马曲线与标准伽马曲线重合,即调整结束。所述液晶显示面板上的垂直块状Mura区域调整后的显示效果与液晶显示面板上的垂直非Mura区域的显示效果相同,无法观测到垂直Mura现象,垂直Mura不良得到改善。
如果垂直块状Mura区域经过调整后的伽马曲线与标准伽马曲线不重合,需要再次对所述垂直块状Mura区域进行伽马电压调整。调整的方法是:1)如果垂直块状Mura区域经过调整后的伽马曲线的伽马值小于2.2,需参考伽马值大于2.2的伽马曲线对应的伽马电压进行调整;2)如果垂直块状Mura区域经过调整后的伽马曲线的伽马值大于2.2,需参考伽马值小于2.2的伽马曲线对应的伽马电压进行调整。伽马电压的选择根据垂直块状Mura区域的伽马曲线与标准伽马曲线的具体偏离状态而定,直到调整后垂直块状Mura区域伽马曲线与标准伽马曲线重合。
这里需要说明的是,在本实施例中,以垂直块状Mura区域初始的实测伽 马曲线的伽马值小于2.2进行说明。但是垂直块状Mura区域初始实测伽马曲线的伽马值大于2.2同样可以通过上述步骤,进行相应变动即可改善垂直块状Mura现象。
液晶显示面板的伽马曲线如图5所示,其中501为伽马值为2.2的标准伽马曲线。根据要求,正常显示区域的伽马曲线与伽马值为2.2的标准伽马曲线重合,而存在块状Mura的区域,由于显示异常,该区域内的伽马曲线偏移伽马值为2.2的标准伽马曲线。502标示伽马值大于2.2的伽马曲线,503标示伽马值小于2.2的伽马曲线。当实测的伽马曲线为伽马值小于2.2的伽马曲线503时,伽马值大于2.2的伽马曲线502为预先设定输入的用于参考校正的伽马曲线;在实际操作时,实际测得的伽马曲线也可以为伽马值大于2.2的伽马曲线502,则此时伽马值小于2.2的伽马曲线503为预先设定输入的用于参考校正的伽马曲线。
本公开实施例提供的显示装置采用多个源极驱动器的情况,还可以分别在各个源极驱动器中设置多个伽马电压寄存器,进一步补偿显示面板上不同区域伽马电压的差异。
如图6所示,以显示装置包括从左至右依次设置于液晶显示面板60下侧边的K个源极驱动器(K为大于12的整数)为例,可以为不同的源极驱动器对应的不同的垂直块状Mura区域设定不同的伽马电压,以此补偿显示差异。
在图6中,标号为61的为第一源极驱动器,标号为62的为第二源极驱动器,标号为6K的为第K源极驱动器。在每一源极驱动器中从左至右设置有M个伽马电压寄存器(M为大于1的整数)。标号11的为设置于第一源极驱动器61中的第一伽马寄存器,标号1M的为设置于第一源极寄存器61中的第M伽马寄存器,标号21的为设置于第二源极寄存器62中的第一伽马寄存器,标号2M的为设置于第二源极寄存器62中的第M伽马寄存器;标号为K1的为设置于第K源极驱动器6K中的第一伽马寄存器,标号KM的为设置于第K源极驱动器6K中的第M伽马寄存器。
图7A示出液晶显示面板上出现水平块状Mura不良的示意图。如图7A所示,液晶显示面板上出现了水平块状Mura不良。在图7A中,701标示第一水平块状Mura区域,711标示第一水平非Mura区域,712标示第二水平非Mura区域;
本公开实施例提供的Mura补偿电路的第二具体实施例在水平块状Mura 区域和水平非Mura区域输入不同的栅极驱动信号,这些栅极驱动信号可以具有不同的高电平值Vgh和/或低电平值Vgl,以达到改变充放电的效果,使得不同区域具有相同的显示效果,达到改善不良,提高画面品质的目的。
图7B示出本公开实施例提供的Mura补偿电路的第二具体实施例包括水平Mura补偿单元的结构示意图。如图7B所示,Output1-Outputn为源极驱动器的n个栅极驱动信号输出端,标号为703的是栅极驱动器,n为正整数。
本公开的Mura补偿电路的第二具体实施例包括水平Mura补偿单元。该水平Mura补偿单元包括设置于显示装置包括的栅极驱动器703中的m个移位寄存器,m为大于3的整数。
所述m个移位寄存器从上至下依次设置于所述栅极驱动器703中。
在图7B中,标示为721的为第一移位寄存器,标示为722的为第二移位寄存器,标示为72M的为第M移位寄存器,标示为72m的为第m移位寄存器,M为整数,M等于m-1;例如,当m等于4时,M等于3。
如图7B所示,本公开的Mura补偿电路的第二具体实施例对于包括n个栅极驱动信号输出端的栅极驱动器,将栅极驱动信号设定为高电平值和/或低电平值不同的多组(m组)。在硬件上,仅需要原有单区块的移位寄存器转换分割为m个移位寄存器,各个移位寄存器输出的栅极驱动信号的高电平值Vgh和/或低电平值Vgl可以不同。
图8示出当显示面板包括多个栅极驱动器时本公开实施例提供的Mura补偿电路的第二具体实施例包括设置于每一个栅极驱动器中的m个移位寄存器的结构示意图。如图8所示,液晶显示面板80左侧边设置有k个从上至下依次设置的栅极驱动器,k为正整数。在图8中,11标示设置于第一栅极驱动器81中的第一移位寄存器,1m标示设置于第一栅极驱动器81中的第m移位寄存器,设置于第一栅极驱动器81中的m个移位寄存器从上至下依次设置于第一栅极驱动器81中;k1标示设置于第k栅极驱动器8k中的第一移位寄存器单元,km标示设置于第k栅极驱动器8k中的第m移位寄存器单元,设置于第k栅极驱动器8k中的m个移位寄存器从上至下依次设置于第k栅极驱动器8k中。
图9示出移位寄存器输出的栅极驱动信号的波形图。如图9所示,Gate11是移位寄存器11输出的栅极驱动信号,Gate1m是移位寄存器1m输出的栅极驱动信号。Gate11的高电平值为Vgh11,Gate11的低电平值为Vgl11,Gate1m 的高电平值为Vgh1m,Gate1m的低电平值为Vgl1m。由图9可知,Vgh11不等于Vghm1,Vgl11也可以不等于Vglm1。
这里需要说明的是,栅极驱动器中设置的多个移位寄存器不仅可以通过改变输出的栅极驱动信号的高电平值Vgh和/或低电平值Vgl,以达到补偿充/放电的效果,也可以通过改变TP信号、OE信号等影响液晶显示面板充放电效果的充放电控制信号的占空比,以达到补偿效果。
图10示出了液晶显示面板上同时出现垂直块状Mura不良和水平块状Mura不良的示意图。在实际操作时,也存在显示面板上同时出现垂直块状Mura区域和水平块状Mura区域的情况,例如如图10所示,显示面板上标示为101的为垂直块状Mura区域,标示为102的为水平块状Mura区域。此时本公开提供的Mura补偿电路的第三具体实施例同时采用垂直Mura补偿单元和水平Mura补偿单元。所述垂直Mura补偿单元的结构可以与本公开提供的Mura补偿电路的第一具体实施例的结构相同,所述水平Mura补偿单元的结构可以与本公开提供的Mura补偿电路的第二具体实施例的结构相同。需要注意的是,在图10中,存在同时出现水平Mura现象和垂直Mura现象的区域,即垂直块状Mura区域101和水平块状Mura区域102交叠的区域。针对该区域的Mura现象补偿不仅同时通过设置于源极驱动器中的伽马电压寄存器提供不同的伽马电压来补偿垂直Mura现象,同时也需要通过设置于栅极驱动器中的移位寄存器提供高电平值和/或低电平值不同的栅极驱动信号(或通过改变充放电控制信号的占空比)来补偿水平Mura现象。
本公开实施例提供的显示装置包括显示面板和上述的显示面板的驱动电路。
以上所述是本公开的可替换实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本公开所述原理的前提下,还可以作出若干改进和润饰,这些改进和润饰也应视为本公开的保护范围。
本申请要求于2016年2月26日递交的中国专利申请第201610108632.9号的优先权,在此全文引用该中国专利申请公开的内容作为本申请的一部分。

Claims (13)

  1. 一种Mura补偿电路,包括:
    垂直Mura补偿单元,通过分别向显示面板的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,来补偿垂直Mura现象;和/或,
    水平Mura补偿单元,通过分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,来补偿水平Mura现象。
  2. 如权利要求1所述的Mura补偿电路,其中,所述水平Mura补偿单元用于向所述水平块状Mura区域提供第一栅极驱动信号,向所述水平非Mura区域提供第二栅极驱动信号;
    所述第一栅极驱动信号的高电平值和所述第二栅极驱动信号的高电平值不同;和/或,
    所述第一栅极驱动信号的低电平值和所述第二栅极驱动信号的低电平值不同。
  3. 如权利要求1所述的Mura补偿电路,其中,所述水平Mura补偿单元用于向所述水平块状Mura区域和所述水平非Mura区域提供占空比不同的充放电控制信号;
    所述充放电控制信号包括数据源行锁存信号和/或输出使能信号。
  4. 如权利要求1-3之一所述的Mura补偿电路,其中,所述垂直Mura补偿单元包括多个伽马电压寄存器;所述多个伽马电压寄存器设置于源极驱动器中。
  5. 如权利要求1-3之一所述的Mura补偿电路,其中,所述水平Mura补偿单元包括多个移位寄存器单元,每个所述移位寄存器单元输出相应的栅极驱动信号。
  6. 一种Mura补偿方法,包括:
    垂直Mura补偿单元分别向显示面板的垂直块状Mura区域和垂直非Mura区域提供相应的伽马电压,以补偿垂直Mura现象;和/或,
    水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号和/或相应的充放电控制信号,以补偿水平Mura现象。
  7. 如权利要求6所述的Mura补偿方法,其中,所述水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的栅极驱动信号包括:所述水平Mura补偿单元向所述水平块状Mura区域提供第一栅极驱动信号,向所述水平非Mura区域提供第二栅极驱动信号;
    所述第一栅极驱动信号的高电平值和所述第二栅极驱动信号的高电平值不同;和/或,
    所述第一栅极驱动信号的低电平值和所述第二栅极驱动信号的低电平值不同。
  8. 如权利要求6所述的Mura补偿方法,其中,所述水平Mura补偿单元分别向显示面板的水平块状Mura区域和水平非Mura区域提供相应的充放电控制信号包括:所述水平Mura补偿单元向所述水平块状Mura区域和所述水平非Mura区域提供占空比不同的充放电控制信号;所述充放电控制信号包括数据源行锁存信号和/或输出使能信号。
  9. 如权利要求6至8中任一权利要求所述的Mura补偿方法,其中,还包括:对显示面板上的Mura区域的伽马电压进行采样,得到相应的采样伽马曲线,将该采样伽马曲线与标准伽马曲线对比,根据对比结果调整为Mura区域提供的伽马电压,直至调整后的Mura区域的伽马曲线与标准伽马曲线重合。
  10. 一种显示面板的驱动电路,其中,包括如权利要求1至5中任一权利要求所述的Mura补偿电路。
  11. 如权利要求10所述的显示面板的驱动电路,其中,还包括在显示面板上侧边或下侧边沿着水平方向设置的N个源极驱动器;N为正整数;
    所述Mura补偿电路中的垂直Mura补偿单元包括M个伽马电压寄存器;M为大于1的整数;
    每一所述源极驱动器中都设置有沿着水平方向设置的多个伽马电压寄存器。
  12. 如权利要求10或11所述的显示面板的驱动电路,其中,还包括栅极驱动器;
    所述Mura补偿电路中的水平Mura补偿单元包括沿着显示面板左侧边或右侧边从上至下依次设置的多个移位寄存器单元,每个所述移位寄存器单元输出相应的栅极驱动信号;
    所述多个移位寄存器单元设置于所述栅极驱动器中。
  13. 一种显示装置,其中,包括显示面板和如权利要求10至12中任一权利要求所述的显示面板的驱动电路。
PCT/CN2016/081867 2016-02-26 2016-05-12 Mura补偿电路和方法、驱动电路和显示装置 WO2017143669A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/515,922 US10403218B2 (en) 2016-02-26 2016-05-12 Mura compensation circuit and method, driving circuit and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610108632.9 2016-02-26
CN201610108632.9A CN105575350A (zh) 2016-02-26 2016-02-26 Mura补偿电路和方法、驱动电路和显示装置

Publications (1)

Publication Number Publication Date
WO2017143669A1 true WO2017143669A1 (zh) 2017-08-31

Family

ID=55885411

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/081867 WO2017143669A1 (zh) 2016-02-26 2016-05-12 Mura补偿电路和方法、驱动电路和显示装置

Country Status (3)

Country Link
US (1) US10403218B2 (zh)
CN (1) CN105575350A (zh)
WO (1) WO2017143669A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110085186A (zh) * 2019-05-05 2019-08-02 京东方科技集团股份有限公司 一种分区过渡补偿方法、装置及存储介质

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105575350A (zh) 2016-02-26 2016-05-11 京东方科技集团股份有限公司 Mura补偿电路和方法、驱动电路和显示装置
US10699662B2 (en) * 2016-09-12 2020-06-30 Novatek Microelectronics Corp. Integrated circuit for driving display panel and method thereof
CN106991981B (zh) * 2017-05-02 2019-09-10 深圳市华星光电技术有限公司 mura补偿数据参考值位置的选取方法
CN107170418A (zh) * 2017-06-20 2017-09-15 惠科股份有限公司 驱动装置及其驱动方法和显示装置
CN107045863B (zh) * 2017-06-26 2018-02-16 惠科股份有限公司 一种显示面板的灰阶调整方法及装置
CN108597434A (zh) * 2018-04-28 2018-09-28 深圳市华星光电技术有限公司 显示画面的调整方法
CN109119035A (zh) * 2018-07-24 2019-01-01 深圳市华星光电半导体显示技术有限公司 mura补偿方法及mura补偿系统
CN109686343B (zh) * 2019-01-21 2020-05-26 武汉精立电子技术有限公司 一种Color Mura消除方法
CN110111714A (zh) * 2019-04-16 2019-08-09 福建华佳彩有限公司 一种商用显示器源极走线电压的补偿方法
CN110010047A (zh) * 2019-05-16 2019-07-12 陕西坤同半导体科技有限公司 一种显示面板的测试方法及装置
CN110428766A (zh) * 2019-06-27 2019-11-08 福建华佳彩有限公司 不规则屏均匀显示方法及均匀显示的不规则屏
KR20210157953A (ko) * 2020-06-22 2021-12-30 삼성디스플레이 주식회사 표시 장치를 검사하는 검사 장치, 얼룩 보상을 수행하는 표시 장치 및 얼룩 보상 방법
US11341891B2 (en) * 2020-09-10 2022-05-24 Tcl China Star Optoelectronics Technology Co., Ltd. Display panel adjustment method dividing fan-out mura region
CN112150978A (zh) * 2020-09-16 2020-12-29 惠科股份有限公司 信号补偿系统、信号补偿方法
CN112542137B (zh) * 2020-12-15 2022-05-24 Oppo广东移动通信有限公司 亮度补偿方法及芯片、装置、设备、存储介质
CN113393817A (zh) * 2021-06-18 2021-09-14 惠州华星光电显示有限公司 显示装置及其驱动方法
CN113963666A (zh) * 2021-11-09 2022-01-21 禹创半导体(深圳)有限公司 一种oled全线性伽玛补偿调光及切换系统与方法
CN114299843B (zh) * 2021-12-31 2023-07-25 昆山龙腾光电股份有限公司 显示面板的驱动方法、驱动装置及显示装置
CN114942536B (zh) 2022-07-26 2022-10-28 惠科股份有限公司 液晶显示组件及电子设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101772801A (zh) * 2007-08-10 2010-07-07 夏普株式会社 显示装置、显示装置的控制装置、显示装置的驱动方法、液晶显示装置、及电视接收机
CN101802903A (zh) * 2007-10-04 2010-08-11 夏普株式会社 显示装置及显示装置的驱动方法
CN103474016A (zh) * 2013-09-11 2013-12-25 青岛海信电器股份有限公司 分区驱动处理方法、处理装置及显示器
KR20150077171A (ko) * 2013-12-27 2015-07-07 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동 방법
CN105575350A (zh) * 2016-02-26 2016-05-11 京东方科技集团股份有限公司 Mura补偿电路和方法、驱动电路和显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8610654B2 (en) * 2008-07-18 2013-12-17 Sharp Laboratories Of America, Inc. Correction of visible mura distortions in displays using filtered mura reduction and backlight control
CN103500566B (zh) * 2013-09-29 2016-10-05 京东方科技集团股份有限公司 显示设备、显示亮度不均改善装置及改善方法
US10008172B2 (en) * 2014-05-13 2018-06-26 Apple Inc. Devices and methods for reducing or eliminating mura artifact using DAC based techniques

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101772801A (zh) * 2007-08-10 2010-07-07 夏普株式会社 显示装置、显示装置的控制装置、显示装置的驱动方法、液晶显示装置、及电视接收机
CN101802903A (zh) * 2007-10-04 2010-08-11 夏普株式会社 显示装置及显示装置的驱动方法
CN103474016A (zh) * 2013-09-11 2013-12-25 青岛海信电器股份有限公司 分区驱动处理方法、处理装置及显示器
KR20150077171A (ko) * 2013-12-27 2015-07-07 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동 방법
CN105575350A (zh) * 2016-02-26 2016-05-11 京东方科技集团股份有限公司 Mura补偿电路和方法、驱动电路和显示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110085186A (zh) * 2019-05-05 2019-08-02 京东方科技集团股份有限公司 一种分区过渡补偿方法、装置及存储介质

Also Published As

Publication number Publication date
US20180233096A1 (en) 2018-08-16
US10403218B2 (en) 2019-09-03
CN105575350A (zh) 2016-05-11

Similar Documents

Publication Publication Date Title
WO2017143669A1 (zh) Mura补偿电路和方法、驱动电路和显示装置
CN102428404B (zh) 液晶面板
US9146409B2 (en) LCD, array substrate of LCD and method for repairing broken line
US9865217B2 (en) Method of driving display panel and display apparatus
KR101018755B1 (ko) 액정 표시 장치
KR20080010551A (ko) 표시 장치의 구동 장치 및 이를 포함하는 표시 장치
KR20180096880A (ko) 표시 장치의 구동 방법
CN102608817B (zh) 液晶显示装置
US7973785B2 (en) Control board and display apparatus having the same
WO2020113653A1 (zh) 显示面板的驱动方法和驱动电路
EP3040973B1 (en) Display device
TW201905890A (zh) 顯示裝置及其伽瑪曲線補償電路與驅動方法
WO2020087645A1 (zh) 信号控制电路及包含信号控制电路的显示装置
KR102459705B1 (ko) 액정표시장치
US11210974B2 (en) Driving circuit of display apparatus
TWI656522B (zh) 顯示裝置之驅動模組及驅動方法
WO2020001594A1 (zh) 降低阵列基板行驱动电流的电路及方法和液晶显示器
US20160293117A1 (en) Liquid crystal displays and methods for adjusting brightness and contrast thereof
KR101100879B1 (ko) 표시 장치 및 그 구동 방법
KR100984358B1 (ko) 액정 표시 장치 및 그 구동 장치
KR100984347B1 (ko) 액정 표시 장치 및 그 구동 방법
KR20050077573A (ko) 액정 표시 장치
KR100980013B1 (ko) 액정 표시 장치 및 그 구동 방법
CN109031816B (zh) 阵列基板及控制方法、显示装置
KR100983712B1 (ko) 액정표시장치의 구동부

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15515922

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16891123

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16891123

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 20/05/2019)

122 Ep: pct application non-entry in european phase

Ref document number: 16891123

Country of ref document: EP

Kind code of ref document: A1