WO2017107287A1 - 阵列基板及阵列基板中tft器件的启动方法 - Google Patents

阵列基板及阵列基板中tft器件的启动方法 Download PDF

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Publication number
WO2017107287A1
WO2017107287A1 PCT/CN2016/072434 CN2016072434W WO2017107287A1 WO 2017107287 A1 WO2017107287 A1 WO 2017107287A1 CN 2016072434 W CN2016072434 W CN 2016072434W WO 2017107287 A1 WO2017107287 A1 WO 2017107287A1
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light
shielding metal
tft
metal blocks
array substrate
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French (fr)
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李亚锋
彭香艺
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US14/914,655 priority Critical patent/US9905493B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6723—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having light shields
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6745—Polycrystalline or microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133382—Heating or cooling of liquid crystal cells other than for activation, e.g. circuits or arrangements for temperature control, stabilisation or uniform distribution over the cell
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/104—Materials and properties semiconductor poly-Si

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a method for starting a TFT device in an array substrate and an array substrate.
  • TFT Thin Film Transistor
  • LCD Liquid Crystal Display
  • AMOLED Active Matrix Organic Light-Emitting Diode
  • the driving component is directly related to the development direction of high-performance flat panel display devices.
  • LTPS Low Temperature Poly-silicon
  • a-Si amorphous silicon
  • the array substrate includes a base substrate 100, a light-shielding metal layer 200 disposed on the base substrate 100, and a thin film transistor layer 300 disposed on the light-shielding metal layer 200; the thin film transistor layer 300 A plurality of thin film transistors 310 are included.
  • the light shielding metal layer 200 includes a plurality of light shielding metal blocks 210 corresponding to the plurality of thin film transistors 310.
  • the plurality of light shielding metal blocks 210 are independent of each other and are not connected to each other. When the conventional liquid crystal display panel is activated in a low temperature environment, the screen response is likely to be slow.
  • Another object of the present invention is to provide a method for starting a TFT device in an array substrate, which can realize rapid startup of a TFT device in a low temperature environment.
  • the present invention provides an array substrate including a substrate substrate and a substrate a light shielding metal layer on the base substrate, and a TFT layer provided on the light shielding metal layer;
  • the light-shielding metal layer comprises a plurality of light-shielding metal blocks distributed in a matrix, the plurality of light-shielding metal blocks are divided into m rows, and a plurality of light-shielding metal blocks in each row are connected in series by wires;
  • the m rows of light-shielding metal blocks are grouped by n rows, wherein 1 ⁇ n ⁇ m, two wires are used to connect the left and right ends of the n-row light-shielding metal blocks respectively, and several parallel combinations are obtained. So that each of the parallel combinations has two outwardly extending wires at both ends, and the parallel combination is energized by connecting the two wires to the power source, so that the plurality of light shielding metal blocks in the parallel combination are heated, thereby
  • the TFT layer is preheated to increase the startup speed of the TFT device in the TFT layer.
  • the TFT layer includes a plurality of TFTs disposed corresponding to the plurality of light-shielding metal blocks of the light-shielding metal layer, that is, each of the TFTs is disposed above a light-shielding metal block.
  • the TFT is a low temperature polysilicon TFT.
  • the number of rows of the light-shielding metal blocks included in the plurality of parallel combinations is the same or different.
  • the light-shielding metal layer includes m/2 parallel combinations, wherein each of the parallel combinations includes two rows of light-shielding metal blocks.
  • the invention also provides a method for starting a TFT device in an array substrate, comprising the following steps:
  • Step 1 providing an array substrate, the array substrate comprising a base substrate, a light shielding metal layer disposed on the base substrate, and a TFT layer disposed on the light shielding metal layer;
  • the light-shielding metal layer comprises a plurality of light-shielding metal blocks distributed in a matrix, the plurality of light-shielding metal blocks are divided into m rows, and a plurality of light-shielding metal blocks in each row are connected in series by wires;
  • the m rows of light-shielding metal blocks are grouped by n rows, wherein 1 ⁇ n ⁇ m, two wires are used to connect the left and right ends of the n-row light-shielding metal blocks respectively, and several parallel combinations are obtained. So that each end of each parallel combination has two outwardly extending wires;
  • Step 2 by connecting wires on both sides of each parallel combination to a power source, energizing the parallel combination, so that a plurality of light-shielding metal blocks in the parallel combination generate heat, thereby preheating the TFT layer, and then facing the TFT layer Powering on, starting the TFT device in the TFT layer;
  • Step 3 After the TFT device in the TFT layer is started, disconnect the wires on both sides of the parallel combination from the power source, and stop supplying power to the parallel combination.
  • the TFT layer includes a plurality of TFTs disposed corresponding to the plurality of light-shielding metal blocks of the light-shielding metal layer, that is, each of the TFTs is disposed above a light-shielding metal block.
  • the TFT is a low temperature polysilicon TFT.
  • the number of rows of the light-shielding metal blocks included in the plurality of parallel combinations is the same or different.
  • the light-shielding metal layer includes m/2 parallel combinations, wherein each of the parallel combinations includes two rows of light-shielding metal blocks.
  • the invention also provides an array substrate, comprising a substrate substrate, disposed on the substrate substrate a light shielding metal layer and a TFT layer disposed on the light shielding metal layer;
  • the light-shielding metal layer comprises a plurality of light-shielding metal blocks distributed in a matrix, the plurality of light-shielding metal blocks are divided into m rows, and a plurality of light-shielding metal blocks in each row are connected in series by wires;
  • the m rows of light-shielding metal blocks are grouped by n rows, wherein 1 ⁇ n ⁇ m, two wires are used to connect the left and right ends of the n-row light-shielding metal blocks respectively, and several parallel combinations are obtained. So that each of the parallel combinations has two outwardly extending wires at both ends, and the parallel combination is energized by connecting the two wires to the power source, so that the plurality of light shielding metal blocks in the parallel combination are heated, thereby
  • the TFT layer is preheated to increase the startup speed of the TFT device in the TFT layer;
  • the TFT layer includes a plurality of TFTs corresponding to the plurality of light-shielding metal blocks of the light-shielding metal layer, that is, each of the TFTs is disposed above a light-shielding metal block;
  • the TFT is a low temperature polysilicon TFT
  • the number of rows of the light shielding metal blocks included in the plurality of parallel combinations is the same or different.
  • the present invention provides an array substrate and a method of starting a TFT device in an array substrate.
  • the array substrate of the present invention includes a light-shielding metal layer and a TFT layer provided on the light-shielding metal layer, and the TFT layer is preheated by energizing the light-shielding metal block in the light-shielding metal layer to generate heat. The startup speed of the TFT device in the TFT layer is increased.
  • a method for starting a TFT device in an array substrate of the present invention by heating a plurality of light-shielding metal blocks in the light-shielding metal layer to heat the TFT layer before starting the TFT device in the TFT layer, thereby preheating the TFT layer
  • the method is particularly suitable for starting the TFT device in the array substrate in a low temperature environment.
  • FIG. 1 is a schematic structural view of an array substrate of a conventional liquid crystal display panel
  • FIG. 2 is a schematic structural view of an array substrate of the present invention
  • FIG. 3 is a schematic flow chart of a method of starting a TFT device in an array substrate of the present invention.
  • the present invention provides an array substrate, including a substrate substrate 1, disposed on the lining a light shielding metal layer 10 on the base substrate 1, and a TFT layer 20 provided on the light shielding metal layer 10;
  • the light-shielding metal layer 10 includes a plurality of light-shielding metal blocks 11 arranged in a matrix, and the plurality of light-shielding metal blocks 11 are divided into m rows, and a plurality of light-shielding metal blocks 11 in each row are connected in series by wires 13;
  • the m rows of light-shielding metal blocks 11 are grouped by n rows, wherein 1 ⁇ n ⁇ m, the left and right ends of the n-row light-shielding metal block 11 are respectively connected by two wires 13 to obtain a number Parallel combinations 12 such that each end of each parallel combination 12 has two outwardly extending conductors 13 that are energized by connecting the two conductors 13 to a power source to enable the parallel combination 12
  • the plurality of light-shielding metal blocks 11 generate heat to preheat the TFT layer 20, thereby increasing the starting speed of the TFT device in the TFT layer 20.
  • the light-shielding metal block 11 corresponds to a resistor, and heat is generated when a current is applied based on the principle of the heat generation of the resistance wire.
  • the parallel combination 12 is energized by the wires 13 on both sides of each parallel combination 12, the voltages across the rows of the light shielding metal blocks 11 in the parallel combination 12 are equal.
  • the TFT layer 20 includes a plurality of TFTs 21 corresponding to the plurality of light-shielding metal blocks 11 of the light-shielding metal layer 10, that is, each of the TFTs 21 is disposed above a light-shielding metal block 11.
  • the TFT 21 is a low temperature polysilicon TFT.
  • the number of rows of the light shielding metal blocks 11 included in the plurality of parallel combinations 12 may be the same or different.
  • the light-shielding metal layer 10 comprises m/2 parallel combinations 12, wherein each parallel combination 12 comprises two rows of light-shielding metal blocks 11.
  • the array substrate of the present invention includes a light-shielding metal layer 10 and a TFT layer 20 provided on the light-shielding metal layer 10, and heats the light-shielding metal block 11 in the light-shielding metal layer 10 to generate heat.
  • the TFT layer 20 is preheated to increase the startup speed of the TFT device in the TFT layer 20.
  • the present invention further provides a method for starting a TFT device in an array substrate, comprising the following steps:
  • Step 1 providing an array substrate, the array substrate comprising a base substrate 1, a light-shielding metal layer 10 disposed on the base substrate 1, and a TFT layer 20 disposed on the light-shielding metal layer 10;
  • the light-shielding metal layer 10 includes a plurality of light-shielding metal blocks 11 arranged in a matrix, and the plurality of light-shielding metal blocks 11 are divided into m rows, and a plurality of light-shielding metal blocks 11 in each row are connected in series by wires 13;
  • the m rows of light-shielding metal blocks 11 are grouped by n rows, wherein 1 ⁇ n ⁇ m, the left and right ends of the n-row light-shielding metal block 11 are respectively connected by two wires 13 to obtain a number One
  • the parallel combinations 12 are such that each end of each parallel combination 12 has two outwardly extending wires 13.
  • the light-shielding metal block 11 corresponds to a resistor, and heat is generated when a current is applied based on the principle of the heat generation of the resistance wire.
  • the TFT layer 20 includes a plurality of TFTs 21 corresponding to the plurality of light-shielding metal blocks 11 of the light-shielding metal layer 10, that is, each of the TFTs 21 is disposed above a light-shielding metal block 11.
  • the TFT 21 is a low temperature polysilicon TFT.
  • the number of rows of the light shielding metal blocks 11 included in the plurality of parallel combinations 12 may be the same or different.
  • the light-shielding metal layer 10 comprises m/2 parallel combinations 12, wherein each parallel combination 12 comprises two rows of light-shielding metal blocks 11.
  • Step 2 By connecting the wires 13 on both sides of each parallel combination 12 to the power source, the parallel combination 12 is energized, so that the plurality of light shielding metal blocks 11 in the parallel combination 12 generate heat, thereby pre-treating the TFT layer 20. After the heat is applied to the TFT layer 20, the TFT device in the TFT layer 20 is activated.
  • the parallel combination 12 when the parallel combination 12 is energized by the wires 13 on both sides of each parallel combination 12, the voltages across the rows of the light shielding metal blocks 11 in the parallel combination 12 are equal.
  • Step 3 After the TFT devices in the TFT layer 20 are activated, disconnect the wires 13 on both sides of the parallel combination 12 from the power source, and stop supplying power to the parallel combination 12.
  • the light-shielding metal block 11 in the light-shielding metal layer 10 is energized to generate heat before the TFT device in the TFT layer 20 is activated, thereby performing the TFT layer 20 Preheating increases the startup speed of the TFT device in the TFT layer 20.
  • This method is particularly suitable for startup of a TFT device in an array substrate in a low temperature environment.
  • the present invention provides a method for starting a TFT device in an array substrate and an array substrate.
  • the array substrate of the present invention includes a light-shielding metal layer 10 and a TFT layer 20 provided on the light-shielding metal layer 10, and the light-shielding metal block 11 in the light-shielding metal layer 10 is energized to generate heat, thereby forming a TFT.
  • the layer 20 is preheated to increase the startup speed of the TFT device in the TFT layer 20.
  • the light-shielding metal block 11 in the light-shielding metal layer 10 is energized to generate heat before the TFT device in the TFT layer 20 is activated, thereby performing the TFT layer 20 Preheating increases the startup speed of the TFT device in the TFT layer 20.
  • This method is particularly suitable for startup of a TFT device in an array substrate in a low temperature environment.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
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  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种阵列基板及阵列基板中TFT器件的启动方法。阵列基板包括遮光金属层(10)、及设于遮光金属层(10)上的TFT层(20)，通过对遮光金属层(10)中的遮光金属块(11)进行通电，使其发热，从而对TFT层(20)进行预热，提高TFT层(20)中TFT器件的启动速度。阵列基板中TFT器件的启动方法，通过在启动TFT层(20)中的TFT器件之前，对遮光金属层(10)中的数个遮光金属块(11)进行通电，使其发热，从而对TFT层(20)进行预热，提高TFT层(20)中TFT器件的启动速度，适用于低温环境下阵列基板中TFT器件的启动。

Description

阵列基板及阵列基板中TFT器件的启动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板及阵列基板中TFT器件的启动方法。
背景技术
薄膜晶体管(Thin Film Transistor，简称TFT)是目前液晶显示装置(Liquid Crystal Display，简称LCD)和有源矩阵驱动式有机电致发光显示装置(Active Matrix Organic Light-Emitting Diode，简称AMOLED)中的主要驱动元件，直接关系到高性能平板显示装置的发展方向。
低温多晶硅(Low Temperature Poly-silicon，LTPS)技术是新一代TFT基板的制造技术，与传统非晶硅(a-Si)技术的最大差异在于，低温多晶硅显示器反应速度较快，且有高亮度、高解析度与低耗电量等优点。
我国北方部分地区的冬季温度可达零下40度，生活在这些地区的人们使用电子显示产品中，在刚开机的时候经常会有屏幕反应缓慢，画面不正常、延迟的现象。分析原因后发现，这是因为在低温条件下，电子在LTPS-TFT器件中载流子运动速率减慢，导致了迟滞现象；如图1所示，为一种现有液晶显示面板的阵列基板的示意图，所述阵列基板包括衬底基板100、设于所述衬底基板100上的遮光金属层200、及设于所述遮光金属层200上的薄膜晶体管层300；所述薄膜晶体管层300包括数个薄膜晶体管310，所述遮光金属层200包括与数个薄膜晶体管310相对应的数个遮光金属块210，所述数个遮光金属块210之间相互独立，互不相连。该现有液晶显示面板在低温环境下启动时容易产生屏幕反应缓慢等现象。
因此，有必要提供一种阵列基板及阵列基板中TFT器件的启动方法，以解决上述问题。
发明内容
本发明的目的在于提供一种阵列基板，可在低温环境下实现TFT器件的快速启动。
本发明的目的还在于提供一种阵列基板中TFT器件的启动方法，可在低温环境下实现TFT器件的快速启动。
为实现上述目的，本发明提供一种阵列基板，包括衬底基板、设于所 述衬底基板上的遮光金属层、及设于所述遮光金属层上的TFT层；
所述遮光金属层包括数个呈矩阵分布的遮光金属块，所述数个遮光金属块被划分为m排，每排中的数个遮光金属块通过导线串联在一起；
所述m排遮光金属块中，以n排为一组，其中，1≤n≤m，采用两根导线将n排遮光金属块的左、右两端分别连接在一起，得到数个并联组合，从而每个并联组合的两端具有两根向外延伸的导线，通过连接该两根导线至电源对所述并联组合进行通电，可使得该并联组合内的多个遮光金属块发热，从而对TFT层进行预热，提高TFT层中TFT器件的启动速度。
所述TFT层包括与所述遮光金属层的数个遮光金属块相对应设置的数个TFT，即每个TFT对应设置于一遮光金属块的上方。
所述TFT为低温多晶硅TFT。
所述数个并联组合中包含的遮光金属块的排数相同或者不同。
所述遮光金属层包括m/2个并联组合，其中，每个并联组合中包含2排遮光金属块。
本发明还提供一种阵列基板中TFT器件的启动方法，包括如下步骤：
步骤1、提供一阵列基板，所述阵列基板包括衬底基板、设于所述衬底基板上的遮光金属层、及设于所述遮光金属层上的TFT层；
所述遮光金属层包括数个呈矩阵分布的遮光金属块，所述数个遮光金属块被划分为m排，每排中的数个遮光金属块通过导线串联在一起；
所述m排遮光金属块中，以n排为一组，其中，1≤n≤m，采用两根导线将n排遮光金属块的左、右两端分别连接在一起，得到数个并联组合，从而每个并联组合的两端具有两根向外延伸的导线；
步骤2、通过连接每个并联组合两侧的导线至电源，对所述并联组合进行通电，使得所述并联组合内的多个遮光金属块发热，从而对TFT层进行预热，之后对TFT层进行通电，启动TFT层中的TFT器件；
步骤3、待TFT层中的TFT器件启动后，断开所述并联组合两侧的导线与电源的连接，停止对所述并联组合进行供电。
所述TFT层包括与所述遮光金属层的数个遮光金属块相对应设置的数个TFT，即每个TFT对应设置于一遮光金属块的上方。
所述TFT为低温多晶硅TFT。
所述数个并联组合中包含的遮光金属块的排数相同或者不同。
所述遮光金属层包括m/2个并联组合，其中，每个并联组合中包含2排遮光金属块。
本发明还提供一种阵列基板，包括衬底基板、设于所述衬底基板上的 遮光金属层、及设于所述遮光金属层上的TFT层；
所述遮光金属层包括数个呈矩阵分布的遮光金属块，所述数个遮光金属块被划分为m排，每排中的数个遮光金属块通过导线串联在一起；
所述m排遮光金属块中，以n排为一组，其中，1≤n≤m，采用两根导线将n排遮光金属块的左、右两端分别连接在一起，得到数个并联组合，从而每个并联组合的两端具有两根向外延伸的导线，通过连接该两根导线至电源对所述并联组合进行通电，可使得该并联组合内的多个遮光金属块发热，从而对TFT层进行预热，提高TFT层中TFT器件的启动速度；
其中，所述TFT层包括与所述遮光金属层的数个遮光金属块相对应设置的数个TFT，即每个TFT对应设置于一遮光金属块的上方；
其中，所述TFT为低温多晶硅TFT；
其中，所述数个并联组合中包含的遮光金属块的排数相同或者不同。
本发明的有益效果：本发明提供一种阵列基板及阵列基板中TFT器件的启动方法。本发明的阵列基板包括遮光金属层、及设于所述遮光金属层上的TFT层，通过对所述遮光金属层中的遮光金属块进行通电，使其发热，从而对TFT层进行预热，提高TFT层中TFT器件的启动速度。本发明的阵列基板中TFT器件的启动方法，通过在启动TFT层中的TFT器件之前，对所述遮光金属层中的数个遮光金属块进行通电，使其发热，从而对TFT层进行预热，提高TFT层中TFT器件的启动速度，该方法尤其适用于低温环境下阵列基板中TFT器件的启动。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有液晶显示面板的阵列基板的结构示意图；
图2为本发明的阵列基板的结构示意图；
图3为本发明的阵列基板中TFT器件的启动方法的示意流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明提供一种阵列基板，包括衬底基板1、设于所述衬 底基板1上的遮光金属层10、及设于所述遮光金属层10上的TFT层20；
所述遮光金属层10包括数个呈矩阵分布的遮光金属块11，所述数个遮光金属块11被划分为m排，每排中的数个遮光金属块11通过导线13串联在一起；
所述m排遮光金属块11中，以n排为一组，其中，1≤n≤m，采用两根导线13将n排遮光金属块11的左、右两端分别连接在一起，得到数个并联组合12，从而每个并联组合12的两端具有两根向外延伸的导线13，通过连接该两根导线13至电源对所述并联组合12进行通电，可使得该并联组合12内的多个遮光金属块11发热，从而对TFT层20进行预热，提高TFT层20中TFT器件的启动速度。
具体的，所述遮光金属块11相当于电阻，基于电阻丝发热原理在通入电流时产生热量。具体的，通过每个并联组合12两侧的导线13对所述并联组合12进行通电时，所述并联组合12中每排遮光金属块11两端的电压相等。
具体的，所述TFT层20包括与所述遮光金属层10的数个遮光金属块11相对应设置的数个TFT21，即每个TFT21对应设置于一遮光金属块11的上方。具体的，所述TFT21为低温多晶硅TFT。
具体的，所述数个并联组合12中包含的遮光金属块11的排数可以相同或者不同。
如图2所示的实施例中，所述遮光金属层10包括m/2个并联组合12，其中，每个并联组合12中包含2排遮光金属块11。
本发明的阵列基板，包括遮光金属层10、及设于所述遮光金属层10上的TFT层20，通过对所述遮光金属层10中的遮光金属块11进行通电，使其发热，从而对TFT层20进行预热，提高TFT层20中TFT器件的启动速度。
请参阅图3，同时参阅图2，本发明还提供一种阵列基板中TFT器件的启动方法，包括如下步骤：
步骤1、提供一种阵列基板，所述阵列基板包括衬底基板1、设于所述衬底基板1上的遮光金属层10、及设于所述遮光金属层10上的TFT层20；
所述遮光金属层10包括数个呈矩阵分布的遮光金属块11，所述数个遮光金属块11被划分为m排，每排中的数个遮光金属块11通过导线13串联在一起；
所述m排遮光金属块11中，以n排为一组，其中，1≤n≤m，采用两根导线13将n排遮光金属块11的左、右两端分别连接在一起，得到数个 并联组合12，从而每个并联组合12的两端具有两根向外延伸的导线13。
具体的，所述遮光金属块11相当于电阻，基于电阻丝发热原理在通入电流时产生热量。
具体的，所述TFT层20包括与所述遮光金属层10的数个遮光金属块11相对应设置的数个TFT21，即每个TFT21对应设置于一遮光金属块11的上方。具体的，所述TFT21为低温多晶硅TFT。
具体的，所述数个并联组合12中包含的遮光金属块11的排数可以相同或者不同。
如图2所示的实施例中，所述遮光金属层10包括m/2个并联组合12，其中，每个并联组合12中包含2排遮光金属块11。
步骤2、通过连接每个并联组合12两侧的导线13至电源，对所述并联组合12进行通电，使得所述并联组合12内的多个遮光金属块11发热，从而对TFT层20进行预热，之后对TFT层20进行通电，启动TFT层20中的TFT器件。
具体的，通过每个并联组合12两侧的导线13对所述并联组合12进行通电时，所述并联组合12中每排遮光金属块11两端的电压相等。
步骤3、待TFT层20中的TFT器件启动后，断开所述并联组合12两侧的导线13与电源的连接，停止对所述并联组合12进行供电。
本发明的阵列基板中TFT器件的启动方法，通过在启动TFT层20中的TFT器件之前，对所述遮光金属层10中的遮光金属块11进行通电，使其发热，从而对TFT层20进行预热，提高TFT层20中TFT器件的启动速度，该方法尤其适用于低温环境下阵列基板中TFT器件的启动。
综上所述，本发明提供一种阵列基板及阵列基板中TFT器件的启动方法。本发明的阵列基板包括遮光金属层10、及设于所述遮光金属层10上的TFT层20，通过对所述遮光金属层10中的遮光金属块11进行通电，使其发热，从而对TFT层20进行预热，提高TFT层20中TFT器件的启动速度。本发明的阵列基板中TFT器件的启动方法，通过在启动TFT层20中的TFT器件之前，对所述遮光金属层10中的遮光金属块11进行通电，使其发热，从而对TFT层20进行预热，提高TFT层20中TFT器件的启动速度，该方法尤其适用于低温环境下阵列基板中TFT器件的启动。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (12)

  1. 一种阵列基板，包括衬底基板、设于所述衬底基板上的遮光金属层、及设于所述遮光金属层上的TFT层；
    所述遮光金属层包括数个呈矩阵分布的遮光金属块，所述数个遮光金属块被划分为m排，每排中的数个遮光金属块通过导线串联在一起；
    所述m排遮光金属块中，以n排为一组，其中，1≤n≤m，采用两根导线将n排遮光金属块的左、右两端分别连接在一起，得到数个并联组合，从而每个并联组合的两端具有两根向外延伸的导线，通过连接该两根导线至电源对所述并联组合进行通电，可使得该并联组合内的多个遮光金属块发热，从而对TFT层进行预热，提高TFT层中TFT器件的启动速度。
  2. 如权利要求1所述的阵列基板，其中，所述TFT层包括与所述遮光金属层的数个遮光金属块相对应设置的数个TFT，即每个TFT对应设置于一遮光金属块的上方。
  3. 如权利要求1所述的阵列基板，其中，所述TFT为低温多晶硅TFT。
  4. 如权利要求1所述的阵列基板，其中，所述数个并联组合中包含的遮光金属块的排数相同或者不同。
  5. 如权利要求1所述的阵列基板，其中，所述遮光金属层包括m/2个并联组合，其中，每个并联组合中包含2排遮光金属块。
  6. 一种阵列基板中TFT器件的启动方法，包括如下步骤：
    步骤1、提供一阵列基板，所述阵列基板包括衬底基板、设于所述衬底基板上的遮光金属层、及设于所述遮光金属层上的TFT层；
    所述遮光金属层包括数个呈矩阵分布的遮光金属块，所述数个遮光金属块被划分为m排，每排中的数个遮光金属块通过导线串联在一起；
    所述m排遮光金属块中，以n排为一组，其中，1≤n≤m，采用两根导线将n排遮光金属块的左、右两端分别连接在一起，得到数个并联组合，从而每个并联组合的两端具有两根向外延伸的导线；
    步骤2、通过连接每个并联组合两侧的导线至电源，对所述并联组合进行通电，使得所述并联组合内的多个遮光金属块发热，从而对TFT层进行预热，之后对TFT层进行通电，启动TFT层中的TFT器件；
    步骤3、待TFT层中的TFT器件启动后，断开所述并联组合两侧的导线与电源的连接，停止对所述并联组合进行供电。
  7. 如权利要求6所述的阵列基板中TFT器件的启动方法，其中，所 述TFT层包括与所述遮光金属层的数个遮光金属块相对应设置的数个TFT，即每个TFT对应设置于一遮光金属块的上方。
  8. 如权利要求6所述的阵列基板中TFT器件的启动方法，其中，所述TFT为低温多晶硅TFT。
  9. 如权利要求6所述的阵列基板中TFT器件的启动方法，其中，所述数个并联组合中包含的遮光金属块的排数相同或者不同。
  10. 如权利要求6所述的阵列基板中TFT器件的启动方法，其中，所述遮光金属层包括m/2个并联组合，其中，每个并联组合中包含2排遮光金属块。
  11. 一种阵列基板，包括衬底基板、设于所述衬底基板上的遮光金属层、及设于所述遮光金属层上的TFT层；
    所述遮光金属层包括数个呈矩阵分布的遮光金属块，所述数个遮光金属块被划分为m排，每排中的数个遮光金属块通过导线串联在一起；
    所述m排遮光金属块中，以n排为一组，其中，1≤n≤m，采用两根导线将n排遮光金属块的左、右两端分别连接在一起，得到数个并联组合，从而每个并联组合的两端具有两根向外延伸的导线，通过连接该两根导线至电源对所述并联组合进行通电，可使得该并联组合内的多个遮光金属块发热，从而对TFT层进行预热，提高TFT层中TFT器件的启动速度；
    其中，所述TFT层包括与所述遮光金属层的数个遮光金属块相对应设置的数个TFT，即每个TFT对应设置于一遮光金属块的上方；
    其中，所述TFT为低温多晶硅TFT；
    其中，所述数个并联组合中包含的遮光金属块的排数相同或者不同。
  12. 如权利要求11所述的阵列基板，其中，所述遮光金属层包括m/2个并联组合，其中，每个并联组合中包含2排遮光金属块。
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