WO2017097053A1 - Procédé et appareil pour estimer un écart de temporisation, et terminal - Google Patents

Procédé et appareil pour estimer un écart de temporisation, et terminal Download PDF

Info

Publication number
WO2017097053A1
WO2017097053A1 PCT/CN2016/103625 CN2016103625W WO2017097053A1 WO 2017097053 A1 WO2017097053 A1 WO 2017097053A1 CN 2016103625 W CN2016103625 W CN 2016103625W WO 2017097053 A1 WO2017097053 A1 WO 2017097053A1
Authority
WO
WIPO (PCT)
Prior art keywords
time domain
channel estimation
estimation result
domain channel
determining
Prior art date
Application number
PCT/CN2016/103625
Other languages
English (en)
Chinese (zh)
Inventor
熊芳
Original Assignee
电信科学技术研究院
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 电信科学技术研究院 filed Critical 电信科学技术研究院
Publication of WO2017097053A1 publication Critical patent/WO2017097053A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/024—Channel estimation channel estimation algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2614—Peak power aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2668—Details of algorithms
    • H04L27/2669—Details of algorithms characterised by the domain of operation
    • H04L27/2671—Time domain
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/04—Wireless resource allocation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present application relates to the field of communications technologies, and in particular, to a timing offset estimation method, apparatus, and terminal.
  • FICIC Inter-cell Interference Coordination
  • the frequency offset also has a certain relative deviation.
  • the relative delay deviation may be in the range of [-3, 3] microseconds (us).
  • the relative frequency offset may range from [-300,300] Hertz (Hz).
  • FFT Fast Fourier Transformation
  • the UE uses only one Fast Fourier Transformation (FFT) operation unit in the time-frequency conversion. Therefore, in order to ensure the demodulation performance of the current cell, the UE can only set the timing in the time domain based on the received signal of the local cell.
  • the windowing position that is, it is impossible to track the timing of the neighboring cell to perform real-time synchronization of the neighboring cell. According to the timing of receiving the signal and performing channel estimation on the neighboring cell, it is necessary to estimate the delay spread of the neighboring cell to perform frequency domain filtering.
  • the existing delay spread estimation algorithm is described as follows: the downlink pilot transmission sequence is known as S, and the received signal is Y.
  • the frequency domain channel estimation is transformed into the time domain for delay spread estimation, as follows: the frequency domain channel is transformed into the time domain, and the position of the maximum path of the useful signal delay is determined according to the Cyclic Prefix (CP) length or the prior information.
  • the time domain noise path and the maximum path without the useful signal power are taken out, the noise power P noise and the peak power P max are calculated, and the effective path threshold is determined by setting the peak factor and the noise factor, thereby obtaining the effective path search space.
  • Extended extension value the downlink pilot transmission sequence is known as S, and the received signal is Y.
  • the spatial frequency domain channel is H+n, where H represents
  • the method of setting the noise window according to the length of the CP is: calculating the position of the noise window by using the CP length as the time extension of the maximum delay time in the system.
  • N is the number of interval CP CP at different bandwidths
  • T S denotes a sampling interval in the LTE system
  • FFT points is N FFT
  • the number of subcarriers N SC if the pilot frequency domain transformed to the corresponding
  • the time domain position of the maximum delay time can be expressed as:
  • the Inverse Discrete Fourier Transform (IDFT) transform transforms the frequency domain into the time domain
  • power leakage of the signal may occur, and the N NB path in the N FFT is retained, and the range of the last effective path is retained.
  • the noise window is [N ⁇ : N FFT - N leak ].
  • the neighboring cell timing and the cell may cause an effective path window, that is, the search space containing the effective path and the effective path in the noise window is inaccurate, which will directly affect the calculation of the effective path threshold, and thus affect Neighbor cell timing measurement.
  • An embodiment of the present application provides a method, a device, and a terminal for estimating a timing offset, which are used to directly affect an effective path threshold when a neighboring cell timing and a large early or late phase of the cell may occur, which may cause an effective path window.
  • the calculation which in turn affects the timing measurement of neighboring cells.
  • the embodiment of the present application provides a timing offset estimation method, including:
  • the method further includes:
  • determining channel time channel estimation results by performing channel estimation according to a common reference signal CRS of a neighboring cell of the current cell including:
  • determining a first noise window power and a peak power of the time domain channel estimation result including:
  • the first noise window power is: Where N ⁇ represents the time domain position of the maximum path of the delay, and N leak represents the number of paths of the reserved N FFT ;
  • the peak power is:
  • determining the first effective path threshold according to the first noise window power and the peak power includes:
  • determining, according to the time domain channel estimation result and the first effective path threshold, a first timing offset value of the current cell and the neighboring cell including:
  • the timing offset of the time domain channel estimation result is adjusted according to the first timing offset value, including:
  • determining the second effective path threshold according to the second noise window power and the peak power includes:
  • the tap search space is searched according to the adjusted time domain channel estimation result, the second effective path threshold, and the timing offset to determine a delay spread value of the current cell and the neighboring cell.
  • r represents the receiving antenna number index
  • N FFT represents the number of FFT points
  • p represents the port number. Indicates the index number of the column where the pilot of port p is located.
  • N leak represents the number of paths of the reserved N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • a timing deviation estimating apparatus is further provided in the embodiment of the present application, including:
  • a first processing module configured to determine a time domain channel estimation result by using a common reference signal CRS of a neighboring cell of the current cell, and determine a first noise window power and a peak power of the time domain channel estimation result;
  • a second processing module configured to determine a first effective path threshold according to the first noise window power and the peak power, and determine, according to the time domain channel estimation result and the first effective path threshold, a current cell and the a first timing offset value of the neighboring cell;
  • a third processing module configured to adjust, according to the first timing offset value, a timing offset of the time domain channel estimation result, to determine a second noise window power of the adjusted time domain channel estimation result, according to the second The noise window power and the peak power determine a second effective path threshold;
  • a fourth processing module configured to perform a search on the tap search space to determine a second timing offset value of the current cell and the neighboring cell according to the adjusted time domain channel estimation result and the second effective path threshold, according to the The first timing offset value and the second timing offset value determine a timing offset between the current cell and the neighboring cell.
  • the fifth processing module is further configured to:
  • the first processing module is specifically configured to:
  • the first processing module is specifically configured to:
  • the first noise window power is: Where N ⁇ represents the time domain position of the maximum path of the delay, and N leak represents the number of paths of the reserved N FFT ;
  • the peak power is:
  • the second processing module is specifically configured to:
  • the second processing module is specifically configured to:
  • the third processing module is specifically configured to:
  • the third processing module is specifically configured to:
  • the fifth processing module is specifically configured to:
  • r represents the receiving antenna number index
  • N FFT represents the number of FFT points
  • p represents the port number. Indicates the index number of the column where the pilot of port p is located.
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • the embodiment of the present application further provides a terminal, which mainly includes a processor and a memory, wherein the memory stores a preset program, and the processor is configured to read a program saved in the memory, and execute the following process according to the program:
  • the processor searches for the tap search space according to the adjusted time domain channel estimation result, the second effective path threshold, and the timing offset to determine a delay between the current cell and the neighboring cell. Extended value.
  • the processor obtains a frequency domain channel estimation result according to the least squares estimation of the CRS of the neighboring cell, and performs inverse discrete Fourier transform on the frequency domain channel estimation result to obtain the time domain channel estimation. result.
  • the processor determines a first noise window power and a peak power of the time domain channel estimation result, where the specific process is:
  • the first noise window power is: Where N ⁇ represents the time domain position of the maximum path of the delay, and N leak represents the number of paths of the reserved N FFT ;
  • the peak power is:
  • the processor calculates a product of the first noise window power and the first coefficient to obtain a first multiplication Product, and calculating a product of the peak power and the second coefficient to obtain a second product;
  • Determining a maximum value of the first product and the second product If the maximum value is greater than or equal to the peak power, determining that the first effective path threshold is the peak power, and if the maximum value is determined to be less than the peak power, The first effective path threshold is determined to be the maximum value.
  • the processor determines that the first timing offset value of the current cell and the neighboring cell is: among them, P represents the total number of ports, and R represents the total number of receiving antennas, where ⁇ (r, p) represents the first effective path threshold.
  • the processor adjusts a timing offset of the time domain channel estimation result according to the first timing offset value, and the process is:
  • the process of determining the second effective path threshold by the processor is:
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • the terminal provided by the embodiment of the present application includes: a processor and a memory, wherein the memory stores a preset program, and the processor is configured to read a program saved in the memory, and execute the following process according to the program;
  • the channel estimation result is obtained according to the CRS of the neighboring cell, and the first time channel estimation result is determined.
  • the first effective path threshold is used for coarse synchronization to obtain a first timing deviation value for performing coarse synchronization, and the first timing deviation value is adopted.
  • Performing coarse synchronization adjustment on the timing deviation of the time domain channel estimation result determining the second noise window power of the adjusted time domain channel estimation result, determining the second effective path threshold according to the second noise window power and the peak power, and adopting the second effective
  • the path threshold searches for the tap search space to determine the second timing offset value of the precise synchronization, so that the neighboring cell timing may be advanced or delayed in time with the local cell, which may cause the effective path window, and the coarse timing synchronization time Domain channel estimation
  • the line synchronization is adjusted so that the effective path does not fall into the noise window, and an effective effective path threshold is obtained, thereby obtaining relatively accurate timing deviation estimation measurement and delay extension measurement.
  • 1 is a schematic diagram of an implementation process of an existing delay spread estimation algorithm
  • FIG. 2 is a schematic flowchart of a method for estimating a timing offset in an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of a timing offset estimation apparatus according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a terminal in an embodiment of the present application.
  • Step 201 Determine a time domain channel estimation result according to a CRS of a neighboring cell of the current cell, and determine a first noise window power and a peak power of the time domain channel estimation result.
  • determining a time domain channel estimation result by performing channel estimation according to a CRS of a neighboring cell of the current cell specifically:
  • the frequency domain channel estimation result is obtained by performing Least Square (LS) estimation according to the CRS of the neighboring cell, and the frequency domain channel estimation result is expressed as formula (1):
  • r is the receiving antenna number index and p is the antenna port number index.
  • p is the antenna port number index. Indicates the number of pilot columns of port p, assuming that the total number of receiving antennas is R and the total number of ports is P;
  • N FFT represents the number of FFT points
  • r represents the receiving antenna number index
  • the first noise window power is determined according to the square of the modulus of the time domain channel estimation result of each column pilot of each port in the time domain channel estimation result, as shown in the formula (4):
  • N ⁇ represents the time domain position of the maximum path of the delay
  • N leak represents the number of paths of the reserved N FFT
  • the peak power is determined according to the square of the mode of the time domain channel estimation result of each column pilot of each port in the time domain channel estimation result, as shown in the formula (5):
  • Step 202 Determine a first effective path threshold according to the first noise window power and the peak power, and determine a first timing offset value of the current cell and the neighboring cell according to the time domain channel estimation result and the first effective path threshold.
  • the process of determining the first effective path threshold is: calculating a product of the first noise window power and the first coefficient to obtain a first product, and calculating a product of the peak power and the second coefficient to obtain a second product; selecting the first product and a maximum value of the second product, if it is determined that the maximum value is greater than or equal to the peak power, determining that the first effective path threshold is the peak power, and if the maximum value is determined to be less than the peak power, determining that the first effective path threshold is the maximum value.
  • the first coefficient and the second coefficient can be determined by simulation.
  • the first effective path threshold is expressed by equation (6) as:
  • the specific process determining, according to the time domain channel estimation result and the first effective path threshold, the first of the current cell and the neighboring cell Timing deviation value, the specific process is:
  • the first timing deviation of the current cell and the neighboring cell is determined as shown in the formula (7):
  • i -N leak ,..., N ⁇
  • P represents the total number of ports
  • R represents the total number of receiving antennas
  • ⁇ (r, p) represents the first effective path threshold.
  • Step 203 Adjust a timing offset of the time domain channel estimation result according to the first timing offset value, determine a second noise window power of the adjusted time domain channel estimation result, and determine a second effective according to the second noise window power and the peak power. Path threshold.
  • the value range of the noise window is preset.
  • the timing offset of the time domain channel estimation result is adjusted according to the first timing offset value, specifically:
  • the time domain tap corresponding to the first timing offset is moved to the zeroth time domain tap to obtain the second time domain channel estimation result as shown in the formula (8):
  • N FFT represents the number of FFT points
  • ⁇ 1 represents the first timing offset value
  • the noise power is calculated for each port of each receiving antenna in the noise window [N ⁇ : N FFT - N leak ].
  • Second noise window power Set the third coefficient to Set the fourth coefficient to Wherein, the third coefficient and the fourth coefficient can be determined by simulation.
  • the process of determining the second effective path threshold is: calculating a product of the second noise window power and the third coefficient to obtain a third product, and calculating a product of the peak power and the fourth coefficient to obtain a fourth product;
  • the second effective path threshold is expressed by the formula (9) as:
  • Step 204 Perform a search on the tap search space to determine a second timing offset value of the current cell and the neighboring cell according to the adjusted time domain channel estimation result and the second effective path threshold, according to the first timing offset value and the second timing offset value. The timing offset between the current cell and the neighboring cell is determined.
  • the value range of the tap search space is preset. Specifically, the value range of the tap search space is complementary to the value range of the noise window, and the total length of the search space is assumed to be N FFT if some points in the search space Set to noise space, the other part is the tap search space.
  • Equation (10) and formula (11) are expressed as:
  • the sum of the first timing offset value and the second timing offset value is calculated, and the obtained sum value is determined as a timing offset between the current cell and the neighboring cell.
  • the tap search space may be searched according to the adjusted time domain channel estimation result, the second effective path threshold, and the determined timing offset to determine a delay spread value of the current cell and the neighboring cell.
  • determining the first path position is represented by formula (12):
  • N leak represents the number of paths of the reserved N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the second timing deviation
  • N leak represents the number of paths of the reserved N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the second timing deviation
  • the result obtained by subtracting the position of the trailing path from the position of the trailing path is determined, and the result is determined as the delay spread value of the current cell and the neighboring cell.
  • Step 1 Perform LS estimation on the CRS of the neighboring cell A to obtain a frequency domain channel estimation result.
  • r represents the receiving antenna number index
  • p represents the antenna port number index. Indicates the number of pilot columns for port p. Assume that the total number of receiving antennas is R and the total number of ports is P.
  • Step 2 estimating the frequency domain channel Perform IDFT transform to obtain time domain channel estimation results Expressed as among them, Indicates the number of port p
  • N FFT represents the number of FFT points
  • Step 3 according to Calculate the total power of the first noise window Peak power among them, Indicates the number of port p
  • the time domain channel estimation result of the column pilot r represents the receiving antenna number index
  • N FFT represents the FFT point number.
  • N ⁇ represents the time domain position of the maximum path of the delay
  • N leak represents the number of paths of the reserved N FFT .
  • step 4 coarse timing synchronization is performed to obtain a first timing offset value ⁇ 1 .
  • a first effective path threshold Indicates the first noise window power, Representing the first peak power, ⁇ noise represents the first coefficient, and ⁇ max represents the second coefficient.
  • the ⁇ max setting value is greater than ⁇ noise , so that the first effective path threshold is relatively high, and the first path power is the largest under the general system, and the effective path threshold is higher to ensure the relative accuracy of the timing estimation.
  • the ⁇ max can be determined by simulation. If the first effective path threshold determined according to the formula satisfies Then re-assign the first effective path threshold:
  • the first timing offset value ⁇ 1 is expressed as: among them, P represents the total number of ports, and R represents the total number of receiving antennas, where ⁇ (r, p) represents the first effective path threshold.
  • Step 5 calculating a second effective path threshold according to the first timing offset value ⁇ 1
  • each port For each receiving antenna, for each port Calculate the noise power in the noise window [N ⁇ :N FFT -N leak ] According to each receiving antenna, each port Peak power And noise power determine among them, with Can be determined by simulation. If the second effective path threshold determined according to the formula satisfies Then re-assign the second effective path threshold:
  • Step 6 Perform timing synchronization measurement and delay extension measurement on the time domain channel estimation.
  • the tap search space [N FFT - N leak : N FFT -1, 0: N ⁇ ] is searched to obtain a timing synchronization measurement value or a delay spread measurement value, wherein the timing deviation measurement value and the delay spread are obtained.
  • the measured values can be set separately with To meet different needs.
  • the timing deviation measurement value is expressed as ⁇ ' 1 + ⁇ 1 , and the obtaining process of ⁇ ' 1 is: among them, P represents the total number of ports, and R represents the total number of receiving antennas, where Indicates the second effective path threshold. among them,
  • the process of obtaining the delay spread measurement value is:
  • the result obtained by subtracting the position of the trailing path from the position of the trailing path is the delay spread value of the current cell and the neighboring cell.
  • the timing deviation estimation apparatus is also provided in the embodiment of the present application.
  • the repeated description is not repeated, as shown in FIG. include:
  • the first processing module 301 is configured to determine, according to a common reference signal CRS of a neighboring cell of the current cell, a channel estimation result, and determine a first noise window power and a peak power of the time domain channel estimation result;
  • the second processing module 302 is configured to determine a first effective path threshold according to the first noise window power and the peak power, and determine a current cell and a location according to the time domain channel estimation result and the first effective path threshold. Determining a first timing offset value of the neighboring cell;
  • the third processing module 303 is configured to adjust, according to the first timing offset value, a timing offset of the time domain channel estimation result, and determine a second noise window power of the adjusted time domain channel estimation result, according to the The second noise window power and the peak power determine a second effective path threshold;
  • the fourth processing module 304 is configured to perform a search on the tap search space to determine a second timing offset value of the current cell and the neighboring cell according to the adjusted time domain channel estimation result and the second effective path threshold, according to The first timing offset value and the second timing offset value determine a timing offset between a current cell and the neighboring cell.
  • a fifth processing module 305 is further included for:
  • the first processing module is specifically configured to:
  • the first processing module is specifically configured to:
  • the first noise window power is: Where N ⁇ represents the time domain position of the maximum path of the delay, and N leak represents the number of paths of the reserved N FFT ;
  • the peak power is:
  • the second processing module is specifically configured to:
  • Determining a maximum value of the first product and the second product If the maximum value is greater than or equal to the peak power, determining that the first effective path threshold is the peak power, and if the maximum value is determined to be less than the peak power, The first effective path threshold is determined to be the maximum value.
  • the second processing module is specifically configured to:
  • the third processing module is specifically configured to:
  • the third processing module is specifically configured to:
  • the fifth processing module is specifically configured to:
  • r represents the receiving antenna number index
  • N FFT represents the number of FFT points
  • p represents the port number. Indicates the index number of the column where the pilot of port p is located.
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • the terminal mainly includes processing. 401 And a memory 402, wherein the memory 402 stores a preset program, and the processor 401 is configured to read a program saved in the memory 402, and execute the following process according to the program:
  • the processor searches for the tap search space according to the adjusted time domain channel estimation result, the second effective path threshold, and the timing offset to determine a delay spread value of the current cell and the neighboring cell.
  • the processor obtains a frequency domain channel estimation result according to the least squares estimation of the CRS of the neighboring cell, and performs inverse discrete Fourier transform on the frequency domain channel estimation result to obtain the time domain channel estimation result.
  • the processor determines a first noise window power and a peak power of the time domain channel estimation result, where the specific process is:
  • the first noise window power is: Where N ⁇ represents the time domain position of the maximum path of the delay, and N leak represents the number of paths of the reserved N FFT ;
  • the peak power is:
  • the processor calculates a product of the first noise window power and the first coefficient to obtain a first product, and calculates a product of the peak power and the second coefficient to obtain a second product;
  • Determining a maximum value of the first product and the second product If the maximum value is greater than or equal to the peak power, determining that the first effective path threshold is the peak power, and if the maximum value is determined to be less than the peak power, The first effective path threshold is determined to be the maximum value.
  • the processor determines that the first timing offset value of the current cell and the neighboring cell is: among them, P represents the total number of ports, and R represents the total number of receiving antennas, where ⁇ (r, p) represents the first effective path threshold.
  • the processor adjusts a timing offset of the time domain channel estimation result according to the first timing offset value, and the process is:
  • the process of determining the second effective path threshold by the processor is:
  • N leak represents the number of paths of the retained N FFT
  • ( ⁇ ' 1 + ⁇ 1 ) represents the timing deviation
  • ⁇ 1 represents the first timing deviation
  • ⁇ ' 1 represents the Second timing deviation
  • the processor and the memory are connected by a bus
  • the bus architecture may include any number of interconnected buses and bridges, specifically linked by one or more processors represented by the processor and various circuits of the memory represented by the memory.
  • the bus architecture can also link various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and, therefore, will not be further described herein.
  • the bus interface provides an interface.
  • the processor is responsible for managing the bus architecture and the usual processing, and the memory can store the data that the processor uses when performing operations.
  • the channel estimation result is obtained according to the CRS of the neighboring cell, and the first time channel estimation result is determined.
  • the first effective path threshold is used for coarse synchronization to obtain a first timing deviation value for performing coarse synchronization, and the first timing deviation value is adopted.
  • Performing coarse synchronization adjustment on the timing deviation of the time domain channel estimation result determining the second noise window power of the adjusted time domain channel estimation result, determining the second effective path threshold according to the second noise window power and the peak power, and adopting the second effective
  • the path threshold searches for the tap search space to determine the second timing offset value of the precise synchronization, so that the neighboring cell timing may be advanced or delayed in time with the local cell, which may cause the effective path window, and the coarse timing synchronization time
  • the domain channel estimation is adjusted synchronously so that the effective path does not fall into the noise window, thereby obtaining effective Effective threshold diameter, thereby obtaining relatively accurate measurement of the timing offset estimation and the measured delay spread.
  • embodiments of the present application can be provided as a method, system, or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application can take the form of a computer program product embodied on one or more computer usable storage media (including but not limited to disk storage and optical storage, etc.) in which computer usable program code is embodied. formula.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

L'invention concerne un procédé et un appareil pour estimer un écart de temporisation, ainsi qu'un terminal, destinés à être utilisés pour résoudre les problèmes de calcul de seuil de diamètre effectif et de mesure de temporisation de cellule voisine affectés en raison du dépassement possible, par une fenêtre, du diamètre effectif dans un cas dans lequel le temps d'une cellule voisine précède ou tombe considérablement derrière prend du retard par rapport à cette cellule. Le procédé consiste : à déterminer un résultat d'estimation de canal de domaine temporel selon un CRS d'une cellule voisine, à déterminer un premier seuil de diamètre effectif selon le résultat d'estimation de canal de domaine temporel, une première puissance de fenêtre de bruit et une puissance maximale, et à déterminer une première valeur d'écart de temporisation entre une cellule courante et la cellule voisine selon le premier seuil de diamètre effectif ; à régler un écart de temporisation du résultat d'estimation de canal de domaine temporel selon la première valeur d'écart de temporisation, et à déterminer un second seuil de diamètre effectif selon une seconde puissance de vent de bruit du résultat d'estimation de canal de domaine temporel réglé et la puissance maximale ; et à déterminer une seconde valeur d'écart de temporisation entre la cellule courante et la cellule voisine selon le second seuil de diamètre effectif, et à déterminer l'écart de temporisation entre la cellule courante et la cellule voisine selon la première valeur d'écart de temporisation et la seconde valeur d'écart de temporisation.
PCT/CN2016/103625 2015-12-10 2016-10-27 Procédé et appareil pour estimer un écart de temporisation, et terminal WO2017097053A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510918097.9 2015-12-10
CN201510918097.9A CN106878205B (zh) 2015-12-10 2015-12-10 一种定时偏差估计方法及装置

Publications (1)

Publication Number Publication Date
WO2017097053A1 true WO2017097053A1 (fr) 2017-06-15

Family

ID=59012669

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/103625 WO2017097053A1 (fr) 2015-12-10 2016-10-27 Procédé et appareil pour estimer un écart de temporisation, et terminal

Country Status (2)

Country Link
CN (1) CN106878205B (fr)
WO (1) WO2017097053A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114786251A (zh) * 2022-06-01 2022-07-22 山东闻远通信技术有限公司 一种5g小区同步方法、装置、电子设备及存储介质

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107305348B (zh) * 2017-05-08 2021-05-25 华北电力大学（保定） 基于相依性度量的动态系统迟延计算方法
CN113170384B (zh) * 2019-03-18 2022-08-19 华为技术有限公司 小区搜索的方法、装置和系统
CN112398514B (zh) * 2019-08-16 2022-03-29 大唐移动通信设备有限公司 一种信道估计方法和装置
CN112804176B (zh) * 2019-11-13 2022-06-28 大唐移动通信设备有限公司 一种时域偏差估计方法、装置及基站
CN114500184B (zh) * 2020-10-23 2023-08-01 大唐移动通信设备有限公司 一种信道估计方法和装置及设备
CN113810326B (zh) * 2021-09-27 2023-07-25 新华三技术有限公司 时偏估计的方法、装置、电子设备及存储介质
CN115715003B (zh) * 2023-01-09 2023-04-11 四川创智联恒科技有限公司 一种高速移动通信系统的时偏调整方法及系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1300170A (zh) * 1999-12-10 2001-06-20 阿尔卡塔尔公司 一种在信号流和相应的接收机中定位同步信息的方法
US20080084849A1 (en) * 2006-10-06 2008-04-10 Interdigital Technology Corporation Autonomous timing advance adjustment during handover
WO2010069903A1 (fr) * 2008-12-19 2010-06-24 Telefonaktiebolaget L M Ericsson (Publ) Récepteur et procédé de communications mobiles
US20120002706A1 (en) * 2009-03-13 2012-01-05 Pierre Demaj Process for Assigning a Finger of a Rake Receiver in Idle Mode, and Apparatus for Carrying Out thte Process

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102571646B (zh) * 2010-12-27 2014-09-17 联芯科技有限公司 一种ofdm系统中定时估计和调整方法及装置
CN102547968B (zh) * 2012-01-16 2014-09-10 电信科学技术研究院 一种协作多点传输下行同步方法及装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1300170A (zh) * 1999-12-10 2001-06-20 阿尔卡塔尔公司 一种在信号流和相应的接收机中定位同步信息的方法
US20080084849A1 (en) * 2006-10-06 2008-04-10 Interdigital Technology Corporation Autonomous timing advance adjustment during handover
WO2010069903A1 (fr) * 2008-12-19 2010-06-24 Telefonaktiebolaget L M Ericsson (Publ) Récepteur et procédé de communications mobiles
US20120002706A1 (en) * 2009-03-13 2012-01-05 Pierre Demaj Process for Assigning a Finger of a Rake Receiver in Idle Mode, and Apparatus for Carrying Out thte Process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114786251A (zh) * 2022-06-01 2022-07-22 山东闻远通信技术有限公司 一种5g小区同步方法、装置、电子设备及存储介质

Also Published As

Publication number Publication date
CN106878205A (zh) 2017-06-20
CN106878205B (zh) 2019-07-05

Similar Documents

Publication Publication Date Title
WO2017097053A1 (fr) Procédé et appareil pour estimer un écart de temporisation, et terminal
CN107370699B (zh) 一种NB-IoT小区搜索系统
CN102413079B (zh) 3gpp-lte系统下行链路初始分数频偏估计方法
WO2017097109A1 (fr) Procédé, appareil et dispositif d'estimation d'écart de temporisation de terminal dans une transmission multipoint coordonnée
JP6107418B2 (ja) キャリア周波数点の探索方法及び装置
WO2015165354A1 (fr) Procédé et dispositif d'estimation de profil de retard de puissance (pdp)
CN109561495B (zh) 时频跟踪方法、用户设备及计算机可读介质
WO2010118588A1 (fr) Procédé et dispositif d'estimation de canal de système de multiplexage par répartition orthogonale de la fréquence
CN110837003B (zh) 一种基于三角窗的双窗全相位dft同步相量测量方法及系统
CN102818930B (zh) 一种高精度快速计算电力谐波参数的方法
WO2016019657A1 (fr) Procédé, dispositif, et support de stockage pour estimer un décalage de fréquence
WO2014063275A1 (fr) Procédé de détermination de source d'interférence distante de même fréquence et procédé de localisation associé
WO2019076210A1 (fr) Procédé, appareil et dispositif d'estimation de corrélation de domaine temporel
TW201618474A (zh) 一種同步估計方法和接收端設備
WO2017012337A1 (fr) Procédé et appareil de réglage de temps de liaison montante
CN108282434A (zh) 一种lte下行主同步信号的检测方法
WO2015169229A1 (fr) Procédé et dispositif pour estimer une intensité de puissance et déterminer une cellule de brouillage
WO2015180776A1 (fr) Technique pour une estimation du temps d'arrivée
CN109803369A (zh) 联合时频估计及补偿方法、装置及用户设备
CN111342919B (zh) 一种信道的频域信道相关值估计的方法及设备
JP2014050102A (ja) セル探索方法、装置及びユーザ設備
JP2015089125A (ja) マルチキャリア変調信号の定時同期化装置及び方法
WO2021143644A1 (fr) Procédé et appareil de suivi de phase de porteuse
CN104467939B (zh) 一种优化多天线接收的方法及装置
WO2016165416A1 (fr) Procédé et dispositif de détermination de rapport signal-bruit

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16872246

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16872246

Country of ref document: EP

Kind code of ref document: A1