WO2017080103A1 - Goa驱动电路、tft显示面板及显示装置 - Google Patents

Goa驱动电路、tft显示面板及显示装置 Download PDF

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Publication number
WO2017080103A1
WO2017080103A1 PCT/CN2016/070202 CN2016070202W WO2017080103A1 WO 2017080103 A1 WO2017080103 A1 WO 2017080103A1 CN 2016070202 W CN2016070202 W CN 2016070202W WO 2017080103 A1 WO2017080103 A1 WO 2017080103A1
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Prior art keywords
signal
output
switch tube
pull
control
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Ceased
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PCT/CN2016/070202
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English (en)
French (fr)
Inventor
肖军城
曹尚操
戴荣磊
颜尧
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to DE112016005123.9T priority Critical patent/DE112016005123T5/de
Priority to JP2018523758A priority patent/JP2019502148A/ja
Priority to US14/915,222 priority patent/US9905182B2/en
Priority to GB1809472.2A priority patent/GB2593115A/en
Publication of WO2017080103A1 publication Critical patent/WO2017080103A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a GOA driving circuit, a TFT display panel, and a display device.
  • the driving of the horizontal scanning line of the active liquid crystal display panel is mainly completed by the external IC of the panel, and the external IC can control the stepwise charging and discharging of the horizontal scanning lines of each level.
  • the GOA Gate Driver on Array
  • the GOA technology can reduce the bonding process of external ICs, have the opportunity to increase production capacity and reduce product cost, and can make LCD panels more suitable for making narrow-frame or borderless display products.
  • the main structure of the GOA circuit is a pull-up part, a pull-up control part, a transfer part, a first pull-down part, and a pull-down maintenance. Pull-down Holding Part, and the Boast capacitor responsible for potential lift.
  • the TFT gate charging time and the charging mode of the output scan signal in the pull-up circuit module determine the gate output capability; and if the potential of the TFT gate cannot reach a certain high potential, the GOA circuit is affected. Stability and gate output quality.
  • the GOA circuit will have different forward and reverse scan quality due to the difference in load. How to achieve image quality optimization is another problem of the GOA circuit.
  • an object of the present invention is to provide a GOA driving circuit and a TFT. Display panel and display device.
  • a GOA driving circuit comprising a multi-level driving unit, each of the driving units comprising:
  • the input module is configured to receive a display scan signal or a touch sensing scan signal, an output signal of a previous stage, and an output signal of a next stage, and output a first control signal according to the received signal;
  • An output module configured to receive the first control signal and the first clock signal, and output a first output control signal according to the first control signal and the first clock signal;
  • a pull-down module configured to receive the first control signal, the second clock signal, and the low-level signal, and output a pull-down signal according to the first control signal, the second clock signal, and the low-level signal, where the The second clock signal and the first clock signal are reversed;
  • a pull-down maintaining module configured to receive the pull-down signal, a high level signal, and a first clock signal, and output the second output control signal according to the pull-down signal, a high level signal, and a first clock signal, where The first output control signal and the second output control signal cooperate to obtain an output signal.
  • the input module includes a first switch tube and a second switch tube, wherein the first switch tube and the second switch tube are configured to receive a display scan signal, and the scan signal is a high level scan signal and Low level scan signal, where:
  • the control end of the first switch tube receives an output signal of the upper stage, and the input end of the first switch tube receives a high level scan signal or a low level scan signal, and the output end of the first switch tube outputs Describe the first control signal;
  • the control end of the second switch tube receives the output signal of the next stage, and the input end of the second switch tube receives the low level scan signal or the high level scan signal, and the output end of the first switch tube outputs The first control signal is described.
  • the input module includes a first switch tube, and the first switch tube is configured to receive a touch sensing scan signal, wherein:
  • the control end of the first switch tube receives the output signal of the upper stage, the input end of the first switch tube receives the touch sensing scan signal, and the output end of the first switch tube outputs the first control signal.
  • the output module includes a third switching transistor and a first capacitor, wherein:
  • a control end of the third switch tube is connected to an output end of the second switch tube to receive the first control signal, and an input end of the third switch tube receives the first clock signal, the third The output end of the switch tube outputs the first output control signal;
  • Both ends of the second capacitor are respectively connected to the control end and the output end of the third switch tube.
  • the pull-down signal includes a first pull-down signal and a second pull-down signal
  • the pull-down module includes a fourth switch tube and a fifth switch tube, wherein:
  • a control end of the fourth switch tube is connected to an output end of the second switch tube to receive the first control signal, and an input end of the fourth switch tube receives the second clock signal, the fourth The output end of the switch tube outputs the first pull-down signal;
  • the control end of the fifth switch tube receives the second clock signal, the input end of the fifth switch tube receives the low level signal, and the output end of the fifth switch tube outputs the second pull down signal .
  • the pull-down maintaining module includes a sixth switching tube, a seventh switching tube, an eighth switching tube, and a second capacitor, wherein:
  • the control end of the sixth switch tube receives the first clock signal, the input end of the sixth switch tube is connected to the output end of the seventh switch tube, and the output end of the sixth switch tube is connected to the first The control end of the three switch tubes;
  • the control end of the seventh switch tube is respectively connected to the output ends of the fourth switch tube and the fifth switch tube to receive the pull-down signal, and the input end of the seventh switch tube receives the high level a signal, the output end of the seventh switch tube is connected to the input end of the sixth switch tube;
  • a control end of the eighth switch tube is respectively connected to an output end of the fourth switch tube and the fifth switch tube to receive the pull-down signal, and an input end of the eighth switch tube receives the high level a signal, the output end of the eighth switch tube outputs the second output control signal;
  • One end of the second capacitor is connected to the control ends of the seventh switch tube and the eighth switch tube, and the other end receives the high level signal.
  • the first switch tube to the eighth switch tube are all P-type switch tubes, the control end is the gate of the P-type switch tube, and the input end is the source of the P-type switch tube. The output is the drain of the P-type switch.
  • the GOA driving circuit further includes a ninth switch tube, the control end of the ninth switch tube receives the low level signal, and an input end of the ninth switch tube is connected to the input module The output end of the ninth switch tube is connected to the output module.
  • a TFT substrate including the above-described GOA driving circuit.
  • a display device includes the TFT substrate described above.
  • the invention charges and discharges the Qn point by the direct current signal, not only ensures that the Q point reaches a more reasonable potential, improves the level transmission capability, and can realize forward and reverse scanning or touch sensing scanning; and can also reduce the potential of the first control signal. Affected by the outside world; it can be formed by only 9 switching tubes and 2 capacitors, which can save IC cost to the utmost.
  • FIG. 1 is a circuit diagram of an nth stage GOA driving unit in a GOA driving circuit in a first embodiment of the present invention.
  • FIG. 2 is a timing chart of driving of a GOA driving unit in the first embodiment of the present invention.
  • FIG. 3 is a circuit diagram of an nth stage GOA driving unit in a GOA driving circuit in a second embodiment of the present invention.
  • Fig. 4 is a timing chart showing the driving of the GOA driving unit in the third embodiment of the present invention.
  • FIG. 5 is a schematic structural view of a display device according to a fourth embodiment of the present invention.
  • the GOA driving circuit of the present invention comprises a multi-level driving unit, wherein each driving unit receives a display scanning signal or a touch sensing scanning signal, a low level signal VGL, a high level signal VGH, and an output signal of a previous stage. Gn-1, the output signal Gn+1 of the next stage, the first clock signal CK, and the second time Clock signal XCK.
  • the output signal of the upper stage received by the first stage driving unit is a preset initial signal.
  • the structure of the GOA driving unit of each stage is the same, the following is an example in which the nth stage GOA driving unit is taken as an example.
  • the GOA driving unit includes an input module 11, an output module 12, a pull-down module 13, and a pull-down maintaining module 14.
  • the input module 11 is configured to receive the display scan signals Vf and Vr, the output signal Gn-1 of the previous stage, and the output signal Gn+1 of the next stage, and output the first control signal K1 according to the received signal.
  • the first control signal K1 is output to the first node Qn, which is a point for controlling the output of the drive signal.
  • the output module 12 is configured to receive the first control signal K1 and the first clock signal CK, and output a first output control signal O1 according to the first control signal K1 and the first clock signal CK.
  • the pull-down module 13 is configured to receive the first control signal K1, the second clock signal XCK, and the low-level signal VGL, and output a pull-down signal according to the first control signal K1, the second clock signal XCK, and the low-level signal VGL.
  • L1 wherein the pull-down signal L1 is output to the second node Pn, and the second node Pn is a point for controlling the stable output of the circuit during circuit inactivity.
  • the second clock signal XCK is inverted from the first clock signal CK.
  • the pull-down maintaining module 14 is configured to receive the pull-down signal L1, the high-level signal VGH, and the first clock signal CK, and output a second output control signal O2 according to the pull-down signal L1, the high-level signal VGH, and the first clock signal CK, where An output control signal O1 and a second output control signal O2 cooperate to obtain an output signal Gn.
  • the input module 11 includes a first switch tube T1 and a second switch tube T2.
  • the control end of the first switch tube T1 receives the output signal Gn-1 of the previous stage
  • the input end of the first open switch tube T1 receives the first scan signal Vf
  • the control end of the second switch tube T2 receives the next stage.
  • the output signal Gn+1, the input end of the second switch tube T2 receives the second scan signal Vr, and the output ends of the first switch tube T1 and the second switch tube T2 jointly output the first control signal K1.
  • the output ends of the first switch tube T1 and the second switch tube T2 are connected to the first node Qn to output the first control signal K1 to the first node Qn.
  • the output module 12 includes a third switching transistor T3 and a first capacitor C1.
  • the control end of the third switch tube T3 is connected to the output end of the first switch tube T1 and the second switch tube T2 to receive the first control signal K1.
  • the control end of the third switch tube T3 is connected to the first node Qn.
  • the first control signal K1 outputted by the switch tube and the second switch tube T2.
  • the input end of the third switch T3 receives the first clock signal CK, and the output end of the third switch T3 outputs the first output control signal O1.
  • the first capacitor C1 is a Boast capacitor responsible for the potential rise, and the two ends thereof are respectively connected to the control end and the output end of the third switch tube T3, that is, one end of the first capacitor C1 and the control end of the third switch tube T3 are connected.
  • the first node Qn is a Boast capacitor responsible for the potential rise, and the two ends thereof are respectively connected to the control end and the output end of the third switch tube T3, that is, one end of the first capacitor C1 and the control end of the third switch tube T3 are connected.
  • the first node Qn is a Boast capacitor responsible for the potential rise, and the two ends thereof are respectively connected to the control end and the output end of the third switch tube T3, that is, one end of the first capacitor C1 and the control end of the third switch tube T3 are connected.
  • the pull-down signal L1 includes a first pull-down signal L11 and a second pull-down signal L12
  • the pull-down module 13 includes a fourth switch tube T4 and a fifth switch tube T5.
  • the control end of the fourth switch tube T4 is connected to the output ends of the first switch tube T1 and the second switch tube T2 to receive the first control signal K1.
  • the control end of the fourth switch tube T4 and the first switch tube T1 is connected to the first node Qn
  • the input end of the fourth switch tube T4 receives the second clock signal XCK
  • the output end of the fourth switch tube T4 outputs the first pull-down signal L11
  • the specific The output of the fourth switching transistor T4 is connected to the second node Pn to output a first pull-down signal L11 to the second node Pn.
  • the control end of the fifth switch T5 receives the second clock signal XCK, the input end of the fifth switch T5 receives the low level signal VGL, and the output end of the fifth switch T5 outputs the second pull down signal L12, specifically, the fifth The output of the switching transistor T5 is connected to the second node Pn to output a second pull-down signal L12 to the second node Pn.
  • the pull-down maintaining module 14 includes a sixth switching transistor T6, a seventh switching transistor T7, an eighth switching transistor T8, and a second capacitor C2.
  • the control end of the sixth switch tube T6 receives the first clock signal CK, the input end of the sixth switch tube T6 is connected to the output end of the seventh switch tube T7, and the output end of the sixth switch tube T6 is connected to the first node Qn.
  • the control terminal of the third switching transistor T3 is connected through the first node Qn.
  • the control end of the seventh switch tube T7 is connected to the output ends of the fourth switch tube T4 and the fifth switch tube T5 through the second node Pn to receive the pull-down signal L1, and the input end of the seventh switch tube T7 receives the high level signal VGH.
  • the output end of the seventh switch tube T7 is connected to the input end of the sixth switch tube T6.
  • the control end of the eighth switch tube T8 is connected to the output ends of the fourth switch tube T4 and the fifth switch tube T5 through the second node Pn to receive the pull-down signal L1, and the input end of the eighth switch tube T8 receives the high level signal VGH.
  • the output end of the eighth switch tube T8 outputs a second output control signal O2.
  • One end of the second capacitor C2 is connected to the control ends of the seventh switch tube T7 and the eighth switch tube T8, and the other end receives the high level signal VGH.
  • the first switch tube T1 to the eighth switch tube T8 are all P-type switch tubes, the control end thereof is the gate of the P-type switch tube, the input end is the source of the P-type switch tube, and the output end is P. The drain of the type of switch.
  • the first scanning signal Vf and the second scanning signal Vr are a low level scanning signal and a high level scanning signal, respectively, in the forward scanning.
  • the first scan signal Vf and the second scan signal Vr are the high-level scan signal and the low-level scan signal, respectively, and the forward scan is taken as an example, and specifically includes the following four stages:
  • the first stage the first switch tube T1 is turned on, the first scan signal Vf is pulled low to the low point of the first node Qn, the second switch tube T2 and the third switch tube T3 are turned on, the Pn point is low, the first clock signal CK is at a high potential at this time, the fourth switching transistor T4 is turned off, and the fifth switching transistor T5, the sixth switching transistor T6, and the seventh switching transistor T7 are turned on.
  • the second stage the first clock signal CK is low, and the Gn output is low.
  • it can drive the pixel unit of the display area (AA area) of the TFT (Thin Film Transistor) substrate, and on the other hand can be used as a stage.
  • the signal number is passed to the next level drive unit.
  • the third switching transistor T3 is turned on, the second node Pn point is turned to a high potential by the second clock signal XCK, the fifth switching transistor T5 and the seventh switching transistor T7 are turned off, and the first node Qn point is capacitively coupled to a higher potential. , to ensure the normal output of Gn.
  • the third stage the output signal Gn+1 of the next stage is low, the ninth switch T9 is opened, the first node Qn is pulled to a high potential, the second clock signal XCK is low, and the second node Pn is pulled down to At a low potential, the fifth switching transistor T5 and the sixth switching transistor T6 are turned on.
  • the fourth stage the first clock signal CK is low, the fourth switch T4 is turned on, the first node Qn point is pulled to the high potential again, and the first node Qn point and the second node Pn point are in the process of one frame thereafter Always kept at high potential and low potential.
  • the reverse scan works as above, except that the Gn+1 level in the space becomes the Gn-1 of the timing, and the first scan signal Vf and the second scan signal Vr become the high level scan signal and the low level scan at this time.
  • the signal, the four stages of the reverse scan will not be described again.
  • the DC-controlled source and the switching device are introduced, and the Qn point is charged and discharged by the DC signal, which not only ensures that the Q-point reaches a more reasonable potential, improves the level-transmitting capability, and can realize forward-backward scanning.
  • FIG. 3 is a schematic structural diagram of another GOA driving circuit according to a second embodiment of the present invention.
  • the GOA driving circuit of this embodiment is different from the GOA driving circuit of the first embodiment in that the GOA driving circuit of the embodiment further includes a ninth switching tube T9, and the control end of the ninth switching tube T9 receives a low level signal. VGL, the input end of the ninth switch tube T9 is connected to the output end of the second switch tube T2, and the output end of the ninth switch tube T9 is connected to the control end of the third switch tube T3.
  • the function of the ninth switch tube T9 is that when the first control signal K1 of the first node Qn is coupled to a lower potential, the ninth switch tube T9 is turned off.
  • the potential of the first control signal K1 that reduces the first node Qn is affected by the outside.
  • the GOA driving circuit is the same as the driving circuit of FIG. 1, and the nth stage GOA driving unit 10 also includes an input module, an output module, a pull-down module, and a pull-down maintaining module.
  • the first switch tube T1 is used to receive the touch sensing scan signal Vf in the embodiment, and the timing chart of the GOA driving circuit in the embodiment is shown in FIG. 4, including the display driving time.
  • TP action time wherein the display driving time includes the same four stages as in the first embodiment, and details are not described herein.
  • the GOA driving circuit in this embodiment may also include a ninth switching tube T9.
  • the control end of the ninth switching tube T9 receives the low level signal VGL, and the input end of the ninth switching tube T9 is connected to the second switching tube T2.
  • the output end of the ninth switch tube T9 is connected to the control end of the third switch tube T3.
  • the display device 100 includes a TFT substrate 101 and a GOA driving circuit 102 on the side of the TFT substrate 101, wherein the GOA driving circuit 102 is constituted by a plurality of GOA driving units 10 as described above.
  • the present invention charges and discharges the Qn point by the DC signal, which not only ensures that the Q point reaches a more reasonable potential, improves the level transmission capability, and can realize forward and reverse scanning or touch sensing scanning; Reducing the potential of the first control signal is affected by the outside world; it can be formed by only 9 switching tubes and 2 capacitors, which can save the IC cost to the utmost.

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Shift Register Type Memory (AREA)
  • Electronic Switches (AREA)
  • Liquid Crystal (AREA)

Abstract

一种GOA驱动电路（102）、TFT显示面板及显示装置（100），该GOA驱动电路（102）的驱动单元（10）包括：输入模块（11），用于根据接收到的显示扫描信号（Vf，Vr）或触控感应扫描信号（Vf）等输出第一控制信号（K1）；输出模块（12），用于根据第一控制信号（K1）和第一时钟信号（CK）输出第一输出控制信号（O1）；下拉模块（13），用于根据第一控制信号（K1）、第二时钟信号（XCK）和低电平信号（VGL）输出下拉信号（L1）；下拉维持模块（14），用于根据所述下拉信号（L1）、高电平信号（VGH）和第一时钟信号（CK）输出第二输出控制信号（O2）。通过直流讯号对第一节点（Qn）进行充放电，不仅保证第一节点（Qn）达到更合理的电位，提高级传能力，而且能够实现正反向扫描或触控感应扫描。

Description

GOA驱动电路、TFT显示面板及显示装置 技术领域
本发明涉及显示技术领域，特别是涉及一种GOA驱动电路、TFT显示面板及显示装置。
背景技术
目前主动式液晶显示面板水平扫描线的驱动主要由面板外接的IC来完成，外接的IC可以控制各级水平扫描线的逐级充电和放电。而GOA(Gate Driver on Array)，可以运用液晶显示面板的原有制程将水平扫描线的驱动电路制作在显示区周围的基板上，使之能替代外接IC来完成水平扫描线的驱动。GOA技术能减少外接IC的bonding工序，有机会提升产能并降低产品成本，而且可以使液晶显示面板更适合制作窄边框或无边框的显示产品。
GOA电路的主要架构有上拉电路(Pull-up part)、上拉控制电路(Pull-up control part)、下传电路(Transfer Part，第一下拉电路(Key Pull-down Part)和下拉维持电路(Pull-down Holding Part))，以及负责电位抬升的Boast电容。
GOA电路中，上拉电路模块中输出扫描信号的TFT栅极充电时间和充电方式决定了栅极输出能力；而如果这颗TFT栅极的电位无法达到一定的高电位就会影响到GOA电路的稳定性和栅极输出质量。
另外，GOA电路由于负载的差异，正向和反向扫描画质会有差异，如何实现画质的最优化是GOA电路的另一问题。
因此，针对上述技术问题，有必要提供一种GOA驱动电路、TFT显示面板及显示装置。
发明内容
为克服现有技术的不足，本发明的目的在于提供一种GOA驱动电路、TFT 显示面板及显示装置。
为了实现上述目的，本发明实施例提供的技术方案如下：
一种GOA驱动电路，所述GOA驱动电路包括多级驱动单元，所述每一驱动单元包括：
输入模块，用于接收显示扫描信号或触控感应扫描信号、上一级的输出信号和下一级的输出信号，并根据接收到的信号输出第一控制信号；
输出模块，用于接收所述第一控制信号和第一时钟信号，并根据所述第一控制信号和所述第一时钟信号输出第一输出控制信号；
下拉模块，用于接收所述第一控制信号、第二时钟信号和低电平信号，并根据所述第一控制信号、第二时钟信号和低电平信号输出下拉信号，其中，所述第二时钟信号和所述第一时钟信号反向；
下拉维持模块，用于接收所述下拉信号、高电平信号和第一时钟信号，并根据所述下拉信号、高电平信号和第一时钟信号输出所述第二输出控制信号，其中所述第一输出控制信号和所述第二输出控制信号共同作用来获得输出信号。
作为本发明的进一步改进，所述输入模块包括第一开关管和第二开关管，所述第一开关管和第二开关管用于接收显示扫描信号，所述扫描信号为高电平扫描信号和低电平扫描信号，其中：
所述第一开关管的控制端接收上一级的输出信号，所述第一开关管的输入端接收高电平扫描信号或低电平扫描信号，所述第一开关管的输出端输出所述第一控制信号；
所述第二开关管的控制端接收下一级的输出信号，所述第二开关管的输入端接收低电平扫描信号或高电平扫描信号，所述第一开关管的输出端输出所述第一控制信号。
作为本发明的进一步改进，所述输入模块包括第一开关管，所述第一开关管用于接收触控感应扫描信号，其中：
所述第一开关管的控制端接收上一级的输出信号，所述第一开关管的输入端接收触控感应扫描信号，所述第一开关管的输出端输出所述第一控制信号。
作为本发明的进一步改进，所述输出模块包括第三开关管和第一电容，其中：
所述第三开关管的控制端连接所述第二开关管的输出端，以接收所述第一控制信号，所述第三开关管的输入端接收所述第一时钟信号，所述第三开关管的输出端输出所述第一输出控制信号；
所述第二电容的两端分别连接所述第三开关管的控制端和输出端。
作为本发明的进一步改进，所述下拉信号包括第一下拉信号和第二下拉信号，所述下拉模块包括第四开关管和第五开关管，其中：
所述第四开关管的控制端连接所述第二开关管的输出端，以接收所述第一控制信号，所述第四开关管的输入端接收所述第二时钟信号，所述第四开关管的输出端输出所述第一下拉信号；
所述第五开关管的控制端接收所述第二时钟信号，所述第五开关管的输入端接收所述低电平信号，所述第五开关管的输出端输出所述第二下拉信号。
作为本发明的进一步改进，所述下拉维持模块包括第六开关管、第七开关管、第八开关管和第二电容，其中：
所述第六开关管的控制端接收所述第一时钟信号，所述第六开关管的输入端连接所述第七开关管的输出端，所述第六开关管的输出端连接所述第三开关管的控制端；
所述第七开关管的控制端分别连接所述第四开关管和所述第五开关管的输出端，以接收所述下拉信号，所述第七开关管的输入端接收所述高电平信号，第七开关管的输出端连接所述第六开关管的输入端；
所述第八开关管的控制端分别连接所述第四开关管和所述第五开关管的输出端，以接收所述下拉信号，所述第八开关管的输入端接收所述高电平信号，所述第八开关管的输出端输出所述第二输出控制信号；
所述第二电容一端与所述第七开关管和第八开关管的控制端连接，另一端接收所述高电平信号。
作为本发明的进一步改进，所述第一开关管至所述第八开关管均为P型开关管，所述控制端为P型开关管的栅极，输入端为P型开关管的源极，输出端为P型开关管的漏极。
作为本发明的进一步改进，所述GOA驱动电路进一步包括第九开关管，所述第九开关管的控制端接收所述低电平信号，所述第九开关管的输入端连接所述输入模块，所述第九开关管的输出端连接所述输出模块。
相应地，一种TFT基板，所述TFT基板包括上述的GOA驱动电路。
相应地，一种显示装置，所述显示装置包括上述的TFT基板。
本发明通过直流讯号对Qn点进行充放电，不仅保证Q点达到更合理的电位，提高级传能力，而且能够实现正反向扫描或触控感应扫描；同时能够减小第一控制信号的电位受外界的影响；最多只需通过9个开关管和2电容即可形成，能够在最大限度的节约IC成本。
附图说明
图1为本发明第一实施例中GOA驱动电路中第n级GOA驱动单元的电路示意图。
图2为本发明第一实施例中GOA驱动单元的驱动时序图。
图3为本发明第二实施例中GOA驱动电路中第n级GOA驱动单元的电路示意图。
图4为本发明第三实施例中GOA驱动单元的驱动时序图。
图5为本发明第四实施例中显示装置的结构示意图。
具体实施方式
为了使本技术领域的人员更好地理解本发明中的技术方案，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本发明保护的范围。
本发明中的GOA驱动电路包括多级驱动单元，其中，每一级驱动单元都接收显示扫描信号或触控感应扫描信号、低电平信号VGL、高电平信号VGH、上一级的输出信号Gn-1、下一级的输出信号Gn+1、第一时钟信号CK以及第二时 钟信号XCK。其中，第一级驱动单元接收的上一级的输出信号为预设的初始信号。
由于每一级的GOA驱动单元的结构都相同，因此以下将以其中第n级GOA驱动单元为例进行介绍。
参图1所示，为本发明第一实施例GOA驱动电路中第n级GOA驱动单元10的电路示意图，该GOA驱动单元包括输入模块11、输出模块12、下拉模块13及下拉维持模块14。
其中，输入模块11用于接收显示扫描信号Vf和Vr、上一级的输出信号Gn-1和下一级的输出信号Gn+1，并根据接收到的信号输出第一控制信号K1。第一控制信号K1输出到第一节点Qn，第一节点Qn为用于控制驱动信号输出的点。
输出模块12用于接收所述第一控制信号K1和第一时钟信号CK，并根据所述第一控制信号K1和所述第一时钟信号CK输出第一输出控制信号O1。
下拉模块13用于接收所述第一控制信号K1、第二时钟信号XCK和低电平信号VGL，并根据所述第一控制信号K1、第二时钟信号XCK和低电平信号VGL输出下拉信号L1，其中，其中，下拉信号L1输出到第二节点Pn，第二节点Pn为用于控制在电路非作用期间保持电路稳定输出的点。第二时钟信号XCK和第一时钟信号CK反向。
下拉维持模块14用于接收下拉信号L1、高电平信号VGH和第一时钟信号CK，并根据下拉信号L1、高电平信号VGH和第一时钟信号CK输出第二输出控制信号O2，其中第一输出控制信号O1和第二输出控制信号O2共同作用来获得输出信号Gn。
可选的，输入模块11包括第一开关管T1和第二开关管T2。其中，第一开关管T1的控制端接收上一级的输出信号Gn-1，第一开开关管T1的输入端接收第一扫描信号Vf，第二开关管T2的控制端接收下一级的输出信号Gn+1，第二开关管T2的输入端接收第二扫描信号Vr，第一开关管T1和第二开关管T2的输出端共同输出第一控制信号K1。具体的，第一开关管T1和第二开关管T2的输出端连接在第一节点Qn，以向第一节点Qn输出第一控制信号K1。
输出模块12包括第三开关管T3和第一电容C1。其中，第三开关管T3的控制端连接第一开关管T1和第二开关管T2的输出端，以接收第一控制信号K1，具体的，第三开关管T3的控制端连接第一节点Qn，以通过第一节点Qn接收第 一开关管和第二开关管T2输出的第一控制信号K1。第三开关管T3的输入端接收第一时钟信号CK，第三开关管T3的输出端输出第一输出控制信号O1。第一电容C1为负责电位抬升的Boast电容，其两端分别连接第三开关管T3的控制端和输出端，也就是说，第一电容C1的一端和第三开关管T3的控制端均连接第一节点Qn。
本实施例中，下拉信号L1包括第一下拉信号L11和第二下拉信号L12，下拉模块13包括第四开关管T4和第五开关管T5。其中，第四开关管T4的控制端连接第一开关管T1和第二开关管T2的输出端，以接收第一控制信号K1，具体的，第四开关管T4的控制端和第一开关管T1、第二开关管T2的输出端均连接第一节点Qn，第四开关管T4的输入端接收第二时钟信号XCK，第四开关管T4的输出端输出第一下拉信号L11，具体的，第四开关管T4的输出端连接到第二节点Pn，以向第二节点Pn输出第一下拉信号L11。第五开关管T5的控制端接收第二时钟信号XCK，第五开关管T5的输入端接收低电平信号VGL，第五开关管T5的输出端输出第二下拉信号L12，具体的，第五开关管T5的输出端连接到第二节点Pn，以向第二节点Pn输出第二下拉信号L12。
下拉维持模块14包括第六开关管T6、第七开关管T7、第八开关管T8和第二电容C2。其中，第六开关管T6的控制端接收第一时钟信号CK，第六开关管T6的输入端连接第七开关管T7的输出端，第六开关管T6的输出端连接到第一节点Qn，以通过第一节点Qn连接第三开关管T3的控制端。第七开关管T7的控制端通过第二节点Pn分别连接第四开关管T4和第五开关管T5的输出端，以接收下拉信号L1，第七开关管T7的输入端接收高电平信号VGH，第七开关管T7的输出端连接第六开关管T6的输入端。第八开关管T8的控制端通过第二节点Pn分别连接第四开关管T4和第五开关管T5的输出端，以接收下拉信号L1，第八开关管T8的输入端接收高电平信号VGH，第八开关管T8的输出端输出第二输出控制信号O2。第二电容C2一端与第七开关管T7和第八开关管T8的控制端连接，另一端接收高电平信号VGH。
本实施例中，第一开关管T1至第八开关管T8均为P型开关管，其控制端为P型开关管的栅极，输入端为P型开关管的源极，输出端为P型开关管的漏极。
参图2所示为本实施例中正反向扫描时GOA驱动电路的时序图，正向扫描时第一扫描信号Vf和第二扫描信号Vr分别为低电平扫描信号和高电平扫描信 号，而方向扫描时第一扫描信号Vf和第二扫描信号Vr分别为高电平扫描信号和低电平扫描信号，以正向扫描为例，具体包括下述四个阶段：
第一阶段：第一开关管T1打开，第一扫描信号Vf拉低第一节点Qn点到低电位，第二开关管T2和第三开关管T3打开，Pn点为低电位，第一时钟信号CK此时为高电位，第四开关管T4关闭，第五开关管T5、第六开关管T6和第七开关管T7打开。
第二阶段：第一时钟信号CK为低电位，Gn输出低电位，一方面可以驱动TFT(Thin Film Transistor，是薄膜晶体管)基板的显示区(AA区)的像素单元，另一方面可以作为级传讯号传递到下一级驱动单元中。
此外，第三开关管T3打开，第二节点Pn点通过第二时钟信号XCK变为高电位，第五开关管T5和第七开关管T7关闭，第一节点Qn点通过电容耦合到更高电位，保证Gn正常输出。
第三阶段：下一级的输出信号Gn+1为低电位，第九开关管T9打开，第一节点Qn拉至高电位，第二时钟信号XCK为低电位，第二节点Pn点被拉低为低电位，第五开关管T5和第六开关管T6打开。
第四阶段：第一时钟信号CK为低电位，第四开关管T4打开，第一节点Qn点再次被拉至高电位，在一帧其后的过程中第一节点Qn点和第二节点Pn点一直保持在高电位和低电位。
反向扫描的工作过程如上，只不过空间上的Gn+1级变为时序的Gn-1，第一扫描信号Vf和第二扫描信号Vr此时变为高电平扫描信号和低电平扫描信号，对反向扫描的四个阶段不再进行赘述。
本实施例中引入一直流受控源与开关器件，通过直流讯号对Qn点进行充放电，不仅保证Q点达到更合理的电位，提高级传能力，而且能够实现正反向扫描。
参图3所示是本发明第二实施例提供的另一种GOA驱动电路的结构示意图。本实施例的GOA驱动电路与第一实施例中GOA驱动电路不同之处在于：本实施例的GOA驱动电路还进一步包括第九开关管T9，第九开关管T9的控制端接收低电平信号VGL，第九开关管T9的输入端连接第二开关管T2的输出端，第九开关管T9的输出端连接第三开关管T3的控制端。第九开关管T9的作用是在第一节点Qn的第一控制信号K1被耦合到更低电位时，第九开关管T9关闭， 减小第一节点Qn的第一控制信号K1的电位受外界影响。
在本发明第三实施例中，GOA驱动电路与图1中的驱动电路相同，第n级GOA驱动单元10同样包括输入模块、输出模块、下拉模块及下拉维持模块。而与第一实施例不同的是，本实施例中第一开关管T1用于接收触控感应扫描信号Vf，结合图4所示为本实施例中GOA驱动电路的时序图，包括显示驱动时间和TP作用时间，其中，显示驱动时间包括与第一实施例中相同的四个阶段，在此不再进行赘述。
进一步地，在本实施例中的GOA驱动电路同样可以包括第九开关管T9，第九开关管T9的控制端接收低电平信号VGL，第九开关管T9的输入端连接第二开关管T2的输出端，第九开关管T9的输出端连接第三开关管T3的控制端。同样可以达到实施例二中减小第一节点Qn的第一控制信号K1的电位受外界影响的效果。
参图5所示是本发明第四实施例中显示装置的示意图。在本实施例中，显示装置100包括TFT基板101和位于TFT基板101一侧的GOA驱动电路102，其中该GOA驱动电路102由前文所述的若干GOA驱动单元10构成。
由以上技术方案可以看出，本发明通过直流讯号对Qn点进行充放电，不仅保证Q点达到更合理的电位，提高级传能力，而且能够实现正反向扫描或触控感应扫描；同时能够减小第一控制信号的电位受外界的影响；最多只需通过9个开关管和2电容即可形成，能够在最大限度的节约IC成本。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。

Claims (11)

  1. 一种GOA驱动电路，所述GOA驱动电路包括多级驱动单元，其中，所述每一驱动单元包括：
    输入模块，用于接收显示扫描信号或触控感应扫描信号、上一级的输出信号和下一级的输出信号，并根据接收到的信号输出第一控制信号；
    输出模块，用于接收所述第一控制信号和第一时钟信号，并根据所述第一控制信号和所述第一时钟信号输出第一输出控制信号；
    下拉模块，用于接收所述第一控制信号、第二时钟信号和低电平信号，并根据所述第一控制信号、第二时钟信号和低电平信号输出下拉信号，其中，所述第二时钟信号和所述第一时钟信号反向；
    下拉维持模块，用于接收所述下拉信号、高电平信号和第一时钟信号，并根据所述下拉信号、高电平信号和第一时钟信号输出所述第二输出控制信号，其中所述第一输出控制信号和所述第二输出控制信号共同作用来获得输出信号。
  2. 根据权利要求1所述的GOA驱动电路，其中，所述输入模块包括第一开关管和第二开关管，所述第一开关管和第二开关管用于接收显示扫描信号，所述扫描信号为高电平扫描信号和低电平扫描信号，其中：
    所述第一开关管的控制端接收上一级的输出信号，所述第一开关管的输入端接收高电平扫描信号或低电平扫描信号，所述第一开关管的输出端输出所述第一控制信号；
    所述第二开关管的控制端接收下一级的输出信号，所述第二开关管的输入端接收低电平扫描信号或高电平扫描信号，所述第一开关管的输出端输出所述第一控制信号。
  3. 根据权利要求1所述的GOA驱动电路，其中，所述输入模块包括第一开关管，所述第一开关管用于接收触控感应扫描信号，其中：
    所述第一开关管的控制端接收上一级的输出信号，所述第一开关管的输入端接收触控感应扫描信号，所述第一开关管的输出端输出所述第一控制信号。
  4. 根据权利要求2所述的GOA驱动电路，其中，所述输出模块包括第三开关管和第一电容，其中：
    所述第三开关管的控制端连接所述第二开关管的输出端，以接收所述第一控制信号，所述第三开关管的输入端接收所述第一时钟信号，所述第三开关管的输出端输出所述第一输出控制信号；
    所述第二电容的两端分别连接所述第三开关管的控制端和输出端。
  5. 根据权利要求3所述的GOA驱动电路，其中，所述输出模块包括第三开关管和第一电容，其中：
    所述第三开关管的控制端连接所述第二开关管的输出端，以接收所述第一控制信号，所述第三开关管的输入端接收所述第一时钟信号，所述第三开关管的输出端输出所述第一输出控制信号；
    所述第二电容的两端分别连接所述第三开关管的控制端和输出端。
  6. 根据权利要求4所述的GOA驱动电路，其中，所述下拉信号包括第一下拉信号和第二下拉信号，所述下拉模块包括第四开关管和第五开关管，其中：
    所述第四开关管的控制端连接所述第二开关管的输出端，以接收所述第一控制信号，所述第四开关管的输入端接收所述第二时钟信号，所述第四开关管的输出端输出所述第一下拉信号；
    所述第五开关管的控制端接收所述第二时钟信号，所述第五开关管的输入端接收所述低电平信号，所述第五开关管的输出端输出所述第二下拉信号。
  7. 根据权利要求6所述的GOA驱动电路，其中，所述下拉维持模块包括第六开关管、第七开关管、第八开关管和第二电容，其中：
    所述第六开关管的控制端接收所述第一时钟信号，所述第六开关管的输入端连接所述第七开关管的输出端，所述第六开关管的输出端连接所述第三开关管的控制端；
    所述第七开关管的控制端分别连接所述第四开关管和所述第五开关管的输出端，以接收所述下拉信号，所述第七开关管的输入端接收所述高电平信号，第七开关管的输出端连接所述第六开关管的输入端；
    所述第八开关管的控制端分别连接所述第四开关管和所述第五开关管的输出端，以接收所述下拉信号，所述第八开关管的输入端接收所述高电平信号，所述第八开关管的输出端输出所述第二输出控制信号；
    所述第二电容一端与所述第七开关管和第八开关管的控制端连接，另一端接收所述高电平信号。
  8. 根据权利要求7所述的GOA驱动电路，其中，所述第一开关管至所述第八开关管均为P型开关管，所述控制端为P型开关管的栅极，输入端为P型开关管的源极，输出端为P型开关管的漏极。
  9. 根据权利要求1所述的GOA驱动电路，其中，所述GOA驱动电路进一步包括第九开关管，所述第九开关管的控制端接收所述低电平信号，所述第九开关管的输入端连接所述输入模块，所述第九开关管的输出端连接所述输出模块。
  10. 一种TFT基板，其包括GOA驱动电路，所述GOA驱动电路包括多级驱动单元，其中，所述每一驱动单元包括：
    输入模块，用于接收显示扫描信号或触控感应扫描信号、上一级的输出信号和下一级的输出信号，并根据接收到的信号输出第一控制信号；
    输出模块，用于接收所述第一控制信号和第一时钟信号，并根据所述第一控制信号和所述第一时钟信号输出第一输出控制信号；
    下拉模块，用于接收所述第一控制信号、第二时钟信号和低电平信号，并根据所述第一控制信号、第二时钟信号和低电平信号输出下拉信号，其中，所述第二时钟信号和所述第一时钟信号反向；
    下拉维持模块，用于接收所述下拉信号、高电平信号和第一时钟信号，并根据所述下拉信号、高电平信号和第一时钟信号输出所述第二输出控制信号，其中所述第一输出控制信号和所述第二输出控制信号共同作用来获得输出信号。
  11. 一种显示装置，其包括TFT基板，所述TFT基板包括GOA驱动电路；所述GOA驱动电路包括多级驱动单元，其中，所述每一驱动单元包括：
    输入模块，用于接收显示扫描信号或触控感应扫描信号、上一级的输出信号和下一级的输出信号，并根据接收到的信号输出第一控制信号；
    输出模块，用于接收所述第一控制信号和第一时钟信号，并根据所述第一控制信号和所述第一时钟信号输出第一输出控制信号；
    下拉模块，用于接收所述第一控制信号、第二时钟信号和低电平信号，并 根据所述第一控制信号、第二时钟信号和低电平信号输出下拉信号，其中，所述第二时钟信号和所述第一时钟信号反向；
    下拉维持模块，用于接收所述下拉信号、高电平信号和第一时钟信号，并根据所述下拉信号、高电平信号和第一时钟信号输出所述第二输出控制信号，其中所述第一输出控制信号和所述第二输出控制信号共同作用来获得输出信号。
PCT/CN2016/070202 2015-11-09 2016-01-05 Goa驱动电路、tft显示面板及显示装置 Ceased WO2017080103A1 (zh)

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