WO2017027990A1 - 一种0.2阶混合型与t型分数阶积分切换方法及电路 - Google Patents

一种0.2阶混合型与t型分数阶积分切换方法及电路 Download PDF

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WO2017027990A1
WO2017027990A1 PCT/CN2015/000748 CN2015000748W WO2017027990A1 WO 2017027990 A1 WO2017027990 A1 WO 2017027990A1 CN 2015000748 W CN2015000748 W CN 2015000748W WO 2017027990 A1 WO2017027990 A1 WO 2017027990A1
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order
fractional
type
capacitance
pin
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French (fr)
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李敏
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李敏
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols

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  • the invention relates to a 0.2-order fractional-order integral switching method and circuit, in particular to a 0.2-order hybrid type and T-type fractional-order integral switching method and circuit.
  • the structure of the 0.2-order fractional-order integration circuit mainly includes mixed-type fractional integral form, T-type fractional integral form and T-type fractional integral form.
  • the three structures that implement the 0.2-order fractional-order integral circuit have three-part resistance and capacitance.
  • the method and circuit for realizing the fractional-order integration circuit by using the above three structural forms have been reported, but the method of switching between different forms of 0.2-order fractional-order integration circuits to realize the 0.2-order fractional integration method and circuit has not been seen. It is reported that the present invention provides a 0.2-order hybrid and T-type fractional-order integral switching method and circuit.
  • the technical problem to be solved by the present invention is to provide a 0.2-order hybrid fractional-order integral and T-type fractional-order integral switching method and circuit, and the present invention adopts the following technical means to achieve the object of the invention:
  • a 0.2-order hybrid and T-type fractional integral switching method is characterized in that a hybrid 0.2-order fractional integral and a 0.2-order T-type fractional integral are selected by a two-choice analog switch.
  • Control output when the control signal of the analog switch is high, select the hybrid 0.2-order fractional integral output.
  • the hybrid 0.2-order fractional-order integral output When the control signal of the analog switch is low, select the T-type fractional integral output, or when simulating When the control signal of the switch is low, the hybrid 0.2-order fractional-order integral output is selected.
  • the control signal of the analog switch is high, the T-type fractional-order integral output is selected.
  • a 0.2-order hybrid and T-type fractional-order integral switching circuit characterized in that: the 0.2-order hybrid type and the T-type fractional-order integral switching circuit are composed of a 0.2-order hybrid fractional-order integration circuit and a 0.2-order T-order
  • the fractional-order integration circuit and the two-selection analog switch U0 are composed of four parts.
  • the 0.2-order hybrid fractional-order integration circuit is composed of four parts, wherein the resistor Rhx is connected in parallel with the capacitor Chx to form a first portion, and the first portion is connected in series with the resistor Rhy. Then, in parallel with the capacitor Chy, a second portion is formed.
  • the first two portions are connected in series with the resistor Rhz and then connected in parallel with the capacitor Chz to form a third portion.
  • the first three portions are connected in series with the resistor Rhw and then connected in parallel with the capacitor Chw to form a fourth portion.
  • the pin HA is connected to the first part, and the output pin HB is connected to the fourth part;
  • the 0.2-order T-type fractional-order integration circuit is composed of four parts, wherein the resistor RTx is connected in parallel with the capacitance CTx to form a first part, and the resistance RTy is connected in series with the capacitance CTy.
  • the second part is connected in parallel with the first part
  • the resistor RTz is connected in series with the capacitor CTz to form a third part
  • the third part is connected in parallel with the first two parts
  • the fourth part is formed in parallel with the first three parts, the resistance output pin TA is connected to the first part, the output pin TB is connected to the fourth part, and the output pin HB of the 0.2-order hybrid type fractional integration circuit is connected.
  • the SB pin of the U0 switch is to be switched, and the output pin TB of the 0.2-step T-type fractional-order integration circuit is connected to the SA pin of the second analog switch U0, and the output pin D of the second analog switch U0 is selected.
  • the control pin IN of the analog switch U0 is selected as the control of the 0.2-order hybrid type and the T-type fractional-order integral switching circuit, and the 0.2-order hybrid type fraction is used.
  • the beneficial result of the invention is that the automatic switching of the 0.2-order hybrid fractional-order integration circuit and the 0.2-order T-type fractional-order integration circuit is realized by using the two-choice analog switch, so that the 0.2-order fractional-order integration circuit is used in the secure communication.
  • the complexity of the 0.2-order fractional integral is improved, the difficulty of deciphering is increased, and the security of communication is facilitated.
  • 1 is an actual connection diagram of the hybrid type and T-type fractional-order integral switching circuit of the present invention.
  • FIG. 2 is a practical connection diagram of a 0.2-stage hybrid type integrating circuit of a hybrid type and a T-type fractional-order integral switching circuit of the present invention.
  • FIG. 3 is a practical connection diagram of a 0.2-stage T-type integrating circuit of a hybrid type and a T-type fractional-order integral switching circuit of the present invention.
  • FIG. 4 is a schematic diagram of a hybrid and T-type fractional-order integral switching circuit of the present invention.
  • FIG. 5 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
  • a 0.2-order hybrid and T-type fractional integral switching method is characterized in that a hybrid 0.2-order fractional integral and a 0.2-order T-type fractional integral are selected by a two-choice analog switch.
  • Control output when the control signal of the analog switch is high, select the hybrid 0.2-order fractional integral output.
  • the hybrid 0.2-order fractional-order integral output When the control signal of the analog switch is low, select the T-type fractional integral output, or when simulating When the control signal of the switch is low, the hybrid 0.2-order fractional-order integral output is selected.
  • the control signal of the analog switch is high, the T-type fractional-order integral output is selected.
  • a 0.2-order hybrid and T-type fractional-order integral switching circuit characterized in that: the 0.2-order hybrid type and the T-type fractional-order integral switching circuit are composed of a 0.2-order hybrid fractional-order integration circuit and a 0.2-order T-order
  • the fractional-order integration circuit and the two-selection analog switch U0 are composed of four parts.
  • the 0.2-order hybrid fractional-order integration circuit is composed of four parts, wherein the resistor Rhx is connected in parallel with the capacitor Chx to form a first portion, and the first portion is connected in series with the resistor Rhy. Then, in parallel with the capacitor Chy, a second portion is formed.
  • the first two portions are connected in series with the resistor Rhz and then connected in parallel with the capacitor Chz to form a third portion.
  • the first three portions are connected in series with the resistor Rhw and then connected in parallel with the capacitor Chw to form a fourth portion.
  • the pin HA is connected to the first part, and the output pin HB is connected to the fourth part;
  • the 0.2-order T-type fractional-order integration circuit is composed of four parts, wherein the resistor RTx is connected in parallel with the capacitance CTx to form a first part, and the resistance RTy is connected in series with the capacitance CTy.
  • the second part is connected in parallel with the first part
  • the resistor RTz is connected in series with the capacitor CTz to form a third part
  • the third part is connected in parallel with the first two parts
  • the fourth part is formed in parallel with the first three parts, the resistance output pin TA is connected to the first part, the output pin TB is connected to the fourth part, and the output pin HB of the 0.2-order hybrid type fractional integration circuit is connected.
  • the SB pin of the analog switch U0 Connect the SB pin of the analog switch U0, the output pin TB of the 0.2-step T-type fractional integration circuit is connected to the SA pin of the second analog switch U0, and the second-select analog switch
  • the output pin D of U0 is used as the output of the 0.2-order hybrid type and the T-type fractional-order integral switching circuit
  • the control pin IN of the analog switch U0 is selected as the control of the 0.2-order hybrid type and the T-type fractional-order integral switching circuit.
  • the output pin HA of the 0.2-order hybrid fractional-order integration circuit and the output pin TA of the 0.2-order T-type fractional-order integration circuit are respectively used as input pins of the 0.2-order hybrid type and T-type fractional-order integral switching circuit.
  • the analog circuit is constructed, which uses the operational amplifier U1, the operational amplifier U2, and the resistance and 0.2-order hybrid type and T-type fractional-order integral switching circuit U5, 0.2-order hybrid type and T
  • the fractional-order integral switching circuit U6, the 0.2-order hybrid type and the T-type fractional-order integral switching circuit U7 constitute an inverse-phase adder and an inverted 0.2-order fractional-order integrator, and the multiplication operation is performed by the multiplier U3 and the multiplier U4, and the operation is performed.
  • the amplifier U8 implements a comparator, the operational amplifier U1, the operational amplifier U2 and the operational amplifier U8 adopt LF347N, and the multiplier U3 and the multiplier U4 adopt AD633JN;
  • the operational amplifier U1 is connected to an operational amplifier U2, a multiplier U4, an operational amplifier U8, and a 0.2-order hybrid type and T-type fractional-order integral switching circuit U5, a 0.2-order hybrid type and a T-type fractional-order integral switching circuit U6, the operational amplifier U2 is connected to multiplier U3, multiplier U4 and 0.2-order hybrid type and T-type fractional-order integral switching circuit U7, said multiplier U3 is connected to operational amplifier U1, said multiplier U4 is connected to operational amplifier U2, said operational amplifier U8 is connected 0.2-order hybrid and T-type fractional-order integral switching circuit U5, 0.2-order hybrid and T-type fractional-order integral switching circuit U6, and 0.2-order hybrid and T-type fractional-order integral switching circuit U7.
  • the first pin of the operational amplifier U1 is connected to the sixth pin of U1 through the resistor R8, the second pin is connected to the first pin through the resistor R4, and the third, fifth, tenth, and twelfth pins are grounded.
  • the fourth pin is connected to VCC
  • the eleventh pin is connected to VEE
  • the sixth pin is connected to the HA pin and TA pin of the 0.2-order hybrid type and T-type fractional-order integral switching circuit U6, and the seventh pin is connected to the output y
  • the D pin of the 0.2-order hybrid type and the T-type fractional-order integral switching circuit U6 is connected to the first pin of the multiplier U4, and is connected to the second pin through the resistor R5, and is connected to the 13th pin through the resistor R1.
  • the 8th pin is connected to the output x
  • the 6th pin is connected through the resistor R6, and the 3rd, 5th, and 10th pins of the operational amplifier U8 are connected to the 0.2-order hybrid type.
  • the D pin of the T-type fractional-order integral switching circuit U5 the 9th pin is connected to the HA pin and the TA pin of the 0.2-order hybrid type and the T-type fractional-order integral switching circuit U5, and the 13th pin passes the resistor R2 and the 14th pin.
  • the pin is connected, and the 14th pin is connected to the 9th pin through the resistor R3;
  • the first, second, sixth, and seventh pins of the operational amplifier U2 are left floating, the third, fifth, ten, and 12th pins are grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, and the eighth pin is outputted by z.
  • the 9th pin is connected to the HA pin and TA pin of the 0.2-stage hybrid type and T-type fractional-order integral switching circuit U7, and the 13th pin is connected to the 14th pin through the resistor R10, and the 14th pin passes through the resistor.
  • R13 is connected to the 9th pin;
  • the first pin of the operational amplifier U8 is connected to the IN pin of the 0.2-order hybrid type and the T-type fractional-order integral switching circuit U5 through the resistor R14, and is grounded through the resistor R14 and the resistor R15, and the 2nd, 6th, 9th, and 12th pins are connected. Grounding, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, and the seventh pin is connected to the IN pin of the 0.2-order hybrid type and T-type fractional-order integral switching circuit U6 through the resistor R16, and is grounded through the resistor R16 and the resistor R17.
  • the 8th pin is connected to the IN pin of the 0.2-stage hybrid type and the T-type fractional-order integral switching circuit U7 through the resistor R18, grounded through the resistor R18 and the resistor R19, and the 13th pin and the 14th pin are suspended.
  • the first pin of the multiplier U3 is connected to the seventh pin of the multiplier U4, the third pin is connected to the eighth pin of U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to VEE, The 7 pin is connected to the 9th pin of the operational amplifier U1 through the resistor R7, and the 8th pin is connected to VCC;
  • the first pin of the multiplier U4 is connected to the seventh pin of the operational amplifier U1, the third pin is connected to the eighth pin of the operational amplifier U2, the second, fourth, and sixth pins are grounded, and the fifth pin is connected to the VEE.
  • the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R9, and is connected to the 1st pin of the multiplier U3, and the 8th pin is connected to VCC;
  • the HA and TA pins of the 0.2-order hybrid type and T-type fractional-order integral switching circuit U5 are connected to the ninth pin of the operational amplifier U1, and the D pin is connected to the eighth pin of the operational amplifier U1;
  • the HA and TA pins of the 0.2-order hybrid and T-type fractional-order integral switching circuit U6 are connected to the sixth pin of the operational amplifier U1, and the D pin is connected to the seventh pin of the operational amplifier U1;
  • the HA and TA pins of the 0.2-order hybrid type and T-type fractional-order integral switching circuit U7 are connected to the ninth pin of the operational amplifier U2, and the D pin is connected to the eighth pin of the operational amplifier U2.

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  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
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Abstract

本发明提供一种0.2阶混合型与T型分数阶积分切换方法及电路，一种混合型0.2阶分数阶积分与一种0.2阶T型分数阶积分通过二选一模拟开关器进行选择控制输出，当模拟开关器的控制信号为高电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为低电平时，选择T型分数阶积分输出，或是，当模拟开关器的控制信号为低电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为高电平时，选择T型分数阶积分输出。本发明采用二选一的模拟开关，实现了0.2阶混合型分数阶积分电路和0.2阶T型分数阶积分电路的自动切换，使0.2阶分数阶积分电路用于保密通信中时，提高了0.2阶分数阶积分的复杂性，增加了破译的难度，有利于通信的安全性。

Description

一种0.2阶混合型与T型分数阶积分切换方法及电路 技术领域
本发明涉及一种0.2阶分数阶积分切换方法及电路，特别涉及一种0.2阶混合型与T型分数阶积分切换方法及电路。
背景技术
实现0.2阶分数阶积分电路的结构主要有混合型分数阶积分形式、T型分数阶积分形式和T型分数阶积分形式，这三种实现0.2阶分数阶积分电路的结构均有三部分电阻和电容组成，利用上述三种结构形式实现分数阶积分电路的方法和电路已有报道，但利用不同形式的0.2阶分数阶积分电路之间切换的方法来实现0.2阶分数阶积分方法及电路还未见报道，本发明提供了一种实现0.2阶混合型与T型分数阶积分切换方法及电路。
发明内容
本发明要解决的技术问题是提供一种0.2阶混合型分数阶积分与T型分数阶积分切换方法及电路，本发明采用如下技术手段实现发明目的：
1、一种0.2阶混合型与T型分数阶积分切换方法，其特征是在于：一种混合型0.2阶分数阶积分与一种0.2阶T型分数阶积分通过二选一模拟开关器进行选择控制输出，当模拟开关器的控制信号为高电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为低电平时，选择T型分数阶积分输出，或是，当模拟开关器的控制信号为低电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为高电平时，选择T型分数阶积分输出。
2、一种0.2阶混合型与T型分数阶积分切换电路，其特征在于：所述一种0.2阶混合型与T型分数阶积分切换电路由0.2阶混合型分数阶积分电路和0.2阶T型分数阶积分电路及二选一模拟开关U0三部分组成，所述0.2阶混合型分数阶积分电路由四部分组成，其中电阻Rhx与电容Chx并联，形成第一部分，第一部分与电阻Rhy串联后再与电容Chy并联，形成第二部分，前两部分与电阻Rhz串联后再与电容Chz并联，形成第三部分，前三部分与电阻Rhw串联后再与电容Chw并联，形成第四部分，输出引脚HA接第一部分，输出引脚HB接第四部分；所述0.2阶T型分数阶积分电路由四部分组成，其中电阻RTx与电容CTx并联，形成第一部分，电阻RTy与电容CTy串联，形成第二部分，第二部分与第一部分进行并联，电阻RTz与电容CTz串联，形成第三部分，第三部分与前两部分进行并联，电阻RTw与电容CTw串联，形成第四部分，第四部分与前三部分进行并联，电阻输出引脚TA接第一部分，输出引脚TB接第四部分；所述0.2阶混合型分数阶积分电路的输出引脚HB接所述二选一模 拟开关U0的SB引脚，所述0.2阶T型分数阶积分电路的输出引脚TB接所述二选一模拟开关U0的SA引脚，所述二选一模拟开关U0的输出引脚D作为0.2阶混合型与T型分数阶积分切换电路的输出，二选一模拟开关U0的控制引脚IN作为0.2阶混合型与T型分数阶积分切换电路的控制，所述0.2阶混合型分数阶积分电路的输出引脚HA和所述0.2阶T型分数阶积分电路的输出引脚TA分别作为0.2阶混合型与T型分数阶积分切换电路的输入引脚，所述二选一模拟开关U0采用ADG884，所述电阻Rhx＝0.9931M，所述电位器Rhx1＝3.1K，所述电阻Rhx2＝500K、Rhx3＝470K、Rhx4＝10K、Rhx5＝0K，所述电容Chx＝28.680uF，所述电容Chx1＝10uF、Chx2＝4.7uF、Chx3＝1uF、Chx4＝470nF；所述电阻Rhy＝0.6624M，所述电位器Rhy1＝0.4K，所述电阻Rhy2＝510K、Rhy3＝100K、Rhy4＝51K、Rhy5＝0K，所述电容Chy＝2.6770uF，所述电容Chy1＝2.2uF、Chy2＝470nF、Chy3＝6.8nF、Chy4悬空；所述电阻Rhz＝0.3881M，所述电位器Rhz1＝4.1K和所述电阻Rhz2＝200K、Rhz3＝100K、Rhz4＝51K、Rhz5＝33K，所述电容Chz＝0.2736uF，所述电容Chz1＝220nF、Chz2＝47nF、Chz3＝6.8nF、Chz4悬空；所述电阻Rhw＝0.4685M，所述电位器Rhw1＝3.4K和所述电阻Rhw2＝220K、Rhw3＝220K、Rhw4＝20K、Rhw5＝5.1K，所述电容Chw＝12.59nF，所述电容Chw1＝10nF、Chw2＝2.2nF、Chw3＝0.33nF、Chw4悬空，所述电阻RTx＝2.512M，所述电位器RTx1＝0K和所述电阻RTx2＝2M、RTx3＝500K、RTx4＝10K、RTx5＝2K，所述电容CTx＝0.01259uF，所述电容CTx1＝10nF、CTx2＝2.2nF、CTx3＝330PF、CTx4＝33PF；所述电阻RTy＝3.394M，所述电位器RTy1＝0K和所述电阻RTy2＝3.3M、RTy3＝51K、RTy4＝33K、RTy5＝10K，所述电容CTy＝5.239uF，所述电容CTy1＝4.7uF、CTy2＝470nF、CTy3＝68nF、CTy4悬空；所述电阻RTz＝1.865M，所述电位器RTz1＝0K和所述电阻RTz2＝1M、RTz3＝510K、RTz4＝360K、RTz5＝5K，所述电容CTz＝0.5362uF，所述电容CTz1＝470nF、CTz2＝68nF、CTz3悬空、CTz4悬空；所述电阻RTw＝1.104M，所述电位器RTw1＝0K和所述电阻RTw2＝1M、RTw3＝100K、RTw4＝2K、RTw5＝2K，所述电容CTw＝0.05094uF，所述电容CTw1＝47nF、CTw2＝3.3nF、CTw3＝33pF、CTw4＝30pF。
本发明的有益果是：采用二选一的模拟开关，实现了0.2阶混合型分数阶积分电路和0.2阶T型分数阶积分电路的自动切换，使0.2阶分数阶积分电路用于保密通信中时，提高了0.2阶分数阶积分的复杂性，增加了破译的难度，有利于通信的安全性。
附图说明
图1为本发明的混合型与T型分数阶积分切换电路内部实际连接图。
图2为本发明的混合型与T型分数阶积分切换电路0.2阶混合型积分电路实际连接图。
图3为本发明的混合型与T型分数阶积分切换电路0.2阶T型积分电路实际连接图。
图4为本发明的混合型与T型分数阶积分切换电路示意图。
图5为本发明优选实施例的电路连接结构示意图。
图6、图7和图8为本发明的电路实际连接图。
具体实施方式
下面结合附图和优选实施例对本发明作更进一步的详细描述，参见图1-图8。
1、一种0.2阶混合型与T型分数阶积分切换方法，其特征是在于：一种混合型0.2阶分数阶积分与一种0.2阶T型分数阶积分通过二选一模拟开关器进行选择控制输出，当模拟开关器的控制信号为高电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为低电平时，选择T型分数阶积分输出，或是，当模拟开关器的控制信号为低电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为高电平时，选择T型分数阶积分输出。
2、一种0.2阶混合型与T型分数阶积分切换电路，其特征在于：所述一种0.2阶混合型与T型分数阶积分切换电路由0.2阶混合型分数阶积分电路和0.2阶T型分数阶积分电路及二选一模拟开关U0三部分组成，所述0.2阶混合型分数阶积分电路由四部分组成，其中电阻Rhx与电容Chx并联，形成第一部分，第一部分与电阻Rhy串联后再与电容Chy并联，形成第二部分，前两部分与电阻Rhz串联后再与电容Chz并联，形成第三部分，前三部分与电阻Rhw串联后再与电容Chw并联，形成第四部分，输出引脚HA接第一部分，输出引脚HB接第四部分；所述0.2阶T型分数阶积分电路由四部分组成，其中电阻RTx与电容CTx并联，形成第一部分，电阻RTy与电容CTy串联，形成第二部分，第二部分与第一部分进行并联，电阻RTz与电容CTz串联，形成第三部分，第三部分与前两部分进行并联，电阻RTw与电容CTw串联，形成第四部分，第四部分与前三部分进行并联，电阻输出引脚TA接第一部分，输出引脚TB接第四部分；所述0.2阶混合型分数阶积分电路的输出引脚HB接所述二选一模拟开关U0的SB引脚，所述0.2阶T型分数阶积分电路的输出引脚TB接所述二选一模拟开关U0的SA引脚，所述二选一模拟开关U0的输出引脚D作为0.2阶混合型与T型分数阶积分切换电路的输出，二选一模拟开关U0的控制引脚IN作为0.2阶混合型与T型分数阶积分切换电路的控制，所述0.2阶混合型分数阶积分电路的输出引脚HA和所述0.2阶T型分数阶积分电路的输出引脚TA分别作为0.2阶混合型与T型分数阶积分切换电路的输入引脚，所述二选一模拟开关U0采用ADG884，所述电阻Rhx＝0.9931M，所述电位器Rhx1＝3.1K，所述电阻Rhx2＝500K、Rhx3＝470K、Rhx4＝10K、Rhx5＝0K，所述电容Chx＝28.680uF，所述电容 Chx1＝10uF、Chx2＝4.7uF、Chx3＝1uF、Chx4＝470nF；所述电阻Rhy＝0.6624M，所述电位器Rhy1＝0.4K，所述电阻Rhy2＝510K、Rhy3＝100K、Rhy4＝51K、Rhy5＝0K，所述电容Chy＝2.6770uF，所述电容Chy1＝2.2uF、Chy2＝470nF、Chy3＝6.8nF、Chy4悬空；所述电阻Rhz＝0.3881M，所述电位器Rhz1＝4.1K和所述电阻Rhz2＝200K、Rhz3＝100K、Rhz4＝51K、Rhz5＝33K，所述电容Chz＝0.2736uF，所述电容Chz1＝220nF、Chz2＝47nF、Chz3＝6.8nF、Chz4悬空；所述电阻Rhw＝0.4685M，所述电位器Rhw1＝3.4K和所述电阻Rhw2＝220K、Rhw3＝220K、Rhw4＝20K、Rhw5＝5.1K，所述电容Chw＝12.59nF，所述电容Chw1＝10nF、Chw2＝2.2nF、Chw3＝0.33nF、Chw4悬空，所述电阻RTx＝2.512M，所述电位器RTx1＝0K和所述电阻RTx2＝2M、RTx3＝500K、RTx4＝10K、RTx5＝2K，所述电容CTx＝0.01259uF，所述电容CTx1＝10nF、CTx2＝2.2nF、CTx3＝330PF、CTx4＝33PF；所述电阻RTy＝3.394M，所述电位器RTy1＝0K和所述电阻RTy2＝3.3M、RTy3＝51K、RTy4＝33K、RTy5＝10K，所述电容CTy＝5.239uF，所述电容CTy1＝4.7uF、CTy2＝470nF、CTy3＝68nF、CTy4悬空；所述电阻RTz＝1.865M，所述电位器RTz1＝0K和所述电阻RTz2＝1M、RTz3＝510K、RTz4＝360K、RTz5＝5K，所述电容CTz＝0.5362uF，所述电容CTz1＝470nF、CTz2＝68nF、CTz3悬空、CTz4悬空；所述电阻RTw＝1.104M，所述电位器RTw1＝0K和所述电阻RTw2＝1M、RTw3＝100K、RTw4＝2K、RTw5＝2K，所述电容CTw＝0.05094uF，所述电容CTw1＝47nF、CTw2＝3.3nF、CTw3＝33pF、CTw4＝30pF。
3、基于0.2阶混合型与T型分数阶积分切换电路的Muthuswamy-Chua混沌系统电路，其特征在于：
(1)Muthuswamy-Chua混沌系统的数学模型i：
Figure PCTCN2015000748-appb-000001
(2)一个0.2阶Muthuswamy-Chua混沌系统的数学模型ii为：
Figure PCTCN2015000748-appb-000002
(3)根据0.2阶Muthuswamy-Chua混沌系统的数学模型ii构造模拟电路，利用运算放大器U1、运算放大器U2及电阻和0.2阶混合型与T型分数阶积分切换电路U5、0.2阶混合型与T型分数阶积分切换电路U6、0.2阶混合型与T型分数阶积分切换电路U7构成反相加法器和反相0.2阶分数阶积分器，利用乘法器U3和乘法器U4实现乘法运算，利用运算放大器U8实现比较器，所述运算放大器U1、运算放大器U2和运算放大器U8采用LF347N，所述乘法器U3和乘法器U4采用AD633JN；
所述运算放大器U1连接运算放大器U2、乘法器U4、运算放大器U8和0.2阶混合型与T型分数阶积分切换电路U5、0.2阶混合型与T型分数阶积分切换电路U6，所述运算放大器U2连接乘法器U3、乘法器U4和0.2阶混合型与T型分数阶积分切换电路U7，所述乘法器U3连接运算放大器U1，所述乘法器U4连接运算放大器U2，所述运算放大器U8连接0.2阶混合型与T型分数阶积分切换电路U5、0.2阶混合型与T型分数阶积分切换电路U6和0.2阶混合型与T型分数阶积分切换电路U7。
所述运算放大器U1的第1引脚通过电阻R8与U1的第6引脚相接，第2引脚通过电阻R4与第1引脚相接，第3、5、10、12引脚接地，第4引脚接VCC，第11引脚接VEE，第6引脚接0.2阶混合型与T型分数阶积分切换电路U6的HA引脚和TA引脚，第7引脚接输出y，接0.2阶混合型与T型分数阶积分切换电路U6的D引脚，接乘法器U4的第1引脚，通过电阻R5与第2引脚相接，通过电阻R1与第13引脚相接，通过电阻R11接U2的第9引脚，第8引脚接输出x，通过电阻R6与第6引脚相接，接运算放大器U8的第3、5、10引脚，接0.2阶混合型与T型分数阶积分切换电路U5的D引脚，第9引脚接0.2阶混合型与T型分数阶积分切换电路U5的HA引脚和TA引脚，第13引脚通过电阻R2与第14引脚相接，第14引脚通过电阻R3与第9引脚相接，；
所述运算放大器U2的第1、2、6、7引脚悬空，第3、5、10、12引脚接地，第4引脚接VCC，第11引脚接VEE，第8引脚输出z，接0.2阶混合型与T型分数阶积分切换电路U7的D引脚，接乘法器U3的第3引脚，接乘法器U4的第3引脚，通过电阻R12与第9引脚相接，第9引脚接0.2阶混合型与T型分数阶积分切换电路U7的HA引脚和TA引脚，第13引脚接通过电阻R10与第14引脚相接，第14引脚通过电阻R13与第9引脚相接；
所述运算放大器U8的第1引脚通过电阻R14接0.2阶混合型与T型分数阶积分切换电路U5的IN引脚，通过电阻R14和电阻R15接地，第2、6、9、12引脚接地，第4引脚接VCC，第11引脚接VEE，第7引脚通过电阻R16接0.2阶混合型与T型分数阶积分切换电路U6的IN引脚，通过电阻R16和电阻R17接地，第8引脚通过电阻R18接0.2阶混合型与T型分数阶积分切换电路U7的IN引脚，通过电阻R18和电阻R19接地，第13引脚和第14引脚悬空。
所述乘法器U3的第1引脚接乘法器U4的第7脚，第3引脚接U2的第8引脚，第2、4、6引脚均接地，第5引脚接VEE，第7引脚通过电阻R7接运算放大器U1的第9引脚，第8引脚接VCC；
所述乘法器U4的第1引脚接运算放大器U1的第7脚，第3引脚接运算放大器U2的第8引脚，第2、4、6引脚均接地，第5引脚接VEE，第7引脚通过电阻R9接运算放大器U2第13引脚，接乘法器U3的第1引脚，第8引脚接VCC；
所述0.2阶混合型与T型分数阶积分切换电路U5的HA和TA引脚接运算放大器U1的第9引脚，D引脚接接运算放大器U1的第8引脚；
所述0.2阶混合型与T型分数阶积分切换电路U6的HA和TA引脚接运算放大器U1的第6引脚，D引脚接接运算放大器U1的第7引脚；
所述0.2阶混合型与T型分数阶积分切换电路U7的HA和TA引脚接运算放大器U2的第9引脚，D引脚接接运算放大器U2的第8引脚。
电路中电阻R1＝R3＝R5＝R6＝R9＝R10＝10kΩ，R2＝R11＝100kΩ，R4＝200kΩ，R4＝5kΩ，R8＝300kΩ，R12＝160kΩ，R14＝R16＝R18＝100KΩ，R15＝R17＝80KΩ。R19＝80KΩ。
当然，上述说明并非对本发明的限制，本发明也不仅限于上述举例，本技术领域的普通技术人员在本发明的实质范围内所做出的变化、改型、添加或替换，也属于本发明的保护范围。

Claims (2)

  1. 一种0.2阶混合型与T型分数阶积分切换方法，其特征是在于：一种混合型0.2阶分数阶积分与一种0.2阶T型分数阶积分通过二选一模拟开关器进行选择控制输出，当模拟开关器的控制信号为高电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为低电平时，选择T型分数阶积分输出，或是，当模拟开关器的控制信号为低电平时，选择混合型0.2阶分数阶积分输出，当模拟开关器的控制信号为高电平时，选择T型分数阶积分输出。
  2. 一种0.2阶混合型与T型分数阶积分切换电路，其特征在于：所述一种0.2阶混合型与T型分数阶积分切换电路由0.2阶混合型分数阶积分电路和0.2阶T型分数阶积分电路及二选一模拟开关U0三部分组成，所述0.2阶混合型分数阶积分电路由四部分组成，其中电阻Rhx与电容Chx并联，形成第一部分，第一部分与电阻Rhy串联后再与电容Chy并联，形成第二部分，前两部分与电阻Rhz串联后再与电容Chz并联，形成第三部分，前三部分与电阻Rhw串联后再与电容Chw并联，形成第四部分，输出引脚HA接第一部分，输出引脚HB接第四部分；所述0.2阶T型分数阶积分电路由四部分组成，其中电阻RTx与电容CTx并联，形成第一部分，电阻RTy与电容CTy串联，形成第二部分，第二部分与第一部分进行并联，电阻RTz与电容CTz串联，形成第三部分，第三部分与前两部分进行并联，电阻RTw与电容CTw串联，形成第四部分，第四部分与前三部分进行并联，电阻输出引脚TA接第一部分，输出引脚TB接第四部分；所述0.2阶混合型分数阶积分电路的输出引脚HB接所述二选一模拟开关U0的SB引脚，所述0.2阶T型分数阶积分电路的输出引脚TB接所述二选一模拟开关U0的SA引脚，所述二选一模拟开关U0的输出引脚D作为0.2阶混合型与T型分数阶积分切换电路的输出，二选一模拟开关U0的控制引脚IN作为0.2阶混合型与T型分数阶积分切换电路的控制，所述0.2阶混合型分数阶积分电路的输出引脚HA和所述0.2阶T型分数阶积分电路的输出引脚TA分别作为0.2阶混合型与T型分数阶积分切换电路的输入引脚，所述二选一模拟开关U0采用ADG884，所述电阻Rhx＝0.9931M，所述电位器Rhx1＝3.1K，所述电阻Rhx2＝500K、Rhx3＝470K、Rhx4＝10K、Rhx5＝0K，所述电容Chx＝28.680uF，所述电容Chx1＝10uF、Chx2＝4.7uF、Chx3＝1uF、Chx4＝470nF；所述电阻Rhy＝0.6624M，所述电位器Rhy1＝0.4K，所述电阻Rhy2＝510K、Rhy3＝100K、Rhy4＝51K、Rhy5＝0K，所述电容Chy＝2.6770uF，所述电容Chy1＝2.2uF、Chy2＝470nF、Chy3＝6.8nF、Chy4悬空；所述电阻Rhz＝0.3881M，所述电位器Rhz1＝4.1K和所述电阻Rhz2＝200K、Rhz3＝100K、Rhz4＝51K、Rhz5＝33K，所述电容Chz＝0.2736uF，所述电容Chz1＝220nF、Chz2＝47nF、Chz3＝6.8nF、Chz4悬空；所述电阻Rhw＝0.4685M，所述电位器Rhw1＝3.4K和所述电阻Rhw2＝220K、Rhw3＝220K、 Rhw4＝20K、Rhw5＝5.1K，所述电容Chw＝12.59nF，所述电容Chw1＝10nF、Chw2＝2.2nF、Chw3＝0.33nF、Chw4悬空，所述电阻RTx＝2.512M，所述电位器RTx1＝0K和所述电阻RTx2＝2M、RTx3＝500K、RTx4＝10K、RTx5＝2K，所述电容CTx＝0.01259uF，所述电容CTx1＝10nF、CTx2＝2.2nF、CTx3＝330PF、CTx4＝33PF；所述电阻RTy＝3.394M，所述电位器RTy1＝0K和所述电阻RTy2＝3.3M、RTy3＝51K、RTy4＝33K、RTy5＝10K，所述电容CTy＝5.239uF，所述电容CTy1＝4.7uF、CTy2＝470nF、CTy3＝68nF、CTy4悬空；所述电阻RTz＝1.865M，所述电位器RTz1＝0K和所述电阻RTz2＝1M、RTz3＝510K、RTz4＝360K、RTz5＝5K，所述电容CTz＝0.5362uF，所述电容CTz1＝470nF、CTz2＝68nF、CTz3悬空、CTz4悬空；所述电阻RTw＝1.104M，所述电位器RTw1＝0K和所述电阻RTw2＝1M、RTw3＝100K、RTw4＝2K、RTw5＝2K，所述电容CTw＝0.05094uF，所述电容CTw1＝47nF、CTw2＝3.3nF、CTw3＝33pF、CTw4＝30pF。
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