WO2017016042A1 - 有机薄膜晶体管阵列基板及其制作方法 - Google Patents

有机薄膜晶体管阵列基板及其制作方法 Download PDF

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WO2017016042A1
WO2017016042A1 PCT/CN2015/088517 CN2015088517W WO2017016042A1 WO 2017016042 A1 WO2017016042 A1 WO 2017016042A1 CN 2015088517 W CN2015088517 W CN 2015088517W WO 2017016042 A1 WO2017016042 A1 WO 2017016042A1
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layer
array substrate
pixel electrode
ito
electrode
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French (fr)
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徐洪远
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/125Active-matrix OLED [AMOLED] displays including organic TFTs [OTFT]
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20Changing the shape of the active layer in the devices, e.g. patterning

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an organic thin film transistor array substrate and a method of fabricating the same.
  • Organic Thin Film Transistor (Organic Thin Film Transistor, OTFT) is a thin film transistor made of organic materials as a semiconductor material.
  • the OTFT can be fabricated at a low temperature or a normal temperature. Therefore, the substrate of the OTFT can be selected to be lighter, thinner, and cheaper to replace the glass.
  • OTFT is simpler to manufacture than conventional inorganic thin film transistors, and has lower requirements on the conditions and purity of the film forming environment. Therefore, its fabrication cost is relatively low, and its simple process characteristics and excellent flexibility are greatly improved. Application opportunities in the field, which can be applied to flexible display, electronic skin, flexible sensors and other fields.
  • the electrode material of the OTFT is generally selected from a metal material (Ag) having a lower work function to lower the contact resistance, but Ag is easily oxidized without a protective layer to reduce the conductivity.
  • the present invention provides a new method for fabricating an OTFT array substrate, which not only reduces the number of passes required for the reticle, lithography, and etching processes in the overall process, but also protects the electrodes of the metal layer, such as silver electrodes, from Oxidation occurs in subsequent processes, In turn, the quality of the device fabricated by the OTFT array substrate is affected.
  • An object of the present invention is to provide an OTFT array substrate and a manufacturing method thereof, which improve the fabrication process of the prior art OTFT array substrate to improve production efficiency.
  • Organic Light-emitting Organic Light-emitting
  • the OTFT array substrate structure of the diode, OLED device can protect the electrode of the metal layer from oxidation in subsequent processes, thereby affecting the quality of the OLED device.
  • an OTFT array substrate including:
  • a metal layer formed on the substrate and an ITO layer formed on the metal layer After being patterned, a portion of the metal layer is exposed outside the ITO layer to form a source electrode and a drain electrode by using the metal layer, and a metal line and a pixel electrode are formed by the metal layer and the ITO layer. ;
  • An organic insulating layer disposed above the organic semiconductor layer and exposing the pixel electrode;
  • a gate electrode and a scan line are disposed on the organic insulating layer
  • a passivation layer is disposed over the gate electrode and covers the organic insulating layer.
  • the organic insulating layer and the passivation layer on the surface of the pixel electrode region on the array substrate are removed by dry etching, so that the ITO pixel electrode region is exposed.
  • the exposed pixel electrode is an anode of the OLED device, and an exposed OLED material is plated on the exposed pixel electrode to form an OLED device.
  • the method of preparing a layer of OLED material on a bare ITO pixel electrode Including but not limited to, for example, evaporation, sputtering, and the like.
  • the OLED device is a top-emitting OLED device.
  • An embodiment of the present invention further provides a method for fabricating an OTFT array substrate, including the steps of:
  • An OLED material is plated onto the exposed ITO pixel electrodes to form an OLED device.
  • the OLED device is a top-emitting OLED device.
  • An embodiment of the present invention further provides a method for fabricating an OTFT array substrate, including the steps of:
  • Passivation layer is passed through a fourth mask process to expose the ITO pixel electrode to the outside;
  • An OLED material is plated onto the exposed ITO pixel electrodes to form an OLED device.
  • the first mask process of the fabrication method includes patterning the photoresist layer with a first mask.
  • the first mask process of the manufacturing method further comprises: after patterning the photoresist layer, wet etching the ITO layer and the underlying metal layer using an etching solution, Then, the photoresist layer is ashed by the plasma, and the photoresist residue removal operation is performed.
  • the surface of the metal layer is covered by the ITO layer except where the source and drain electrodes are located.
  • the second mask process of the fabrication method includes patterning the organic semiconductor layer by using a second mask.
  • the third mask process of the fabrication method includes patterning a metal layer using a third mask.
  • the fourth mask process of the fabrication method includes patterning the passivation layer using a fourth mask.
  • Another embodiment of the present invention provides an OTFT array substrate manufactured by the fabrication method described.
  • the present invention can perform patterning operation of an anode electrode on a ITO substrate with a mask. At the same time, a data line, a source electrode, a drain electrode, and a pixel electrode are formed, wherein the surface of the metal layer is covered by the ITO layer except where the source electrode and the drain electrode are located. Therefore, in addition to reducing the number of mask processes, In addition to improving production efficiency, the electrode of the metal layer in the array substrate can be protected from oxidation during subsequent processes.
  • FIG. 1(a) through 1(d) are schematic cross-sectional views showing a first step of a method of fabricating the OTFT array substrate in accordance with an embodiment of the present invention.
  • FIG. 1(e) is a plan view showing the first step of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • FIG. 2(a) is a cross-sectional view showing a second step of the method of fabricating the OTFT array substrate in accordance with an embodiment of the present invention.
  • 2(b) is a plan view showing the second step of the method of fabricating the OTFT array substrate according to an embodiment of the invention.
  • FIG. 3(a) is a cross-sectional view showing a third step of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • FIG. 3(b) is a plan view showing the OTFT array substrate after the third step of the manufacturing method according to an embodiment of the invention.
  • FIG. 4(a) is a cross-sectional view showing a fourth step of the method of fabricating the OTFT array substrate in accordance with an embodiment of the present invention.
  • 4(b) is a plan view showing the fourth step of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • FIG. 5(a) is a cross-sectional view showing a fifth step of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • FIG. 5(b) is a plan view showing the fifth step of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • the invention provides a process for fabricating an organic thin film transistor array substrate, which generally comprises the following process steps:
  • Step 1 deposit a metal layer and an ITO layer on the substrate. Then, the photoresist is covered, and the data line, the source electrode, the drain electrode, and the pixel electrode are formed on the substrate by the first mask process.
  • FIG. 1(a) - Figure 1(d) It is a schematic cross-sectional view showing step 1 of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • the organic thin film is deposited on the substrate having the ITO layer, it is patterned first. Therefore, first deposit a layer of metal material on the substrate. 11 is, for example, Ag to form a metal layer film, followed by depositing a layer of indium tin oxide (ITO) 12.
  • ITO indium tin oxide
  • the metal layer 11, the ITO layer 12, and the photoresist 13 are formed into a schematic cross-sectional view of the array substrate as shown in Fig. 1(a).
  • the reticle can be halftone (halftone) A reticle or a grayscale reticle.
  • the ITO layer and the underlying metal layer are wet-etched using an ITO etching solution, silver acid or other solution for etching the metal layer to form a schematic cross-sectional view of the array substrate as shown in FIG. 1(b).
  • the photoresist layer is ashed by oxygen (O2) plasma, and the photoresist residue removal operation is performed.
  • the photoresist layer is formed into a schematic cross-sectional view of the array substrate as shown in FIG. 1(c).
  • the ITO was wet-etched for the second time with an ITO etching solution to form a schematic cross-sectional view of the array substrate as shown in Fig. 1(d).
  • the first mask process is over.
  • a metal pattern as shown in FIG. 1(e) is included, which includes a region 14 corresponding to a data line, a region 15 corresponding to the source and drain electrodes, and a region 16 corresponding to the pixel electrode. .
  • the array substrate is covered by the ITO layer on the surface of the metal layer except for the source electrode and the drain electrode 15, so that the data line of the metal layer and the pixel electrode can be protected from oxidation in subsequent processes. It affects the conductivity of its electrons.
  • Step 2 coating an organic semiconductor layer on the array substrate having the data line, the source electrode, the drain electrode, and the pixel electrode, forming a active layer through a second mask process, and then coating the organic semiconductor layer
  • the organic insulating layer covers the entire surface of the current array substrate.
  • FIG. 2(a) It is a schematic cross-sectional view showing step 2 of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • Organic thin film transistors are printed using a printing process. Since most of the materials are soluble, the solution is applied by ink-jet printing, and coating techniques include, but are not limited to, for example, dip coating.
  • Spin-coating, blade coating or contact coating One of the coatings and the like is coated with an organic semiconductor layer 27 on the array substrate. then, The organic semiconductor layer is subjected to, for example, exposure, development, patterning, etc. using a second mask to form a cross-sectional view of the array substrate as shown in Fig. 2(a), which serves as an active layer of the OTFT device.
  • a coating technique is then applied to coat an organic insulating layer 28 over the surface of the entire array substrate. So far, the second mask process is completed, forming a top view of the array substrate as shown in FIG. 2(b).
  • the region 15 corresponding to the source electrode and the drain electrode and the region 16 corresponding to the pixel electrode are covered with an organic semiconductor layer and an organic insulating layer. It can be seen from the top to be covered by the organic insulating layer 28 on the entire periphery of the periphery.
  • Step 3 depositing a metal layer on the organic insulating layer, forming a gate electrode and a scan line through a third mask process, and then coating a whole surface of the organic insulating layer on the current array substrate to form a passivation layer. , A passivation layer is applied over the entire surface of the array substrate.
  • FIG. 3(a) It is a schematic diagram showing step 3 of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • a metal material such as aluminum (Al) metal, molybdenum (Mo), chromium (Cr), tantalum (Ta) or copper (Cu) metal on the surface of the organic insulating layer 28 to form a metal layer film, and then applying a third
  • the mask performs operations such as exposure, development, patterning, etc. on the metal layer to form a gate electrode and a scanning line 31, as shown in the cross-sectional view of the array substrate shown in Fig. 3(a).
  • a whole surface organic insulating layer is applied as a passivation layer 32 by a coating method. So far, the third mask process is completed, forming a top view of the array substrate as shown in FIG. 3(b).
  • Step 4 the passivation layer is subjected to a fourth mask patterning operation, Then, the organic insulating layer and the passivation layer on the surface of the pixel electrode are removed by dry etching to expose the ITO pixel electrode to the outside.
  • FIG. 4(a) It is a schematic diagram showing step 4 of the method for fabricating the OTFT array substrate according to an embodiment of the invention.
  • the fourth mask is used to perform operations such as exposure, development, and patterning on the passivation layer, as shown in FIG. 4(a), and then the dry insulating method is used to remove the organic insulating layer 28 and passivation above the surface of the pixel electrode.
  • Layer 32 exposes the ITO pixel electrode of this region to prepare the OLED device 50 to be fabricated in the next stage. So far, the fourth mask process is completed, forming a top view of the array substrate as shown in FIG. 4(b).
  • Step 5 A layer of OLED material is plated on the exposed ITO pixel electrode to form an OLED device.
  • FIG. 5(a) It is a schematic diagram showing the fifth step of the manufacturing method of the OTFT array substrate according to an embodiment of the invention.
  • an OLED material such as a fluorescent luminescent material, a phosphorescent luminescent material or the like is plated to form the OLED device 50 as shown in FIG. 5(a).
  • the method of preparing a layer of OLED material on a bare ITO pixel electrode Including but not limited to, for example, evaporation, sputtering, and the like. So far, the process of the OTFT array substrate is completed, and a top view of the array substrate as shown in FIG. 5(b) is formed.
  • the OLED pixel electrode has been vapor-deposited on the OLED material, so that it is seen in a plan view compared to FIG. 4(b).
  • the region 16 corresponding to the pixel electrode has been replaced with the OLED device 50.
  • the 0 LED display device can be divided into a bottom illumination type, a top illumination type and an inverse top illumination type according to its light emitting direction and structural configuration. Since the underlying metal layer electrode of the present invention is opaque, the OTFT array substrate structure of the present invention is only suitable for a top-emitting OLED device.
  • the embodiment of the invention further provides an OTFT array substrate, which is manufactured by using the manufacturing method of the OTFT array substrate provided by the embodiment of the invention.
  • a specific structure of an OTFT array substrate includes a substrate, and a metal layer 11 formed on the substrate is formed on the metal layer.
  • An organic semiconductor layer 27 covering the source electrode and the drain electrode to form an active layer; an organic insulating layer 28, Is disposed above the organic semiconductor layer and exposing the pixel electrode; a gate electrode and a scan line 31 are disposed on the organic insulating layer; and a passivation layer 32 disposed on the gate Above the electrode, And covering the organic insulating layer.
  • the passivation layer 32 passes through, for example, exposure, development, patterning, etc.
  • the organic insulating layer and the passivation layer on the surface of the pixel electrode region on the array substrate are removed by dry etching, so that the ITO pixel electrode region is exposed.
  • the exposed pixel electrode is an anode of an OLED device, and an exposed OLED material is plated on the exposed pixel electrode to form an OLED device 50.
  • the method of preparing a layer of OLED material on a bare ITO pixel electrode Including but not limited to, for example, evaporation, sputtering, and the like.
  • An OTFT array substrate manufacturing method simultaneously forms a data line, a source electrode, a drain electrode, and a pixel electrode in a single mask process. Wherever the source and drain electrodes are located, the surface of the metal layer is covered by the ITO layer. Therefore, in addition to reducing the number of mask operations and increasing production efficiency, The invention can protect the electrode of the underlying metal layer in the OTFT array substrate, avoids oxidation in the subsequent process, and further guarantees the quality of the device fabricated.

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Abstract

一种有机薄膜晶体管阵列基板及其制造方法。先在基板上连续沉积形成一金属层薄膜(11),接着沉积一层铟锡氧化物(12),并涂布一层光阻(13),经过第一道光罩制程后即可同时形成源漏极图案(15)、数据线(14)以及像素电极(16)。接着分别依序制作一有机半导体层(27)、一有机绝缘层(28)、一栅电极和一扫描线(31)以及一钝化层(32)。最后在像素电极(16)处,即OLED阳极处对覆盖的钝化层(32)进行挖洞,使像素电极(16)裸露于外,再镀上一层OLED材料于裸露的ITO像素电极(16)上以形成OLED器件(50)。

Description

有机薄膜晶体管阵列基板及其制作方法 技术领域
本发明涉及显示技术领域,特别涉及一种有机薄膜晶体管阵列基板及其制造方法。
背景技术
有机薄膜晶体管(Organic Thin Film Transistor, OTFT)是由有机物作为半导体材料之薄膜晶体管,OTFT可在低温或常温下制作,因此OTFT的基板在选择上可采用较轻、薄且便宜之塑料取代玻璃。OTFT在制作上相对传统无机薄膜晶体管更为简单,其对成膜环境的条件及纯度的要求比较低,因此其制作成本比较低,其简易的制程特性及优异的柔韧性更大提升其在诸多领域的应用机会,其可适用于柔性显示、电子皮肤、柔性传感器等领域。
在习知的有机薄膜晶体管制作方案中,一般需要多次光罩 (mask)、微影(lithography)、蚀刻制程来完成阵列基板的制作。若能缩减OTFT阵列基板的制程所需光罩、微影、蚀刻制程的次数,即可缩短OTFT阵列基板的制作时间及降低制程成本。另外,目前OTFT的电极材料一般选择功函数较低的金属材料银(Ag)以降低接触电阻,但Ag在没有保护层覆盖的情况下容易被氧化而降低传导能力。
针对上述问题,本发明提出一种新的OTFT阵列基板的制作方法,不仅缩减整体制程中所需通过光罩、微影、蚀刻制程的次数,同时可保护金属层之电极例如银电极,避免其在后续制程中发生氧化作用, 进而影响OTFT阵列基板所制成的器件之质量。
技术问题
本发明的目的在于提供一种OTFT阵列基板及其制作方法,改善现有技术OTFT阵列基板的制作流程以提高制作生产效率。
本发明的目的在于提供一种适用于顶发光式的有机发光二极管(Organic Light-emitting diode, OLED)器件之OTFT阵列基板结构,能够保护金属层之电极,避免其在后续制程中发生氧化作用, 进而影响OLED器件之质量。
技术解决方案
为达本发明上述目的,本发明之一实施例提供一种OTFT阵列基板包括:
一基板;
形成于所述基板上的一金属层与形成于所述金属层上的一ITO层, 被加以图案化后,使部分金属层曝露于ITO层外,以利用所述金属层形成一源电极及一漏电极,并利用所述金属层与所述ITO层形成一数据线以及一像素电极;
一有机半导体层,覆盖所述源电极与所述漏电极上构成有源层;
一有机绝缘层, 是配置于所述有机半导体层之上方, 并曝露所述像素电极;
一栅电极和扫描线, 是配置于所述有机绝缘层之上; 以及
一钝化层, 是配置于所述栅电极之上方, 并覆盖所述有机绝缘层。
在本发明OTFT阵列基板之一实施例中,所述钝化层经过, 图形化作业后, 运用干刻的方式去除阵列基板上属于所述像素电极区域表面上的有机绝缘层及钝化层, 使得ITO像素电极区域裸露于外。
在本发明OTFT阵列基板之一实施例中,所述曝露出的像素电极为OLED器件的阳极,在所述曝露出的像素电极上镀上一层OLED材料以形成一OLED器件。所述镀上一层OLED材料于裸露的ITO像素电极上的制备的方式, 包括但不限于, 例如蒸镀、溅射等。
在本发明OTFT阵列基板之一实施例中,所述OLED器件为顶发光式的OLED器件。
本发明之一实施例还提供一种OTFT阵列基板制作方法,包括步骤为:
提供一基板;
在基板上沉积一金属层及一ITO层, 然后覆盖上光阻,通过图形化作业在基板上形成数据线、源电极、漏电极以及像素电极;
在目前具有数据线、源电极、漏电极以及像素电极的阵列基板上涂布一有机半导体层,通过图形化作业以形成一有源层,然后在有源层上涂布一有机绝缘层,使其覆盖于整个目前阵列基板的表面上;
在有机绝缘层上沉积一金属层,通过图形化作业以形成栅电极和扫描线,然后在目前的阵列基板上再涂布一整面的有机绝缘层以形成一钝化层, 使钝化层覆盖于整个目前阵列基板的表面上;
对所述钝化层进行图形化作业,然后运用干刻的方式去除像素电极表面的有机绝缘层及钝化层,以使得ITO像素电极裸露于外; 以及
镀上一层OLED材料于裸露的ITO像素电极上以形成一OLED器件。
在本发明上述OTFT阵列基板制作方法之一实施例中, 所述OLED器件为顶发光式的OLED器件。
本发明之一实施例另提供一种OTFT阵列基板制作方法,包括步骤为:
提供一基板;
在基板上沉积一金属层及一ITO层, 然后覆盖上光阻,通过第一道光罩制程在基板上形成数据线、源电极、漏电极以及像素电极;
在目前具有数据线、源电极、漏电极以及像素电极的阵列基板上涂布一有机半导体层, 通过第二道光罩制程以形成一有源层,然后在有机半导体层上涂布一有机绝缘层,使其覆盖于整个目前的阵列基板表面上;
在有机绝缘层上沉积一金属层,通过第三道光罩制程以形成栅电极和扫描线,然后在目前的阵列基板上再涂布一整面的有机绝缘层以形成一钝化层, 使钝化层覆盖于整个目前的阵列基板表面上;
钝化层通过第四道光罩制程以使得ITO像素电极裸露于外; 以及
镀上一层OLED材料于裸露的ITO像素电极上以形成一OLED器件。
在本发明OTFT阵列基板制作方法之一实施例中,所述制作方法之第一道光罩制程包括采用第一张光罩对光阻层进行图形化作业。
在本发明OTFT阵列基板制作方法之一实施例中,所述制作方法之第一道光罩制程还包括在光阻层图形化后,使用蚀刻液对ITO层、底层金属层进行湿刻, 然后运用电浆对光阻层进行灰化处理,以及进行光阻残渣去除作业。
在本发明OTFT阵列基板制作方法之一实施例中,所述在第一道光罩制程后, 除了源电极和漏电极所在之处,所述金属层表面皆被ITO层覆盖。
在本发明OTFT阵列基板制作方法之一实施例中,所述制作方法之第二道光罩制程包括采用第二张光罩对有机半导体层进行图形化作业。
在本发明OTFT阵列基板制作方法之一实施例中,所述制作方法之第三道光罩制程包括采用第三张光罩对金属层进行图形化作业。
在本发明OTFT阵列基板制作方法之一实施例中,所述制作方法之第四道光罩制程包括采用第四张光罩对所述钝化层进行图形化作业。
本发明之另一实施例提供一种OTFT阵列基板,其系运用所述的制作方法所制造的。
有益效果
有益效果:本发明能够以一道光罩在ITO 基板进行阳极电极的图案化作业, 同时形成数据线、源电极、漏电极以及像素电极, 其中除了源电极和漏电极所在之处,金属层表面都被ITO层覆盖。因此, 除了可缩减光罩制程次数, 提高制作生产效率外, 还可保护阵列基板中金属层之电极在后续制程中免于发生氧化作用。
附图说明
图1(a)-图1(d)为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第一步骤的截面示意图。
图1(e)为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第一步骤后的俯视图。
图2(a)为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第二步骤的截面示意图。
图2(b)为为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第二步骤后的俯视图。
图3(a)为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第三步骤的截面示意图。
图3(b)为为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第三步骤后的俯视图。
图4(a)为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第四步骤的截面示意图。
图4(b)为为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第四步骤后的俯视图。
图5(a)为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第五步骤的截面示意图。
图5(b)为为依据本发明的一实施例,其显示所述OTFT阵列基板经制作方法之第五步骤后的俯视图。
本发明的最佳实施方式
本说明书所使用的词语“实施例”意指实例、示例或例证。此外,本说明书和所附权利要求中所使用的冠词“一”一般地可以被解释为“一个或多个”,除非另外指定或从上下文可以清楚确定单数形式。以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。
本发明提出一种有机薄膜晶体管阵列基板制作流程,大致包括以下几个流程步骤:
步骤1、在基板上沉积一金属层及一ITO层, 然后覆盖上光阻,通过第一道光罩制程在基板上形成数据线、源电极、漏电极以及像素电极。
请参考图1(a)-图1(d), 其为依据本发明的一实施例显示所述OTFT阵列基板经制作方法之步骤1的截面示意图。 通常在具有ITO层的基板上蒸镀有机薄膜之前,会先将其进行阳极电极的图案化。因此, 首先在基板上沉积一层金属材料 11例如Ag以形成一金属层薄膜,接着沉积一层铟锡氧化物(ITO)12。运用涂布技术以涂布一层光阻(photoresist)13,使光阻层13置于ITO层12上,然后采用第一张光罩对光阻层进行例如曝光、显影、图形化等作业,使金属层11、ITO层12及光阻13形成如图1(a)所示的阵列基板的截面示意图。所述光罩可为半色调 (halftone) 光罩或者是灰阶(grayscale)光罩。之后, 使用ITO蚀刻液、银酸或其他用于蚀刻金属层之溶液对ITO层、底层金属层进行湿刻,形成如图1(b)所示阵列基板的截面示意图。然后运用氧气(O2)电浆对光阻层进行灰化处理,以及光阻残渣去除作业, 使光阻层形成如图1(c)所示阵列基板的截面示意图。第二次用ITO蚀刻液对ITO进行湿刻,形成如图1(d)所示阵列基板的截面示意图。至此,第一道光罩制程结束。
此刻,数据线、源电极、漏电极以及像素电极已形成, 若俯视所述阵列基板,可见到如图1(e)所示的金属图案,其包括对应于一数据线的区域14, 对应于源电极和漏电极的区域15以及对应于像素电极的区域16。
特别的是,上述阵列基板除了源电极和漏电极15所在之处,在金属层表面都被ITO层覆盖,如此可保护金属层之数据线以及像素电极,避免其在后续制程中发生氧化作用,而影响其电子的传导能力。
步骤2、在目前具有数据线、源电极、漏电极以及像素电极的阵列基板上涂布一有机半导体层,通过第二道光罩制程以形成一有源层,然后在有机半导体层上涂布一有机绝缘层,使其覆盖于整个目前的阵列基板表面上。
请参考图2(a), 其为依据本发明的一实施例显示所述OTFT阵列基板经制作方法之步骤2的截面示意图。有机薄膜晶体管系采用印刷制程, 因其材料大多具有可溶性,将其溶液利用喷墨印刷(ink-jet printing)的方式, 运用涂布技术包括但不限于, 例如浸渍涂布(dip coating), 旋转涂布(spin-coating), 刮刀涂布(blade coating)或接触式涂布(contact coating)等方式之其中一者涂布一层有机半导体层27于所述阵列基板上。接着, 运用第二张光罩对有机半导体层进行例如曝光、显影、图形化等作业,形成如图2(a)所示阵列基板的截面图,其系作为OTFT器件的有源层。再利用涂布技术以涂布一有机绝缘层28,使其覆盖于整个阵列基板的表面上。至此,第二道光罩制程结束,形成如图2(b)所示阵列基板的俯视图。
如图2(b)所示, 此刻对应于一数据线的区域14, 对应于源电极和漏电极的区域15以及对应于像素电极的区域16所在的上方覆盖了有机半导体层及有机绝缘层, 俯视可见到在其外围一整面系由有机绝缘层28所覆盖。
步骤3、在有机绝缘层上沉积一金属层,通过第三道光罩制程以形成栅电极和扫描线,然后在目前的阵列基板上再涂布一整面的有机绝缘层以形成一钝化层, 使钝化层覆盖于整个目前的阵列基板表面上。
请参考图3(a), 其为依据本发明的一实施例显示所述OTFT阵列基板的制造方法之步骤3的示意图。在有机绝缘层28表面沉积一层金属材料例如铝(Al)系金属、钼(Mo)、铬(Cr)、钽(Ta)或铜(Cu)金属以形成一金属层薄膜,再运用第三张光罩对金属层进行例如曝光、显影、图形化等作业,形成栅电极和扫描线31,如图3(a)所示阵列基板的截面图。再利用涂布方式涂布一整面的有机绝缘层,作为钝化层32。至此,第三道光罩制程结束,形成如图3(b)所示阵列基板的俯视图。
如图3(b)所示, 此刻相较于图2(b), 对应于一数据线的区域14, 对应于源电极和漏电极的区域15以及对应于像素电极的区域16所在的上方覆盖了有机半导体层、有机绝缘层及钝化层,俯视可见到在其外围一整面系由钝化层32所覆盖, 并且还增加了对应于栅电极和扫描线的区域31。
步骤4、使所述钝化层经过第四道光罩图形化作业, 然后运用干刻的方式去除像素电极表面的有机绝缘层及钝化层,以使得ITO像素电极裸露于外。
请参考图4(a), 其为依据本发明的一实施例,显示所述OTFT阵列基板的制造方法之步骤4的示意图。运用第四张光罩对钝化层进行例如曝光、显影、图形化等作业,如图4(a)所示,然后再运用干刻的方式去除像素电极表面上方的有机绝缘层28及钝化层32,使此区域的ITO像素电极裸露于外以预备下一阶段要制作的OLED器件50。至此,第四道光罩制程结束,形成如图4(b)所示阵列基板的俯视图。
如图4(b)所示, 此刻相较于图3(b),因对应于像素电极的区域16上方的有机绝缘层28及钝化层32已除去, 俯视所见到对应于像素电极的区域16为裸露于外的ITO像素电极。
步骤5、镀上一层OLED材料于裸露的ITO像素电极上以形成一OLED器件。
最后,请参考图5(a), 其为依据本发明的一实施例显示所述OTFT阵列基板的制造方法之第五步骤的示意图。在裸露于外的ITO像素电极上,镀上一层OLED材料例如荧光发光材料、磷光发光材料等以形成如图5(a)所示OLED器件50。所述镀上一层OLED材料于裸露的ITO像素电极上的制备的方式, 包括但不限于, 例如蒸镀、溅射等。至此,OTFT阵列基板的制程完成,形成如图5(b)所示阵列基板的俯视图。
如图5(b)所示, 此时ITO像素电极上已蒸镀上OLED材料,因此俯视所见到相较于图4(b), 对应于像素电极的区域16已取代为OLED器件50。
0LED显示装置可依照其发光方向与结构配置区分为底发光式、顶发光式与反顶发光式。因本发明底层金属层电极不透光,因此本发明的OTFT阵列基板结构仅适用于采用顶发光式的OLED器件。
本发明实施例还提供了一种OTFT阵列基板,所述OTFT阵列基板是使用本发明实施例提供的OTFT阵列基板的制作方法所制造的。
结合图5(a)及图5(b)所示,本发明实施例之一种OTFT阵列基板具体结构包括一基板,于所述基板上形成的一金属层11与于所述金属层上形成的一ITO层12; 在加以图案化后,使部分金属层曝露于ITO层外,利用所述金属层形成一源电极及一漏电极15,并利用所述金属层与所述ITO层形成一数据线14以及一像素电极16;一有机半导体层27,覆盖所述源电极与所述漏电极上构成有源层;一有机绝缘层28, 是配置于所述有机半导体层之上方, 并曝露所述像素电极;一栅电极和扫描线31, 是配置于所述有机绝缘层之上; 以及一钝化层32, 是配置于所述栅电极之上方, 并覆盖所述有机绝缘层。
所述钝化层32经过, 经过例如曝光、显影、图形化等作业后, 运用干刻的方式去除阵列基板上属于所述像素电极区域表面上的有机绝缘层及钝化层, 使得ITO像素电极区域裸露于外。
所述曝露出的像素电极为OLED器件的阳极,在所述曝露出的像素电极上镀上一层OLED材料以形成一OLED器件50。所述镀上一层OLED材料于裸露的ITO像素电极上的制备的方式, 包括但不限于, 例如蒸镀、溅射等。
本发明实施例之一种OTFT阵列基板制作方法系以一次光罩制程同时形成数据线、源电极、漏电极以及像素电极, 其中除了源电极和漏电极所在之处,金属层表面皆被ITO层覆盖。因此, 除了可缩减光罩作业次数, 提高生产效率外, 本发明能够保护OTFT阵列基板中底层金属层之电极,避免其在后续制程中发生氧化作用,并进而保障其所制成的器件之质量。
尽管已经相对于一个或多个实现方式示出并描述了本发明,但是本领域技术人员基于对本说明书和附图的阅读和理解将会想到等价变型和修改。本发明包括所有这样的修改和变型,并且仅由所附权利要求的范围限制。特别地关于由上述组件执行的各种功能,用于描述这样的组件的术语旨在对应于执行所述组件的指定功能(例如其在功能上是等价的)的任意组件(除非另外指示),即使在结构上与执行本文所示的本说明书的示范性实现方式中的功能的公开结构不等同。此外,尽管本说明书的特定特征已经相对于若干实现方式中的仅一个被公开,但是这种特征可以与如可以对给定或特定应用而言是期望和有利的其他实现方式的一个或多个其他特征组合。而且,就术语“包括”、“具有”、“含有”或其变形被用在具体实施方式或权利要求中而言,这样的术语旨在以与术语“包含”相似的方式包括。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种有机薄膜晶体管阵列基板制作方法,包括步骤为:
    提供一基板;
    在基板上沉积一金属层及一ITO层, 然后覆盖上光阻,通过图形化作业在基板上形成数据线、源电极、漏电极以及像素电极;
    在目前具有数据线、源电极、漏电极以及像素电极的阵列基板上涂布一有机半导体层,通过图形化作业以形成一有源层,然后在有源层上涂布一有机绝缘层,使其覆盖于整个目前阵列基板的表面上;
    在有机绝缘层上沉积一金属层,通过图形化作业以形成栅电极和扫描线,然后在目前的阵列基板上再涂布一整面的有机绝缘层以形成一钝化层, 使钝化层覆盖于整个目前阵列基板的表面上;
    对所述钝化层进行图形化作业,然后运用干刻的方式去除像素电极表面的有机绝缘层及钝化层,以使得ITO像素电极裸露于外; 以及
    镀上一层OLED材料于裸露的ITO像素电极上以形成一OLED器件。
  2. 根据权利要求1所述的制作方法,其中所述OLED器件为顶发光式的OLED器件。
  3. 一种有机薄膜晶体管阵列基板制作方法,包括步骤为:
    提供一基板;
    在基板上沉积一金属层及一ITO层, 然后覆盖上光阻,通过第一道光罩制程在基板上形成数据线、源电极、漏电极以及像素电极;
    在目前具有数据线、源电极、漏电极以及像素电极的阵列基板上涂布一有机半导体层, 通过第二道光罩制程以形成一有源层,然后在有机半导体层上涂布一有机绝缘层,使其覆盖于整个目前的阵列基板表面上;
    在有机绝缘层上沉积一金属层,通过第三道光罩制程以形成栅电极和扫描线,然后在目前的阵列基板上再涂布一整面的有机绝缘层以形成一钝化层, 使钝化层覆盖于整个目前的阵列基板表面上;
    钝化层通过第四道光罩制程以使得ITO像素电极裸露于外; 以及
    镀上一层OLED材料于裸露的ITO像素电极上以形成一OLED器件。
  4. 根据权利要求3所述的制作方法,其中所述制作方法之第一道光罩制程包括采用第一张光罩对光阻层进行图形化作业。
  5. 根据权利要求4所述的制作方法,其中所述制作方法之第一道光罩制程还包括在光阻层图形化后,使用蚀刻液对ITO层、底层金属层进行湿刻, 然后运用电浆对光阻层进行灰化处理,以及进行光阻残渣去除作业。
  6. 根据权利要求5所述的制作方法,其中所述在第一道光罩制程后, 除了源电极和漏电极所在之处,所述金属层表面皆被ITO层覆盖。
  7. 根据权利要求3所述的制作方法,其中所述制作方法之第二道光罩制程包括采用第二张光罩对有机半导体层进行图形化作业。
  8. 根据权利要求3所述的制作方法,其中所述制作方法之第三道光罩制程包括采用第三张光罩对金属层进行图形化作业。
  9. 根据权利要求3所述的制作方法,其中所述制作方法之第四道光罩制程包括采用第四张光罩对所述钝化层进行图形化作业。
  10. 根据权利要求3所述的制作方法,其中所述制作方法之第四道光罩制程还包括运用干刻的方式去除像素电极表面的有机绝缘层及钝化层。
  11. 根据权利要求3所述的制作方法,其中所述在基板上沉积一金属层及一ITO层的步骤,其中所述金属层为银金属(Ag)。
  12. 根据权利要求3所述的制作方法,其中所述栅电极和扫描线之材料为铝(Al)系金属、钼(Mo)、铬(Cr)、钽(Ta)或铜(Cu)金属。
  13. 根据权利要求3所述的制作方法,其中所述涂布是利用浸渍涂布(dip coating), 旋转涂布(spin-coating), 刮刀涂布(blade coating), 或接触式涂布(contact coating)实行。
  14. 根据权利要求3所述的制作方法,其中所述镀上一层OLED材料于裸露的ITO像素电极上的制备方法为蒸镀或溅射。
  15. 一种有机薄膜晶体管阵列基板,其中所述有机薄膜晶体管阵列基板运用如权利要求3所述的制作方法所制造的。
  16. 一种有机薄膜晶体管阵列基板,包括:
    一基板;
    形成于所述基板上的一金属层与形成于所述金属层上的一ITO层, 被加以图案化后,使部分金属层曝露于ITO层外,以利用所述金属层形成一源电极及一漏电极,并利用所述金属层与所述ITO层形成一数据线以及一像素电极;
    一有机半导体层,覆盖所述源电极与所述漏电极上构成有源层;
    一有机绝缘层, 是配置于所述有机半导体层之上方, 并曝露所述像素电极;
    一栅电极和扫描线, 是配置于所述有机绝缘层之上; 以及
    一钝化层, 是配置于所述栅电极之上方, 并覆盖所述有机绝缘层。
  17. 根据权利要求16所述的有机薄膜晶体管阵列基板,其中所述钝化层经过图形化作业后, 运用干刻的方式去除阵列基板上属于所述像素电极区域表面上的有机绝缘层及钝化层, 使得ITO像素电极区域裸露于外。
  18. 根据权利要求17所述的有机薄膜晶体管阵列基板,其中所述曝露出的像素电极为OLED器件的阳极。
  19. 根据权利要求17所述的有机薄膜晶体管阵列基板,其中在所述曝露出的像素电极上镀上一层OLED材料以形成一OLED器件。
  20. 根据权利要求19 所述的有机薄膜晶体管阵列基板,其中所述OLED器件为顶发光式的OLED器件。
PCT/CN2015/088517 2015-07-24 2015-08-31 有机薄膜晶体管阵列基板及其制作方法 Ceased WO2017016042A1 (zh)

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