WO2017000682A1 - Procédé et appareil de décodage, et support d'information - Google Patents

Procédé et appareil de décodage, et support d'information Download PDF

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Publication number
WO2017000682A1
WO2017000682A1 PCT/CN2016/081993 CN2016081993W WO2017000682A1 WO 2017000682 A1 WO2017000682 A1 WO 2017000682A1 CN 2016081993 W CN2016081993 W CN 2016081993W WO 2017000682 A1 WO2017000682 A1 WO 2017000682A1
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WO
WIPO (PCT)
Prior art keywords
decoding
input data
read
decoded input
processing
Prior art date
Application number
PCT/CN2016/081993
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English (en)
Chinese (zh)
Inventor
王华勇
Original Assignee
深圳市中兴微电子技术有限公司
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Publication date
Application filed by 深圳市中兴微电子技术有限公司 filed Critical 深圳市中兴微电子技术有限公司
Publication of WO2017000682A1 publication Critical patent/WO2017000682A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes

Definitions

  • the second processing module in the decoding device receives the externally transmitted decoding parameter packet, and parses the decoding parameter packet; if the decoding parameter packet is parsed into a 3G system, the PadNum is calculated according to the zero-padding formula;
  • the iteration in the embodiment of the present invention refers to performing multiple decoding on the input decoded data.

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

L'invention concerne un procédé de décodage comprenant : la lecture de données d'entrée de décodage au niveau d'un premier étage de demi-fenêtre de décodage, et le traitement des données d'entrée lues pour obtenir un résultat de traitement (101); le décodage du résultat de traitement au niveau d'un second étage de demi-fenêtre de décodage pour obtenir un résultat de décodage (102); et la mise en forme et la délivrance en sortie du résultat de décodage quand le résultat de décodage confirme que le décodage est terminé (103). L'invention concerne également un appareil de décodage correspondant et un support d'information.
PCT/CN2016/081993 2015-06-30 2016-05-13 Procédé et appareil de décodage, et support d'information WO2017000682A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510374114.7 2015-06-30
CN201510374114.7A CN106330206A (zh) 2015-06-30 2015-06-30 一种译码方法及装置

Publications (1)

Publication Number Publication Date
WO2017000682A1 true WO2017000682A1 (fr) 2017-01-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/081993 WO2017000682A1 (fr) 2015-06-30 2016-05-13 Procédé et appareil de décodage, et support d'information

Country Status (2)

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CN (1) CN106330206A (fr)
WO (1) WO2017000682A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113472478A (zh) * 2020-03-31 2021-10-01 广州海格通信集团股份有限公司 译码前端处理方法、装置、计算机设备和存储介质

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11316720B2 (en) 2020-01-13 2022-04-26 Samsung Electronics Co., Ltd. Apparatus and method for signaling of zero padding bins in fronthaul interface

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US20080172591A1 (en) * 2007-01-17 2008-07-17 Broadcom Corporation, A California Corporation Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave
CN101515805A (zh) * 2009-03-26 2009-08-26 华为技术有限公司 一种Turbo译码器及其译码方法
CN101882933A (zh) * 2010-06-11 2010-11-10 北京创毅视通科技有限公司 一种LTE中进行Turbo译码的方法及Turbo译码器
CN101969310A (zh) * 2010-10-22 2011-02-09 上海交通大学 Turbo码并行译码器的QPP内交织器及其交织方法
CN103905067A (zh) * 2012-12-27 2014-07-02 中兴通讯股份有限公司 多模译码器实现方法及装置

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US8281211B2 (en) * 2008-05-15 2012-10-02 Nokia Corporation System and method for relay coding
CN103427850B (zh) * 2012-05-24 2017-04-05 深圳市中兴微电子技术有限公司 多模维特比解码装置及其解码方法
US9128888B2 (en) * 2012-08-30 2015-09-08 Intel Deutschland Gmbh Method and apparatus for turbo decoder memory collision resolution
EP2728755B1 (fr) * 2012-11-02 2015-05-13 BlackBerry Limited Implementation efficace d'un entrelaceur à permutation polynomiale quadratique (QPP) pour traitement parallèle utilisant des paramètres d'entrelacement sous forme quotient-reste
CN103812510A (zh) * 2012-11-15 2014-05-21 中兴通讯股份有限公司 译码方法及装置
CN103236900B (zh) * 2013-04-07 2016-03-30 电子科技大学 一种串行级联Turbo码交织器参数盲估计方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080172591A1 (en) * 2007-01-17 2008-07-17 Broadcom Corporation, A California Corporation Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave
CN101515805A (zh) * 2009-03-26 2009-08-26 华为技术有限公司 一种Turbo译码器及其译码方法
CN101882933A (zh) * 2010-06-11 2010-11-10 北京创毅视通科技有限公司 一种LTE中进行Turbo译码的方法及Turbo译码器
CN101969310A (zh) * 2010-10-22 2011-02-09 上海交通大学 Turbo码并行译码器的QPP内交织器及其交织方法
CN103905067A (zh) * 2012-12-27 2014-07-02 中兴通讯股份有限公司 多模译码器实现方法及装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113472478A (zh) * 2020-03-31 2021-10-01 广州海格通信集团股份有限公司 译码前端处理方法、装置、计算机设备和存储介质
CN113472478B (zh) * 2020-03-31 2023-12-12 广州海格通信集团股份有限公司 译码前端处理方法、装置、计算机设备和存储介质

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