WO2016195242A1

WO2016195242A1 - Non-volatile memory system

Info

Publication number: WO2016195242A1
Application number: PCT/KR2016/004272
Authority: WO
Inventors: 이성우
Original assignee: 주식회사 이에프텍
Priority date: 2015-05-29
Filing date: 2016-04-25
Publication date: 2016-12-08
Also published as: KR20160139864A; KR101718713B1

Abstract

A non-volatile memory system comprises: a non-volatile memory device comprising a NAND flash memory and a NAND controller for controlling the NAND flash memory; and a host device comprising a file system and a host controller for receiving an input of a command from the file system and provides the command to the non-volatile memory device. Here, the file system divides data into valid data and invalid data on a logical address recognized by the file system, and performs a rewriting operation for collecting the valid data and continuously writing the same in a new logical address area, thereby performing a file system-initiated fragmentation operation for arranging the valid data adjacent to each other on a physical address of the non-volatile memory device.

Description

Non-volatile memory system

The present invention relates to a semiconductor memory system. More specifically, the present invention relates to a nonvolatile memory system including a nonvolatile memory device (eg, a NAND flash memory device, etc.).

The semiconductor memory device may be classified into a volatile memory device and a nonvolatile memory device according to whether data can be stored in a state where power is not supplied. Recently, with the trend of miniaturization, large capacity, and low cost of semiconductor memory devices, NAND flash memory devices are widely used in nonvolatile memory devices because they are suitable for miniaturization, large capacity, and low cost. In general, a NAND flash memory device performs a write operation and a read operation in units of pages, and performs an erase operation in units of blocks. A flash translation layer (FTL) is provided in the NAND controller to support a file system, and a write operation, a read operation, an erase operation, a merge operation, and a copyback are performed using the flash translation layer. ) Operations, compaction operations, garbage collection operations (or reclaim operations), wear leveling operations, and the like.

Meanwhile, the flash translation layer performs an address mapping operation by using a mapping table in which mapping information between a logical address and a physical address is stored. However, as the NAND flash memory device operates for a long time, data information recognized by the file system (for example, information about valid data and invalid data, etc.) is not accurately reflected in the mapping table (ie, flash conversion). The data information recognized by the layer and the data information recognized by the file system become inconsistent. A dirty status that causes a lack of free blocks for garbage collection operation, etc. is deepened, and the physical state of the NAND flash memory device is increased. As the frequency of garbage collection increases as hot data with high usage access and cold data with low usage access are mixed on the address, the operation performance of the NAND flash memory device decreases (eg, For example, a decrease in writing speed and the like have occurred.

One object of the present invention is to allow a file system of a host device to effectively eliminate a dirty state of a nonvolatile memory device (eg, a NAND flash memory device) and to reduce the frequency of garbage collection operations performed in the nonvolatile memory device. By providing a nonvolatile memory system that improves the overall operating performance of the nonvolatile memory device. However, the object of the present invention is not limited to the above-described object, and may be variously expanded within a range without departing from the spirit and scope of the present invention.

In order to achieve the object of the present invention, the nonvolatile memory system according to the embodiments of the present invention and the nonvolatile memory device and file system having at least one NAND flash memory and a NAND controller for controlling the NAND flash memory; The host device may include a host device including a host controller that receives a command from the file system and provides the command to the nonvolatile memory device. At this time, the file system divides data into valid data and invalid data on a logical address recognized by the file system, collects the valid data, and continuously writes the data into a new logical address area. As a result, a file system driven defragmentation operation of arranging the valid data on the physical address of the nonvolatile memory device may be performed.

According to an embodiment, when the file system driven fragmentation operation is performed, the file system may issue an erase command or a trim command to ensure an unmapping state for the invalid data in a mapping table of the host controller. It can be provided to the nonvolatile memory device through.

According to an embodiment, when the rewrite operation is performed, the file system divides the valid data into hot data and cold data on the logical address, and then collects the hot data. The data may be continuously written to the first new logical address area, and the cold data may be collected and continuously written to the second new logical address area.

In example embodiments, the file system may classify the valid data into the hot data and the cold data based on a file type.

In example embodiments, the file system may classify the valid data into the hot data and the cold data based on a usage access frequency.

In example embodiments, the file system may divide the valid data into the hot data and the cold data based on a file capacity.

In example embodiments, the file system-driven fragmentation may be performed every predetermined period, at a user-specified time, or when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device. have.

In order to achieve the object of the present invention, the nonvolatile memory system according to the embodiments of the present invention and the nonvolatile memory device and file system having at least one NAND flash memory and a NAND controller for controlling the NAND flash memory; The host device may include a host device including a host controller that receives a command from the file system and provides the command to the nonvolatile memory device. At this time, the file system divides the data into hot data and cold data on a logical address recognized by the file system, collects the hot data, and writes the hot data continuously into a first new logical address area. A file for arranging the hot data and the cold data adjacent to each other on a physical address of the nonvolatile memory device by performing a rewrite operation of collecting the cold data and continuously writing the cold data to a second new logical address area; System driven defragmentation operations may be performed.

According to an embodiment, when the rewrite operation is performed, the file system divides the hot data into valid hot data and invalid hot data on the logical address, and then only the valid hot data are stored in the first new data. It can be written to the logical address area.

According to one embodiment, when performing the rewrite operation, the file system divides the cold data into valid cold data and invalid cold data on the logical address, and then only the valid cold data is the second new. It can be written to the logical address area.

According to an embodiment of the present disclosure, when the file system driven fragmentation operation is performed, the file system may perform an erase command or trim to guarantee an unmapping state for the invalid hot data and the invalid cold data in a mapping table. trim) command to the nonvolatile memory device through the host controller.

In example embodiments, the file system may classify the data into the hot data and the cold data based on a file type.

In example embodiments, the file system may classify the data into the hot data and the cold data based on a usage access frequency.

In example embodiments, the file system may classify the data into the hot data and the cold data based on a file capacity.

A nonvolatile memory system according to an embodiment of the present invention divides data into valid data and invalid data on a logical address recognized by a file system of a host device, and collects valid data into a new logical address area continuously. By performing the rewrite operation, it is possible to perform a file system driven fragmentation operation in which valid data (i.e., actual valid data accurately determined by the file system of the host device) is adjacently placed on the physical address of the nonvolatile memory device. have. As a result, the dirty state of the nonvolatile memory device (for example, NAND flash memory device, etc.) can be effectively eliminated, thereby improving the overall operating performance of the nonvolatile memory device.

A nonvolatile memory system according to embodiments of the present invention divides data into hot data and cold data on a logical address recognized by a file system of a host device, and collects the hot data continuously in a first new logical address area. A file system driven fragmentation operation in which hot data and cold data are adjacent to each other on a physical address of the nonvolatile memory device by performing a rewrite operation that writes and collects cold data and continuously writes the second new logical address area. Can be performed. As a result, the frequency of garbage collection operations performed in the nonvolatile memory device can be reduced, so that the overall operating performance of the nonvolatile memory device can be improved.

However, the effects of the present invention are not limited to the above-described effects, and may be variously expanded within a range without departing from the spirit and scope of the present invention.

1 is a block diagram illustrating a nonvolatile memory system according to example embodiments.

FIG. 2 is a diagram illustrating an example in which target data is continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.

3 is a diagram illustrating an example in which target data are disposed adjacent to a physical address of a nonvolatile memory device as target data are continuously written to a new logical address area in the nonvolatile memory system of FIG. 1.

FIG. 4 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device adjacently places valid data on a physical address of a nonvolatile memory device in the nonvolatile memory system of FIG. 1.

FIG. 5 is a diagram illustrating an example in which valid data are continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.

FIG. 6 is a diagram illustrating an example in which valid data are adjacently disposed on a physical address of a nonvolatile memory device as valid data are continuously written to a new logical address area in the nonvolatile memory system of FIG. 1.

FIG. 7 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device arranges hot data and cold data adjacently on a physical address of a nonvolatile memory device in FIG. 1.

8 is a diagram illustrating an example in which hot data (or cold data) is continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.

FIG. 9 illustrates that hot data and cold data are adjacent to each other on a physical address of a nonvolatile memory device as hot data (or cold data) is continuously written to a new logical address area in the nonvolatile memory system of FIG. 1. It is a figure which shows an example arrange | positioned.

10 and 11 illustrate another example of a file system driven fragmentation operation performed by the nonvolatile memory system of FIG. 1.

FIG. 12 is a flowchart illustrating a process of determining whether a file system driven fragmentation operation is performed by the nonvolatile memory system of FIG. 1.

With respect to the embodiments of the present invention disclosed in the text, specific structural to functional descriptions are merely illustrated for the purpose of describing embodiments of the present invention, embodiments of the present invention may be implemented in various forms and It should not be construed as limited to the embodiments described in.

As the inventive concept allows for various changes and numerous modifications, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to a specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms may be used for the purpose of distinguishing one component from another component. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may be referred to as the first component.

When a component is referred to as being "connected" or "connected" to another component, it may be directly connected to or connected to that other component, but it may be understood that other components may be present in between. Should be. On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between. Other expressions describing the relationship between components, such as "between" and "immediately between," or "neighboring to," and "directly neighboring to" should be interpreted as well.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "having" are intended to indicate that there is a feature, number, step, action, component, part, or combination thereof that is described, and that one or more other features or numbers are present. It should be understood that it does not exclude in advance the possibility of the presence or addition of steps, actions, components, parts or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. .

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention. The same reference numerals are used for the same elements in the drawings, and duplicate descriptions of the same elements are omitted.

FIG. 1 is a block diagram illustrating a nonvolatile memory system according to embodiments of the present invention, and FIG. 2 illustrates that target data is continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1. 3 is a diagram illustrating an example in which target data are disposed adjacent to a physical address of a nonvolatile memory device as target data are continuously written to a new logical address area in the nonvolatile memory system of FIG. 1. It is a figure which shows.

1 to 3, the nonvolatile memory system 100 may include a nonvolatile memory device 120 and a host device 140. For example, the nonvolatile memory device 120 may be a NAND flash memory device. The nonvolatile memory device 120 may include a solid state drive (SSD), a secure digital card (SDCARD), universal flash storage (UFS), and an embedded multimedia card. card (EMMC), a compact flash card (CF), a memory stick (memory stick), an XD picture card (XD picture card), etc., but is not limited thereto.

The nonvolatile memory device 120 may include a NAND flash memory 122 and a NAND controller that controls the NAND flash memory 122. In FIG. 1, the nonvolatile memory device 120 includes one NAND flash memory 122, but for convenience of description, the nonvolatile memory device 120 may include a plurality of NAND flash memories 122. ) May be included. The host device 140 may include a host controller 144 that receives a command from the file system 142 and the file system 142 and provides the command to the nonvolatile memory device 120. In general, the nonvolatile memory device 120 (eg, a NAND flash memory device) may perform a read operation and a write operation on a page basis, and an erase operation may be performed on a block basis due to the physical structure of the NAND flash memories 122. Perform in units. Accordingly, the nonvolatile memory device 120 has many limitations in performing a write operation, a read operation, and an erase operation as compared with a random access memory device (eg, a dynamic random access memory (DRAM) device). . Therefore, the nonvolatile memory device 120 includes a flash translation layer (FTL) in the NAND controller 124 to support a file system, and uses the flash translation layer (FTL) to read, write, and erase operations. A merge operation, a copyback operation, a compaction operation, a garbage collection operation (or a reclaim operation), and a wear leveling operation are performed. In other words, the NAND controller 124 performs the above operations by executing a software implemented flash conversion layer (FTL). In this case, the flash translation layer FTL uses a mapping table in which mapping information between the logical address and the physical address is stored, and the flash translation layer FTL decrements the logical address recognized by the host device 140. An address mapping operation of converting a physical address (PHYSICAL ADDRESS) of the volatile memory device 120 is performed.

In general, as the nonvolatile memory device 120 operates for a long time, the data information (for example, valid data and invalid data, etc.) recognized by the file system 142 may be accurately represented in the mapping table. Since it is not reflected, the data information recognized by the flash conversion layer FTL and the data information recognized by the file system 142 do not coincide. For example, for some commands, such as a discard command, under certain conditions of the file system 142, the file system 142 may not transmit the discard information to the nonvolatile memory device 120. The card information may not be filtered and transmitted to the nonvolatile memory device 120, and the power off may be performed while the card information transmitted to the nonvolatile memory device 120 is temporarily stored in the random access memory. Or the like may be lost. In this case, since the diskette information is not reflected in the mapping table, the data information (for example, valid data and invalid data, etc.) recognized by the file system 142 and the flash conversion layer (FTL) are stored. Recognizing data information (eg, information about valid data and invalid data, etc.) may be inconsistent with each other. In addition, since the erase operation is very slow compared to the read operation or the write operation due to the characteristics of the nonvolatile memory device 120, the user may experience a decrease in performance during the data update operation of the nonvolatile memory device 120 (eg, freezing). The updated data is written to a free block (e.g., a log block) so as not to feel the phenomenon, but a block containing previous data (i.e. invalid data) is not erased in many cases. . Such a scheme includes data information recognized by the file system 142 (eg, information about valid data and invalid data) and data information recognized by the flash conversion layer FTL (eg, Mismatch between valid data and invalid data).

For this reason, a dirty state in which a free block for the garbage collection operation of the nonvolatile memory device 120 is insufficient may be deepened. In particular, since the data information recognized by the file system 142 and the data information recognized by the flash conversion layer (FTL) are inconsistent with each other, the host device 140 (that is, the file system 142 of the host device 140). There is a limit to eliminating the dirty state of the nonvolatile memory device 120 based on the valid data and the invalid data that are known by the. For example, the data information recognized by the file system 142 is only about 30% of the data, whereas the data information recognized by the flash conversion layer (FTL) is 90% of the data. Things can happen. In this case, the host device 140, which identifies only about 30% of the data as valid data, cannot effectively eliminate the dirty state of the nonvolatile memory device 120, which determines that 90% of the data is valid data. However, since the data information that the file system 142 recognizes is more accurate than the data information that the flash translation layer FTL recognizes, the valid data that the file system 142 grasps is the actual valid data (that is, the real valid data). Data, and a significant portion of the valid data grasped by the flash conversion layer FTL are invalid data. In particular, when the flash conversion layer FTL identifies invalid data as valid data, the flash conversion layer FTL may cause inefficiency in the overall operation of the nonvolatile memory device 120 as well as the garbage collection operation. For example, when the flash translation layer FTL recognizes an invalid block composed only of invalid pages on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 as a valid block including at least one valid page, the invalid block is invalid. Garbage collection operations for invalid blocks consisting only of pages can only be delayed (even moving the invalid blocks consisting only of invalid pages insignificantly when performing a wear leveling operation). In order for the nonvolatile memory device 120 to operate quickly, Considering that the structure requires a large number of free blocks, the dirty state of the nonvolatile memory device 120 is inevitably deepened.

Furthermore, considering the characteristics of the nonvolatile memory device 120 (for example, NAND flash memory device) in which read and write operations are performed in units of pages, and erase operations are performed in units of blocks, hot access with a high frequency of use may be performed. The data (e.g., system file data, etc.) and cold data (e.g., video file data, photo file data, music file data, etc.) with low usage access are stored in the physical address of the nonvolatile memory device 120. Mixed on the PHYSICAL ADDRESS may cause frequent garbage collection operations in the nonvolatile memory device 120. In other words, since cold data is relatively unlikely to be updated, garbage collection operations for the block may not be frequently performed when the cold data are collected in one block. On the other hand, since hot data is more likely to be updated, when hot data and cold data are mixed in one block, garbage collection operation for the block may be frequently performed because of the hot data. Therefore, in a situation where hot data and cold data are mixed in one block, garbage collection operation is inevitably performed as compared to a situation where hot data and cold data are collected in different blocks. Accordingly, hot data and cold data may be disposed adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. However, as described above, as the data update operation of the nonvolatile memory device 120 is repeated, a discrepancy between data information recognized by the file system 142 and data information recognized by the flash translation layer FTL is intensified. Since the data information recognized by the flash conversion layer FTL is inaccurate than the data information recognized by the file system 142, the flash conversion layer FTL may display hot data and cold data of the nonvolatile memory device 120. There is a limit to placing each adjacent on the physical address (PHYSICAL ADDRESS).

To solve this problem, as illustrated in FIGS. 2 and 3, in the nonvolatile memory system 100, the file system 142 of the host device 140 may store target data (that is, a logical address) on a logical address (LOGICAL ADDRESS). On the physical address (PHYSICAL ADDRESS) of the non-volatile memory device 120 in a manner of collecting (indicated by TLAB-1, ..., TLAB-m) and writing continuously to a new logical address area (i.e., indicated as REWRITE). Target data (i.e., denoted by PAGE-1, ..., PAGE-n) can be placed adjacently (hereinafter referred to as file system driven fragmentation operation). At this time, the data block size on the logical address (LOGICAL ADDRESS) and the page size on the physical address (PHYSICAL ADDRESS) may be the same (that is, m and n are the same) or different (that is, m and n are different). For example, the data block size on the logical address may be 4 KB, the page size on the physical address may be 4 KB or 8 KB, and the block size on the physical address may be 512 KB. have. However, as an example, the data block size on the logical address, the page size on the physical address, and the block size on the physical address may be variously determined according to a required condition. On the other hand, since file system driven fragmentation operations require a relatively large amount of time (i.e., a high latency), when performed in the nonvolatile memory system 100 regardless of the user's intention, It causes a performance degradation of the volatile memory device 120. Therefore, the file system driven fragmentation operation may be performed every preset period (eg, a period in which the user does not use the nonvolatile memory system 100), or a user-specified time (eg, the user may perform a file system driven fragmentation operation). The background operation including the garbage collection operation is performed when the write operation, the read operation, and the erase operation are not performed in the nonvolatile memory device 120. Can be performed). However, this is merely an example, and the time for which the file system driven fragmentation operation is performed may be variously set according to a required condition.

In one embodiment, the file system 142 divides the data into valid data and invalid data on a logical address (LOGICAL ADDRESS) recognized by the file system 142, and collects the valid data into a new logical address area in succession. By performing a rewrite operation (that is, denoted as REWRITE), a file system-driven fragmentation operation of arranging valid data adjacently on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 may be performed. As described above, as the nonvolatile memory device 120 operates for a long time, the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other. The data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL. Therefore, the valid data grasped by the file system 142 are actual valid data, and a large part of the valid data grasped by the flash conversion layer FTL is invalid data. Accordingly, the nonvolatile memory system 100 may arrange valid data adjacent to the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 based on the data information recognized by the file system 142. That is, if only valid data on the logical address LOGICAL ADDRESS recognized by the file system 142 is continuously written to the new logical address area, a free block (eg, the physical address PHYSICAL ADDRESS) of the nonvolatile memory device 120 may be stored. For example, actual valid data are written continuously in a log block. This may substantially achieve the same effect as garbage collection operations performed by the flash translation layer (FTL). As such, since the file system 142 more accurately recognizes valid data and invalid data than the flash translation layer FTL, the file system 142 performs a file system-driven fragmentation operation so that only actual valid data is stored in the nonvolatile memory device. It may be disposed adjacent to the physical address (PHYSICAL ADDRESS) of 120.

Meanwhile, when the file system driven fragmentation operation is performed, the file system 142 may provide an erase command or a trim command for invalid data to the nonvolatile memory device 120 through the host controller 144. In this case, unlike the discard command, the erase command or the trim command may guarantee an unmapping state of invalid data in the mapping table. As a result, the flash translation layer FTL may recognize only actual valid data as valid data on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. According to an embodiment, the file system 142 performs a rewrite operation that divides the data into valid data and invalid data on a logical address and collects the valid data in a new logical address area in succession (i.e., , REWRITE), the valid data on the logical address (LOGICAL ADDRESS) is divided into hot data and cold data, the hot data are collected and continuously written in the first new logical address area, and the cold data are collected It is possible to continuously write to the second new logical address area. In this case, only actual valid data is disposed adjacent to the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120, and at the same time, the hot data and the cold data are divided so that the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120 is separated. May be disposed adjacent to each other. For example, the file system 142 may classify valid data into hot data and cold data based on the file type. As another example, the file system 142 may divide the valid data into hot data and cold data based on the usage access frequency. As another example, the file system 142 may divide the valid data into hot data and cold data based on the file capacity. However, this is merely an example, and the division of the hot data and the cold data may be performed in various ways.

In another embodiment, the file system 142 divides the data into hot data and cold data on a logical address (LOGICAL ADDRESS) recognized by the file system 142 and collects the hot data consecutively in the first new logical address area. Hot data on the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120 by performing a rewrite operation (that is, denoted as REWRITE) to collect cold data and continuously write the cold data to the second new logical address area. And file system-driven fragmentation operations for arranging the adjacent and cold data, respectively. For example, the file system 142 may classify the data into hot data and cold data based on a file type. For another example, the file system 142 may divide the data into hot data and cold data based on the usage access frequency. As another example, the file system 142 may classify the data into hot data and cold data based on the file capacity. However, this is merely an example, and the division of the hot data and the cold data may be performed in various ways. As described above, as the nonvolatile memory device 120 operates for a long time, the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other. The data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL. Accordingly, the nonvolatile memory system 100 may arrange hot data and cold data adjacently on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 based on the data information recognized by the file system 142. Can be. That is, when hot data are continuously written in the first new logical address area on the logical address LOGICAL ADDRESS recognized by the file system 142, a free block on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 may be used. For example, if hot data is continuously written to a log block, and cold data are continuously written to a second new logical address area on a logical address recognized by the file system 142, the nonvolatile memory device may be used. Cold data are continuously written to a free block (eg, a log block) on the physical address PHYSICAL ADDRESS of 120. As described above, the file system 142 may arrange hot data and cold data adjacently on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 through a file system driven fragmentation operation.

According to an embodiment, the file system 142 divides the data into hot data and cold data on the logical address, collects the hot data and writes them continuously into the first new logical address area, and collects the cold data. 2 When performing a rewrite operation that continuously writes to a new logical address area (ie, denoted as REWRITE), the hot data on the logical address (LOGICAL ADDRESS) are divided into valid hot data and invalid hot data, and then valid. Only hot data can be written to the first new logical address area. Similarly, when the file system 142 performs the rewrite operation (ie, REWRITE), the file system 142 divides cold data into valid cold data and invalid cold data on a logical address, and then removes only valid cold data. 2 Write to a new logical address area. Meanwhile, when the file system driven fragmentation operation is performed, the file system 142 sends an erase command or a trim command for the invalid hot data and the invalid cold data to the nonvolatile memory device 120 through the host controller 144. Can provide. In this case, unlike the discard command, the erase command or the trim command may guarantee an unmapping state for invalid hot data and invalid cold data in the mapping table. Accordingly, the hot data and the cold data are divided and disposed adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, and only the actual valid data are physical addresses PHYSICAL ADDRESS of the nonvolatile memory device 120. May be adjacent to each other. As such, the nonvolatile memory system 100 may effectively reduce the frequency of garbage collection operations performed in the nonvolatile memory device 120 by performing a file system driven fragmentation operation for hot data and cold data.

4 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device adjacently places valid data on a physical address of a nonvolatile memory device in the nonvolatile memory system of FIG. 1, and FIG. 5 is a nonvolatile memory of FIG. 1. FIG. 6 is a diagram illustrating an example in which valid data are continuously written to a new logical address area by a file system of a host device in a memory system. FIG. 6 is a diagram illustrating valid data being continuously written to a new logical address area in the nonvolatile memory system of FIG. 1. FIG. 1 is a diagram illustrating an example in which valid data are disposed adjacent to physical addresses of a nonvolatile memory device as they are written.

4 to 6, the file system 142 of the host device 140 stores valid data (VALID, V) and invalid data on a logical address (LOGICAL ADDRESS) recognized by the file system 142. After dividing by (INVALID, I) (Step S120), the valid data (VALID, V) are collected and continuously written in a new logical address area (Step S140), and the erase command for invalid data (INVALID, I) is performed. Alternatively, the trim command may be provided to the nonvolatile memory device 120 (Step S160).

As described above, as the nonvolatile memory device 120 operates for a long time, the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other. The data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL. Therefore, the valid data VALID and V grasped by the file system 142 are actual valid data, and a large part of the valid data VALID and V grasped by the flash conversion layer FTL are invalid data. Since (INVALID, I), it is effective that the file system 142 takes the initiative to perform the fragmentation operation. Accordingly, as shown in FIG. 5, in a state where valid data VALID and V and invalid data INVALID and I are mixed on a logical address LOGICAL ADDRESS recognized by the file system 142, the file is mixed. The system 142 collects only valid data (VALID, V) and continuously writes (ie, denotes REWRITE) to a new logical address area, thereby freeing a block on the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120. For example, the valid data VALID and V may be continuously written to the log block. As a result, valid data VALID and V may be adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. For example, as shown in FIG. 6, assuming that the data block size on the logical address and the page size on the physical address are the same, the valid data VALID on the logical address. , V) is successively written to the new logical address area, so that the valid data VALID and V, which are distributed in various blocks on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, are free blocks (eg, For example, it may be disposed adjacent to a log block. As a result, substantially the same effect as the garbage collection operation performed by the flash translation layer FTL can be achieved, and data management can be facilitated not only on the logical address, but also on the physical address. Subsequently, as valid data VALID and V are disposed adjacent to the free block, another valid page may be additionally written to the free page F in the free block.

For example, 4 KB data blocks L0, ..., L100 are successively written on a logical address LOGICAL ADDRESS, and only odd data blocks L1, L3, ..., L99 are deleted (or Assuming that the data is discarded, the block on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 includes valid data VALID and V (eg, valid pages) and invalid data INVALID. , I) (eg, invalid pages) may be present alternately. At this time, if the file system 142 collects only valid data (VALID, V) on a logical address (LOGICAL ADDRESS) and continuously writes the data to a new logical address area, the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120 is generated. Since only valid data VALID, V (e.g., valid pages) are rewritten in a new log block on the above, substantially the same effect as the garbage collection operation performed by the flash translation layer FTL is achieved. Thereafter, when the erase command or the trim command for the invalid data INVALID, I for guaranteeing the unmapping state for the invalid data INVALID, I is provided to the nonvolatile memory device 120, the mapping table The unmapping of the invalid data INVALID and I is completed, and thus, the flash translation layer FTL of the nonvolatile memory device 120 is located on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Only actual valid data VALID and V may be recognized as valid data VALID and V. FIG. Meanwhile, according to an embodiment, the file system 142 divides the data into valid data VALID and V and invalid data INVALID and I on a logical address LOGICAL ADDRESS. The valid data (VALID, V) on the logical address (LOGICAL ADDRESS) as hot data and cold data when performing a rewrite operation (that is, denoted as REWRITE) to collect and continuously write to the new logical address area. After the classification, the hot data may be collected and continuously written in the first new logical address area, and the cold data may be collected and continuously written in the second new logical address area. In this case, only the actual valid data (VALID, V) is disposed adjacent to the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120, at the same time, the hot data and the cold data is divided into the nonvolatile memory device 120 It may be disposed adjacent to each other on the physical address (PHYSICAL ADDRESS). On the other hand, since the file system driven fragmentation operation may put a significant burden on the nonvolatile memory system 100 in operation (ie, the latency is relatively large), the nonvolatile memory system 100 may perform the file system driven fragmentation. The operation may be performed at predetermined intervals, only at a user-specified time, or only when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120.

FIG. 7 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device in the nonvolatile memory system of FIG. 1 places hot data and cold data adjacently on a physical address of the nonvolatile memory device. In the nonvolatile memory system of FIG. 1, hot data (or cold data) is continuously written to a new logical address area by a file system of a host device, and FIG. 9 is a nonvolatile memory of FIG. 1. As hot data (or cold data) are continuously written to a new logical address area in a memory system, hot data and cold data are arranged adjacent to each other on a physical address of a nonvolatile memory device. .

Referring to FIGS. 7 to 9, the file system 142 of the host device 140 may display data on the logical address LOGICAL ADDRESS recognized by the file system 142 and the hot data HOT and H and the cold data. After dividing by (COLD, C) (Step S220), the hot data (HOT, H) is collected and continuously written in the first new logical address area (Step S240), and the cold data (COLD, C) are collected. The second new logical address area may be continuously written (Step S260).

As described above, as the nonvolatile memory device 120 operates for a long time, the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other. The data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL. Therefore, as shown in FIG. 8, in the state where hot data HOT and H and cold data COLD and C are mixed on a logical address LOGICAL ADDRESS recognized by the file system 142, the file is mixed. The system 142 collects only the hot data (HOT, H) and continuously writes (ie, denotes REWRITE) to the first new logical address area, thereby resetting the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120. Hot data HOT and H may be continuously written to one free block. Similarly, although not shown, the file system 142 collects only the cold data COLD and C and continuously writes them to the second new logical address area, thereby allowing the file system 142 to write on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Cold data COLD and C may be continuously written to the second free block. As a result, the hot data HOT and H and the cold data COLD and C may be adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. For example, as shown in FIG. 9, assuming that the data block size on the logical address and the page size on the physical address are the same, the valid data VALID on the logical address. , V) is continuously written in the new logical address area, so that the hot data HOT and H, which have been distributed in several blocks on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, are first free block. Cold data COLD and C, which are distributed in various blocks on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, may be disposed adjacent to the second free block. . As a result, hot data HOT and H with high usage access and cold data COLD and C with low usage access are separately disposed on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Therefore, the frequency of garbage collection operations performed in the nonvolatile memory device 120 can be reduced. That is, hot data HOT and H with high usage access and cold data COLD and C with low usage access are mixed on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Since unnecessary garbage collection operations that have been performed are prevented, the overall operating performance of the nonvolatile memory device 120 may be improved.

The hot data HOT and H and the cold data COLD and C may be distinguished in various ways. In an embodiment, the file system 142 may divide the data into hot data HOT and H and cold data COLD and C based on the file type. For example, the file system 142 may classify multimedia file data such as mpeg, jpeg, and mp3 into cold data COLD and C, and divide the remaining file data into hot data HOT and H. In another embodiment, the file system 142 may divide the data into hot data (HOT, H) and cold data (COLD, C) based on the frequency of use access. For example, the file system 142 is written once based on access statistics through monitoring, and when read only is repeated, the file system 142 is divided into cold data COLD and C, and the remaining file data is hot data HOT and H. Can be divided into In another embodiment, file system 142 may divide the valid data into hot data and cold data based on file capacity. For example, the file system 142 may be classified into cold data COLD and C when the file size is 1MB or more, and the remaining file data may be classified into hot data HOT and H. According to an embodiment, the file system 142 divides the data into hot data (HOT, H) and cold data (COLD, C) on a logical address (LOGICAL ADDRESS), and collects the hot data (HOT, H). When performing a rewrite operation (that is, denoted as REWRITE) that writes continuously to the first new logical address area and collects cold data COLD and C and writes continuously to the second new logical address area, the logical address ( After the hot data HOT and H are divided into valid hot data and invalid hot data on the LOGICAL ADDRESS, only the valid hot data may be written in the first new logical address area. Similarly, when the file system 142 performs the rewrite operation (ie, REWRITE), the file system 142 divides the cold data COLD and C into valid cold data and invalid cold data on a logical address LOGICAL. Only valid cold data can be written to the second new logical address area. The file system 142 may provide an erase command or a trim command for invalid hot data and invalid cold data to the nonvolatile memory device 120 through the host controller 144. At this time, if a clear command or a trim command for the invalid hot data and the invalid cold data is provided to the nonvolatile memory device 120 to guarantee an unmapping state for the invalid hot data and the invalid cold data in the mapping table. After the unmapping of the invalid hot data and the invalid cold data in the mapping table is completed, the flash translation layer (FTL) of the nonvolatile memory device 120 may be configured to have a physical address (eg, a physical address) of the nonvolatile memory device 120. Only actual valid hot data and actual valid cold data on the PHYSICAL ADDRESS may be recognized as valid hot data and valid cold data.

As such, the nonvolatile memory system 100 performs garbage collection performed on the nonvolatile memory device 120 by performing a file system driven fragmentation operation for the hot data HOT and H and the cold data COLD and C. The frequency of operation can be reduced. For example, in a conventional nonvolatile memory system, one hot page (HOT, H) (ie, hot data) and a plurality of cold pages in one block on a physical address (PHYSICAL ADDRESS) of the nonvolatile memory device COLD, C) (i.e., cold data), if the hot page (HOT, H) becomes invalid by overwriting and the block becomes the target block of garbage collection operation, the remaining plurality of cold pages There was even an extreme situation where a copy operation for (COLD, C) had to be performed. Accordingly, the nonvolatile memory system 100 may display hot data HOT and H with high usage access and cold data COLD with low usage access on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. By separating and disposing C), hot data (HOT, H) with high usage access and cold data (COLD, C) with low usage access on the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120. It is possible to effectively solve the problem of deepening of the dirty state caused by the mixed arrangement. In addition, the nonvolatile memory system 100 uses hot data HOT and H with high usage access and cold data COLD with low usage access on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. By separating and arranging C), it is possible to reduce the frequency of garbage collection operations performed in the nonvolatile memory device 120 (ie, the number of garbage collection operations, the number of copy operations, etc.). Overall operating performance, lifespan, etc. of the nonvolatile memory device 120 may be improved. On the other hand, since the file system driven fragmentation operation may put a significant burden on the nonvolatile memory system 100 in operation (ie, the latency is relatively large), the nonvolatile memory system 100 may perform the file system driven fragmentation. The operation may be performed at predetermined intervals, only at a user-specified time, or only when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120.

10 and 11, another effect of the system driven fragmentation operation performed by the nonvolatile memory system 100 is shown. For example, as shown in FIG. 10, the data block size on the logical address may be 4 KB, and the page size on the physical address may be 8 KB. At this time, when a write operation is performed on the 4 KB data blocks B1, ..., B16 on the logical address (LOGICAL ADDRESS) recognized by the file system 142, the write request sequence is B1, B3, B5, Assuming a B7, B2, B4, B6, B8, B9, B11, B13, B15, B10, B12, B14, B16 order, a 4KB data block can be written to an 8KB page in a block on a physical address. . In other words, within a 4-KB page, only 4 KB of data is filled. At this time, if the file system 142 collects the target data (i.e., indicated by B1, ..., B16) on the logical address (LOGICAL ADDRESS) and continuously writes them in the new logical address area, as shown in FIG. Likewise, target data (ie, denoted by B1,..., B16) may be adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. In particular, in the case where the file system 142 collects the target data (ie, indicated by B1, ..., B16) on the logical address LOGICAL in order and continuously writes them to the new logical address area, the nonvolatile memory device. On the physical address PHYSICAL ADDRESS of 120, target data (ie, indicated by B1,..., B16) may be sequentially arranged adjacently. As described above, the nonvolatile memory system 100 not only enables the file system 142 to effectively remove the dirty state of the nonvolatile memory device 120, but also operates the nonvolatile memory device 100 in operation of the nonvolatile memory system 100. Data scattered in various places on the physical address (PHYSICAL ADDRESS) of 120 may be arranged adjacent to each other in order. As a result, the nonvolatile memory system 100 may greatly improve the overall operating performance of the nonvolatile memory device 120 (eg, increase an operation speed and increase a space utilization rate).

Referring to FIG. 12, a process of determining whether the nonvolatile memory system 100 performs a file system driven fragmentation operation is illustrated. In detail, after driving the nonvolatile memory device 120 (Step S310), the nonvolatile memory system 100 checks whether a predetermined condition for performing a file system-driven fragmentation operation is satisfied (Step S320). Can be. At this time, if a predetermined condition for performing the file system driven fragmentation operation is satisfied, the nonvolatile memory system 100 may perform the file system driven fragmentation operation (Step S330). On the other hand, if a predetermined condition for performing the file system driven fragmentation operation is not satisfied, the nonvolatile memory system 100 may perform the file system driven fragmentation operation (Step S340). In this case, the preset condition may include a condition in which a preset period arrives, a condition in which a user specified time arrives, a condition in which a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120. . As described above, since the file system driven fragmentation operation causes the write operation and the erase operation to the nonvolatile memory device 120, it requires a relatively long time. Thus, when the file system driven fragmentation operation is performed in the nonvolatile memory system 100 regardless of the user's intention, the user may experience a performance degradation of the nonvolatile memory device 120. In other words, the file system driven fragmentation operation can put a significant burden on the nonvolatile memory system 100 in terms of operation. Accordingly, the nonvolatile memory system 100 performs the file system-driven fragmentation operation at predetermined intervals, only at a user-specified time, or at the nonvolatile memory device 120 to perform a write operation, a read operation, and an erase operation. Only when it does not. However, the above-described conditions (ie, a condition in which a predetermined period arrives, a condition in which a user-specified time arrives, and a condition in which a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120) are exemplary. As such, the preset condition for performing the file system driven fragmentation operation is not limited thereto. As mentioned above, although the nonvolatile memory system according to the embodiments of the present invention has been described with reference to the drawings, the above description is merely an example, and one of ordinary skill in the art without departing from the technical spirit of the present invention. It may be modified and changed by. For example, the present invention may be variously applied to a nonvolatile memory system having a semiconductor memory device having structural characteristics and / or operational characteristics similar to those of a NAND flash memory device.

The present invention can be applied to a nonvolatile memory system including a NAND flash memory device. Accordingly, the present invention can be applied to a solid state drive (SSD), a secure digital card (SDCARD), a universal flash storage (UFS), an embedded multimedia card (EMMC), a CF card, a memory stick, an XD picture card, and the like.

Although the above has been described with reference to the embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. It will be appreciated.

100: nonvolatile memory system 120: nonvolatile memory device

122: NAND flash memory 124: NAND controller

140: host device 142: file system

144: host controller

Claims

A nonvolatile memory device having at least one NAND flash memory and a NAND controller controlling the NAND flash memory; And

A host device having a file system and a host controller for receiving a command from the file system and providing the command to the nonvolatile memory device;

The file system divides data into valid data and invalid data on a logical address recognized by the file system, and performs a rewrite operation of collecting the valid data and continuously writing the data into a new logical address area. And a file system driven defragmentation operation of arranging the valid data adjacently on a physical address of the nonvolatile memory device.
The host controller of claim 1, wherein when the file system driven fragmentation operation is performed, the file system generates an erase command or a trim command to ensure an unmapping state for the invalid data in a mapping table. And providing the nonvolatile memory device through the nonvolatile memory device.
The method of claim 2, wherein when the rewrite operation is performed, the file system divides the valid data into hot data and cold data on the logical address, and then collects the hot data. And writing continuously to the first new logical address area, and collecting the cold data into the second new logical address area continuously.
The nonvolatile memory system of claim 3, wherein the file system divides the valid data into the hot data and the cold data based on a file type.
The nonvolatile memory system of claim 3, wherein the file system divides the valid data into the hot data and the cold data based on a usage access frequency.
The nonvolatile memory system of claim 3, wherein the file system divides the valid data into the hot data and the cold data based on a file capacity.
The method of claim 1, wherein the file system driven fragmentation operation is performed at a predetermined period, at a user-specified time, or when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device. Non-volatile memory system characterized by.
A nonvolatile memory device having at least one NAND flash memory and a NAND controller controlling the NAND flash memory; And

A host device having a file system and a host controller for receiving a command from the file system and providing the command to the nonvolatile memory device;

The file system divides the data into hot data and cold data on a logical address recognized by the file system, collects the hot data, continuously writes the data into a first new logical address area, and the cold data. File system-driven fragmentation for contiguously placing the hot data and the cold data on a physical address of the nonvolatile memory device by performing a rewrite operation to collect the data and continuously write the second new logical address area. and a defragmentation operation.
10. The method of claim 8, wherein when the rewrite operation is performed, the file system divides the hot data into valid hot data and invalid hot data on the logical address, and then only the valid hot data is used for the first new data. A nonvolatile memory system characterized by writing to a logical address area.
10. The method of claim 9, wherein when the rewrite operation is performed, the file system divides the cold data into valid cold data and invalid cold data on the logical address, and then only the valid cold data is the second new. A nonvolatile memory system characterized by writing to a logical address area.
12. The method of claim 10, wherein when the file system driven fragmentation operation is performed, the file system performs an erase command or trim to guarantee an unmapping state for the invalid hot data and the invalid cold data in a mapping table. and a trim) command to the nonvolatile memory device through the host controller.
The nonvolatile memory system of claim 8, wherein the file system divides the data into the hot data and the cold data based on a file type.
The nonvolatile memory system of claim 8, wherein the file system divides the data into the hot data and the cold data based on a usage access frequency.
The nonvolatile memory system of claim 8, wherein the file system divides the data into the hot data and the cold data based on a file capacity.
The method of claim 8, wherein the file system driven fragmentation operation is performed at a predetermined period, at a user-specified time, or when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device. Non-volatile memory system characterized by.