WO2016195242A1 - Système de mémoire non volatile - Google Patents

Système de mémoire non volatile Download PDF

Info

Publication number
WO2016195242A1
WO2016195242A1 PCT/KR2016/004272 KR2016004272W WO2016195242A1 WO 2016195242 A1 WO2016195242 A1 WO 2016195242A1 KR 2016004272 W KR2016004272 W KR 2016004272W WO 2016195242 A1 WO2016195242 A1 WO 2016195242A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
file system
nonvolatile memory
memory device
logical address
Prior art date
Application number
PCT/KR2016/004272
Other languages
English (en)
Korean (ko)
Inventor
이성우
Original Assignee
주식회사 이에프텍
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 이에프텍 filed Critical 주식회사 이에프텍
Publication of WO2016195242A1 publication Critical patent/WO2016195242A1/fr

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation

Definitions

  • the present invention relates to a semiconductor memory system. More specifically, the present invention relates to a nonvolatile memory system including a nonvolatile memory device (eg, a NAND flash memory device, etc.).
  • a nonvolatile memory device eg, a NAND flash memory device, etc.
  • the semiconductor memory device may be classified into a volatile memory device and a nonvolatile memory device according to whether data can be stored in a state where power is not supplied.
  • NAND flash memory devices are widely used in nonvolatile memory devices because they are suitable for miniaturization, large capacity, and low cost.
  • a NAND flash memory device performs a write operation and a read operation in units of pages, and performs an erase operation in units of blocks.
  • a flash translation layer (FTL) is provided in the NAND controller to support a file system, and a write operation, a read operation, an erase operation, a merge operation, and a copyback are performed using the flash translation layer.
  • the flash translation layer performs an address mapping operation by using a mapping table in which mapping information between a logical address and a physical address is stored.
  • data information recognized by the file system for example, information about valid data and invalid data, etc.
  • the data information recognized by the layer and the data information recognized by the file system become inconsistent.
  • a dirty status that causes a lack of free blocks for garbage collection operation, etc. is deepened, and the physical state of the NAND flash memory device is increased.
  • the frequency of garbage collection increases as hot data with high usage access and cold data with low usage access are mixed on the address, the operation performance of the NAND flash memory device decreases (eg, For example, a decrease in writing speed and the like have occurred.
  • One object of the present invention is to allow a file system of a host device to effectively eliminate a dirty state of a nonvolatile memory device (eg, a NAND flash memory device) and to reduce the frequency of garbage collection operations performed in the nonvolatile memory device.
  • a nonvolatile memory device eg, a NAND flash memory device
  • garbage collection operations performed in the nonvolatile memory device.
  • the object of the present invention is not limited to the above-described object, and may be variously expanded within a range without departing from the spirit and scope of the present invention.
  • the nonvolatile memory system according to the embodiments of the present invention and the nonvolatile memory device and file system having at least one NAND flash memory and a NAND controller for controlling the NAND flash memory;
  • the host device may include a host device including a host controller that receives a command from the file system and provides the command to the nonvolatile memory device.
  • the file system divides data into valid data and invalid data on a logical address recognized by the file system, collects the valid data, and continuously writes the data into a new logical address area.
  • a file system driven defragmentation operation of arranging the valid data on the physical address of the nonvolatile memory device may be performed.
  • the file system may issue an erase command or a trim command to ensure an unmapping state for the invalid data in a mapping table of the host controller. It can be provided to the nonvolatile memory device through.
  • the file system divides the valid data into hot data and cold data on the logical address, and then collects the hot data.
  • the data may be continuously written to the first new logical address area, and the cold data may be collected and continuously written to the second new logical address area.
  • the file system may classify the valid data into the hot data and the cold data based on a file type.
  • the file system may classify the valid data into the hot data and the cold data based on a usage access frequency.
  • the file system may divide the valid data into the hot data and the cold data based on a file capacity.
  • the file system-driven fragmentation may be performed every predetermined period, at a user-specified time, or when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device. have.
  • the nonvolatile memory system according to the embodiments of the present invention and the nonvolatile memory device and file system having at least one NAND flash memory and a NAND controller for controlling the NAND flash memory;
  • the host device may include a host device including a host controller that receives a command from the file system and provides the command to the nonvolatile memory device.
  • the file system divides the data into hot data and cold data on a logical address recognized by the file system, collects the hot data, and writes the hot data continuously into a first new logical address area.
  • the file system divides the hot data into valid hot data and invalid hot data on the logical address, and then only the valid hot data are stored in the first new data. It can be written to the logical address area.
  • the file system when performing the rewrite operation, divides the cold data into valid cold data and invalid cold data on the logical address, and then only the valid cold data is the second new. It can be written to the logical address area.
  • the file system may perform an erase command or trim to guarantee an unmapping state for the invalid hot data and the invalid cold data in a mapping table. trim) command to the nonvolatile memory device through the host controller.
  • the file system may classify the data into the hot data and the cold data based on a file type.
  • the file system may classify the data into the hot data and the cold data based on a usage access frequency.
  • the file system may classify the data into the hot data and the cold data based on a file capacity.
  • the file system-driven fragmentation may be performed every predetermined period, at a user-specified time, or when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device. have.
  • a nonvolatile memory system divides data into valid data and invalid data on a logical address recognized by a file system of a host device, and collects valid data into a new logical address area continuously.
  • valid data i.e., actual valid data accurately determined by the file system of the host device
  • the dirty state of the nonvolatile memory device for example, NAND flash memory device, etc.
  • a nonvolatile memory system divides data into hot data and cold data on a logical address recognized by a file system of a host device, and collects the hot data continuously in a first new logical address area.
  • a file system driven fragmentation operation in which hot data and cold data are adjacent to each other on a physical address of the nonvolatile memory device by performing a rewrite operation that writes and collects cold data and continuously writes the second new logical address area. Can be performed.
  • the frequency of garbage collection operations performed in the nonvolatile memory device can be reduced, so that the overall operating performance of the nonvolatile memory device can be improved.
  • FIG. 1 is a block diagram illustrating a nonvolatile memory system according to example embodiments.
  • FIG. 2 is a diagram illustrating an example in which target data is continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.
  • FIG. 3 is a diagram illustrating an example in which target data are disposed adjacent to a physical address of a nonvolatile memory device as target data are continuously written to a new logical address area in the nonvolatile memory system of FIG. 1.
  • FIG. 4 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device adjacently places valid data on a physical address of a nonvolatile memory device in the nonvolatile memory system of FIG. 1.
  • FIG. 5 is a diagram illustrating an example in which valid data are continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.
  • FIG. 6 is a diagram illustrating an example in which valid data are adjacently disposed on a physical address of a nonvolatile memory device as valid data are continuously written to a new logical address area in the nonvolatile memory system of FIG. 1.
  • FIG. 7 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device arranges hot data and cold data adjacently on a physical address of a nonvolatile memory device in FIG. 1.
  • FIG. 8 is a diagram illustrating an example in which hot data (or cold data) is continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.
  • FIG. 9 illustrates that hot data and cold data are adjacent to each other on a physical address of a nonvolatile memory device as hot data (or cold data) is continuously written to a new logical address area in the nonvolatile memory system of FIG. 1. It is a figure which shows an example arrange
  • FIG. 10 and 11 illustrate another example of a file system driven fragmentation operation performed by the nonvolatile memory system of FIG. 1.
  • FIG. 12 is a flowchart illustrating a process of determining whether a file system driven fragmentation operation is performed by the nonvolatile memory system of FIG. 1.
  • first and second may be used to describe various components, but the components should not be limited by the terms. The terms may be used for the purpose of distinguishing one component from another component.
  • first component may be referred to as the second component, and similarly, the second component may be referred to as the first component.
  • FIG. 1 is a block diagram illustrating a nonvolatile memory system according to embodiments of the present invention
  • FIG. 2 illustrates that target data is continuously written to a new logical address area by a file system of a host device in the nonvolatile memory system of FIG. 1.
  • 3 is a diagram illustrating an example in which target data are disposed adjacent to a physical address of a nonvolatile memory device as target data are continuously written to a new logical address area in the nonvolatile memory system of FIG. 1. It is a figure which shows.
  • the nonvolatile memory system 100 may include a nonvolatile memory device 120 and a host device 140.
  • the nonvolatile memory device 120 may be a NAND flash memory device.
  • the nonvolatile memory device 120 may include a solid state drive (SSD), a secure digital card (SDCARD), universal flash storage (UFS), and an embedded multimedia card. card (EMMC), a compact flash card (CF), a memory stick (memory stick), an XD picture card (XD picture card), etc., but is not limited thereto.
  • the nonvolatile memory device 120 may include a NAND flash memory 122 and a NAND controller that controls the NAND flash memory 122.
  • the nonvolatile memory device 120 includes one NAND flash memory 122, but for convenience of description, the nonvolatile memory device 120 may include a plurality of NAND flash memories 122. ) May be included.
  • the host device 140 may include a host controller 144 that receives a command from the file system 142 and the file system 142 and provides the command to the nonvolatile memory device 120.
  • the nonvolatile memory device 120 may perform a read operation and a write operation on a page basis, and an erase operation may be performed on a block basis due to the physical structure of the NAND flash memories 122. Perform in units. Accordingly, the nonvolatile memory device 120 has many limitations in performing a write operation, a read operation, and an erase operation as compared with a random access memory device (eg, a dynamic random access memory (DRAM) device). . Therefore, the nonvolatile memory device 120 includes a flash translation layer (FTL) in the NAND controller 124 to support a file system, and uses the flash translation layer (FTL) to read, write, and erase operations.
  • FTL flash translation layer
  • a merge operation, a copyback operation, a compaction operation, a garbage collection operation (or a reclaim operation), and a wear leveling operation are performed.
  • the NAND controller 124 performs the above operations by executing a software implemented flash conversion layer (FTL).
  • the flash translation layer FTL uses a mapping table in which mapping information between the logical address and the physical address is stored, and the flash translation layer FTL decrements the logical address recognized by the host device 140.
  • An address mapping operation of converting a physical address (PHYSICAL ADDRESS) of the volatile memory device 120 is performed.
  • the data information (for example, valid data and invalid data, etc.) recognized by the file system 142 may be accurately represented in the mapping table. Since it is not reflected, the data information recognized by the flash conversion layer FTL and the data information recognized by the file system 142 do not coincide. For example, for some commands, such as a discard command, under certain conditions of the file system 142, the file system 142 may not transmit the discard information to the nonvolatile memory device 120. The card information may not be filtered and transmitted to the nonvolatile memory device 120, and the power off may be performed while the card information transmitted to the nonvolatile memory device 120 is temporarily stored in the random access memory. Or the like may be lost.
  • the data information for example, valid data and invalid data, etc.
  • the flash conversion layer FTL
  • Recognizing data information eg, information about valid data and invalid data, etc.
  • the erase operation is very slow compared to the read operation or the write operation due to the characteristics of the nonvolatile memory device 120
  • the user may experience a decrease in performance during the data update operation of the nonvolatile memory device 120 (eg, freezing).
  • the updated data is written to a free block (e.g., a log block) so as not to feel the phenomenon, but a block containing previous data (i.e. invalid data) is not erased in many cases.
  • Such a scheme includes data information recognized by the file system 142 (eg, information about valid data and invalid data) and data information recognized by the flash conversion layer FTL (eg, Mismatch between valid data and invalid data).
  • a dirty state in which a free block for the garbage collection operation of the nonvolatile memory device 120 is insufficient may be deepened.
  • the host device 140 that is, the file system 142 of the host device 140.
  • the data information recognized by the file system 142 is only about 30% of the data, whereas the data information recognized by the flash conversion layer (FTL) is 90% of the data. Things can happen.
  • the host device 140 which identifies only about 30% of the data as valid data, cannot effectively eliminate the dirty state of the nonvolatile memory device 120, which determines that 90% of the data is valid data.
  • the valid data that the file system 142 grasps is the actual valid data (that is, the real valid data).
  • Data, and a significant portion of the valid data grasped by the flash conversion layer FTL are invalid data.
  • the flash conversion layer FTL may cause inefficiency in the overall operation of the nonvolatile memory device 120 as well as the garbage collection operation.
  • the flash translation layer FTL recognizes an invalid block composed only of invalid pages on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 as a valid block including at least one valid page, the invalid block is invalid.
  • Garbage collection operations for invalid blocks consisting only of pages can only be delayed (even moving the invalid blocks consisting only of invalid pages insignificantly when performing a wear leveling operation).
  • the nonvolatile memory device 120 In order for the nonvolatile memory device 120 to operate quickly, Considering that the structure requires a large number of free blocks, the dirty state of the nonvolatile memory device 120 is inevitably deepened.
  • nonvolatile memory device 120 for example, NAND flash memory device
  • hot access with a high frequency of use may be performed.
  • the data e.g., system file data, etc.
  • cold data e.g., video file data, photo file data, music file data, etc.
  • garbage collection operations for the block may not be frequently performed when the cold data are collected in one block.
  • hot data and cold data may be disposed adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120.
  • PHYSICAL ADDRESS physical address
  • the flash conversion layer FTL may display hot data and cold data of the nonvolatile memory device 120. There is a limit to placing each adjacent on the physical address (PHYSICAL ADDRESS).
  • the file system 142 of the host device 140 may store target data (that is, a logical address) on a logical address (LOGICAL ADDRESS).
  • target data that is, a logical address
  • LOGICAL ADDRESS On the physical address (PHYSICAL ADDRESS) of the non-volatile memory device 120 in a manner of collecting (indicated by TLAB-1, ..., TLAB-m) and writing continuously to a new logical address area (i.e., indicated as REWRITE).
  • Target data i.e., denoted by PAGE-1, ..., PAGE-n
  • file system driven fragmentation operation i.e., denoted by PAGE-1, ..., PAGE-n
  • the data block size on the logical address (LOGICAL ADDRESS) and the page size on the physical address (PHYSICAL ADDRESS) may be the same (that is, m and n are the same) or different (that is, m and n are different).
  • the data block size on the logical address may be 4 KB
  • the page size on the physical address may be 4 KB or 8 KB
  • the block size on the physical address may be 512 KB. have.
  • the data block size on the logical address, the page size on the physical address, and the block size on the physical address may be variously determined according to a required condition.
  • the file system driven fragmentation operation may be performed every preset period (eg, a period in which the user does not use the nonvolatile memory system 100), or a user-specified time (eg, the user may perform a file system driven fragmentation operation).
  • the background operation including the garbage collection operation is performed when the write operation, the read operation, and the erase operation are not performed in the nonvolatile memory device 120. Can be performed).
  • the file system 142 divides the data into valid data and invalid data on a logical address (LOGICAL ADDRESS) recognized by the file system 142, and collects the valid data into a new logical address area in succession.
  • a rewrite operation that is, denoted as REWRITE
  • REWRITE a rewrite operation
  • a file system-driven fragmentation operation of arranging valid data adjacently on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 may be performed.
  • the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other.
  • the data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL.
  • the nonvolatile memory system 100 may arrange valid data adjacent to the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 based on the data information recognized by the file system 142. That is, if only valid data on the logical address LOGICAL ADDRESS recognized by the file system 142 is continuously written to the new logical address area, a free block (eg, the physical address PHYSICAL ADDRESS) of the nonvolatile memory device 120 may be stored. For example, actual valid data are written continuously in a log block.
  • the file system 142 may substantially achieve the same effect as garbage collection operations performed by the flash translation layer (FTL).
  • the file system 142 since the file system 142 more accurately recognizes valid data and invalid data than the flash translation layer FTL, the file system 142 performs a file system-driven fragmentation operation so that only actual valid data is stored in the nonvolatile memory device. It may be disposed adjacent to the physical address (PHYSICAL ADDRESS) of 120.
  • the file system 142 may provide an erase command or a trim command for invalid data to the nonvolatile memory device 120 through the host controller 144.
  • the erase command or the trim command may guarantee an unmapping state of invalid data in the mapping table.
  • the flash translation layer FTL may recognize only actual valid data as valid data on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120.
  • the file system 142 performs a rewrite operation that divides the data into valid data and invalid data on a logical address and collects the valid data in a new logical address area in succession (i.e., , REWRITE), the valid data on the logical address (LOGICAL ADDRESS) is divided into hot data and cold data, the hot data are collected and continuously written in the first new logical address area, and the cold data are collected It is possible to continuously write to the second new logical address area.
  • the file system 142 may classify valid data into hot data and cold data based on the file type.
  • the file system 142 may divide the valid data into hot data and cold data based on the usage access frequency.
  • the file system 142 may divide the valid data into hot data and cold data based on the file capacity.
  • this is merely an example, and the division of the hot data and the cold data may be performed in various ways.
  • the file system 142 divides the data into hot data and cold data on a logical address (LOGICAL ADDRESS) recognized by the file system 142 and collects the hot data consecutively in the first new logical address area.
  • Hot data on the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120 by performing a rewrite operation (that is, denoted as REWRITE) to collect cold data and continuously write the cold data to the second new logical address area.
  • REWRITE rewrite operation
  • file system-driven fragmentation operations for arranging the adjacent and cold data, respectively.
  • the file system 142 may classify the data into hot data and cold data based on a file type.
  • the file system 142 may divide the data into hot data and cold data based on the usage access frequency.
  • the file system 142 may classify the data into hot data and cold data based on the file capacity.
  • the nonvolatile memory device 120 operates for a long time, the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other.
  • the data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL.
  • the nonvolatile memory system 100 may arrange hot data and cold data adjacently on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 based on the data information recognized by the file system 142. Can be.
  • a free block on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 may be used.
  • the nonvolatile memory device may be used.
  • Cold data are continuously written to a free block (eg, a log block) on the physical address PHYSICAL ADDRESS of 120.
  • the file system 142 may arrange hot data and cold data adjacently on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120 through a file system driven fragmentation operation.
  • the file system 142 divides the data into hot data and cold data on the logical address, collects the hot data and writes them continuously into the first new logical address area, and collects the cold data. 2
  • the hot data on the logical address LOGICAL ADDRESS
  • the file system 142 divides cold data into valid cold data and invalid cold data on a logical address, and then removes only valid cold data.
  • the file system 142 sends an erase command or a trim command for the invalid hot data and the invalid cold data to the nonvolatile memory device 120 through the host controller 144. Can provide.
  • the erase command or the trim command may guarantee an unmapping state for invalid hot data and invalid cold data in the mapping table. Accordingly, the hot data and the cold data are divided and disposed adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, and only the actual valid data are physical addresses PHYSICAL ADDRESS of the nonvolatile memory device 120. May be adjacent to each other.
  • the nonvolatile memory system 100 may effectively reduce the frequency of garbage collection operations performed in the nonvolatile memory device 120 by performing a file system driven fragmentation operation for hot data and cold data.
  • FIG. 4 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device adjacently places valid data on a physical address of a nonvolatile memory device in the nonvolatile memory system of FIG. 1
  • FIG. 5 is a nonvolatile memory of FIG. 1.
  • FIG. 6 is a diagram illustrating an example in which valid data are continuously written to a new logical address area by a file system of a host device in a memory system.
  • FIG. 6 is a diagram illustrating valid data being continuously written to a new logical address area in the nonvolatile memory system of FIG. 1.
  • FIG. 1 is a diagram illustrating an example in which valid data are disposed adjacent to physical addresses of a nonvolatile memory device as they are written.
  • the file system 142 of the host device 140 stores valid data (VALID, V) and invalid data on a logical address (LOGICAL ADDRESS) recognized by the file system 142.
  • a logical address (LOGICAL ADDRESS) recognized by the file system 142.
  • the valid data (VALID, V) are collected and continuously written in a new logical address area (Step S140), and the erase command for invalid data (INVALID, I) is performed.
  • the trim command may be provided to the nonvolatile memory device 120 (Step S160).
  • the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other.
  • the data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL. Therefore, the valid data VALID and V grasped by the file system 142 are actual valid data, and a large part of the valid data VALID and V grasped by the flash conversion layer FTL are invalid data. Since (INVALID, I), it is effective that the file system 142 takes the initiative to perform the fragmentation operation. Accordingly, as shown in FIG.
  • the file is mixed.
  • the system 142 collects only valid data (VALID, V) and continuously writes (ie, denotes REWRITE) to a new logical address area, thereby freeing a block on the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120.
  • VALID, V may be continuously written to the log block.
  • valid data VALID and V may be adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. For example, as shown in FIG.
  • the valid data VALID on the logical address. , V) is successively written to the new logical address area, so that the valid data VALID and V, which are distributed in various blocks on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, are free blocks (eg, For example, it may be disposed adjacent to a log block.
  • the valid data VALID and V are disposed adjacent to the free block, another valid page may be additionally written to the free page F in the free block.
  • the mapping table The unmapping of the invalid data INVALID and I is completed, and thus, the flash translation layer FTL of the nonvolatile memory device 120 is located on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Only actual valid data VALID and V may be recognized as valid data VALID and V.
  • the file system 142 divides the data into valid data VALID and V and invalid data INVALID and I on a logical address LOGICAL ADDRESS.
  • REWRITE a rewrite operation
  • the hot data may be collected and continuously written in the first new logical address area
  • the cold data may be collected and continuously written in the second new logical address area.
  • the actual valid data (VALID, V) is disposed adjacent to the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120, at the same time, the hot data and the cold data is divided into the nonvolatile memory device 120 It may be disposed adjacent to each other on the physical address (PHYSICAL ADDRESS).
  • the nonvolatile memory system 100 may perform the file system driven fragmentation.
  • the operation may be performed at predetermined intervals, only at a user-specified time, or only when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120.
  • FIG. 7 is a flowchart illustrating a file system driven fragmentation operation in which a file system of a host device in the nonvolatile memory system of FIG. 1 places hot data and cold data adjacently on a physical address of the nonvolatile memory device.
  • hot data or cold data
  • FIG. 9 is a nonvolatile memory of FIG. 1.
  • hot data and cold data are arranged adjacent to each other on a physical address of a nonvolatile memory device. .
  • the file system 142 of the host device 140 may display data on the logical address LOGICAL ADDRESS recognized by the file system 142 and the hot data HOT and H and the cold data.
  • the hot data (HOT, H) is collected and continuously written in the first new logical address area (Step S240), and the cold data (COLD, C) are collected.
  • the second new logical address area may be continuously written (Step S260).
  • the nonvolatile memory device 120 operates for a long time, the data information recognized by the file system 142 and the data information recognized by the flash translation layer FTL do not coincide with each other.
  • the data information recognized by 142 is more accurate than the data information recognized by the flash conversion layer FTL. Therefore, as shown in FIG. 8, in the state where hot data HOT and H and cold data COLD and C are mixed on a logical address LOGICAL ADDRESS recognized by the file system 142, the file is mixed.
  • the system 142 collects only the hot data (HOT, H) and continuously writes (ie, denotes REWRITE) to the first new logical address area, thereby resetting the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120.
  • Hot data HOT and H may be continuously written to one free block.
  • the file system 142 collects only the cold data COLD and C and continuously writes them to the second new logical address area, thereby allowing the file system 142 to write on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120.
  • Cold data COLD and C may be continuously written to the second free block.
  • the hot data HOT and H and the cold data COLD and C may be adjacent to each other on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. For example, as shown in FIG. 9, assuming that the data block size on the logical address and the page size on the physical address are the same, the valid data VALID on the logical address.
  • V) is continuously written in the new logical address area, so that the hot data HOT and H, which have been distributed in several blocks on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, are first free block.
  • Cold data COLD and C which are distributed in various blocks on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120, may be disposed adjacent to the second free block. .
  • hot data HOT and H with high usage access and cold data COLD and C with low usage access are separately disposed on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Therefore, the frequency of garbage collection operations performed in the nonvolatile memory device 120 can be reduced.
  • hot data HOT and H with high usage access and cold data COLD and C with low usage access are mixed on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120. Since unnecessary garbage collection operations that have been performed are prevented, the overall operating performance of the nonvolatile memory device 120 may be improved.
  • the hot data HOT and H and the cold data COLD and C may be distinguished in various ways.
  • the file system 142 may divide the data into hot data HOT and H and cold data COLD and C based on the file type. For example, the file system 142 may classify multimedia file data such as mpeg, jpeg, and mp3 into cold data COLD and C, and divide the remaining file data into hot data HOT and H.
  • the file system 142 may divide the data into hot data (HOT, H) and cold data (COLD, C) based on the frequency of use access.
  • file system 142 is written once based on access statistics through monitoring, and when read only is repeated, the file system 142 is divided into cold data COLD and C, and the remaining file data is hot data HOT and H.
  • file system 142 may divide the valid data into hot data and cold data based on file capacity.
  • the file system 142 may be classified into cold data COLD and C when the file size is 1MB or more, and the remaining file data may be classified into hot data HOT and H.
  • the file system 142 divides the data into hot data (HOT, H) and cold data (COLD, C) on a logical address (LOGICAL ADDRESS), and collects the hot data (HOT, H).
  • the logical address After the hot data HOT and H are divided into valid hot data and invalid hot data on the LOGICAL ADDRESS, only the valid hot data may be written in the first new logical address area.
  • the file system 142 performs the rewrite operation (ie, REWRITE)
  • the file system 142 divides the cold data COLD and C into valid cold data and invalid cold data on a logical address LOGICAL. Only valid cold data can be written to the second new logical address area.
  • the file system 142 may provide an erase command or a trim command for invalid hot data and invalid cold data to the nonvolatile memory device 120 through the host controller 144.
  • a clear command or a trim command for the invalid hot data and the invalid cold data is provided to the nonvolatile memory device 120 to guarantee an unmapping state for the invalid hot data and the invalid cold data in the mapping table.
  • the flash translation layer (FTL) of the nonvolatile memory device 120 may be configured to have a physical address (eg, a physical address) of the nonvolatile memory device 120. Only actual valid hot data and actual valid cold data on the PHYSICAL ADDRESS may be recognized as valid hot data and valid cold data.
  • the nonvolatile memory system 100 performs garbage collection performed on the nonvolatile memory device 120 by performing a file system driven fragmentation operation for the hot data HOT and H and the cold data COLD and C.
  • the frequency of operation can be reduced.
  • one hot page (HOT, H) ie, hot data
  • a plurality of cold pages in one block on a physical address (PHYSICAL ADDRESS) of the nonvolatile memory device COLD, C) i.e., cold data
  • the nonvolatile memory system 100 may display hot data HOT and H with high usage access and cold data COLD with low usage access on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120.
  • hot data (HOT, H) with high usage access and cold data (COLD, C) with low usage access on the physical address (PHYSICAL ADDRESS) of the nonvolatile memory device 120 It is possible to effectively solve the problem of deepening of the dirty state caused by the mixed arrangement.
  • the nonvolatile memory system 100 uses hot data HOT and H with high usage access and cold data COLD with low usage access on the physical address PHYSICAL ADDRESS of the nonvolatile memory device 120.
  • the nonvolatile memory system 100 may perform the file system driven fragmentation. The operation may be performed at predetermined intervals, only at a user-specified time, or only when a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120.
  • FIG. 10 and 11 illustrate another example of a file system driven fragmentation operation performed by the nonvolatile memory system of FIG. 1.
  • the data block size on the logical address may be 4 KB
  • the page size on the physical address may be 8 KB.
  • the write request sequence is B1, B3, B5, Assuming a B7, B2, B4, B6, B8, B9, B11, B13, B15, B10, B12, B14, B16 order, a 4KB data block can be written to an 8KB page in a block on a physical address. .
  • target data i.e., indicated by B1, ..., B16
  • logical address LOGICAL ADDRESS
  • target data ie, denoted by B1,..., B16
  • PHYSICAL ADDRESS the physical address of the nonvolatile memory device 120.
  • the file system 142 collects the target data (ie, indicated by B1, ..., B16) on the logical address LOGICAL in order and continuously writes them to the new logical address area, the nonvolatile memory device.
  • target data ie, indicated by B1,..., B16
  • target data may be sequentially arranged adjacently.
  • the nonvolatile memory system 100 not only enables the file system 142 to effectively remove the dirty state of the nonvolatile memory device 120, but also operates the nonvolatile memory device 100 in operation of the nonvolatile memory system 100.
  • Data scattered in various places on the physical address (PHYSICAL ADDRESS) of 120 may be arranged adjacent to each other in order.
  • the nonvolatile memory system 100 may greatly improve the overall operating performance of the nonvolatile memory device 120 (eg, increase an operation speed and increase a space utilization rate).
  • FIG. 12 is a flowchart illustrating a process of determining whether a file system driven fragmentation operation is performed by the nonvolatile memory system of FIG. 1.
  • Step S310 After driving the nonvolatile memory device 120 (Step S310), the nonvolatile memory system 100 checks whether a predetermined condition for performing a file system-driven fragmentation operation is satisfied (Step S320). Can be. At this time, if a predetermined condition for performing the file system driven fragmentation operation is satisfied, the nonvolatile memory system 100 may perform the file system driven fragmentation operation (Step S330). On the other hand, if a predetermined condition for performing the file system driven fragmentation operation is not satisfied, the nonvolatile memory system 100 may perform the file system driven fragmentation operation (Step S340).
  • the preset condition may include a condition in which a preset period arrives, a condition in which a user specified time arrives, a condition in which a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120.
  • the file system driven fragmentation operation since the file system driven fragmentation operation causes the write operation and the erase operation to the nonvolatile memory device 120, it requires a relatively long time.
  • the file system driven fragmentation operation is performed in the nonvolatile memory system 100 regardless of the user's intention, the user may experience a performance degradation of the nonvolatile memory device 120.
  • the file system driven fragmentation operation can put a significant burden on the nonvolatile memory system 100 in terms of operation.
  • the nonvolatile memory system 100 performs the file system-driven fragmentation operation at predetermined intervals, only at a user-specified time, or at the nonvolatile memory device 120 to perform a write operation, a read operation, and an erase operation. Only when it does not.
  • the above-described conditions ie, a condition in which a predetermined period arrives, a condition in which a user-specified time arrives, and a condition in which a write operation, a read operation, and an erase operation are not performed in the nonvolatile memory device 120
  • the preset condition for performing the file system driven fragmentation operation is not limited thereto.
  • nonvolatile memory system As mentioned above, although the nonvolatile memory system according to the embodiments of the present invention has been described with reference to the drawings, the above description is merely an example, and one of ordinary skill in the art without departing from the technical spirit of the present invention. It may be modified and changed by. For example, the present invention may be variously applied to a nonvolatile memory system having a semiconductor memory device having structural characteristics and / or operational characteristics similar to those of a NAND flash memory device.
  • the present invention can be applied to a nonvolatile memory system including a NAND flash memory device. Accordingly, the present invention can be applied to a solid state drive (SSD), a secure digital card (SDCARD), a universal flash storage (UFS), an embedded multimedia card (EMMC), a CF card, a memory stick, an XD picture card, and the like.
  • SSD solid state drive
  • SDCARD secure digital card
  • UFS universal flash storage
  • EMMC embedded multimedia card
  • CF card CF card
  • memory stick a memory stick
  • XD picture card and the like.
  • nonvolatile memory system 120 nonvolatile memory device
  • NAND flash memory 124 NAND controller

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

La présente invention concerne un système de mémoire non volatile qui comprend : un dispositif de mémoire non volatile comprenant une mémoire flash NON-ET et un contrôleur NON-ET pour commander la mémoire flash NON-ET ; et un dispositif hôte comprenant un système de fichiers et un contrôleur hôte pour recevoir une entrée d'une commande à partir du système de fichiers et fournir la commande au dispositif de mémoire non volatile. Ici, le système de fichiers divise les données en données valides et en données invalides sur une adresse logique reconnue par le système de fichiers, et effectue une opération de réécriture pour collecter les données valides et écrire en continu celles-ci dans une nouvelle zone d'adresse logique, réalisant ainsi une opération de fragmentation initiée par le système de fichiers pour agencer les données valides de manière adjacente les unes aux autres sur une adresse physique du dispositif de mémoire non volatile.
PCT/KR2016/004272 2015-05-29 2016-04-25 Système de mémoire non volatile WO2016195242A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2015-0075693 2015-05-29
KR1020150075693A KR101718713B1 (ko) 2015-05-29 2015-05-29 비휘발성 메모리 시스템

Publications (1)

Publication Number Publication Date
WO2016195242A1 true WO2016195242A1 (fr) 2016-12-08

Family

ID=57440645

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2016/004272 WO2016195242A1 (fr) 2015-05-29 2016-04-25 Système de mémoire non volatile

Country Status (2)

Country Link
KR (1) KR101718713B1 (fr)
WO (1) WO2016195242A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109558075A (zh) * 2018-10-29 2019-04-02 珠海妙存科技有限公司 一种利用数据冷热属性存储数据的方法及装置
CN110045913A (zh) * 2018-01-15 2019-07-23 慧荣科技股份有限公司 垃圾收集的方法、记忆装置及其控制器和电子装置
CN117539692A (zh) * 2024-01-09 2024-02-09 武汉麓谷科技有限公司 一种zns固态硬盘数据集管理命令实现方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102434343B1 (ko) 2018-04-23 2022-08-22 에스케이하이닉스 주식회사 메모리 컨트롤러 및 이를 포함하는 메모리 시스템
KR20200125216A (ko) 2019-04-26 2020-11-04 에스케이하이닉스 주식회사 데이터 저장 장치, 이를 포함하는 전자 장치 및 데이터 저장 장치의 동작 방법
KR102545465B1 (ko) * 2021-11-17 2023-06-21 삼성전자주식회사 스토리지 컨트롤러 및 이를 포함하는 스토리지 장치
US12014772B2 (en) 2021-11-17 2024-06-18 Samsung Electronics Co., Ltd. Storage controller and storage device including the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080030756A (ko) * 2006-10-02 2008-04-07 삼성전자주식회사 플래시 메모리 파일 시스템을 효율적으로 관리하기 위한장치 드라이버 및 방법
KR20090117935A (ko) * 2008-03-01 2009-11-16 가부시끼가이샤 도시바 메모리 시스템
KR101023013B1 (ko) * 2009-03-19 2011-03-24 주식회사 에이텍 낸드 플래시 메모리 기반 파일시스템에서 데이터 저장방법
KR20120063734A (ko) * 2010-12-08 2012-06-18 삼성전자주식회사 비휘발성 메모리 장치, 이를 포함하는 장치들, 및 이의 동작 방법
KR20140065856A (ko) * 2012-11-22 2014-05-30 주식회사 이에프텍 비휘발성 메모리 시스템 및 이를 위한 맵핑 테이블 관리 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080030756A (ko) * 2006-10-02 2008-04-07 삼성전자주식회사 플래시 메모리 파일 시스템을 효율적으로 관리하기 위한장치 드라이버 및 방법
KR20090117935A (ko) * 2008-03-01 2009-11-16 가부시끼가이샤 도시바 메모리 시스템
KR101023013B1 (ko) * 2009-03-19 2011-03-24 주식회사 에이텍 낸드 플래시 메모리 기반 파일시스템에서 데이터 저장방법
KR20120063734A (ko) * 2010-12-08 2012-06-18 삼성전자주식회사 비휘발성 메모리 장치, 이를 포함하는 장치들, 및 이의 동작 방법
KR20140065856A (ko) * 2012-11-22 2014-05-30 주식회사 이에프텍 비휘발성 메모리 시스템 및 이를 위한 맵핑 테이블 관리 방법

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110045913A (zh) * 2018-01-15 2019-07-23 慧荣科技股份有限公司 垃圾收集的方法、记忆装置及其控制器和电子装置
CN110045913B (zh) * 2018-01-15 2022-05-13 慧荣科技股份有限公司 垃圾收集的方法、记忆装置及其控制器和电子装置
CN109558075A (zh) * 2018-10-29 2019-04-02 珠海妙存科技有限公司 一种利用数据冷热属性存储数据的方法及装置
CN117539692A (zh) * 2024-01-09 2024-02-09 武汉麓谷科技有限公司 一种zns固态硬盘数据集管理命令实现方法
CN117539692B (zh) * 2024-01-09 2024-03-15 武汉麓谷科技有限公司 一种zns固态硬盘数据集管理命令实现方法

Also Published As

Publication number Publication date
KR101718713B1 (ko) 2017-03-22
KR20160139864A (ko) 2016-12-07

Similar Documents

Publication Publication Date Title
WO2016195242A1 (fr) Système de mémoire non volatile
WO2014171618A1 (fr) Système de stockage et procédé de traitement de données d'écriture de système de stockage
KR102421075B1 (ko) 스트림 감지기를 포함하는 메모리 장치 및 그것의 동작 방법
KR100939145B1 (ko) 메모리 디바이스
US20120110239A1 (en) Causing Related Data to be Written Together to Non-Volatile, Solid State Memory
EP1920335B1 (fr) Recuperation de capacite de stockage de donnees dans des systemes a memoire flash
US7581057B2 (en) Memory system with management of memory blocks that directly store data files
US7917686B2 (en) Host system with direct data file interface configurability
US20060218347A1 (en) Memory card
WO2013171792A1 (fr) Appareil de commande de mémorisation et procédé de commande de mémorisation
US20140089564A1 (en) Method of data collection in a non-volatile memory
US20080155175A1 (en) Host System That Manages a LBA Interface With Flash Memory
KR20140099737A (ko) 존-기반 조각모음 방법 및 그것을 이용한 유저 장치
US20130238838A1 (en) Controller, storage device, and computer program product
KR20130075018A (ko) 플래시 메모리 파일 시스템에 적용 가능한 데이터 업데이트 장치 및 방법
KR102430198B1 (ko) 플래시 저장 장치의 어드레스 매핑 테이블 정리 방법
WO2013176376A1 (fr) Procédé et dispositif d'identification d'informations pour une mémoire flash parallèle au niveau puce
WO2007019197A2 (fr) Gestion de blocs memoire dans lesquels les fichiers de donnees sont directement stockes
US20230153236A1 (en) Data writing method and apparatus
CN110389712A (zh) 数据写入方法及其装置、固态硬盘和计算机可读存储介质
WO2017195928A1 (fr) Dispositif de stockage à mémoire flash et dispositif informatique comprenant ce dernier
CN110321057A (zh) 具有增强io性能确定性的缓存的存储设备
WO2012149815A1 (fr) Procédé et dispositif de gestion de cache de disque
TW201835766A (zh) 一般及垃圾回收的資料存取方法以及使用該方法的裝置
WO2014142427A1 (fr) Système de stockage et son procédé de transmission de données

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16803597

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16803597

Country of ref document: EP

Kind code of ref document: A1