WO2016189930A1

WO2016189930A1 - Dynamic characteristic test apparatus and dynamic characteristic test method

Info

Publication number: WO2016189930A1
Application number: PCT/JP2016/057893
Authority: WO
Inventors: 陽一坂本; 伸幸瀧田
Original assignee: 新東工業株式会社
Priority date: 2015-05-28
Filing date: 2016-03-14
Publication date: 2016-12-01
Also published as: JP2016223833A; CN107873084B; JP6477257B2; TWI676038B; TW201641947A; CN107873084A

Abstract

This dynamic characteristic test apparatus comprises: a power source; a reactor; a selection circuit that has first and second switching units electrically connected in series with each other, a third diode connected in parallel to the first switching unit, and a fourth diode connected in parallel to the second switching unit, and that is for selecting a first semiconductor or a second semiconductor as a subject for switching measurement; a third switching unit that switches between supplying current and stopping the supply from the power source to the first semiconductor or the second semiconductor; and a control device that controls switching between on states and off states of the switching units. A first connection part electrically connecting the first and second semiconductors with each other is electrically connected, via the reactor, to a second connection part electrically connecting the first and second switching units with each other. The control device turns on the second and third switching units when switching measurement of the first semiconductor is started, turns off the second switching unit in accordance with the end of the switching measurement of the first semiconductor, and then, turns off the third switching unit.

Description

Dynamic characteristic test apparatus and dynamic characteristic test method

This disclosure relates to a dynamic characteristic test apparatus and a dynamic characteristic test method.

Conventionally, as an inspection of power semiconductor modules such as an insulated gate bipolar transistor (IGBT: Insulated Gate Bipolar Transistor), a dynamic characteristic (AC: Alternative Current) test has been performed. For example, the test apparatus described in Patent Document 1 charges a capacitor with a high-voltage power supply, and performs switching measurement with the capacitor charged.

JP 2013-160572 A

In the conventional test apparatus, since the energy stored in the capacitor is consumed in the dynamic characteristic test circuit, it is necessary to charge the capacitor with a high-voltage power source every time switching measurement is performed. For this reason, power consumption increases every time the dynamic characteristic test is performed.

In this technical field, reduction of power consumption in dynamic characteristic tests is desired.

A dynamic characteristic test apparatus according to an aspect of the present disclosure includes a first semiconductor and a second semiconductor that are electrically connected in series, a first diode that is electrically connected in parallel to the first semiconductor, and a second semiconductor. And a second diode electrically connected in parallel to each other, a dynamic characteristic test apparatus for performing a dynamic characteristic test of a device under test. The dynamic characteristic test apparatus includes a chargeable power supply for supplying a current for dynamic characteristic test, a reactor serving as a load of the first semiconductor and the second semiconductor, and a first switch unit electrically connected in series. And the second switch unit, the third diode electrically connected in parallel to the first switch unit, and the fourth diode electrically connected in parallel to the second switch unit. A selection circuit for selecting one of the two semiconductors as a target for switching measurement, a third switch unit for switching supply and interruption of current from the power source to the first semiconductor or the second semiconductor, a first switch unit, And a control device that performs switching control of an on state and an off state of the second switch unit and the third switch unit. The first connection part that electrically connects the first semiconductor and the second semiconductor and the second connection part that electrically connects the first switch part and the second switch part are electrically connected via a reactor. . The positive terminal of the power supply is electrically connected to the cathode of the first diode and the cathode of the third diode, and the negative terminal of the power supply is electrically connected to the anode of the second diode and the anode of the fourth diode. The control device sets the second switch unit and the third switch unit to the on state when starting the switching measurement of the first semiconductor, and sets the second switch unit to the off state in response to the completion of the switching measurement of the first semiconductor. After that, the third switch unit is turned off.

According to this dynamic characteristic test apparatus, the second switch unit and the third switch unit are turned on when starting the switching measurement of the first semiconductor, and the second switching is performed in response to the end of the switching measurement of the first semiconductor. After the switch unit is turned off, the third switch unit is turned off. During the switching measurement of the first semiconductor, the current supplied from the power source to the first semiconductor is directed from the first connection portion of the first semiconductor and the second semiconductor toward the second connection portion of the first switch portion and the second switch portion. At the time when the first semiconductor switching measurement is completed after flowing through the reactor, energy is accumulated in the reactor. Therefore, the second switch unit is turned off in response to the completion of the switching measurement of the first semiconductor, so that the second diode, the reactor, the third diode, and the third switch unit are connected from the negative terminal of the power source. A current path is formed to return to the positive terminal of the power source, and energy stored in the reactor flows as a current to the positive terminal of the power source. Thereby, a part of energy (electric power) of the power source used for the switching measurement of the first semiconductor can be recovered. As a result, it is possible to reduce the amount of power used in the dynamic characteristic test. In this specification, “electrically connected” means not only the case where two elements to be connected are directly connected, but also other elements that can be electrically connected between the two elements to be connected. This includes cases where elements are connected. Other elements may include a switch unit such as a relay and a transistor.

The control device sets the first switch unit and the third switch unit to the on state when starting the switching measurement of the second semiconductor, and sets the first switch unit to the off state in response to the completion of the switching measurement of the second semiconductor. After that, the third switch unit may be turned off. In this case, at the time of switching measurement of the second semiconductor, the current supplied from the power source to the second semiconductor is changed from the second connection portion of the first switch portion and the second switch portion to the first connection portion of the first semiconductor and the second semiconductor. When the second semiconductor switching measurement is completed, the energy is accumulated in the reactor. For this reason, the fourth switch, the reactor, the first diode, and the third switch unit are connected from the negative terminal of the power source by turning off the first switch unit in response to the completion of the switching measurement of the second semiconductor. A current path is formed to return to the positive terminal of the power source, and energy stored in the reactor flows as a current to the positive terminal of the power source. Thereby, a part of energy (electric power) of the power source used for the switching measurement of the second semiconductor can be recovered. As a result, it is possible to further reduce power consumption in the dynamic characteristic test.

The first switch unit and the second switch unit may be transistors. In this case, the ON state and the OFF state of the first switch unit and the second switch unit can be switched at high speed, and the accuracy of switching measurement can be improved.

A dynamic characteristic test method according to still another aspect of the present disclosure includes a first semiconductor and a second semiconductor electrically connected in series, a first diode electrically connected in parallel to the first semiconductor, 2 is a dynamic characteristic test method for performing a dynamic characteristic test of a device under test including a second diode electrically connected in parallel to a semiconductor. The dynamic characteristic test method includes a first switch unit and a second switch unit that are electrically connected in series, a third diode that is electrically connected in parallel to the first switch unit, and an electrical circuit that is connected to the second switch unit. The first switch is selected for switching measurement by turning on the second switch of the selection circuit having a fourth diode connected in parallel and electrically connected in series to a rechargeable power source A step of supplying a current to the first semiconductor to perform a switching measurement of the first semiconductor by turning on the third switch portion that has been turned on, and a second switch according to the end of the switching measurement of the first semiconductor The step of recovering the energy used in the switching measurement of the first semiconductor and the energy used in the switching measurement of the first semiconductor by turning the part off. After recovering the Energy, comprising the steps of: an off state of the third switch unit. A first connection part that electrically connects the first semiconductor and the second semiconductor and a second connection part that electrically connects the first switch part and the second switch part are electrically connected via a reactor. The positive terminal of the power supply is electrically connected to the cathode of the first diode and the cathode of the third diode, and the negative terminal of the power supply is electrically connected to the anode of the second diode and the anode of the fourth diode.

According to this dynamic characteristic test method, the second switch unit and the third switch unit are turned on when starting the switching measurement of the first semiconductor, and the second switching is performed in response to the completion of the switching measurement of the first semiconductor. After the switch unit is turned off, the third switch unit is turned off. During the switching measurement of the first semiconductor, the current supplied from the power source to the first semiconductor is directed from the first connection portion of the first semiconductor and the second semiconductor toward the second connection portion of the first switch portion and the second switch portion. At the time when the first semiconductor switching measurement is completed after flowing through the reactor, energy is accumulated in the reactor. Therefore, the second switch unit is turned off in response to the completion of the switching measurement of the first semiconductor, so that the second diode, the reactor, the third diode, and the third switch unit are connected from the negative terminal of the power source. A current path is formed to return to the positive terminal of the power source, and energy stored in the reactor flows as a current to the positive terminal of the power source. Thereby, a part of energy (electric power) of the power source used for the switching measurement of the first semiconductor can be recovered. As a result, it is possible to reduce the amount of power used in the dynamic characteristic test.

According to still another aspect of the present disclosure, the dynamic characteristic test method selects a second semiconductor as an object of switching measurement by turning on a first switch unit of a selection circuit, and sets a third switch unit to an on state. Thus, by supplying a current to the second semiconductor and performing the switching measurement of the second semiconductor, and turning off the first switch unit in response to the end of the switching measurement of the second semiconductor, A step of recovering energy used in the switching measurement of the second semiconductor, and a step of turning off the third switch unit after the step of recovering the energy used in the switching measurement of the second semiconductor. Good. In this case, at the time of switching measurement of the second semiconductor, the current supplied from the power source to the second semiconductor is changed from the second connection portion of the first switch portion and the second switch portion to the first connection portion of the first semiconductor and the second semiconductor. When the second semiconductor switching measurement is completed, the energy is accumulated in the reactor. For this reason, the fourth switch, the reactor, the first diode, and the third switch unit are connected from the negative terminal of the power source by turning off the first switch unit in response to the completion of the switching measurement of the second semiconductor. A current path is formed to return to the positive terminal of the power source, and energy stored in the reactor flows as a current to the positive terminal of the power source. Thereby, a part of energy (electric power) of the power source used for the switching measurement of the second semiconductor can be recovered. As a result, it is possible to further reduce power consumption in the dynamic characteristic test.

According to the present disclosure, it is possible to reduce power consumption in the dynamic characteristic test.

1 is a circuit diagram schematically showing a dynamic characteristic test apparatus according to an embodiment. It is a timing chart of the N side switching measurement in the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path at the time of switch-on in the N side switching measurement of FIG. It is a figure which shows the electric current path at the time of switch-off in the N side switching measurement of FIG. It is a figure which shows the electric current path | route at the time of the energy recovery in the N side switching measurement of FIG. It is a timing chart of the P side switching measurement in the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path at the time of switch-on in the P side switching measurement of FIG. It is a figure which shows the electric current path at the time of switch-off in the P side switching measurement of FIG. It is a figure which shows the electric current path | route at the time of the energy recovery in the P side switching measurement of FIG. It is a timing chart of the N side switching measurement of a comparative example. It is a timing chart of the P side switching measurement of a comparative example. It is a timing chart of the N side switching measurement including the overcurrent prevention process in the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path | route at the time of the overcurrent prevention process in the N side switching measurement of FIG. It is a timing chart of the P side switching measurement including the overcurrent prevention process in the dynamic characteristic test apparatus of FIG. It is a figure which shows the current pathway at the time of the overcurrent prevention process in the P side switching measurement of FIG. It is a timing chart of the N side switching measurement including the overcurrent prevention process using the high-speed interruption circuit in the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path | route at the time of the overcurrent prevention process using the high-speed interruption circuit in the N side switching measurement of FIG. It is a timing chart of the P side switching measurement including the overcurrent prevention process using the high-speed interruption circuit in the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path | route at the time of the overcurrent prevention process using the high-speed interruption circuit in the P side switching measurement of FIG. It is a timing chart of the N side short circuit tolerance measurement in the dynamic characteristic test apparatus of FIG. It is a timing chart of the P side short circuit tolerance measurement in the dynamic characteristic test apparatus of FIG. It is a circuit diagram which shows the modification of the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path | route at the time of the overcurrent prevention process of the N side switching measurement in the dynamic characteristic test apparatus of FIG. It is a figure which shows the electric current path | route at the time of the overcurrent prevention process of the P side switching measurement in the dynamic characteristic test apparatus of FIG. It is a figure for comparing the overcurrent prevention process in the dynamic characteristic test apparatus of FIG. 1 with the overcurrent prevention process in the dynamic characteristic test apparatus of FIG. It is a circuit diagram which shows another modification of the dynamic characteristic test apparatus of FIG.

Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant descriptions are omitted.

FIG. 1 is a circuit diagram schematically showing a dynamic characteristic test apparatus according to an embodiment. As shown in FIG. 1, the dynamic characteristic test apparatus 1 is an apparatus that performs a dynamic characteristic test of the DUT 50, and includes a test circuit 10, an overcurrent detection circuit 20, and a control device 30. The dynamic characteristic test apparatus 1 performs switching measurement, short circuit tolerance measurement (SC measurement), etc. as a dynamic characteristic test. In the switching measurement, IGBT characteristics and diode characteristics can be measured. The IGBT characteristics include rise time, fall time, on delay time, off delay time, off surge voltage, gate charge, on loss, off loss, and the like. The diode characteristics include reverse recovery time, reverse recovery current, and reverse recovery energy.

The DUT 50 is a device under test of the dynamic characteristic test apparatus 1 and is a 2-in-1 type power semiconductor module including two semiconductor elements electrically connected in series. Specifically, the DUT 50 includes transistors Qdp and Qdn (first semiconductor and second semiconductor) and diodes Ddp and Ddn (first diode and second diode). The transistors Qdp and Qdn are IGBTs. The emitter of the transistor Qdp and the collector of the transistor Qdn are electrically connected to each other. The cathodes of the diodes Ddp and Ddn are electrically connected to the collectors of the transistors Qdp and Qdn, respectively, and the anodes of the diodes Ddp and Ddn are electrically connected to the emitters of the transistors Qdp and Qdn, respectively. That is, the transistors Qdp and Qdn are electrically connected in series in the same direction, the diode Ddp is a freewheeling diode electrically connected in parallel to the transistor Qdp, and the diode Ddn is electrically parallel to the transistor Qdn. It is a connected freewheeling diode. The DUT 50 has a P terminal, an O terminal, and an N terminal. The P terminal is electrically connected to the collector of the transistor Qdp and the cathode of the diode Ddp, the N terminal is electrically connected to the emitter of the transistor Qdn and the anode of the diode Ddn, and the O terminal is the emitter of the transistor Qdp and the collector of the transistor Qdn. Are electrically connected to the anode of the diode Ddp and the cathode of the diode Ddn. That is, the O terminal is electrically connected to the connection portion Cd (first connection portion) that electrically connects the transistors Qdp and Qdn. For example, the DUT 50 can be used for a one-phase inverter circuit, the transistor Qdp can be used for the upper arm, and the transistor Qdn can be used for the lower arm.

The test circuit 10 is a circuit for performing a dynamic characteristic test of the DUT 50. The test circuit 10 includes a power supply capacitor 11, a main switch unit 12, a selection circuit 13, an overcurrent prevention circuit 14, a high-speed cutoff circuit 15, a selection circuit 16, and a reactor L. The power supply capacitor 11 is a power supply that supplies a current for a dynamic characteristic test to the test circuit 10. For example, a film capacitor having excellent frequency characteristics is used as the power supply capacitor 11. When the energy (charge) stored in the power supply capacitor 11 decreases, the power supply capacitor 11 is connected to a high voltage power supply (not shown) and is charged by the high voltage power supply.

The main switch unit 12 is a circuit that switches between supply and interruption of current from the power supply capacitor 11 to the DUT 50 (transistor Qdp or transistor Qdn). The main switch unit 12 includes a transistor Qp (third switch unit) and a diode Dp. The transistor Qp is an IGBT. The cathode of the diode Dp is electrically connected to the collector of the transistor Qp, and the anode of the diode Dp is electrically connected to the emitter of the transistor Qp. That is, the diode Dp is a freewheeling diode electrically connected in parallel to the transistor Qp. The collector of the transistor Qp is electrically connected to the positive terminal (positive terminal) of the power supply capacitor 11, and the emitter of the transistor Qp is connected to the collector of the transistor Qhp, the cathode of the diode Dhp, one end of the switch SWp, and the P terminal of the DUT 50 described later. Electrically connected.

The selection circuit 13 is a circuit for selecting one of the transistors Qdp and Qdn included in the DUT 50 as a switching measurement target. The selection circuit 13 includes transistors Qhp and Qhn (first switch unit and second switch unit) and diodes Dhp and Dhn (third diode and fourth diode). Transistors Qhp and Qhn are IGBTs. The cathodes of the diodes Dhp and Dhn are electrically connected to the collectors of the transistors Qhp and Qhn, respectively, and the anodes of the diodes Dhp and Dhn are electrically connected to the emitters of the transistors Qhp and Qhn, respectively. That is, the diode Dhp is a free-wheeling diode electrically connected in parallel to the transistor Qhp, and the diode Dhn is a free-wheeling diode electrically connected in parallel to the transistor Qhn. The emitter of the transistor Qhp and the collector of the transistor Qhn are electrically connected to each other, and are electrically connected to the collector of a transistor Qcf described later and the cathode of a diode Dcf. That is, the transistors Qhp and Qhn are electrically connected in series in the same direction, and the connection portion Cs (second connection portion) for electrically connecting the transistors Qhp and Qhn is connected via the high-speed cutoff circuit 15 and the reactor L. It is electrically connected to the O terminal of the DUT 50. The collector of the transistor Qhp is electrically connected to the emitter of the transistor Qp, the anode of the diode Dp, one end of the switch SWp, and the P terminal of the DUT 50. The emitter of the transistor Qhn is electrically connected to the negative terminal of the power supply capacitor 11, the other end of the switch SWn, and the N terminal of the DUT 50.

The overcurrent prevention circuit 14 is a circuit for consuming the energy accumulated in the reactor L. The overcurrent prevention circuit 14 is provided electrically in parallel with the reactor L. The overcurrent prevention circuit 14 includes transistors Qif and Qir and diodes Dif and Dir. Transistors Qif and Qir are IGBTs. The cathodes of the diodes Dif and Dir are electrically connected to the collectors of the transistors Qif and Qir, respectively, and the anodes of the diodes Dif and Dir are electrically connected to the emitters of the transistors Qif and Qir, respectively. That is, the diode Dif is a free-wheeling diode electrically connected in parallel to the transistor Qif, and the diode Dir is a free-wheeling diode electrically connected in parallel to the transistor Qir. The emitter of the transistor Qif and the emitter of the transistor Qir are electrically connected to each other. That is, the transistors Qif and Qir are electrically connected in series in opposite directions. The collector of the transistor Qif is electrically connected to the collector of a transistor Qcr, which will be described later, the cathode of the diode Dcr, and one end of the reactor L. The collector of the transistor Qir is electrically connected to the other end of the reactor L, the other end of the switch SWp, one end of the switch SWn, and the O terminal of the DUT 50.

The high-speed interruption circuit 15 is a circuit for causing the overcurrent prevention circuit 14 to consume the energy stored in the reactor L at high speed. The high-speed cutoff circuit 15 is provided in series with the reactor L. High speed cutoff circuit 15 includes transistors Qcf and Qcr and diodes Dcf and Dcr. Transistors Qcf and Qcr are IGBTs. The cathodes of the diodes Dcf and Dcr are electrically connected to the collectors of the transistors Qcf and Qcr, respectively, and the anodes of the diodes Dcf and Dcr are electrically connected to the emitters of the transistors Qcf and Qcr, respectively. That is, the diode Dcf is a free-wheeling diode electrically connected in parallel to the transistor Qcf, and the diode Dcr is a free-wheeling diode electrically connected in parallel to the transistor Qcr. The emitter of the transistor Qcf and the emitter of the transistor Qcr are electrically connected to each other. That is, the transistors Qcf and Qcr are electrically connected in series in opposite directions. The collector of the transistor Qcf is electrically connected to the emitter of the transistor Qhp, the collector of the transistor Qhn, the anode of the diode Dhp, and the cathode of the diode Dhn. The collector of the transistor Qcr is electrically connected to the collector of the transistor Qif, the cathode of the diode Dif, and one end of the reactor L.

The selection circuit 16 is a circuit for selecting one of the transistors Qdp and Qdn included in the DUT 50 as an object of short-circuit tolerance measurement. The selection circuit 16 includes switches SWp and SWn. The switches SWp and SWn are relays. One end of the switch SWp is electrically connected to the emitter of the transistor Qp, the anode of the diode Dp, the collector of the transistor Qhp, the cathode of the diode Dhp, and the P terminal of the DUT 50. The other end of the switch SWp and one end of the switch SWn are electrically connected to each other, and are electrically connected to the other end of the reactor L, the collector of the transistor Qir, the cathode of the diode Dir, and the O terminal of the DUT 50. . The other end of the switch SWn is electrically connected to the negative terminal of the power supply capacitor 11, the emitter of the transistor Qhn, the anode of the diode Dhn, and the N terminal of the DUT 50.

Reactor L is a dynamic characteristic test load. That is, the reactor L becomes a load of the transistors Qdp and Qdn. One end of the reactor L is electrically connected to the collector of the transistor Qcr and the cathode of the diode Dcr, and the other end of the reactor L is electrically connected to the O terminal of the DUT 50.

The overcurrent detection circuit 20 is a circuit that detects an overcurrent flowing through the test circuit 10 and the DUT 50. The overcurrent detection circuit 20 includes a current sensor 21, a current sensor 22, a comparator 23, and a comparator 24.

The current sensor 21 is a sensor that detects the current value of the current flowing through the test circuit 10 and the DUT 50 during the N-side switching measurement. The current sensor 21 is provided in the vicinity of the N terminal of the wiring connecting the N terminal of the DUT 50 and the negative terminal of the power supply capacitor 11. The current sensor 21 outputs the detected current value to the comparator 23. The current sensor 22 is a sensor that detects a current value of a current flowing through the test circuit 10 and the DUT 50 during the P-side switching measurement. The current sensor 22 is provided in the vicinity of the P terminal of the wiring connecting the P terminal of the DUT 50 and the emitter of the transistor Qp. The current sensor 22 outputs the detected current value to the comparator 24.

The comparator 23 compares the current value detected by the current sensor 21 with the N-side overcurrent threshold value Ref_N and outputs the comparison result to the control device 30. The overcurrent threshold value Ref_N is a predetermined value for detecting an overcurrent. In the comparator 23, the N-side overcurrent threshold value Ref_N is input to the + terminal, and the current value detected by the current sensor 21 is input to the − terminal. In this case, when the current value detected by the current sensor 21 is equal to or less than the overcurrent threshold Ref_N, the comparator 23 outputs a high-level output signal to the control device 30, and the current value detected by the current sensor 21 is excessive. When it is larger than the current threshold value Ref_N, a low-level output signal is output to the control device 30.

The comparator 24 compares the current value detected by the current sensor 22 with the P-side overcurrent threshold value Ref_P, and outputs the comparison result to the control device 30. The overcurrent threshold Ref_P is a predetermined value for detecting an overcurrent. In the comparator 24, the P-side overcurrent threshold value Ref_P is input to the + terminal, and the current value detected by the current sensor 22 is input to the − terminal. In this case, when the current value detected by the current sensor 22 is equal to or less than the overcurrent threshold value Ref_P, the comparator 24 outputs a high-level output signal to the control device 30, and the current value detected by the current sensor 22 is excessive. When it is larger than the current threshold value Ref_P, a low level output signal is output to the control device 30.

The control device 30 performs switching control for switching the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, Qdn and the switches SWp, SWn between the on state (conducting state) and the off state (blocking state). The controller to perform. The control device 30 outputs the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, Sqdn to the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, Qdn, respectively. Each transistor is switched between an on state and an off state. The control device 30 switches each switch between an on state and an off state by outputting relay signals Sswp and Sswn to the switches SWp and SWn, respectively. The switching control by the control device 30 will be described in detail in each of the following measurements. Note that the on state of the transistor means that the collector and the emitter are electrically connected, and the off state of the transistor means that the collector and the emitter are electrically disconnected. Further, when the transistor is an IGBT, the ON state and the OFF state are switched by the gate-emitter voltage. In the following description, for convenience, the transistor is turned on when a high level gate signal is supplied to the transistor, and the transistor is turned off when a low level gate signal is supplied to the transistor. It is said.

(Switching measurement)
Next, switching measurement using the dynamic characteristic test apparatus 1 will be described. First, switching measurement of the transistor Qdn (sometimes referred to as “N-side switching measurement”) will be described. FIG. 2 is a timing chart of N-side switching measurement in the dynamic characteristic test apparatus 1. FIG. 3 is a diagram illustrating a current path when the switch is turned on in the N-side switching measurement. FIG. 4 is a diagram illustrating a current path when the switch is off in the N-side switching measurement. FIG. 5 is a diagram illustrating a current path during energy recovery in N-side switching measurement.

In the switching measurement, the relay signals Sswp and Sswn are always set to a low level, and the switches SWp and SWn are always in an off state. In the following description, the current supplied from the power supply capacitor 11 is Ic, and the currents flowing through the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are the currents Iqp, Iqhp, Iqhn, Iqif, Iqir, Iqcf, Iqcr, Iqdp, Iqdn, and the current flowing through the reactor L will be described as current IL. The current flowing through each transistor is a positive value when flowing from the collector to the emitter, and is a negative value when flowing from the emitter to the collector or when flowing from the anode to the cathode (forward direction) of the reflux diode. The current flowing through the reactor L is a positive value when flowing toward the O terminal of the DUT 50, and is a negative value when flowing in the opposite direction. Further, although each step is illustrated with the same length, the time of each step does not need to be the same, and can be adjusted as needed. In each step, the switching control timing of each transistor may be the same or different.

As shown in FIG. 2, in step ST11, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to be output at a low level. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all off, and no current flows through each transistor. The energy Ec (charge) of the power supply capacitor 11 is in a fully charged state, for example.

Subsequently, in step ST12, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr, Sqdn to the high level, and sets the other gate signals to the low level and outputs them. Thereby, the transistors Qp, Qhp, Qcf, Qcr, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 3, the current path returns from the positive terminal of the power supply capacitor 11 to the negative terminal of the power supply capacitor 11 through the transistor Qp, transistor Qhp, transistor Qcf, transistor Qcr, reactor L, and transistor Qdn in this order. Pn1 is formed, and the current supplied from the power supply capacitor 11 flows through the current path Pn1. In this state, the current amounts of the currents Ic, Iqp, Iqhp, Iqcf, −Iqcr, IL, and Iqdn increase with the passage of time, while the energy Ec of the power supply capacitor 11 decreases with the passage of time. Further, the currents Iqhn, Iqif, Iqir, and Iqdp do not flow through the transistors Qhn, Qif, Qir, and Qdp. That is, in step ST12, the control device 30 turns on the transistor Qhp, thereby making the transistor Qdn the object of switching measurement, and turning on the transistors Qp, Qcf, and Qcr, thereby turning the transistor Qdn from the power supply capacitor 11 into the transistor Qdn. Is supplying current.

Subsequently, in step ST13, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr to a high level, and sets the other gate signals to a low level and outputs them. That is, only the gate signal Sqdn is changed from the high level to the low level from step ST12, and the other gate signals are not changed. Thereby, the transistors Qp, Qhp, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 4, a current path Pn2 that sequentially cycles through the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, and the diode Ddp is formed, and the current that was flowing in the current path Pn1 immediately before step ST13 Flows in the current path Pn2. For this reason, the current amounts of the currents Ic, Iqp, and Iqdn are 0, and no current is supplied from the power supply capacitor 11, so that the energy Ec does not change. At this time, energy is consumed by the resistance components of the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, and the diode Ddp, so that the current Iqhp, Iqcf, −Iqcr, IL, and the current amount −Iqdp flowing through the diode Ddp Is gradually decreased with the passage of time from the amount of current flowing in the current path Pn1 immediately before step ST13. Further, the current amounts of the currents Iqhn, Iqif, and Iqir remain zero.

Subsequently, in step ST14, as in step ST12, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr, Sqdn to a high level and sets the other gate signals to a low level and outputs them. . That is, only the gate signal Sqdn is changed from the low level to the high level from step ST13, and the other gate signals are not changed. As a result, a current path Pn1 is formed, and the current flowing in the current path Pn2 immediately before step ST14 and the current supplied from the power supply capacitor 11 flow in the current path Pn1. At this time, the current amounts of the currents Ic, Iqp, Iqhp, Iqcf, −Iqcr, IL, and Iqdn increase from the current amount of the current that was flowing in the current path Pn2 immediately before step ST14 while increasing with time. The energy Ec of the power supply capacitor 11 further decreases with time. Further, the currents Iqhn, Iqif, Iqir, and Iqdp do not flow through the transistors Qhn, Qif, Qir, and Qdp.

Subsequently, in step ST15, as in step ST13, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr to a high level, and sets the other gate signals to a low level and outputs them. That is, only the gate signal Sqdn is changed from the high level to the low level from step ST14, and the other gate signals are not changed. As a result, a current path Pn2 is formed, and the current that was flowing in the current path Pn1 immediately before step ST15 flows in the current path Pn2. At this time, as in step ST13, the current amounts of the currents Ic, Iqp, and Iqdn become 0, and the current amounts of the currents Iqhp, Iqcf, -Iqcr, IL, and -Iqdp gradually decrease with time. Further, the current amounts of the currents Iqhn, Iqif, and Iqir remain zero. In addition, since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this point, the waveform required for N-side switching measurement is obtained. That is, a waveform necessary for the switching measurement of the transistor Qdn can be obtained by turning off the transistor Qdn in steps ST12 to ST15. In this sense, the processing up to turning off the transistor Qdn in steps ST12 to ST15 can be said to be a switching measurement of the transistor Qdn in a narrow sense.

Thereafter, the control device 30 changes the gate signal Sqhp from the high level to the low level. Thereby, the transistors Qp, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 5, the current returns from the negative terminal of the power supply capacitor 11 to the positive terminal of the power supply capacitor 11 through the diode Dhn, the transistor Qcf, the transistor Qcr, the reactor L, the diode Ddp, and the transistor Qp in this order. The path Pn3 is formed, and the current that has been flowing through the current path Pn2 immediately before switching the gate signal Sqhp to the low level flows into the current path Pn3. For this reason, the current amount of the current Iqhp becomes zero. Since the current path Pn3 goes from the negative terminal to the positive terminal of the power supply capacitor 11, the power supply capacitor 11 is charged, and the energy Ec increases with time, while the current −Iqhn (current flowing through the diode Dhn), The amount of current Iqcf, −Iqcr, IL, −Iqdp, −Iqp, −Ic (current flowing from the negative terminal to the positive terminal of the power supply capacitor 11) decreases with time. Further, the current amounts of the currents Iqdn, Iqif, and Iqir remain zero.

Subsequently, in step ST16, the same state as in step ST15 is continued, the amount of current flowing through the current path Pn3 becomes 0, and the energy Ec of the power supply capacitor 11 is almost restored to the fully charged state.

Subsequently, in step ST17, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to all low levels and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all turned off, and no current flows through each transistor. In this way, the N-side switching measurement ends. Note that a detection circuit or the like (not shown) detects that the amount of current flowing through the current path Pn3 is equal to or less than a predetermined threshold, and the control device 30 flows through the current path Pn3 by an output signal from the detection circuit. It may be detected that the current amount of the current is almost zero (end of the energy recovery process). The predetermined threshold is set to 0 or a value slightly larger than 0, for example. And control device 30 may perform processing of Step ST17 according to having detected the end of energy recovery processing.

As described above, when starting the N-side switching measurement, the control device 30 turns on the transistors Qp, Qhp, Qcf, and Qcr, and turns on the transistor Qhp according to the end of waveform acquisition in the N-side switching measurement. By using the off state, the energy used in the N-side switching measurement is recovered. Then, after recovering the energy used in the N-side switching measurement, control device 30 turns off transistors Qp, Qcf, and Qcr. Therefore, since the energy Ec is almost fully charged at the end of the N-side switching measurement, it is not necessary to charge the power supply capacitor 11 with a high-voltage power supply for the next measurement.

Next, switching measurement of the transistor Qdp (sometimes referred to as “P-side switching measurement”) will be described. FIG. 6 is a timing chart of P-side switching measurement in the dynamic characteristic test apparatus 1. FIG. 7 is a diagram illustrating a current path when the switch is turned on in the P-side switching measurement. FIG. 8 is a diagram illustrating a current path when the switch is turned off in the P-side switching measurement. FIG. 9 is a diagram illustrating a current path during energy recovery in the P-side switching measurement.

As shown in FIG. 6, step ST21 is the same as step ST11 of FIG. Subsequently, in step ST22, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr, Sqdp to the high level, and sets the other gate signals to the low level and outputs them. Thereby, the transistors Qp, Qhn, Qcf, Qcr, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 7, the current path returns from the positive terminal of the power supply capacitor 11 to the negative terminal of the power supply capacitor 11 through the transistor Qp, transistor Qdp, reactor L, transistor Qcr, transistor Qcf, and transistor Qhn in this order. Pp1 is formed, and the current supplied from the power supply capacitor 11 flows through the current path Pp1. In this state, the current amounts of the currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn increase with the passage of time, while the energy Ec of the power supply capacitor 11 decreases with the passage of time. Further, currents Iqhp, Iqif, Iqir, and Iqdn do not flow through transistors Qhp, Qif, Qir, and Qdn. That is, in step ST22, the control device 30 turns on the transistor Qhn to set the transistor Qdp to be a switching measurement target, and turns on the transistors Qp, Qcf, and Qcr to turn on the transistor Qdp from the power supply capacitor 11. Is supplying current.

Subsequently, in step ST23, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr to a high level, and sets the other gate signals to a low level and outputs them. That is, only the gate signal Sqdp is changed from the high level to the low level from step ST22, and the other gate signals are not changed. Thereby, the transistors Qp, Qhn, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 8, a current path Pp2 that circulates through the transistor Qhn, the diode Ddn, the reactor L, the transistor Qcr, and the transistor Qcf in this order is formed, and the current that was flowing in the current path Pp1 immediately before step ST23 Flows in the current path Pp2. For this reason, the current amounts of the currents Ic, Iqp, and Iqdp are 0, and no current is supplied from the power supply capacitor 11, so the energy Ec does not change. At this time, energy is consumed by the resistance components of the transistor Qhn, the diode Ddn, the reactor L, the transistor Qcr, and the transistor Qcf, so that the currents Iqhn, -Iqdn (currents flowing through the diode Ddn), -IL, Iqcr, -Iqcf Is gradually decreased with the passage of time from the amount of current flowing in the current path Pp1 immediately before step ST23. Further, the current amounts of the currents Iqhp, Iqif, and Iqir remain zero.

Subsequently, in step ST24, as in step ST22, control device 30 sets gate signals Sqp, Sqhn, Sqcf, Sqcr, and Sqdp to a high level, and sets other gate signals to a low level and outputs them. . That is, only the gate signal Sqdp is changed from the low level to the high level from step ST23, and the other gate signals are not changed. As a result, a current path Pp1 is formed, and the current that was flowing in the current path Pp2 immediately before step ST24 and the current that is supplied from the power supply capacitor 11 flow in the current path Pp1. At this time, the current amounts of the currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn are further increased with the passage of time from the current amount of the current flowing in the current path Pp2 immediately before step ST24. The energy Ec of the power supply capacitor 11 further decreases with time. Further, currents Iqhp, Iqif, Iqir, and Iqdn do not flow through transistors Qhp, Qif, Qir, and Qdn.

Subsequently, in step ST25, as in step ST23, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr to a high level, and sets the other gate signals to a low level and outputs them. That is, only the gate signal Sqdp is changed from the high level to the low level from step ST24, and the other gate signals are not changed. As a result, a current path Pp2 is formed, and the current that has flowed in the current path Pp1 immediately before step ST25 flows in the current path Pp2. At this time, as in step ST23, the current amounts of the currents Ic, Iqp, and Iqdp become 0, and the current amounts of the currents Iqhn, -Iqdn, -IL, Iqcr, and -Iqcf gradually decrease with time. Further, the current amounts of the currents Iqhp, Iqif, and Iqir remain zero. In addition, since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this point, the waveform necessary for P-side switching measurement is obtained. That is, a waveform necessary for the switching measurement of the transistor Qdp can be obtained by turning off the transistor Qdp in steps ST22 to ST25. In this sense, the processing up to turning off the transistor Qdp in steps ST22 to ST25 can be said to be a switching measurement of the transistor Qdp in a narrow sense.

Thereafter, the control device 30 changes the gate signal Sqhn from the high level to the low level. Thereby, the transistors Qp, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 9, the current returns from the negative terminal of the power supply capacitor 11 to the positive terminal of the power supply capacitor 11 through the diode Ddn, the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qp in this order. The path Pp3 is formed, and the current that has flowed in the current path Pp2 immediately before switching the gate signal Sqhn to the low level flows in the current path Pp3. For this reason, the current amount of the current Iqhn becomes zero. Since the current path Pp3 goes from the − terminal of the power supply capacitor 11 to the + terminal, the power supply capacitor 11 is charged, and the energy Ec increases with time, while the current −Iqdn, −IL, Iqcr, −Iqcf. , −Iqhp (current flowing through the diode Dhp), −Iqp, −Ic decreases in amount of time. Further, the current amounts of the currents Iqdp, Iqif, and Iqir remain zero.

Subsequently, in step ST26, the same state as in step ST25 is continued, the amount of current flowing through the current path Pp3 becomes zero, and the energy Ec of the power supply capacitor 11 is almost recovered to the fully charged state.

Subsequently, in step ST27, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to all low levels and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all turned off, and no current flows through each transistor. In this way, the P-side switching measurement is completed. Note that a detection circuit (not shown) detects that the amount of current flowing through the current path Pp3 is equal to or less than a predetermined threshold, and the control device 30 flows through the current path Pp3 by an output signal from the detection circuit. It may be detected that the current amount of the current is almost zero (end of the energy recovery process). The predetermined threshold is set to 0 or a value slightly larger than 0, for example. And control device 30 may perform processing of Step ST27 according to having detected the end of energy recovery processing.

As described above, when starting the P-side switching measurement, the control device 30 turns on the transistors Qp, Qhn, Qcf, and Qcr, and sets the transistor Qhn in response to the completion of waveform acquisition in the P-side switching measurement. By using the off state, the energy used in the P-side switching measurement is recovered. Then, after recovering the energy used in the P-side switching measurement, control device 30 turns off transistors Qp, Qcf, and Qcr. Accordingly, since the energy Ec is almost fully charged at the end of the P-side switching measurement, it is not necessary to charge the power supply capacitor 11 with a high-voltage power supply for the next measurement.

Next, a comparative example of switching measurement using the dynamic characteristic test apparatus 1 will be described. FIG. 10 is a timing chart of the N-side switching measurement of the comparative example. FIG. 11 is a timing chart of the P-side switching measurement of the comparative example. As shown in FIG. 10, the N-side switching measurement of the comparative example is different from the N-side switching measurement of FIG. 2 at the timing of switching the gate signal Sqhp from the high level to the low level. Specifically, in the N-side switching measurement of the comparative example, in step ST115 and step ST116, the control device 30 maintains the gate signal Sqhp at a high level. Therefore, the amount of current flowing through the current path Pn2 (currents Iqhp, Iqcf, −Iqcr, IL, and −Iqdp) gradually decreases with time and eventually becomes 0, but the power supply capacitor 11 is not charged. Therefore, before performing the next measurement, the power supply capacitor 11 needs to be charged by a high voltage power supply.

Similarly, as shown in FIG. 11, the P-side switching measurement of the comparative example is different from the P-side switching measurement of FIG. 6 at the timing of switching the gate signal Sqhn from the high level to the low level. Specifically, in the P-side switching measurement of the comparative example, in step ST125 and step ST126, control device 30 maintains gate signal Sqhn at a high level. For this reason, the amount of current flowing in the current path Pp2 (currents Iqhn, -Iqdn, -IL, Iqcr, -Iqcf) gradually decreases with time and eventually becomes 0, but the power supply capacitor 11 is not charged. Therefore, before performing the next measurement, the power supply capacitor 11 needs to be charged by a high voltage power supply.

Next, the overcurrent prevention of the dynamic characteristic test apparatus 1 will be described. First, overcurrent prevention in N-side switching measurement will be described. FIG. 12 is a timing chart of N-side switching measurement including overcurrent prevention processing in the dynamic characteristic test apparatus 1. FIG. 13 is a diagram illustrating a current path during overcurrent prevention processing in N-side switching measurement.

As shown in FIG. 12, the gate signals in steps ST31 to ST33 are the same as those in steps ST11 to ST13 in FIG. In this example, it is assumed that the transistor Qdn is not turned off in step ST33 because the DUT 50 is defective. In this case, after step ST32, currents (currents Ic, Iqp, Iqhp, Iqcf, −Iqcr, IL, Iqdn) continue to flow through the current path Pn1, and the amount of current continues to increase with time.

In step ST34, the amount of current flowing through the current path Pn1 becomes larger than the N-side overcurrent threshold Ref_N, and the comparator 23 outputs a low-level output signal to the control device 30. Then, in response to receiving the low level output signal from the comparator 23, the control device 30 detects an overcurrent, changes the gate signals Sqp and Sqhp from the high level to the low level, and changes the gate signal Sqir to the low level. Change from high to high. Thereby, the transistors Qcf, Qcr, Qir, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 13, a current path Pn41 that sequentially circulates the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn is formed, and the reactor L, the transistor Qir, and the diode Dif are sequentially connected. A circulating current path Pn42 is formed. Then, the overcurrent that has flowed through the current path Pn1 flows separately into the current path Pn41 and the current path Pn42. This prevents overcurrent from continuing to flow through the test circuit 10 and the DUT 50.

Subsequently, in step ST35, as in step ST15, the control device 30 changes only the gate signal Sqdn from the high level to the low level from the state of the gate signal in step ST34, and does not change the other gate signals. However, since the DUT 50 is defective, the transistor Qdn is not turned off, and each transistor maintains the same state as step ST34. Since the current flowing through the current path Pn41 circulates through the current path Pn41, energy is consumed by the resistance components of the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn. It decreases with the passage of time. Similarly, since the current flowing through the current path Pn42 circulates through the current path Pn42, energy is consumed by the resistance components of the reactor L, the transistor Qir, the diode Dif, and the like, so that the amount of current decreases with time. To go.

Subsequently, in step ST36, the state of the gate signal in step ST35 is continued, and the amount of current flowing through the current path Pn41 and the current path Pn42 is further reduced to zero.

Subsequently, in step ST37, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to all low levels and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all turned off, and no current flows through each transistor. Note that a detection circuit or the like (not shown) detects that the amount of current flowing through the current path Pn41 and the current path Pn42 is equal to or less than a predetermined threshold, and the control device 30 uses the output signal from the detection circuit to It may be detected that the amount of current flowing through Pn41 and the current path Pn42 has become almost zero (end of energy consumption processing). The predetermined threshold is set to 0 or a value slightly larger than 0, for example. And control device 30 may perform processing of Step ST37 according to having detected the end of energy consumption processing.

As described above, the control device 30 turns off the transistors Qp and Qhp and turns on the transistor Qir in response to the detection of the overcurrent in the N-side switching measurement. 14 is operated. As a result, the energy accumulated in the reactor L when an overcurrent occurs is consumed by the overcurrent prevention circuit 14, and further overcurrent is prevented from flowing through the DUT 50 in the N-side switching measurement.

Next, overcurrent prevention in P-side switching measurement will be described. FIG. 14 is a timing chart of P-side switching measurement including overcurrent prevention processing in the dynamic characteristic test apparatus 1. FIG. 15 is a diagram illustrating a current path during overcurrent prevention processing in P-side switching measurement.

As shown in FIG. 14, the gate signals in steps ST41 to ST43 are the same as those in steps ST21 to ST23 in FIG. In this example, it is assumed that the transistor Qdp is not turned off in step ST43 because the DUT 50 is defective. In this case, after step ST42, currents (currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, Iqhn) continue to flow through the current path Pp1, and the amount of current continues to increase with time.

In step ST44, the amount of current flowing through the current path Pp1 becomes larger than the P-side overcurrent threshold Ref_P, and the comparator 24 outputs a low-level output signal to the control device 30. Then, in response to receiving the low level output signal from the comparator 24, the control device 30 detects an overcurrent, changes the gate signals Sqp and Sqhn from the high level to the low level, and changes the gate signal Sqif to the low level. Change from high to high. Accordingly, the transistors Qcf, Qcr, Qif, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 15, a current path Pp41 that circulates through the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp in order is formed, and the reactor L, the transistor Qif, and the diode Dir are sequentially connected. A circulating current path Pp42 is formed. Then, the overcurrent that has flowed through the current path Pp1 flows separately into the current path Pp41 and the current path Pp42. This prevents overcurrent from continuing to flow through the test circuit 10 and the DUT 50.

Subsequently, in step ST45, as in step ST25, the control device 30 changes only the gate signal Sqdp from the high level to the low level from the state of the gate signal in step ST44, and does not change the other gate signals. However, since the DUT 50 is defective, the transistor Qdp is not turned off, and each transistor maintains the same state as step ST44. Since the current flowing through the current path Pp41 circulates through the current path Pp41, energy is consumed by the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, the resistance component of the transistor Qdp, and the like. It decreases with the passage of time. Similarly, since the current flowing through the current path Pp42 circulates through the current path Pp42, energy is consumed by the resistance components of the reactor L, the transistor Qif, and the diode Dir, and the amount of current decreases with time. To go.

Subsequently, in step ST46, the state of the gate signal in step ST45 is continued, and the amount of current flowing through the current path Pp41 and the current path Pp42 is further reduced to zero.

Subsequently, in step ST47, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to all low levels and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all turned off, and no current flows through each transistor. Note that a detection circuit or the like (not shown) detects that the amount of current flowing through the current path Pp41 and the current path Pp42 is equal to or less than a predetermined threshold, and the control device 30 uses the output signal from the detection circuit to It may be detected that the amount of current flowing through Pp41 and current path Pp42 has become substantially zero (end of energy consumption processing). The predetermined threshold is set to 0 or a value slightly larger than 0, for example. And the control apparatus 30 may perform the process of step ST47 according to having detected the completion | finish of an energy consumption process.

As described above, the control device 30 turns off the transistors Qp and Qhn and turns on the transistor Qif in response to the detection of the overcurrent in the P-side switching measurement. 14 is operated. As a result, the energy accumulated in the reactor L when an overcurrent occurs is consumed by the overcurrent prevention circuit 14, and further overcurrent is prevented from flowing through the DUT 50 in the P-side switching measurement.

Further, overcurrent prevention using the high-speed interrupt circuit 15 will be described. First, overcurrent prevention in N-side switching measurement using the high-speed cutoff circuit 15 will be described. FIG. 16 is a timing chart of N-side switching measurement including overcurrent prevention processing using a high-speed cutoff circuit in the dynamic characteristic test apparatus 1. FIG. 17 is a diagram illustrating a current path during overcurrent prevention processing using a high-speed cutoff circuit in N-side switching measurement.

Compared with the timing chart of the gate signal shown in FIG. 12, the timing chart of the gate signal shown in FIG. 16 further includes the gate signal Sqcf, The difference is that Sqcr is changed from a high level to a low level. For this reason, when an overcurrent is detected, the transistors Qir and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 17, the current path Pn41 is not formed, but only the current path Pn42 is formed, so that the overcurrent that has flowed through the current path Pn1 flows into the current path Pn42. The current flowing through the current path Pn42 consumes energy by circulating through the current path Pn42, so that the amount of current decreases with the passage of time.

As described above, the control device 30 turns off the transistors Qp and Qhp and turns on the transistor Qir in response to the detection of the overcurrent in the N-side switching measurement. 14 is operated, and the transistors Qcf and Qcr are turned off to operate the high-speed cutoff circuit 15. As a result, the energy accumulated in the reactor L when an overcurrent occurs flows to the overcurrent prevention circuit 14 as a current and is consumed by the overcurrent prevention circuit 14. When the high-speed cutoff circuit 15 is not operated, the overcurrent that has flowed through the current path Pn1 flows separately into the current path Pn41 and the current path Pn42. At this time, the resistance value contributing to the overcurrent consumption is a combined resistance value of the resistance value of the resistance component of the current path Pn41 and the resistance value of the resistance component of the current path Pn42. Becomes smaller. For this reason, compared with the case where the high-speed cutoff circuit 15 is not operated, when the high-speed cutoff circuit 15 is operated, the resistance value that contributes to the overcurrent consumption is increased, so that the energy stored in the reactor L is increased. Is consumed in a short time, and in the N-side switching measurement, further overcurrent is more reliably prevented from flowing through the DUT 50.

Next, overcurrent prevention in P-side switching measurement using the high-speed cutoff circuit 15 will be described. FIG. 18 is a timing chart of P-side switching measurement including overcurrent prevention processing using a high-speed cutoff circuit in the dynamic characteristic test apparatus 1. FIG. 19 is a diagram illustrating a current path during overcurrent prevention processing using a high-speed cutoff circuit in P-side switching measurement.

The gate signal timing chart shown in FIG. 18 is further compared with the gate signal timing chart shown in FIG. 14 in response to the detection of an overcurrent by the control device 30 in step ST64, and the gate signal Sqcf, The difference is that Sqcr is changed from a high level to a low level. Therefore, when an overcurrent is detected, the transistors Qif and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 19, the current path Pp41 is not formed, but only the current path Pp42 is formed. Therefore, the overcurrent that has flowed through the current path Pp1 flows into the current path Pp42. The current flowing through the current path Pp42 consumes energy by circulating through the current path Pp42, so that the amount of current decreases with the passage of time.

As described above, the control device 30 turns off the transistors Qp and Qhn and turns on the transistor Qif in response to the detection of the overcurrent in the P-side switching measurement. 14 is operated, and the transistors Qcf and Qcr are turned off to operate the high-speed cutoff circuit 15. As a result, the energy accumulated in the reactor L when an overcurrent occurs flows to the overcurrent prevention circuit 14 as a current and is consumed by the overcurrent prevention circuit 14. When the high-speed cutoff circuit 15 is not operated, the overcurrent that has flowed through the current path Pp1 flows separately into the current path Pp41 and the current path Pp42. At this time, the resistance value contributing to the overcurrent consumption is a combined resistance value of the resistance value of the resistance component of the current path Pp41 and the resistance value of the resistance component of the current path Pp42, and is based on the resistance value of the resistance component of the current path Pp42. Becomes smaller. For this reason, compared with the case where the high-speed cutoff circuit 15 is not operated, when the high-speed cutoff circuit 15 is operated, the resistance value that contributes to the overcurrent consumption is increased, so that the energy stored in the reactor L is increased. Is consumed in a short time, and in the P-side switching measurement, further overcurrent is more reliably prevented from flowing through the DUT 50.

(Short-circuit resistance measurement)
Next, short-circuit tolerance measurement using the dynamic characteristic test apparatus 1 will be described. First, short-circuit tolerance measurement (sometimes referred to as “N-side short-circuit tolerance measurement”) of the transistor Qdn will be described. FIG. 20 is a timing chart of the N-side short-circuit tolerance measurement in the dynamic characteristic test apparatus 1. As shown in FIG. 20, in step ST71, the control device 30 sets all of the relay signals Sswp, Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, Sqdn to a low level. Output. Therefore, the switches SWp and SWn and the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in an off state, and no current flows through each transistor and switch.

Subsequently, in step ST72, the control device 30 sets the relay signal Sswp and the gate signals Sqp and Sqdn to a high level, and sets the relay signal Sswn and the gate signals Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, and Sqdp to a low level. Set to output. As a result, the switch SWp and the transistors Qp and Qdn are turned on, and the other switches and transistors are turned off. At this time, a current path is formed from the + terminal of the power supply capacitor 11 through the transistor Qp, the switch SWp, and the transistor Qdn in order to return to the − terminal of the power supply capacitor 11, and a current flows through the current path. Thus, a short-circuit current flows through the transistor Qdn without passing through the reactor L.

Subsequently, in step ST73, as in step ST71, the control device 30 sets the relay signals Sswp and Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to all low levels. And output. As a result, all switches and transistors are turned off, and no current flows through each transistor and switch. N-side short-circuit tolerance measurement is performed by the above series of processes.

Next, short-circuit tolerance measurement of the transistor Qdp (sometimes referred to as “P-side short-circuit tolerance measurement”) will be described. FIG. 21 is a timing chart of the P-side short-circuit tolerance measurement in the dynamic characteristic test apparatus 1. As shown in FIG. 21, in step ST81, the control device 30 sets all of the relay signals Sswp, Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, Sqdn to a low level. Output. Therefore, the switches SWp and SWn and the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in an off state, and no current flows through each transistor and switch.

Subsequently, in step ST82, the control device 30 sets the relay signal Sswn and the gate signals Sqp, Sqdp to a high level, and sets the relay signal Sswp and the gate signals Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdn to a low level. Set to output. As a result, the switch SWn and the transistors Qp and Qdp are turned on, and the other switches and transistors are turned off. At this time, a current path is formed from the positive terminal of the power supply capacitor 11 through the transistor Qp, the transistor Qdp, and the switch SWn in order to return to the negative terminal of the power supply capacitor 11, and a current flows through the current path. Thus, a short-circuit current flows through the transistor Qdp without passing through the reactor L.

Subsequently, in step ST83, as in step ST81, the control device 30 sets the relay signals Sswp and Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to all low levels. And output. As a result, all switches and transistors are turned off, and no current flows through each transistor and switch. The P-side short-circuit tolerance measurement is performed by the series of processes described above.

In the dynamic characteristic test apparatus 1 described above, the transistors Qp, Qhp, Qcf, and Qcr are turned on when starting the switching measurement of the transistor Qdn, and the switching measurement of the transistor Qdn (capture of a waveform for switching measurement) is performed. The transistors Qhp, Qcf, and Qcr are turned off after the transistor Qhp is turned off in response to the termination. At the time of switching measurement of the transistor Qdn, the current supplied from the power supply capacitor 11 to the transistor Qdn flows to the reactor L from the connection portion Cs toward the connection portion Cd, and the switching measurement of the transistor Qdn (capture of a waveform for switching measurement). At the time when is completed, energy is accumulated in the reactor L. For this reason, the transistor Qhp is turned off in response to the end of the switching measurement of the transistor Qdn (capture of a waveform for switching measurement), whereby the diode Dhn, the transistor Qcf, A current path Pn3 that passes through the transistor Qcr, the reactor L, the diode Ddp, and the transistor Qp in order and returns to the + terminal of the power supply capacitor 11 is formed, and the energy accumulated in the reactor L flows as a current to the + terminal of the power supply capacitor 11 . Thereby, a part of the energy (electric power) of the power supply capacitor 11 used for the switching measurement of the transistor Qdn can be recovered. As a result, it is possible to reduce the amount of power used in the dynamic characteristic test. In addition, for the next measurement, the time for charging the power supply capacitor 11 can be shortened, and the machine cycle can be shortened (improved).

In the dynamic characteristic test apparatus 1, the transistors Qp, Qhn, Qcf, and Qcr are turned on when starting the switching measurement of the transistor Qdp, and the switching measurement of the transistor Qdp (taking in the waveform for the switching measurement) is completed. Accordingly, after the transistor Qhn is turned off, the transistors Qp, Qcf, and Qcr are turned off. At the time of switching measurement of the transistor Qdp, the current supplied from the power supply capacitor 11 to the transistor Qdp flows to the reactor L from the connection Cd toward the connection Cs, and the switching measurement of the transistor Qdp (capture of a waveform for switching measurement) At the time when is completed, energy is accumulated in the reactor L. For this reason, the transistor Qhn is turned off in response to the end of the switching measurement of the transistor Qdp (the waveform acquisition for the switching measurement), so that the diode Ddn, the reactor L, A current path Pp3 that passes through the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qp in order and returns to the positive terminal of the power supply capacitor 11 is formed, and the energy accumulated in the reactor L flows as a current to the positive terminal of the power supply capacitor 11 . Thereby, a part of the energy (power) of the power supply capacitor 11 used for the switching measurement of the transistor Qdp can be recovered. As a result, it is possible to further reduce power consumption in the dynamic characteristic test. Further, the time for charging the power supply capacitor 11 can be shortened for the next measurement, and the machine cycle can be further shortened (improved).

In the dynamic characteristic testing apparatus 1, the transistor Qdn is selected as an object for switching measurement by turning on the transistor Qhp. In the switching measurement of the transistor Qdn, the reactor L goes from the connection Cs to the connection Cd. Current flows. Further, by turning on the transistor Qhn, the transistor Qdp is selected as an object for switching measurement, and in the switching measurement of the transistor Qdp, a current flowing from the connection Cd to the connection Cs flows in the reactor L. That is, a bidirectional current can flow through the reactor L. In the switching measurement of the transistor Qdn, when the dynamic characteristic test apparatus 1 detects an overcurrent having an amount of current exceeding the overcurrent threshold Ref_N, the transistor Lir is turned on, whereby the reactor L, the transistor Qir, and the diode A current path Pn42 that circulates Dif is formed. The energy stored in the reactor L is consumed by flowing through the current path Pn42 as a current. On the other hand, in the switching measurement of the transistor Qdp, when the dynamic characteristic test apparatus 1 detects an overcurrent with an amount of current exceeding the overcurrent threshold Ref_P, the transistor Qif is turned on, whereby the reactor L, the transistor Qif, and the diode A current path Pp42 that circulates Dir is formed. The energy accumulated in the reactor L is consumed by flowing through the current path Pp42 as a current. As described above, in the dynamic characteristic test apparatus 1 of the DUT 50 including the transistor Qdp and the transistor Qdn that are electrically connected in series, a bidirectional current flows through the reactor L. It is possible to prevent the flow. Thereby, the failure etc. of the dynamic characteristic test apparatus 1 can be avoided. As a result, the frequency of maintenance such as component replacement can be reduced, which contributes to cost reduction.

The diode Dif is a free-wheeling diode of the transistor Qif, and the diode Dir is a free-wheeling diode of the transistor Qir. The diode Dif is arranged so that its forward direction is a direction from the connection part Cd to the connection part Cs, and the diode Dir is arranged so that its forward direction is a direction from the connection part Cs to the connection part Cd. Yes. As described above, since the above-described current paths Pn42 and Pp42 are formed using the free-wheeling diode for protecting the transistors Qif and Qir, a further bidirectional overcurrent flows to the DUT 50 while suppressing an increase in parts. Can be prevented.

Further, in the switching measurement of the transistor Qdn, when an overcurrent is detected, the transistor Qir is turned on, and the transistors Qcf and Qcr are turned off, so that the current path Pn41 different from the current path Pn42 is changed. Can be blocked. For this reason, the energy accumulated in the reactor L can be made to flow through the overcurrent prevention circuit 14 (current path Pn42) as a current, and the energy accumulated in the reactor L can be consumed at high speed. Similarly, in the switching measurement of the transistor Qdp, when an overcurrent is detected, the transistor Qif is turned on, and the transistors Qcf and Qcr are turned off, so that the current path Pp41 different from the current path Pp42 is obtained. Can be cut off. For this reason, the energy accumulated in the reactor L can be made to flow through the overcurrent prevention circuit 14 (current path Pp42) as a current, and the energy accumulated in the reactor L can be consumed at high speed.

Note that the dynamic characteristic test apparatus and the dynamic characteristic test method according to the present invention are not limited to the above embodiment. For example, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, and Qcr are not limited to IGBTs, but may be any switch unit that can switch between an on state and an off state. For example, as the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, other transistors such as FETs (Field-Effect-Transistors) and bipolar transistors, relays capable of high-speed operation, and the like can be used. By using the transistor, the ON state and the OFF state can be switched at high speed, and the accuracy of the dynamic characteristic test including the switching measurement can be improved.

Further, instead of the power supply capacitor 11, another chargeable power supply may be used. In addition, when the purpose is not to collect energy in the switching measurement, a non-chargeable power source may be used, and the main switch unit 12 may not be provided. In this case, the positive terminal of the power supply capacitor 11 is electrically connected to the collector of the transistor Qhp, the cathode of the diode Dhp, one end of the switch SWp, the collector of the transistor Qdp, and the cathode of the diode Ddp. , Electrically connected to the emitter of the transistor Qhn, the anode of the diode Dhn, the other end of the switch SWn, the emitter of the transistor Qdn, and the anode of the diode Ddn.

Further, when the purpose is to recover energy in the switching measurement, the overcurrent prevention circuit 14 and the high-speed cutoff circuit 15 may not be provided. In this case, the emitter of the transistor Qhp, the collector of the transistor Qhn, and one end of the reactor L are electrically connected.

The high-speed cutoff circuit 15 may at least turn off the transistor Qcf when interrupting the overcurrent in the N-side switching measurement at a high speed, and at least when interrupting the overcurrent in the P-side switching measurement at a high speed. The transistor Qcr may be turned off. Further, in the case where the overcurrent in the N-side switching measurement is interrupted at high speed, the high-speed cutoff circuit 15 is provided in series with the reactor L in a portion of the current path Pn41 that does not overlap with the current path Pn42. Good. Further, in the case where the overcurrent in the P-side switching measurement is interrupted at high speed, the high-speed cutoff circuit 15 is provided in series with the reactor L in a portion of the current path Pp41 that does not overlap with the current path Pp42. Good. The high-speed cutoff circuit 15 may be provided between the DUT 50 and the reactor L, for example. Moreover, the high-speed interruption circuit 15 should just be provided with the switch part which can switch a conduction | electrical_connection state and interruption | blocking state, for example, may be one relay etc.

Further, the overcurrent prevention circuit 14 may be configured to prevent bidirectional overcurrent. The overcurrent prevention circuit 14 may be, for example, a reverse blocking IGBT. More specifically, the overcurrent prevention circuit 14 includes a switch part and a diode electrically connected in series in one direction from the connection part Cd to the connection part Cs, and goes from the connection part Cs to the connection part Cd. In the other direction, it is only necessary to include a switch part and a diode electrically connected in series. The diodes in one direction are arranged so that the forward direction is one direction, and the diodes in the other direction need only be arranged so that the forward direction is the other direction.

As shown in FIG. 22, the overcurrent prevention circuit 14 may be configured as a diode bridge, for example. Specifically, the overcurrent prevention circuit 14 of the modification includes a transistor Qi, a diode Di, and diodes D1 to D4. The transistor Qi is an IGBT. The cathode of the diode Di is electrically connected to the collector of the transistor Qi, and the anode of the diode Di is electrically connected to the emitter of the transistor Qi. That is, the diode Di is a free wheeling diode electrically connected in parallel to the transistor Qi. The collector of the transistor Qi is electrically connected to the cathode of the diode D1 and the cathode of the diode D3, and the emitter of the transistor Qi is electrically connected to the anode of the diode D2 and the anode of the diode D4. The anode of the diode D1 and the cathode of the diode D2 are electrically connected to each other, and are electrically connected to the collector of the transistor Qcr, the cathode of the diode Dcr, and one end of the reactor L. The anode of the diode D3 and the cathode of the diode D4 are electrically connected to each other, and are electrically connected to the other end of the reactor L, the other end of the switch SWp, one end of the switch SWn, and the O terminal of the DUT 50.

For example, in step ST34 of FIG. 12, the amount of current flowing through the current path Pn1 (currents Ic, Iqp, Iqhp, Iqcf, −Iqcr, IL, Iqdn) increases and becomes larger than the N-side overcurrent threshold Ref_N. When the comparator 23 outputs a low level output signal to the control device 30, the control device 30 detects the overcurrent in response to receiving the low level output signal from the comparator 23, and the gate signals Sqp, Sqhp. Is changed from high level to low level. Thereby, the transistors Qcf, Qcr, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 23, the current path Pn41 is formed, and the overcurrent that has flowed through the current path Pn1 flows into the current path Pn41.

Subsequently, the control device 30 changes the gate signal Sqi from the low level to the high level. As a result, the transistor Qi is further turned on, and as shown in FIG. 23, a current path Pn43 that sequentially circulates the reactor L, the diode D3, the transistor Qi, and the diode D2 is formed, and the current flowing through the current path Pn41 Part of the current flows in the current path Pn43. Since the current flowing through the current path Pn41 circulates through the current path Pn41, energy is consumed by the resistance components of the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn. It decreases with the passage of time. Similarly, since the current flowing through the current path Pn43 circulates through the current path Pn43, energy is consumed by the resistance components of the reactor L, the diode D3, the transistor Qi, and the diode D2, and the amount of current is determined as time passes. It will decrease with time.

Further, in step ST44 in FIG. 14, the amount of current flowing through the current path Pp1 (currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, Iqhn) increases and is larger than the P-side overcurrent threshold Ref_P. When the comparator 24 outputs a low level output signal to the control device 30, the control device 30 detects an overcurrent in response to the reception of the low level output signal from the comparator 24, and the gate signal Sqp, Sqhn is changed from high level to low level. As a result, the transistors Qcf, Qcr, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 24, the current path Pp41 is formed, and the overcurrent that has flowed through the current path Pp1 flows into the current path Pp41.

Subsequently, the control device 30 changes the gate signal Sqi from the low level to the high level. As a result, the transistor Qi is further turned on, and as shown in FIG. 24, a current path Pp43 that sequentially circulates the reactor L, the diode D1, the transistor Qi, and the diode D4 is formed, and the current flowing through the current path Pp41 Part of the current flows in the current path Pp43. Since the current flowing through the current path Pp41 circulates through the current path Pp41, energy is consumed by the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, the resistance component of the transistor Qdp, and the like. It decreases with the passage of time. Similarly, since the current flowing through the current path Pp43 circulates through the current path Pp43, energy is consumed by the resistance components of the reactor L, the diode D1, the transistor Qi, and the diode D4, and thus the amount of current passes over time. It will decrease with time. Even in the overcurrent prevention circuit 14 configured as described above, bidirectional overcurrent prevention of the dynamic characteristic test apparatus 1 is possible.

As shown in FIG. 25A, when the overcurrent prevention circuit 14 includes transistors Qif and Qir and diodes Dif and Dir, the transistors Qp and Qhp are turned off in the N-side switching measurement. Even before the transistor Qir is turned on, a short-circuit current that does not pass through the reactor L does not flow. As described above, when the overcurrent prevention circuit 14 includes the transistors Qif and Qir and the diodes Dif and Dir, the timing for turning off the transistors Qp and Qhp and the timing for turning on the transistor Qir. The order of is arbitrary. The same applies to the P-side switching measurement.

On the other hand, as shown in FIG. 25B, when the overcurrent prevention circuit 14 is configured by a diode bridge, in the N-side switching measurement, before the transistors Qp and Qhp are turned off, the transistor Qi Is turned on, the current path returns from the positive terminal of the power supply capacitor 11 to the negative terminal of the power supply capacitor 11 through the transistor Qp, transistor Qhp, transistor Qcf, transistor Qcr, diode D1, transistor Qi, diode D4, and transistor Qdn. Pn5 is formed. Since the current path Pn5 is a current path that does not pass through the reactor L, a short-circuit current flows through the dynamic characteristic test apparatus 1. Therefore, when the overcurrent prevention circuit 14 is configured by a diode bridge, when the overcurrent prevention circuit 14 is operated, it is necessary to turn on the transistor Qi after turning off the transistors Qp and Qhp. is there. The same applies to the P-side switching measurement.

As described above, when the overcurrent prevention circuit 14 includes the transistors Qif and Qir and the diodes Dif and Dir, since the transistors Qif and Qir are electrically connected in series, either the transistor Qif or Qir Is turned on, only a one-way current flows through the overcurrent prevention circuit 14. Therefore, in the N-side switching measurement, even if the transistor Qir is turned on before the transistors Qp and Qhp are turned off, no short-circuit current flows through the transistor Qdn. In the P-side switching measurement, the transistors Qp and Qhn are turned on. Even if the transistor Qif is turned on before being turned off, no short-circuit current flows through the transistor Qdp. Therefore, it is possible to reduce the restriction on the timing for operating the overcurrent prevention circuit 14 and to simplify the control.

Further, the DUT 50 is not limited to the 2-in-1 type power semiconductor module, and may be any device including the transistor Qdp and the transistor Qdn. For example, the DUT 50 may be a power semiconductor module such as a 4 in 1 type, a 6 in 1 type, and an 8 in 1 type.

FIG. 26 is a circuit diagram showing another modification of the dynamic characteristic test apparatus. A dynamic characteristic test apparatus 1A shown in FIG. 26 is a dynamic characteristic test apparatus when a 6-in-1 type power semiconductor module is used as a DUT. The dynamic characteristic test apparatus 1A is different from the dynamic characteristic test apparatus 1 in that the DUT 50A is used as a device under test instead of the DUT 50, and the test circuit 10A is provided instead of the test circuit 10. The test circuit 10 </ b> A is different from the test circuit 10 in that it further includes a selection circuit 17. In FIG. 26, the overcurrent detection circuit 20 is not shown.

The DUT 50A is a 6in1 type power semiconductor module including six transistors. Specifically, the DUT 50A includes a set of transistors Qdp and Qdn and diodes Ddp and Ddn of the DUT 50 in parallel for three phases (U, V, and W phases). That is, the DUT 50A includes transistors Qdpu and Qdnu and diodes Ddpu and Ddnu (first diode and second diode) for the U phase, and transistors Qdpv and Qdnv and diodes Ddpv and Ddnv (first diode, first diode) for the V phase. 2 diodes), and for the W phase, transistors Qdpw and Qdnw and diodes Ddpw and Ddnw are provided. The DUT 50A has a P terminal, a U terminal, a V terminal, a W terminal, and an N terminal. The P terminal is electrically connected to the collectors of the transistors Qdpu, Qdpv, and Qdpw, and the N terminal is electrically connected to the emitters of the transistors Qdnu, Qdnv, and Qdnw. The U terminal is electrically connected to the emitter of transistor Qdpu and the collector of transistor Qdnu, the V terminal is electrically connected to the emitter of transistor Qdpv and the collector of transistor Qdnv, and the W terminal is the emitter of transistor Qdpw and the collector of transistor Qdnw. Is electrically connected. For example, the DUT 50A is used in a three-phase inverter circuit, the transistor Qdpu is the U-phase upper arm, the transistor Qdnu is the U-phase lower arm, the transistor Qdpv is the V-phase upper arm, the transistor Qdnv is the V-phase lower arm, the transistor Qdpw can be used for the upper arm of the W phase, and the transistor Qdnw can be used for the lower arm of the W phase.

The selection circuit 17 is a circuit for selecting the transistors Qdp and Qdn of the phase for performing the switching measurement from the three-phase (U, V, W phase) transistors Qdp and Qdn included in the DUT 50A. The selection circuit 17 includes switches SWu, SWv, SWw. The switches SWu, SWv, SWw are relays. One ends of the switches SWu, SWv, SWw are electrically connected to each other, and are electrically connected to the other end of the reactor L, the collector of the transistor Qir, the cathode of the diode Dir, the other end of the switch SWp, and one end of the switch SWn. Has been. The other ends of the switches SWu, SWv, SWw are electrically connected to the U, V, W terminals of the DUT 50A, respectively.

In the dynamic characteristic test apparatus 1A configured as described above, the control device 30 further outputs the gate signals Sqdpu, Sqdnu, Sqdpv, Sqdnv, Sqdpw, Sqdnw to the transistors Qdpu, Qdnu, Qdpv, Qdnv, Qdpw, Qdw, respectively. Thus, each transistor is switched between an on state and an off state. Moreover, the control apparatus 30 switches the on state and the off state of each switch by outputting the relay signals Sswu, Sswv, and Ssww to the switches SWu, SWv, and SWw, respectively. Also when the DUT is another type of power semiconductor module, it can be configured in the same manner as the dynamic characteristic test apparatus 1A.

DESCRIPTION OF SYMBOLS 1,1A ... Dynamic characteristic test apparatus, 11 ... Power supply capacitor (power supply), 12 ... Main switch part, 13 ... Selection circuit, 30 ... Control apparatus, 50, 50A ... DUT (device under test), Cd ... Connection part (1st) 1 connection part), Cs ... connection part (second connection part), Ddn, Ddnu, Ddnv, Ddnw ... diode (second diode), Ddp, Ddpu, Ddpv, Ddpw ... diode (first diode), Dhn ... diode ( 4th diode), Dhp ... diode (third diode), L ... reactor, Qdn, Qdnu, Qdnv, Qdnw ... transistor (second semiconductor), Qdp, Qdpu, Qdpv, Qdpw ... transistor (first semiconductor), Qhn ... Transistor (second switch part), Qhp ... transistor (first switch part), Qp ... transistor (Third switch section).

Claims

A first semiconductor and a second semiconductor electrically connected in series; a first diode electrically connected in parallel to the first semiconductor; and a second electrically connected in parallel to the second semiconductor. A dynamic characteristic test apparatus for performing a dynamic characteristic test of a device under test including a diode,
A rechargeable power supply for supplying current for the dynamic characteristic test;
A reactor serving as a load of the first semiconductor and the second semiconductor;
First and second switch parts electrically connected in series, a third diode electrically connected in parallel to the first switch part, and electrically connected in parallel to the second switch part A selection circuit for selecting one of the first semiconductor and the second semiconductor as a target for switching measurement;
A third switch section for switching supply and interruption of current from the power source to the first semiconductor or the second semiconductor;
A control device for switching and controlling an on state and an off state of the first switch unit, the second switch unit, and the third switch unit;
With
The first connection part that electrically connects the first semiconductor and the second semiconductor and the second connection part that electrically connects the first switch part and the second switch part are electrically connected via the reactor. Connected,
A positive terminal of the power source is electrically connected to a cathode of the first diode and a cathode of the third diode;
A negative terminal of the power source is electrically connected to an anode of the second diode and an anode of the fourth diode;
The control device turns on the second switch unit and the third switch unit when starting the switching measurement of the first semiconductor, and the second switching unit according to the end of the switching measurement of the first semiconductor. A dynamic characteristic test apparatus, wherein the third switch unit is turned off after the switch unit is turned off.
The control device turns on the first switch unit and the third switch unit when starting the switching measurement of the second semiconductor, and the first switching unit according to the end of the switching measurement of the second semiconductor. The dynamic characteristic test apparatus according to claim 1, wherein the third switch unit is turned off after the switch unit is turned off.
The dynamic characteristic test apparatus according to claim 1, wherein the first switch unit and the second switch unit are transistors.
A first semiconductor and a second semiconductor electrically connected in series; a first diode electrically connected in parallel to the first semiconductor; and a second electrically connected in parallel to the second semiconductor. A dynamic characteristic test method for performing a dynamic characteristic test of a device under test including a diode,
First and second switch parts electrically connected in series, a third diode electrically connected in parallel to the first switch part, and electrically connected in parallel to the second switch part The second switch portion of the selection circuit having the fourth diode is turned on to select the first semiconductor as an object of switching measurement and electrically connected in series to a rechargeable power source. Supplying a current to the first semiconductor by turning on a three-switch unit to perform a switching measurement of the first semiconductor;
Recovering energy used in the switching measurement of the first semiconductor by turning off the second switch unit in response to the end of the switching measurement of the first semiconductor;
After the step of recovering the energy used in the switching measurement of the first semiconductor, turning off the third switch unit;
Including
A first connection part that electrically connects the first semiconductor and the second semiconductor and a second connection part that electrically connects the first switch part and the second switch part are electrically connected via a reactor. Connected,
A positive terminal of the power source is electrically connected to a cathode of the first diode and a cathode of the third diode;
The dynamic characteristic test method, wherein a negative terminal of the power source is electrically connected to an anode of the second diode and an anode of the fourth diode.
By turning on the first switch part of the selection circuit, the second semiconductor is selected as an object for switching measurement, and by turning on the third switch part, a current is supplied to the second semiconductor. Providing and performing a switching measurement of the second semiconductor;
Recovering energy used in the switching measurement of the second semiconductor by turning off the first switch unit in response to completion of the switching measurement of the second semiconductor;
After the step of recovering energy used in the switching measurement of the second semiconductor, turning off the third switch unit;
The dynamic characteristic test method according to claim 4, further comprising: