TWI676038B - Dynamic characteristic test device and dynamic characteristic test method - Google Patents

Abstract

The dynamic characteristic test device of the present invention includes: a power source; a reactor; and a selection circuit having a first and a second switching portion electrically connected in series, a third diode electrically connected in parallel to the first switching portion, and an electric circuit. The second diode is connected in parallel to the fourth diode of the second switching unit, and is used to select the first semiconductor or the second semiconductor as the measurement object of the switch. The third switching unit is switched from the power supply to the first semiconductor or the second semiconductor. Supply and interruption of current; and a control device that switches and controls the ON state and OFF state of each switch section. The first connection portion electrically connecting the first and second semiconductors and the second connection portion electrically connecting the first and second switching portions are electrically connected through a reactor. When the control device starts the switch measurement of the first semiconductor, the second and third switch sections are turned on, and after the switch measurement of the first semiconductor is completed, the second switch section is turned off. The third switch section is turned off.

Description

Dynamic characteristic test device and method

The present disclosure relates to a dynamic characteristic test device and a dynamic characteristic test method.

In the past, inspections of power semiconductor modules such as insulated gate bipolar transistors (IGBTs) have been performed with dynamic characteristic (AC: Alternating Current) tests (for example, see Patent Document 1). For example, the test device described in Patent Document 1 uses a high-voltage power source to charge a capacitor, and performs a switch measurement while the capacitor is charged.

[Prior technical literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2013-160572

In the previous test device, since the energy accumulated in the capacitor was consumed in the dynamic characteristic test circuit, the capacitor must be charged with a high-voltage power supply every time a switch test is performed. Therefore, as the dynamic characteristic test is performed, the amount of power used increases.

In the art, it is desirable to reduce the amount of power used for dynamic characteristics testing.

A dynamic characteristic test device according to one aspect of the present invention is a dynamic characteristic tester for a device under test. The device under test includes a first semiconductor and a second semiconductor electrically connected in series, and a first semiconductor electrically connected in parallel to the first semiconductor. Diode and electrical connection in parallel The second diode of a semiconductor. The dynamic characteristic testing device includes: a power source that supplies a current for dynamic characteristic testing and is rechargeable; a reactor that becomes a load of the first semiconductor and a second semiconductor; and a selection circuit that has a first electrical series connection The switching section, the second switching section, a third diode electrically connected in parallel to the first switching section, and a fourth diode electrically connected in parallel to the second switching section, and are used to connect the first semiconductor and the first semiconductor. Any one of 2 semiconductors is selected as the measurement target of the switch; the third switch section switches the supply and interruption of the current from the power source to the first semiconductor or the second semiconductor; and a control device that switches and controls the first switch section, The on and off states of the second and third switch sections. The first connection portion electrically connecting the first semiconductor and the second semiconductor and the second connection portion electrically connecting the first switching portion and the second switching portion are electrically connected through a reactor. The positive terminal of the power source is electrically connected to the cathode of the first diode and the cathode of the third diode, and the negative terminal of the power source is electrically connected to the anode of the second diode and the anode of the fourth diode. When the control device starts the switch measurement of the first semiconductor, the second switch section and the third switch section are turned on, and the second switch section is turned off in response to the completion of the switch measurement of the first semiconductor. Then, the third switch section is turned off.

According to this dynamic characteristic test device, when the switch measurement of the first semiconductor is started, the second switch section and the third switch section are turned on, and the second switch section is set in response to the completion of the switch measurement of the first semiconductor. After being in the off state, the third switch section is turned off. During the measurement of the switch of the first semiconductor, the current supplied from the power source to the first semiconductor flows from the first connection portion of the first semiconductor and the second semiconductor toward the first connection portion and the second connection portion of the second switch portion. In the reactor, when the switching measurement of the first semiconductor is completed, energy is accumulated in the reactor. Therefore, the second switch section is set to the off state according to the completion of the switch measurement of the first semiconductor, and the second diode, the reactor, the third diode, and the third diode are formed to pass from the negative terminal of the power source. In the current path of the switching unit and returning to the positive terminal of the power source, the energy stored in the reactor flows as a current to the positive terminal of the power source. As a result, a part of the power source energy (electricity) used for the switch measurement of the first semiconductor can be recovered. Minute. As a result, it is possible to reduce the amount of power used in the dynamic characteristic test. Furthermore, in this specification, "electrical connection" includes not only the case where two elements of the connection object are directly connected, but also the case where other elements which are electrically conductive are connected between the two elements of the connection object. . Other elements may include a switching unit such as a relay and a transistor.

The control device may also set the first switch section and the third switch section to the ON state when starting the switch measurement of the second semiconductor, and set the first switch section to the end of the switch measurement corresponding to the second semiconductor. After the OFF state, the third switch section is set to the OFF state. In this case, during the measurement of the switch of the second semiconductor, the current supplied from the power source to the second semiconductor is from the first switch portion and the second connection portion of the second switch portion toward the first semiconductor and the second semiconductor first portion. The connection portion flows into the reactor, and at the time when the switching measurement of the second semiconductor is completed, energy is accumulated in the reactor. Therefore, the first switch section is set to the off state according to the end of the switch measurement of the second semiconductor, and the negative terminal formed from the power source passes through the fourth diode, the reactor, the first diode, and the third In the current path of the switching unit and returning to the positive terminal of the power source, the energy stored in the reactor flows as a current to the positive terminal of the power source. As a result, a part of the power source energy (electricity) used for the switch measurement of the second semiconductor can be recovered. As a result, it is possible to further reduce the power consumption of the dynamic characteristic test.

The first switch portion and the second switch portion may be transistors. In this case, the on-state and off-state of the first switch section and the second switch section can be switched at high speed, and the accuracy of the switch measurement can be improved.

According to still another aspect of the present invention, a dynamic characteristic test method is a tester for a dynamic characteristic of a device under test. The device under test includes a first semiconductor and a second semiconductor electrically connected in series and electrically connected in parallel to the first semiconductor. The first diode and the second diode electrically connected in parallel to the second semiconductor. The dynamic characteristic test method includes the following steps: a first switching portion having electrical series connection, a second switching portion, a third diode electrically connected in parallel to the first switching portion, and an electrical parallel connection in The second switch section of the fourth diode selection circuit of the second switch section is turned on, and the first semiconductor is selected as the switch measurement target. The third switch section electrically connected in series to the rechargeable power source is turned on, and the first semiconductor is supplied with current to perform the switch measurement of the first semiconductor. The switch measurement corresponding to the first semiconductor is completed. , The second switch section is turned off, and the energy used in the switch measurement of the first semiconductor is recovered; and after the step of recovering the energy used in the switch measurement of the first semiconductor, the third switch section is turned off On. The first connection portion that electrically connects the first semiconductor and the second semiconductor and the second connection portion that electrically connects the first switch portion and the second switch portion are electrically connected through a reactor. The positive terminal of the power source is electrically connected to the cathode of the first diode and the cathode of the third diode, and the negative terminal of the power source is electrically connected to the anode of the second diode and the anode of the fourth diode.

According to this dynamic characteristic test method, when the switch measurement of the first semiconductor is started, the second switch section and the third switch section are turned on, and the second switch is turned on at the end of the switch measurement corresponding to the first semiconductor. After the part is turned off, the third switch part is turned off. During the measurement of the switch of the first semiconductor, the current supplied from the power source to the first semiconductor flows from the first connection portion of the first semiconductor and the second semiconductor toward the first connection portion and the second connection portion of the second switch portion. In the reactor, when the switching measurement of the first semiconductor is completed, energy is accumulated in the reactor. Therefore, the second switch section is set to the off state according to the end of the switch measurement of the first semiconductor, and the negative terminal formed from the power source passes through the second diode, the reactor, the third diode, and the third In the current path of the switching unit and returning to the positive terminal of the power source, the energy stored in the reactor flows as a current to the positive terminal of the power source. As a result, a part of the power source energy (electricity) used for the switch measurement of the first semiconductor can be recovered. As a result, it is possible to reduce the amount of power used in the dynamic characteristic test.

According to yet another aspect of the present invention, the dynamic characteristic test method may further include the following steps: by setting the first switch section of the selection circuit to the on state, selecting the second semiconductor as the switch measurement object, and 3 The switch section is set to the ON state, and a current is supplied to the second semiconductor to perform the switch measurement of the second semiconductor; the switch section is set to the OFF state corresponding to the end of the switch measurement of the second semiconductor, and recovered Switch measurement of the second semiconductor Energy used; after the step of recovering the energy used in the switch measurement of the second semiconductor, the third switch section is turned off. In this case, during the measurement of the switch of the second semiconductor, the current supplied from the power source to the second semiconductor is from the first switch portion and the second connection portion of the second switch portion toward the first semiconductor and the second semiconductor first portion. The connection portion flows into the reactor, and at the time when the switching measurement of the second semiconductor is completed, energy is accumulated in the reactor. Therefore, the first switch section is set to the off state according to the end of the switch measurement of the second semiconductor, and the negative terminal formed from the power source passes through the fourth diode, the reactor, the first diode, and the third In the current path of the switching unit and returning to the positive terminal of the power source, the energy stored in the reactor flows as a current to the positive terminal of the power source. As a result, a part of the power source energy (electricity) used for the switch measurement of the second semiconductor can be recovered. As a result, it is possible to reduce the amount of power used in the dynamic characteristic test.

According to the present invention, it is possible to reduce the power consumption of the dynamic characteristic test.

1‧‧‧Dynamic characteristic test device

1A‧‧‧Dynamic characteristic test device

10‧‧‧test circuit

10A‧‧‧Test circuit

11‧‧‧Power Capacitor (Power)

12‧‧‧Main switch department

13‧‧‧Selection circuit

14‧‧‧Overcurrent prevention circuit

15‧‧‧High-speed blocking circuit

16‧‧‧Selection circuit

17‧‧‧Selection circuit

20‧‧‧ overcurrent detection circuit

21‧‧‧Current sensor

22‧‧‧Current sensor

23‧‧‧ Comparator

24‧‧‧ Comparator

30‧‧‧Control device

50‧‧‧DUT (device under test)

50A‧‧‧DUT (device under test)

Cd‧‧‧ connecting part (first connecting part)

Cs‧‧‧ connecting part (second connecting part)

D1‧‧‧diode

D2‧‧‧ Diode

D3‧‧‧ Diode

D4‧‧‧ Diode

Dcf‧‧‧ Diode

Dcr‧‧‧ Diode

Ddn‧‧‧Transistor (second diode)

Ddnu‧‧‧ Diode (2nd Diode)

Dhn‧‧‧ Transistor

Ddnv‧‧‧ Diode (2nd Diode)

Ddnw‧‧‧ Diode (2nd Diode)

Ddp‧‧‧Diode (1st Diode)

Ddpu‧‧‧ Diode (1st Diode)

Ddpv‧‧‧ Diode (1st Diode)

Ddpw‧‧‧ Diode (1st Diode)

Dhn‧‧‧ Diode (4th Diode)

Dhp‧‧‧ Diode (3rd Diode)

Dif‧‧‧ Diode

Dir‧‧‧ Diode

Ec‧‧‧Energy

Ic‧‧‧ current

IL‧‧‧Current

Iqcf‧‧‧Current

Iqcr‧‧‧Current

Iqdn‧‧‧Current

Iqhp‧‧‧Current

Iqp‧‧‧Current

Iqcf‧‧‧Current

Iqcr‧‧‧Current

Iqdn‧‧‧Current

Iqdp‧‧‧Current

Iqif‧‧‧Current

Iqir‧‧‧ current

Iqhn‧‧‧ current

Iqhp‧‧‧Current

Iqp‧‧‧Current

L‧‧‧ Reactor

N‧‧‧terminal

O‧‧‧terminal

P‧‧‧Terminal

Pn1‧‧‧ current path

Pn2‧‧‧ current path

Pn3‧‧‧ current path

Pn4‧‧‧ current path

Pn5‧‧‧ current path

Pn41‧‧‧ current path

Pn42‧‧‧ current path

Pn43‧‧‧Current Path

Pp1‧‧‧ current path

Pp2‧‧‧ current path

Pp3‧‧‧ current path

Pp41‧‧‧Current Path

Pp42‧‧‧ current path

Qcf‧‧‧ Transistor (5th Switching Section)

Qcr‧‧‧ Transistor (5th Switching Section)

Qdn‧‧‧ Transistor (Second Semiconductor)

Qdnu‧‧‧ Transistor (Second Semiconductor)

Qdnv‧‧‧ Transistor (Second Semiconductor)

Qdnw‧‧‧ Transistor (Second Semiconductor)

Qdp‧‧‧ Transistor (1st Semiconductor)

Qdpu‧‧‧ Transistor (1st Semiconductor)

Qdpv‧‧‧ Transistor (1st Semiconductor)

Qdpw‧‧‧ Transistor (1st Semiconductor)

Qhn‧‧‧ Transistor (2nd Switching Section)

Qhp‧‧‧ Transistor (1st Switching Section)

Qi‧‧‧Transistor

Qif‧‧‧ Transistor

Qir‧‧‧ Transistor

Qp‧‧‧Transistor (3rd Switching Section)

Ref_N‧‧‧Overcurrent threshold

Ref_P‧‧‧Overcurrent threshold

Sqcf‧‧‧Gate signal

Sqcr‧‧‧Gate signal

Sqdn‧‧‧Gate signal

Sqdp‧‧‧Gate signal

Sqdnu‧‧‧Gate signal

Sqdnv‧‧‧Gate signal

Sqdnw‧‧‧Gate signal

Sqdpu‧‧‧Gate signal

Sqdpv‧‧‧Gate signal

Sqdpw‧‧‧Gate signal

Sqhn‧‧‧Gate signal

Sqhp‧‧‧Gate signal

Sqif‧‧‧Gate signal

Sqir‧‧‧Gate signal

Sqp‧‧‧Gate signal

Sswn‧‧‧Relay signal

Sswp‧‧‧Relay signal

Sswu‧‧‧Relay signal

Sswv‧‧‧Relay signal

Ssww‧‧‧Relay signal

Swn‧‧‧Switch

Swp‧‧‧Switch

Swu‧‧‧Switch

Swv‧‧‧Switch

SWw‧‧‧Switch

FIG. 1 is a circuit diagram schematically showing a dynamic characteristic test device according to an embodiment.

FIG. 2 is a timing chart of the N-side switch measurement of the dynamic characteristic test device of FIG. 1. FIG.

FIG. 3 is a diagram showing a current path when a switch measured by the N-side switch of FIG. 2 is turned on.

FIG. 4 is a diagram showing a current path when the switch measured by the N-side switch of FIG. 2 is turned off.

FIG. 5 is a diagram showing a current path during energy recovery measured by the N-side switch of FIG. 2.

FIG. 6 is a timing chart of the P-side switch measurement of the dynamic characteristic test device of FIG. 1. FIG.

FIG. 7 is a diagram showing a current path when the switch measured by the P-side switch of FIG. 6 is turned on.

FIG. 8 is a diagram showing a current path when the switch measured by the P-side switch in FIG. 6 is turned off.

FIG. 9 is a diagram showing a current path during energy recovery measured by the P-side switch of FIG. 6.

FIG. 10 is a timing chart of the N-side switch measurement of the comparative example.

Fig. 11 is a timing chart of the P-side switch measurement of the comparative example.

FIG. 12 is an N-side opening including an overcurrent prevention process of the dynamic characteristic test device of FIG. 1 The timing chart of the measurement.

FIG. 13 is a diagram showing a current path during an overcurrent prevention process measured by the N-side switch of FIG. 12.

FIG. 14 is a timing chart of the P-side switch measurement including the overcurrent prevention processing of the dynamic characteristic test device of FIG. 1. FIG.

FIG. 15 is a diagram showing a current path during an overcurrent prevention process measured by the P-side switch of FIG. 14. FIG.

FIG. 16 is a timing chart showing the measurement of an N-side switch including an overcurrent prevention process using a high-speed blocking circuit using the dynamic characteristic test device of FIG. 1. FIG.

FIG. 17 is a diagram showing a current path during an overcurrent prevention process of the high-speed blocking circuit measured using the N-side switch of FIG. 16.

FIG. 18 is a timing chart of P-side switch measurement during overcurrent prevention processing including the high-speed blocking circuit using the dynamic characteristic test device of FIG. 1. FIG.

FIG. 19 is a diagram showing a current path during an overcurrent prevention process of the high-speed blocking circuit measured using the P-side switch of FIG. 18.

FIG. 20 is a timing chart for the measurement of the N-side short-circuit capacity of the dynamic characteristic test device of FIG. 1.

FIG. 21 is a timing chart of the P-side short-circuit capacity measurement of the dynamic characteristic test device of FIG. 1. FIG.

FIG. 22 is a circuit diagram showing a modified example of the dynamic characteristic test device of FIG. 1. FIG.

FIG. 23 is a diagram showing a current path during an overcurrent prevention process measured by an N-side switch of the dynamic characteristic test device of FIG. 22.

FIG. 24 is a diagram showing a current path during an overcurrent prevention process measured by a P-side switch of the dynamic characteristic test device of FIG. 22.

25 (a) and (b) are diagrams for comparing the overcurrent prevention processing of the dynamic characteristic test device of FIG. 1 with the overcurrent prevention processing of the dynamic characteristic test device of FIG.

FIG. 26 is a circuit diagram showing another modified example of the dynamic characteristic testing device of FIG. 1. FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. Moreover, in the description of the drawings, the same elements are denoted by the same symbols, and repeated descriptions are omitted.

FIG. 1 is a circuit diagram schematically showing a dynamic characteristic test device according to an embodiment. As shown in FIG. 1, the dynamic characteristic test device 1 is a device that performs a dynamic characteristic test of the DUT 50, and includes a test circuit 10, an overcurrent detection circuit 20, and a control device 30. The dynamic characteristic test device 1 performs switch measurement, short-circuit capacity measurement (SC measurement), and the like as a dynamic characteristic test. In switching measurement, IGBT characteristics and diode characteristics can be measured. As IGBT characteristics, there are rise time, fall time, turn-on delay time, turn-off delay time, turn-off surge voltage, gate charge, turn-on loss and turn-off loss. Diode characteristics include reverse recovery time, reverse recovery current, and reverse recovery energy.

The DUT50 is a device under test of the dynamic characteristic test device 1, which includes a 2in1 type power semiconductor module of two semiconductor elements electrically connected in series. Specifically, the DUT 50 includes transistors Qdp and Qdn (first semiconductor and second semiconductor), and diodes Ddp and Ddn. The transistors Qdp and Qdn are IGBTs. The emitter of the transistor Qdp and the collector of the transistor Qdn are electrically connected to each other. The cathodes of the diodes Ddp and Ddn are electrically connected to the collectors of the transistors Qdp and Qdn, and the anodes of the diodes Ddp and Ddn are electrically connected to the emitters of the transistors Qdp and Qdn, respectively. That is, the transistors Qdp and Qdn are electrically connected in series in the same direction, the diode Ddp is electrically connected in parallel to the return diode of the transistor Qdp, and the diode Ddn is electrically connected in parallel to the transistor Qdn. Reflux diode. The DUT50 has a P terminal, an O terminal, and an N terminal. The P terminal is electrically connected to the collector of the transistor Qdp and the cathode of the diode Ddp, the N terminal is electrically connected to the emitter of the transistor Qdn and the anode of the diode Ddn, and the O terminal is electrically connected to the transistor Qdp Emitter, collector of transistor Qdn, anode of diode Ddp, and cathode of diode Ddn. That is, the O terminal is electrically connected to the connection portion Cd (first connection portion) which electrically connects the transistors Qdp and Qdn. For example, DUT50 can be used for 1-phase inverter circuits, transistor Qdp can be used for the upper bridge arm, and transistor Qdn can be used for Lower bridge arm.

The test circuit 10 is a circuit for performing a dynamic characteristic test of the DUT50. The test circuit 10 includes a power supply capacitor 11, a main switching unit 12, a selection circuit 13, an overcurrent prevention circuit 14, a high-speed blocking circuit 15, a selection circuit 16, and a reactor L. The power supply capacitor 11 is a power supply for supplying a current for a dynamic characteristic test to the test circuit 10. As the power supply capacitor 11, for example, a filter capacitor having excellent frequency characteristics can be used. When the energy (charge) stored in the power source capacitor 11 decreases, the power source capacitor 11 is connected to a high-voltage power source (not shown) and is charged by the high-voltage power source.

The main switching section 12 is a circuit that switches and blocks the current supply to the DUT50 (transistor Qdp or transistor Qdn) from the power supply capacitor 11. The main switching section 12 includes a transistor Qp (third switching section) and a diode Dp. The transistor Qp is an IGBT. The cathode of the diode Dp is electrically connected to the collector of the transistor Qp, and the anode of the diode Dp is electrically connected to the emitter of the transistor Qp. That is, the diode Dp is a reflux diode which is electrically connected in parallel to the transistor Qp. The collector of the transistor Qp is electrically connected to the + terminal (positive terminal) of the power supply capacitor 11, and the emitter of the transistor Qp is electrically connected to the collector of the transistor Qhp described later, the cathode of the diode Dhp, and the switch SWp. One end and P terminal of DUT50.

The selection circuit 13 is a circuit for selecting any one of the transistors Qdp and Qdn included in the DUT 50 as a switch measurement target. The selection circuit 13 includes transistors Qhp and Qhn (a first switching unit and a second switching unit), and diodes Dhp and Dhn (a third diode and a fourth diode). The transistors Qhp and Qhn are IGBTs. The cathodes of the diodes Dhp and Dhn are electrically connected to the collectors of the transistors Qhp and Qhn, respectively, and the anodes of the diodes Dhp and Dhn are electrically connected to the emitters of the transistors Qhp and Qhn, respectively. That is, the diode Dhp is electrically connected in parallel to the reflow diode of the transistor Qhp, and the diode Dhn is electrically connected in parallel to the reflow diode of the transistor Qhn. The emitter of the transistor Qhp and the collector of the transistor Qhn are electrically connected to each other, and are electrically connected to the collector of the transistor Qcf described later and the cathode of the diode Dcf. That is, the transistors Qhp and Qhn are electrically connected in series in the same direction, and the transistors Qhp and Qhn are electrically connected. The connection portion Cs (second connection portion) is electrically connected to the O terminal of the DUT 50 through the high-speed blocking circuit 15 and the reactor L. The collector of the transistor Qhp is electrically connected to the emitter of the transistor Qp, the anode of the diode Dp, one terminal of the switch SWp, and the P terminal of the DUT50. The emitter of the transistor Qhn is electrically connected to one terminal (negative terminal) of the power capacitor 11, the other terminal of the switch SWn, and the N terminal of the DUT 50.

The overcurrent prevention circuit 14 is a circuit for consuming energy stored in the reactor L. The overcurrent prevention circuit 14 is provided in the reactor L electrically in parallel. The overcurrent prevention circuit 14 includes transistors Qif and Qir, and diodes Dif and Dir. Transistors Qif and Qir are IGBTs. The cathodes of the diodes Dif and Dir are respectively electrically connected to the collectors of the transistors Qif and Qir, and the anodes of the diodes Dif and Dir are respectively electrically connected to the emitters of the transistors Qif and Qir. That is, the diode Dif is electrically connected in parallel to the reflow diode of the transistor Qif, and the diode Dir is electrically connected in parallel to the reflow diode of the transistor Qir. The emitter of the transistor Qif and the emitter of the transistor Qir are electrically connected to each other. That is, the transistors Qif and Qir are electrically connected in series in opposite directions. The collector of the transistor Qif is electrically connected to the collector of the transistor Qcr described later, the cathode of the diode Dcr, and one end of the reactor L. The collector of the transistor Qir is electrically connected to the other end of the reactor L, the other end of the switch SWp, one end of the switch SWn, and the O terminal of the DUT50.

The high-speed blocking circuit 15 is a circuit for high-speed consumption of the energy accumulated in the reactor L by the overcurrent prevention circuit 14. The high-speed blocking circuit 15 is electrically connected to the reactor L in series. The high-speed blocking circuit 15 includes transistors Qcf and Qcr, and diodes Dcf and Dcr. Transistors Qcf and Qcr are IGBTs. The cathodes of the diodes Dcf and Dcr are electrically connected to the collectors of the transistors Qcf and Qcr, and the anodes of the diodes Dcf and Dcr are electrically connected to the emitters of the transistors Qcf and Qcr, respectively. That is, the diode Dcf is electrically connected in parallel to the reflow diode of the transistor Qcf, and the transistor Dcr is electrically connected in parallel to the reflow diode of the transistor Qcr. The emitter of the transistor Qcf and the emitter of the transistor Qcr are electrically connected to each other. That is, the transistors Qcf and Qcr are electrically connected in series in opposite directions. The collector of transistor Qcf is electrically connected to the emitter of transistor Qhp, the collector of transistor Qhn, the anode of diode Dhp and two The cathode of the polar body Dhn. The collector of the transistor Qcr is electrically connected to the collector of the transistor Qif, the cathode of the diode Dif and one end of the reactor L.

The selection circuit 16 is a circuit for selecting any one of the transistors Qdp and Qdn included in the DUT 50 as a short-circuit capacity measurement target. The selection circuit 16 includes switches SWp and SWn. The switches SWp and SWn are relays. One terminal of the switch SWp is electrically connected to the emitter of the transistor Qp, the anode of the diode Dp, the collector of the transistor Qhp, the cathode of the diode Dhp, and the P terminal of the DUT50. The other end of the switch SWp and one end of the switch SWn are electrically connected to each other, and are electrically connected to the other end of the reactor L, the collector of the transistor Qir, the cathode of the diode Dir, and the O terminal of the DUT50. The other end of the switch SWn is electrically connected to the-terminal of the power capacitor 11, the emitter of the transistor Qhn, the anode of the diode Dhn, and the N terminal of the DUT50.

Reactor L is the load for dynamic characteristics test. That is, the reactor L becomes a load of the transistors Qdp and Qdn. One end of the reactor L is electrically connected to the collector of the transistor Qcr and the cathode of the diode Dcr, and the other end of the reactor L is electrically connected to the O terminal of the DUT50.

The overcurrent detection circuit 20 is a circuit that detects an overcurrent flowing in the test circuit 10 and the DUT 50. The overcurrent detection circuit 20 includes a current sensor 21, a current sensor 22, a comparator 23, and a comparator 24.

The current sensor 21 is a sensor that detects the current value of the current flowing in the test circuit 10 and the DUT 50 during the N-side switch measurement. The current sensor 21 is provided near the N terminal of the wiring connecting the N terminal of the DUT 50 and the-terminal of the power capacitor 11. The current sensor 21 outputs the detected current value to the comparator 23. The current sensor 22 is a sensor that detects the current value of the current flowing in the test circuit 10 and the DUT 50 during the P-side switch measurement. The current sensor 22 is provided near the P terminal of the wiring connecting the P terminal of the DUT50 and the emitter of the transistor Qp. The current sensor 22 outputs the detected current value to the comparator 24.

The comparator 23 compares the current value detected by the current sensor 21 with the overcurrent threshold value Ref_N on the N side, and outputs the comparison result to the control device 30. Over current threshold Ref_N Preset value for detecting overcurrent. In the comparator 23, an overcurrent threshold value Ref_N on the N side of the + terminal is input, and a current value detected by the current sensor 21 is input in the-terminal. In this case, the comparator 23 outputs a high-level output signal to the control device 30 when the current value detected by the current sensor 21 is below the overcurrent threshold Ref_N, and when the current sensor 21 detects When the current value is greater than the overcurrent threshold Ref_N, a low-level output signal is output to the control device 30.

The comparator 24 compares the current value detected by the current sensor 22 with the overcurrent threshold value Ref_P on the P side, and outputs the comparison result to the control device 30. The overcurrent threshold Ref_P is a preset value for detecting overcurrent. In the comparator 24, an overcurrent threshold Ref_P on the + terminal input P side is input, and a current value detected by the current sensor 22 is input at the-terminal. In this case, the comparator 24 outputs a high-level output signal to the control device 30 when the current value detected by the current sensor 22 is below the overcurrent threshold Ref_P, and when the current sensor 22 detects When the current value is greater than the overcurrent threshold Ref_P, a low-level output signal is output to the control device 30.

The control device 30 is used to switch the on state (on state) and off state (off state) of the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, Qdn and the switches SWp, SWn. Controller for switching control. The control device 30 outputs gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, Sqdn to the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, Qdn, and Sqir, Sqcf, Sqcr, Sqdp, Sqdn, respectively. Switch on and off states of each transistor. The control device 30 outputs the relay signals Sswp and Sswn to the switches SWp and SWn, respectively, to switch the on state and the off state of each switch. The switching control by the control device 30 will be described in detail in each measurement below. Moreover, the so-called on-state of the transistor refers to a state where the collector-emitter is electrically conductive; the so-called off-state of the transistor refers to a state where the collector-emitter is electrically blocked. When the transistor is an IGBT, the on-state and off-state are switched by the gate-emitter voltage. In the following description, for convenience, it is set to supply the transistor. When a high-level gate signal is given, the transistor is turned on, and when a low-level gate signal is supplied to the transistor, the transistor is turned off.

(Switch measurement)

Next, switch measurement using the dynamic characteristic tester 1 will be described. First, the switching measurement of the transistor Qdn (sometimes referred to as "N-side switching measurement") will be described. FIG. 2 is a timing chart of the measurement of the N-side switch of the dynamic characteristic test device 1. FIG. FIG. 3 is a diagram showing a current path when a switch measured by an N-side switch is turned on. Fig. 4 is a diagram showing a current path when a switch measured by an N-side switch is turned off. FIG. 5 is a diagram showing a current path during energy recovery measured by an N-side switch.

Furthermore, in the switch measurement, the relay signals Sswp and Sswn are always set to a low level, and the switches SWp and SWn are always off. Therefore, the description of the relay signals and switches is omitted in each step. In the following description, the current supplied from the power supply capacitor 11 is set to Ic, and the currents flowing through the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are set to the current Iqp, respectively. , Iqhp, Iqhn, Iqif, Iqir, Iqcf, Iqcr, Iqdp, Iqdn, and the current flowing through the reactor L will be described as the current IL. In addition, the current flowing in each transistor is set to a positive value when it flows from the collector to the emitter, and when the anode flows from the emitter to the collector or from the anode of the recirculating diode to the cathode (forward). Negative value. The current flowing in the reactor L is a positive value when it flows toward the O terminal of the DUT50, and a negative value when it flows in the opposite direction. In addition, although the steps are shown as having the same length, the time of each step does not need to be the same, and can be appropriately adjusted as needed. In each step, the switching control timing of each transistor can be the same or different.

As shown in FIG. 2, in step ST11, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to the low level and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in an off state, and no current flows in each transistor. The power capacitor 11 The amount Ec (charge) is set to a fully charged state, for example.

Next, in step ST12, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr, and Sqdn to a high level, and outputs the gate signals divided by the other to a low level. Accordingly, the transistors Qp, Qhp, Qcf, Qcr, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 3, the transistor Qp, transistor Qhp, transistor Qcf, transistor Qcr, reactor L, and transistor Qdn are sequentially returned to the power capacitor 11 from the + terminal of the power capacitor 11. The current path Pn1 of the-terminal flows a current supplied from the power supply capacitor 11 in the current path Pn1. In this state, the currents of the currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, and Iqdn increase with the passage of time. On the other hand, the energy Ec of the power capacitor 11 decreases with the passage of time. In addition, the currents Iqhn, Iqif, Iqir, and Iqdp do not flow through the transistors Qhn, Qif, Qir, and Qdp. That is, in step ST12, the control device 30 sets the transistor Qhp to the on state, sets the transistor Qdn to the switch measurement object, and sets the transistors Qp, Qcf, and Qcr to the on state. A current is supplied from the power supply capacitor 11 to the transistor Qdn.

Next, in step ST13, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, and Sqcr to a high level, and outputs the other gate signals to a low level. That is, from step ST12, only the gate signal Sqdn is changed from a high level to a low level, and the other gate signals are not changed. As a result, the transistors Qp, Qhp, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 4, a current path Pn2 formed in sequence with the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, and the diode Ddp cycle is formed, and will flow through the current path Pn1 before starting step ST13. The current flows toward the current path Pn2. Therefore, the current amounts of the currents Ic, Iqp, and Iqdn become 0, and since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this time, because the energy is consumed by the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, and the resistance components of the diode Ddp, the current Iqhp, Iqcf, -Iqcr, IL, flows in the diode Ddp The amount of current-Iqdp is the current flowing in the current path Pn1 before the step ST13 is to be started. The amount of current flowing gradually decreases with the passage of time. In addition, the current amounts of the currents Iqhn, Iqif, and Iqir are still zero.

Next, in step ST14, as in step ST12, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr, and Sqdn to a high level, and outputs the other gate signals to a low level. That is, from step ST13, only the gate signal Sqdn is changed from a low level to a high level, and the other gate signals are not changed. Thereby, the current path Pn1 is formed, and the current flowing in the current path Pn2 before the step ST14 is started and the current supplied from the power supply capacitor 11 flow toward the current path Pn1. At this time, the currents of the currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, and Iqdn are larger than those of the current flowing in the current path Pn2 before the start of step ST14. The energy Ec of the power supply capacitor 11 is further reduced with the passage of time. In addition, the currents Iqhn, Iqif, Iqir, and Iqdp do not flow through the transistors Qhn, Qif, Qir, and Qdp.

Next, in step ST15, similarly to step ST13, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, and Sqcr to a high level, and outputs the other gate signals to a low level. That is, from step ST14, only the gate signal Sqdn is changed from a high level to a low level, and the other gate signals are not changed. Thereby, the current path Pn2 is formed, and the current flowing through the current path Pn1 before starting step ST15 flows toward the current path Pn2. At this time, as in step ST13, the current amounts of the currents Ic, Iqp, and Iqdn become 0, and the current amounts of the currents Iqhp, Iqcf, -Iqcr, IL, and -Iqdp gradually decrease with the passage of time. In addition, the current amounts of the currents Iqhn, Iqif, and Iqir are still zero. Since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this point, the waveform required for the N-side switch measurement can be obtained. That is, until the transistor Qdn of steps ST12 to ST15 is set to the off state, a waveform required for the switch measurement of the transistor Qdn can be obtained. This means that the process until the transistor Qdn of steps ST12 to ST15 is turned off can be referred to as a switch measurement of the transistor Qdn in a narrow sense.

Thereafter, the control device 30 changes the gate signal Sqhp from a high level to a low level. Accordingly, the transistors Qp, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 5, from the-terminal of the power capacitor 11, the diode Dhn, the transistor Qcf, the transistor Qcr, the reactor L, the diode Ddp, and the transistor Qp are sequentially returned to the power source. The current path Pn3 of the + terminal of the capacitor 11 before the gate signal Sqhp is to be switched to a low level, the current flowing in the current path Pn2 flows toward the current path Pn3. Therefore, the amount of current Iqhp becomes zero. Since the current path Pn3 is from the-terminal of the power capacitor 11 to the + terminal, the power capacitor 11 is charged, and the energy Ec increases with the passage of time. On the other hand, the current -Iqhn (flows in the diode Dhn) The amount of current), Iqcf, -Iqcr, IL, -Iqdp, -Iqp, -Ic (the current flowing from the-terminal to the + terminal of the power capacitor 11) decreases with the passage of time. In addition, the current amounts of the currents Iqdn, Iqif, and Iqir are still zero.

Next, in step ST16, the same state as that in step ST15 is maintained, the current amount of the current flowing in the current path Pn3 becomes 0, and the energy Ec of the power supply capacitor 11 is substantially restored to a fully charged state.

Next, in step ST17, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to the low level and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are turned off, and no current flows in each transistor. In this way, the N-side switch measurement is completed. In addition, a detection circuit or the like may be used to detect a situation where the amount of current flowing in the current path Pn3 becomes below a specific threshold, and the control device 30 detects the flow through the current path Pn3 by an output signal from the detection circuit. The amount of current in the current is approximately 0 (the end of the energy recovery process). The specific threshold value is set to, for example, 0, or a value slightly larger than 0. Moreover, the control device 30 may perform the processing of step ST17 in accordance with detecting the end of the energy recovery processing.

As described above, when the control device 30 starts the N-side switch measurement, the transistor Qp, Qhp, Qcf, Qcr are set to the on state, and corresponding to the end of waveform acquisition of the N-side switch measurement, the transistor Qhp is set to the off state, thereby recovering the energy used in the N-side switch measurement. The control device 30 recovers the energy used in the N-side switch measurement and sets the transistors Qp, Qcf, and Qcr to the off state. Therefore, since the energy Ec is almost fully charged at the end of the N-side switch measurement, it is not necessary to use a high-voltage power supply to charge the power supply capacitor 11 for the next measurement.

Next, switching measurement of the transistor Qdp (sometimes referred to as "P-side switching measurement") will be described. FIG. 6 is a timing chart of the P-side switch measurement of the dynamic characteristic test device 1. FIG. Fig. 7 is a diagram showing a current path when a switch measured by a P-side switch is turned on. Fig. 8 is a diagram showing a current path when a switch measured by a P-side switch is turned off. Fig. 9 is a diagram showing a current path during energy recovery measured by a P-side switch.

As shown in FIG. 6, since step ST21 is the same as step ST11 of FIG. 2, the related description is omitted. Next, in step ST22, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr, and Sqdp to the high level, and outputs the other gate signals to the low level. Accordingly, the transistors Qp, Qhn, Qcf, Qcr, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 7, from the + terminal of the power capacitor 11, the transistor Qp, the transistor Qdp, the reactor L, the transistor Qcr, the transistor Qcf, and the transistor Qhn are sequentially returned to the power capacitor 11. The-terminal current path Pp1 flows a current supplied from the power supply capacitor 11 in the current path Pp1. In this state, the currents of the currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn increase with the passage of time. On the other hand, the energy Ec of the power capacitor 11 decreases with the passage of time. In addition, the currents Iqhp, Iqif, Iqir, and Iqdn do not flow through the transistors Qhp, Qif, Qir, and Qdn. That is, in step ST22, the control device 30 sets the transistor Qhn to the on state and sets the transistor Qdp as the switching measurement target, and sets the transistors Qp, Qcf, and Qcr to the on state to self-power The capacitor 11 supplies a current to the transistor Qdp.

Next, in step ST23, the control device 30 sends the gate signals Sqp, Sqhn, Sqcf and Sqcr are set to a high level, and other gate signals are set to a low level and output. That is, from step ST22, only the gate signal Sqdp is changed from the high level to the low level, and the other gate signals are not changed. As a result, the transistors Qp, Qhn, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 8, a current path Pp2 formed in sequence with the transistor Qhn, the diode Ddn, the reactor L, the transistor Qcr, and the transistor Qcf is formed, and flows in the current path Pp1 immediately before step ST23 is started. The current flows toward the current path Pp2. Therefore, the current amounts of the currents Ic, Iqp, and Iqdp become 0, and since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this time, because the energy is consumed by the resistance components of the transistor Qhn, the diode Ddn, the reactor L, the transistor Qcr, and the transistor Qcf, the currents Iqhn, -Iqdn (the current flowing in the diode Ddn), The current amounts of -IL, Iqcr, and -Iqcf are the current amounts of the currents flowing in the current path Pp1 before step ST23 is started, and gradually decrease with the passage of time. In addition, the current amounts of the currents Iqhp, Iqif, and Iqir are still zero.

Next, in step ST24, similar to step ST22, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr, and Sqdp to a high level, and outputs the other gate signals to a low level. That is, from step ST23, only the gate signal Sqdp is changed from the low level to the high level, and the other gate signals are not changed. Thereby, the current path Pp1 is formed, and before the step ST24 is started, the current flowing in the current path Pp2 and the current supplied from the power supply capacitor 11 flow toward the current path Pp1. At this time, the currents of the currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn have further increased with the passage of time from the current flowing in the current path Pp2 before the start of step ST24. On the one hand, the energy Ec of the power supply capacitor 11 is further reduced over time. In addition, the currents Iqhp, Iqif, Iqir, and Iqdn do not flow through the transistors Qhp, Qif, Qir, and Qdn.

Next, in step ST25, as in step ST23, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, and Sqcr to a high level, and sets other gate signals Set to low level and output. That is, from step ST24, only the gate signal Sqdp is changed from the high level to the low level, and the other gate signals are not changed. Thereby, the current path Pp2 is formed, and the current flowing in the current path Pp1 before the step ST25 is started is flowing toward the current path Pp2. At this time, as in step S23, the current amounts of the currents Ic, Iqp, and Iqdp become 0, and the current amounts of the currents Iqhn, -Iqdn, -IL, Iqcr, and -Iqcf gradually decrease as time passes. In addition, the current amounts of the currents Iqhp, Iqif, and Iqir are still zero. Since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this point, the waveform required for the P-side switch measurement can be obtained. That is, until the transistor Qdp of steps ST22 to ST25 is turned off, a waveform required for the switch measurement of the transistor Qdp can be obtained. This means that the process until the transistor Qdp of steps ST22 to ST25 is turned off can be referred to as a switch measurement of the transistor Qdp in a narrow sense.

Thereafter, the control device 30 changes the gate signal Sqhn from a high level to a low level. Accordingly, the transistors Qp, Qcf, and Qcr are turned on, and the other transistors are turned off. At this time, as shown in FIG. 9, from the-terminal of the power capacitor 11, the diode Ddn, the reactor L, the capacitor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qp are sequentially returned to the power capacitor. The current path Pp3 of the + terminal of 11 is before the gate signal Sqhn is switched to a low level, the current flowing in the current path Pp2 flows toward the current path Pp3. Therefore, the current amount of the current Iqhn becomes zero. Furthermore, since the current path Pp3 is from the-terminal of the power capacitor 11 to the + terminal, the power capacitor 11 is charged, and the energy Ec increases with the passage of time. On the other hand, the currents -Iqdn, -IL, Iqcr,- The amount of current Iqcf, -Iqhp (current flowing in the diode Dhp), -Iqp, -Ic decreases with the passage of time. In addition, the current amounts of the currents Iqdp, Iqif, and Iqir are still zero.

Next, in step ST26, the same state as in step ST25 is continued, the amount of current flowing in the current path Pp3 becomes 0, and the energy Ec of the power supply capacitor 11 is restored to a fully charged state.

Next, in step ST27, the control device 30 sends the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn are all set to a low level and output. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are turned off, and no current flows in each transistor. In this way, the P-side switch measurement is completed. Furthermore, the amount of current flowing in the current path Pp3 may be detected by a detection circuit or the like not shown, and the control device 30 may detect the amount of current flowing in the current path Pp3 by an output signal from the detection circuit. The amount of current is approximately 0 (the end of the energy recovery process). The specific threshold value is set to, for example, 0, or a value slightly larger than 0. In addition, the control device 30 may perform the processing of step ST27 in response to detecting the end of the energy recovery processing.

As described above, when the control device 30 starts the P-side switch measurement, the transistors Qp, Qhn, Qcf, and Qcr are turned on, and the waveform acquisition corresponding to the P-side switch measurement is completed, and the transistor Qhn is set In the off state, the energy used in the measurement of the P-side switch is recovered. The control device 30 recovers the energy used in the P-side switch measurement and sets the transistors Qp, Qcf, and Qcr to the off state. Therefore, since the energy Ec is approximately fully charged at the end of the P-side switch measurement, it is not necessary to charge the power supply capacitor 11 with a high-voltage power supply for the next measurement.

Next, a comparative example of the switch measurement using the dynamic characteristic tester 1 will be described. FIG. 10 is a timing chart of the N-side switch measurement of the comparative example. Fig. 11 is a timing chart of the P-side switch measurement of the comparative example. As shown in FIG. 10, the N-side switch measurement of the comparative example is different from the N-side switch measurement of FIG. 2 in that the timing of switching the gate signal Sqhp from a high level to a low level is different. Specifically, in the N-side switch measurement of the comparative example, in steps ST115 and ST116, the control device 30 maintains the gate signal Sqhp at a high level. Therefore, the amount of current (currents Iqhp, Iqcf, -Iqcr, IL, and -Iqdp) flowing in the current path Pn2 gradually decreases with the passage of time and eventually becomes 0, but the power supply capacitor 11 is not charged. Therefore, before the next measurement is performed, the power supply capacitor 11 must be charged with a high-voltage power supply.

Similarly, as shown in FIG. 11, the P-side switch measurement of the comparative example is different from the P-side switch measurement of FIG. 6 in that the gate signal Sqhn is switched from the high level to the low level timing. Specifically, in the measurement of the P-side switch of the comparative example, in steps ST125 and ST126, the control device 30 maintains the gate signal Sqhn at a high level. Therefore, the amount of current (currents Iqhn, -Iqdn, -IL, Iqcr, and -Iqcf) flowing in the current path Pp2 gradually decreases with the passage of time and eventually becomes 0, but the power supply capacitor 11 is not charged. Therefore, before performing the next measurement, the power supply capacitor 11 must be charged with a high-voltage power supply.

Next, the overcurrent prevention of the dynamic characteristic test device 1 will be described. First, the overcurrent prevention measured by the N-side switch will be described. FIG. 12 is a timing chart of the N-side switch measurement including the overcurrent prevention processing of the dynamic characteristic test device 1. FIG. 13 is a diagram showing a current path during an overcurrent prevention process measured by an N-side switch.

As shown in FIG. 12, since the gate signals of steps ST31 to ST33 are the same as steps ST11 to ST13 of FIG. 2, the related description is omitted. In this example, in step ST33, it is assumed that the transistor Qdn cannot be turned off due to a defective DUT50. In this case, after step ST32, in the current path Pn1, currents (currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, Iqdn) continue to flow, and the amount of current continues to increase over time.

Furthermore, in step ST34, the current amount of the current flowing in the current path Pn1 becomes larger than the overcurrent threshold Ref_N on the N side, and the comparator 23 outputs a low-level output signal to the control device 30. Then, the control device 30 detects the overcurrent in response to the low level output signal received from the comparator 23, changes the gate signals Sqp, Sqhp from the high level to the low level, and changes the gate signal Sqir from the low level to the high level . Accordingly, the transistors Qcf, Qcr, Qir, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 13, a current path Pn41 sequentially formed by the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn cycle is formed, and the reactor L, Current path Pn42 of transistor Qir and diode Dif cycle. The overcurrent flowing in the current path Pn1 is branched into a current path Pn41 and a current path Pn42 and flows. This can prevent an overcurrent from continuously flowing toward the test circuit 10 and the DUT 50.

Next, in step ST35, similarly to step ST15, the control device 30 only changes the gate signal Sqdn from the high level to the low level from the state of the gate signal in step ST34, and does not change the other gate signals. However, because the DUT50 is defective, the transistor Qdn is not turned off, and each transistor is maintained in the same state as in step ST34. In addition, since the current flowing in the current path Pn41 is circulated in the current path Pn41, energy is consumed by the resistance components of the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn, so the current amount Decreasing over time. Similarly, because the current flowing in the current path Pn42 circulates in the current path Pn42, the energy is consumed by the resistance components of the reactor L, the transistor Qir, and the diode Dif, so the current amount continues as time passes. cut back.

Next, in step ST36, the state of the gate signal in step ST35 is maintained, and the current amount of the current flowing in the current path Pn41 and the current path Pn42 is further reduced to zero.

Next, in step ST37, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low levels and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are turned off, and no current flows in each transistor. In addition, a detection circuit or the like may also be used to detect a case where the amount of current flowing in the current path Pn41 and the current path Pn42 falls below a specific threshold, and the control device 30 detects the flow by an output signal from the detection circuit. The current amount of the current in the current path Pn41 and the current path Pn42 becomes approximately 0 (the end of the energy consumption process). The specific threshold value is set to, for example, 0, or a value slightly larger than 0. In addition, the control device 30 may perform the processing of step ST37 in response to detecting the end of the energy consumption processing.

In summary, the control device 30 sets the transistors Qp and Qhp to the off state and sets the transistor Qir to the on state by detecting an overcurrent corresponding to the N-side switch measurement. The overcurrent prevention circuit 14 operates. Thereby, the energy accumulated in the reactor L when the overcurrent is generated is consumed by the overcurrent prevention circuit 14, and in the N-side switch measurement, it is possible to prevent excessive overcurrent from flowing to the DUT 50.

Next, the overcurrent prevention measured by the P-side switch will be described. FIG. 14 is a timing chart of the P-side switch measurement including the overcurrent prevention processing of the dynamic characteristic test device 1. Fig. 15 is a diagram showing a current path during an overcurrent prevention process measured by a P-side switch.

As shown in FIG. 14, since the gate signals of steps ST41 to ST43 are the same as steps ST21 to ST23 of FIG. 6, the related description is omitted. In this example, in step ST43, it is assumed that the transistor Qdp cannot be turned off due to a defective DUT50. In this case, after step ST42, in the current path Pp1, currents (currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, Iqdn) continue to flow, and the amount of current continues to increase over time.

Furthermore, in step ST44, the current amount of the current flowing in the current path Pp1 becomes larger than the overcurrent threshold Ref_P on the P side, and the comparator 24 outputs a low-level output signal to the control device 30. In addition, the control device 30 detects an overcurrent in response to the low level output signal received from the comparator 24, changes the gate signals Sqp, Sqhn from a high level to a low level, and changes the gate signal Sqif from a low level to a high level. . Accordingly, the transistors Qcf, Qcr, Qif, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 15, a current path Pp41 is sequentially formed in the loop of the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp, and the reactor L, the transistor, and the transistor are sequentially formed. Current path Pp42 of Qif and diode Dir cycle. The overcurrent flowing in the current path Pp1 is branched into a current path Pp41 and a current path Pp42 and flows. This can prevent an overcurrent from continuously flowing toward the test circuit 10 and the DUT 50.

Next, in step ST45, similarly to step ST25, the control device 30 proceeds from step For the state of the gate signal of ST44, only the gate signal Sqdp is changed from a high level to a low level, and other gate signals are not changed. However, because the DUT50 is defective, the transistor Qdp is not turned off, and each transistor is maintained in the same state as in step ST44. In addition, because the current flowing in the current path Pp41 circulates in the current path Pp41, the energy is consumed by the resistance components of the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp, so the current amount Decreasing over time. Similarly, because the current flowing in the current path Pp42 circulates in the current path Pp42, the energy is consumed by the reactor L, the transistor Qif, and the resistance component of the diode Dir, so the current amount continues as time passes. cut back.

Next, in step ST46, the state of the gate signal in step ST45 is maintained, and the current amount of the current flowing in the current path Pp41 and the current path Pp42 is further reduced to zero.

Next, in step ST47, the control device 30 sets the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to the low level and outputs them. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are turned off, and no current flows in each transistor. In addition, the amount of current flowing in the current path Pp41 and the current path Pp42 may be detected by a detection circuit or the like that is not shown below a specific threshold value. The control device 30 detects the current flowing through the output signal from the detection circuit. The current amounts of the currents in the path Pp41 and the current path Pp42 are approximately 0 (the energy consumption process ends). The specific threshold value is set to, for example, 0, or a value slightly larger than 0. In addition, the control device 30 may perform the processing of step ST47 in response to detecting the end of the energy consumption processing.

In summary, the control device 30 is based on the detection of the overcurrent in the P-side switch measurement, and the transistor Qp and Qhn are set to the off state, and the transistor Qif is set to the on state to make the The current prevention circuit 14 operates. Thereby, the energy accumulated in the reactor L when an overcurrent is generated is consumed by the overcurrent prevention circuit 14, and during the measurement of the P-side switch, the overcurrent can be prevented. Too much overcurrent flows towards the DUT50.

Furthermore, the overcurrent prevention using the high-speed blocking circuit 15 will be described. First, the overcurrent prevention measured using the N-side switch of the high-speed blocking circuit 15 will be described. FIG. 16 is a timing chart of the N-side switch measurement including the overcurrent prevention processing using the high-speed blocking circuit of the dynamic characteristic test device 1. FIG. FIG. 17 is a diagram showing a current path when an overcurrent prevention process using a high-speed blocking circuit is measured for an N-side switch.

The timing diagram of the gate signal shown in FIG. 16 is different from the timing diagram of the gate signal shown in FIG. 12. The difference is in step ST54. The control device 30 detects the overcurrent in accordance with the gate signal, and further changes the gate signal. Sqcf, Sqcr changed from high level to low level. Therefore, if an overcurrent is detected, the transistors Qir and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 17, since the current path Pn41 is not formed, and only the current path Pn42 is formed, the overcurrent flowing in the current path Pn1 flows toward the current path Pn42. In addition, since the current flowing in the current path Pn42 consumes energy due to the circulation in the current path Pn42, the amount of current decreases continuously with the passage of time.

To sum up, the control device 30 detects the overcurrent in the N-side switch measurement, sets the transistors Qp and Qhp to the off state, and sets the transistor Qir to the on state to make the overcurrent prevention circuit 14 operations, and further, the transistors Qcf and Qcr are turned off to operate the high-speed blocking circuit 15. Accordingly, the energy accumulated in the reactor L when an overcurrent is generated flows through the overcurrent prevention circuit 14 as a current, and is consumed by the overcurrent prevention circuit 14. When the high-speed blocking circuit 15 is not operated, the overcurrent flowing in the current path Pn1 is branched into a current path Pn41 and a current path Pn42 and flows. At this time, the resistance value contributing to the consumption of the overcurrent is the combined current value of the resistance value of the resistance component of the current path Pn41 and the resistance value of the resistance component of the current path Pn42, and is greater than the resistance value of the resistance component of the current path Pn42. smaller. Therefore, compared with the case where the high-speed blocking circuit 15 is not operated, the case where the high-speed blocking circuit 15 is operated is because the resistance value which contributes to the consumption of the overcurrent becomes larger, so it can be consumed and accumulated in the reactance in a short time. The energy of the device L is measured at the N-side switch In this way, it is possible to more reliably prevent excessive overcurrent from flowing to the DUT50.

Next, the overcurrent prevention measured using the P-side switch of the high-speed blocking circuit 15 will be described. FIG. 18 is a timing chart of the P-side switch measurement including overcurrent prevention processing using the high-speed blocking circuit of the dynamic characteristic test device 1. FIG. Fig. 19 is a diagram showing a current path when an overcurrent prevention process using a high-speed blocking circuit is measured by a P-side switch.

The timing diagram of the gate signal shown in FIG. 18 is different from the timing diagram of the gate signal shown in FIG. 14. The difference is in step ST64. The control device 30 detects the overcurrent and further changes the gate signal. Sqcf, Sqcr changed from high level to low level. Therefore, if an overcurrent is detected, the transistors Qif and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 19, since the current path Pp41 is not formed, and only the current path Pp42 is formed, the overcurrent flowing in the current path Pp1 flows toward the current path Pp42. In addition, since the current flowing in the current path Pp42 consumes energy due to the circulation in the current path Pp42, the amount of current decreases continuously with the passage of time.

In summary, the control device 30 detects the overcurrent in accordance with the measurement of the P-side switch, and sets the transistors Qp and Qhn to the off state, and sets the transistor Qif to the on state to prevent overcurrent. The circuit 14 operates, and further, the transistors Qcf and Qcr are turned off to operate the high-speed blocking circuit 15. As a result, the energy accumulated in the reactor L when an overcurrent is generated flows through the overcurrent prevention circuit 14 as a current and is consumed by the overcurrent prevention circuit 14. When the high-speed blocking circuit 15 is not operated, the overcurrent flowing in the current path Pp1 is branched into a current path Pp41 and a current path Pp42 and flows. At this time, the resistance value contributing to the consumption of the overcurrent is the combined current value of the resistance value of the resistance component of the current path Pp41 and the resistance value of the resistance component of the current path Pp42, and is greater than the resistance value of the resistance component of the current path Pp42. smaller. Therefore, compared with the case where the high-speed blocking circuit 15 is not operated, the case where the high-speed blocking circuit 15 is operated is because the resistance value which contributes to the consumption of the overcurrent becomes larger, so it can be consumed and accumulated in the reactance in a short time. In the measurement of the p-side switch, the energy of the device L can more reliably prevent excessive overcurrent from flowing to the DUT50.

(Measurement of short-circuit capacity)

Next, the short-circuit capacity measurement using the dynamic characteristic measuring device 1 will be described. First, the short-circuit capacity measurement of the transistor Qdn (sometimes referred to as "N-side short-circuit capacity measurement") will be described. FIG. 20 is a timing chart of the N-side short-circuit capacity measurement of the dynamic characteristic test device 1. FIG. As shown in FIG. 20, in step ST71, the control device 30 sets the relay signals Sswp, Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low levels and outputs them. Therefore, the switches SWp, SWn and the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, Qdn are all in an off state, and no current flows in each transistor and switch.

Next, in step ST72, the control device 30 sets the relay signal Sswp and the gate signals Sqp, Sqdn to a high level, and sets the relay signal Sswn and the gate signals Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp to Low level and output. Thereby, the switch SWp and the transistors Qp and Qdn are turned on, and the other switches and the transistors are turned off. At this time, a current path is formed from the + terminal of the power supply capacitor 11 to the-terminal of the power capacitor 11 through the transistor Qp, the switch SWp, and the transistor Qdn in this order, and a current flows in the current path. In this way, the short-circuit current flows in the transistor Qdn without passing through the reactor L.

Next, in step ST73, the control device 30 sets the relay signals Sswp, Sswn, and the gate signals Sqp, Sqhp, Sqhn, sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to the low level similarly to step ST71. Output. As a result, all switches and transistors are turned off, and no current flows through the transistors and switches. Through the above series of processes, the N-side short-circuit capacity is measured.

Next, the short-circuit capacity measurement (sometimes called "P-side short-circuit capacity measurement") of the transistor Qdp will be described. FIG. 21 is a timing chart of the P-side short-circuit capacity measurement of the dynamic characteristic test device 1. FIG. As shown in FIG. 21, in step ST81, the control device 30 transmits the relay signals Sswp, Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp and Sqdn are set to low level and output. Therefore, the switches SWp, SWn and the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, Qdn are all turned off, and no current flows through the transistors and switches.

Next, in step ST82, the control device 30 sets the relay signal Sswn and the gate signals Sqp and Sqdp to a high level, and sets the relay signal Sswp and the gate signals Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, and Sqdn to low levels. Output. Thereby, the switch SWn and the transistors Qp and Qdp are turned on, and the other switches and the transistors are turned off. At this time, a current path is formed from the + terminal of the power supply capacitor 11 to the-terminal of the power supply capacitor 11 through the transistor Qp, the transistor Qdp, and the switch SWn in this order, and a current flows in the current path. In this way, the short-circuit current flows in the transistor Qdp without passing through the reactor L.

Next, in step ST83, the control device 30 sets the relay signals Sswp, Sswn, and the gate signals Sqp, Sqhp, Sqhn, sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to the low level similarly to step ST81. Output. As a result, all switches and transistors are turned off, and no current flows through the transistors and switches. Through one of the above-mentioned series of processes, the P-side short-circuit capacity is measured.

In the dynamic characteristic test device 1 described above, when the switching measurement of the transistor Qdn is started, the transistors Qp, Qhp, Qcf, and Qcr are set to the ON state, corresponding to the switching measurement of the transistor Qdn (for switching After the measurement waveform is acquired, the transistor Qhp is set to the off state, and the transistors Qp, Qcf, and Qcr are set to the off state. During the switching measurement of the transistor Qdn, the current supplied from the power supply capacitor 11 to the transistor Qdn flows from the connection portion Cs toward the connection portion Cd and flows in the reactor L. In the switching measurement of the transistor Qdn (for switching measurement At the end of the waveform capture), energy is accumulated in the reactor L. Therefore, by the end of the switch measurement (waveform capture for switch measurement) corresponding to the transistor Qdn, the transistor Qhp is set to the off state, and the diode Dhn is sequentially passed from the-terminal of the power capacitor 11 , Transistor Qcf, transistor Qcr, reactor L, diode Ddp and The transistor Qp returns to the current path Pn3 of the + terminal of the power capacitor 11, and the energy accumulated in the reactor L flows as a current toward the + terminal of the power capacitor 11. Thereby, a part of the energy (electricity) of the power supply capacitor 11 used in the switching measurement of the transistor Qdn can be recovered. As a result, it is possible to reduce the power consumption of the dynamic characteristic test. In addition, the time for charging the power supply capacitor 11 for the next measurement can be shortened, and the cycle time of the machine can be shortened (accelerated).

Further, in the dynamic characteristic test device 1, when the switching measurement of the transistor Qdp is started, the transistors Qp, Qhn, Qcf, and Qcr are set to the ON state, and the switching measurement corresponding to the transistor Qdp (for switching measurement After the waveform capture) is completed, the transistor Qhn is set to the off state, and the transistors Qp, Qcf, and Qcr are set to the off state. During the switching measurement of the transistor Qdp, the current supplied from the power capacitor 11 to the capacitor Qdp flows in the reactor L from the connection portion Cd toward the connection portion Cs. At the time of completion, energy is accumulated in the reactor L. Therefore, by the end of the switch measurement (waveform capture for switch measurement) corresponding to the transistor Qdp, the transistor Qhn is set to the off state, and the diode Ddn is sequentially passed from the-terminal of the power capacitor 11 , Reactor L, transistor Qcr, transistor Qcf, diode Dhp, and transistor Qp return to the current path Pp3 of the + terminal of the power capacitor 11, and the energy accumulated in the reactor L is used as a current toward the + of the power capacitor 11 The terminal flows. Thereby, a part of the energy (electricity) of the power supply capacitor 11 used in the switching measurement of the transistor Qdp can be recovered. As a result, it is possible to further reduce the power consumption of the dynamic characteristic test. In addition, the time for charging the power supply capacitor 11 for the next measurement can be shortened, and the cycle time of the machine can be shortened (fastened).

In addition, in the dynamic characteristic measuring device 1, the transistor Qdn is selected as the switch measurement object by setting the transistor Qhp to the on state, and during the switch measurement of the transistor Qdn, it flows from the connection portion in the reactor L The current of Cs toward the connection portion Cd. In addition, by setting the transistor Qhn to the on state, the transistor Qdp is selected as the measurement target of the switch, and During the switching measurement, a current flowing from the connection portion Cd toward the connection portion Cs flows through the reactor L. That is, a bidirectional current can flow through the reactor L. In addition, in the switching measurement of the transistor Qdn, if an overcurrent exceeding the overcurrent threshold Ref_N is detected in the dynamic characteristic test device 1, the transistor Qir is turned on and formed in Current path Pn42 of reactor L, transistor Qir and diode Dif cycle. The energy stored in the reactor L is consumed as a current flowing through the current path Pn42. On the other hand, in the switching measurement of the transistor Qdp, when an overcurrent exceeding the overcurrent threshold Ref_P is detected in the dynamic characteristic test device 1, the transistor Qif is turned on to form Current path Pp42 in the reactor L, transistor Qif and diode Dir cycle. The energy stored in the reactor L is consumed as a current flowing in the current path Pp42. In this way, in the dynamic characteristic test device 1 including a transistor Qdp electrically connected in series and a transistor Ddn50 of the transistor Qdn, although a bidirectional current flows in the reactor L, it is possible to prevent additional overcurrent in any direction from going to the DUT50. flow. Thereby, a failure or the like of the dynamic characteristic test device 1 can be avoided. As a result, the frequency of maintenance such as replacement of parts can be reduced, and the cost can be reduced.

The diode Dif is a reflow diode of a transistor Qif, and the diode Dir is a reflow diode of a transistor Qir. The diode Dif is arranged so that its forward direction becomes the direction from the connecting portion Cd to the connecting portion Cs, and the diode Dir is arranged so that its forward direction becomes the direction from the connecting portion Cs to the connecting portion Cd. In this way, the reflow diodes for protecting the transistors Qif and Qir are used to form the above-mentioned current paths Pn42 and Pp42. Therefore, it is possible to suppress the increase of parts and prevent an extra bidirectional excess current from flowing to the DUT50.

In the switch measurement of the transistor Ddn, when an overcurrent is detected, the transistor Qir is set to the on state, and the transistors Qcf and Qcr are set to the off state, thereby blocking the connection with The current path Pn42 is different from the current path Pn41. Therefore, the energy accumulated in the reactor L can be made to flow as an electric current in the overcurrent prevention circuit 14 (current path Pn42), and the energy accumulated in the reactor L can be consumed at high speed. Similarly, for transistors In the Qdp switch measurement, when an overcurrent is detected, the transistor Qif is set to the on state, and the transistors Qcf and Qcr are set to the off state, thereby blocking the difference from the current path Pp42. Current path Pp41. Therefore, the energy accumulated in the reactor L can be made to flow as an electric current in the overcurrent prevention circuit 14 (current path Pp42), and the energy accumulated in the reactor L can be consumed at high speed.

Furthermore, the dynamic characteristic test device and the dynamic characteristic test method of the present invention are not limited to the above-mentioned embodiments. For example, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr are not limited to IGBTs, as long as they are switch sections that can switch on and off states. For example, as transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, other transistors such as FET (Field Effect Transistor), bipolar transistors, and relays that can operate at high speed can be used. . By using a transistor, the on-state and off-state can be switched at high speed, and the accuracy of the dynamic characteristic test including the switch measurement can be improved.

In addition, instead of the power supply capacitor 11, another rechargeable power supply may be used. When the purpose is not to perform energy recovery during switch measurement, a power source that cannot be charged may be used, and the main switch unit 12 may not be provided. In this case, the + terminal of the power capacitor 11 is electrically connected to the collector of the transistor Qhp, the cathode of the diode Dhp, one terminal of the switch SWp, the collector of the transistor Qdp, and the cathode of the diode Ddp. The-terminal of the power capacitor 11 is electrically connected to the emitter of the transistor Qhn, the anode of the diode Dhn, the other end of the switch SWn, the emitter of the transistor Qdn, and the anode of the diode Ddn.

When the purpose is to perform energy recovery for switch measurement, the overcurrent prevention circuit 14 and the high-speed blocking circuit 15 may not be provided. In this case, the emitter of the transistor Qhp and the collector of the transistor Qhn are electrically connected to one end of the reactor L.

The high-speed blocking circuit 15 only needs to set the transistor Qcf to the off state when the overcurrent measured by the N-side switch is blocked at a high speed, and when the overcurrent measured by the P-side switch is blocked at a high speed. , At least the transistor Qcr can be set to the off state. In addition, when the high-speed blocking circuit 15 blocks the overcurrent measured by the N-side switch at high speed, The reactor L may be connected in series and provided in a portion of the current path Pn41 that does not overlap the current path Pn42. In addition, when the high-speed blocking circuit 15 blocks the overcurrent measured by the P-side switch at high speed, it may be provided in series with the reactor L and placed in a portion of the current path Pp41 that does not overlap the current path Pp42. The high-speed blocking circuit 15 may be provided between the DUT 50 and the reactor L, for example. In addition, the high-speed blocking circuit 15 only needs to include a switching unit that can switch between an on-state and an off-state, and may be, for example, a relay.

The overcurrent prevention circuit 14 may be configured to prevent bidirectional overcurrent. The overcurrent prevention circuit 14 may be, for example, a reverse resistance IGBT. More specifically, the overcurrent prevention circuit 14 only needs to have a switch portion and a diode electrically connected in series in one direction from the connection portion Cd to the connection portion Cs, and another direction from the connection portion Cs to the connection portion Cd. It only needs to be provided with a switch part and a diode which are electrically connected in series. The bipolar system in one direction is configured in such a manner that its forward direction becomes one direction, and the diode in the other direction may be configured in such a manner that its forward direction becomes the other direction.

As shown in FIG. 22, the overcurrent prevention circuit 14 can be configured as a diode bridge, for example. To be more specific, the overcurrent prevention circuit 14 according to the modification includes the transistor Qi, the diode Di, and the diodes D1 to D4. Transistor Qi series IGBT. A cathode of the diode Di is electrically connected to a collector of the transistor Qi, and an anode of the diode Di is electrically connected to an emitter of the transistor Qi. That is, the diode Di is electrically connected in parallel to the reflow diode of the transistor Qi. The collector of transistor Qi is electrically connected to the cathode of diode D1 and the cathode of diode D3, and the emitter of transistor Qi is electrically connected to the anode of diode D2 and the anode of diode D4. The anode of diode D1 and the cathode of diode D2 are electrically connected to each other, and are electrically connected to the collector of transistor Qcr, the cathode of diode Dcr, and one end of reactor L. The anode of the diode D3 and the cathode of the diode D4 are electrically connected to each other, and are electrically connected to the other end of the reactor L, the other end of the switch SWp, one end of the switch SWn, and the O terminal of the DUT50.

For example, in step ST34 of FIG. 12, the amount of current (currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, Iqdn) flowing in the current path Pn1 increases and becomes more than the N side The overcurrent threshold Ref_N is larger. When the comparator 23 outputs a low-level output signal to the control device 30, the control device 30 detects the overcurrent corresponding to the low-level output signal received from the comparator 23, and The gate signals Sqp and Sqhp are changed from a high level to a low level. As a result, the transistors Qcf, Qcr, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in FIG. 23, a current path Pn41 is formed, and an overcurrent flowing in the current path Pn1 flows toward the current path Pn41.

Next, the control device 30 changes the gate signal Sqi from a low level to a high level. As a result, the transistor Qi is further turned on, and as shown in FIG. 23, a current path Pn43 that flows in the order of the loop of the reactor L, the diode D3, the transistor Qi, and the diode D2 is formed and flows in the current path. Part of the current in Pn41 flows toward the current path Pn43. And, because the current flowing in the current path Pn41 circulates in the current path Pn41, the energy is consumed by the resistance components of the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn, so the current amount Decreasing over time. Similarly, because the current flowing in the current path Pn43 circulates in the current path Pn43, the energy is consumed by the resistance components of the reactor L, the diode D3, the transistor Qi, and the diode D2, so the current amount varies with As time passes, it decreases.

In step ST44 of FIG. 14, the current amount of the currents (currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn) flowing in the current path Pp1 increases and becomes larger than the overcurrent threshold value on the P side. Ref_P is larger. When the comparator 24 outputs a low-level output signal to the control device 30, the control device 30 detects an overcurrent corresponding to the low-level output signal received from the comparator 24, and outputs the gate signal Sqp , Sqhn changed from a high level to a low level. Thereby, the transistors Qcf, Qcr, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in FIG. 24, a current path Pp41 is formed, and an overcurrent flowing in the current path Pp1 flows toward the current path Pp41.

Next, the control device 30 changes the gate signal Sqi from a low level to a high level. Thereby, the transistor Qi is further turned on, and as shown in FIG. 24, the reactor is sequentially formed by the reactor. A part of the current path Pp43 circulated by L, diode D1, transistor Qi, and diode D4, a part of the current flowing in the current path Pp41 flows toward the current path Pp43. In addition, because the current flowing in the current path Pp41 circulates in the current path Pp41, the energy is consumed by the resistance components of the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp, so the current amount varies with As time passes, it decreases. Similarly, since the current flowing in the current path Pp43 is circulated in the current path Pp43, the energy is consumed by the resistance components of the reactor L, the diode D1, the transistor Qi, and the diode D4, so that the amount of current thereof varies with time. Passing through and decreasing. The overcurrent prevention circuit 14 configured in this way can also prevent bidirectional overcurrent in the dynamic characteristic test device 1.

Furthermore, as shown in FIG. 25 (a), when the overcurrent prevention circuit 14 is composed of transistors Qif and Qir and diodes Dif and Dir, even when the transistor Qp is measured in the N-side switch measurement, When Qhp is set to the off state, the transistor Qir is set to the on state, and no short-circuit current does not flow through the reactor L. In this way, when the overcurrent prevention circuit 14 is composed of the transistors Qif and Qir and the diodes Dif and Dir, the timing of setting the capacitors Qp and Qhp to the off state and the timing of setting the transistor Qir to the on state The order is arbitrary, and the measurement of the P-side switch is the same.

On the other hand, as shown in FIG. 25 (b), when the overcurrent prevention circuit 14 is constituted by a diode bridge, if the transistors Qp and Qhp are turned off during the N-side switch measurement, Before the transistor Qi is turned on, the transistor Qp, transistor Qhp, transistor Qcf, transistor Qcr, diode D1, diode Qi, and The electrode body D4 and the transistor Qdn return to the current path Pn5 of the − terminal of the power supply capacitor 11. Since the current path Pn5 is a current path that does not pass through the reactor L, a short-circuit current flows in the dynamic characteristic test device 1. Therefore, when the overcurrent prevention circuit 14 is constituted by a diode bridge, when the overcurrent prevention circuit 14 is operated, the transistors Qp and Qhp must be turned off, and then the transistor Qi must be set to Is on. The same applies to the P-side switch.

Thus, in the case where the overcurrent prevention circuit 14 is composed of the transistors Qif and Qir and the diodes Dif and Dir, the transistors Dif and Qir are electrically connected in series. Therefore, any one of the transistors Qif and Qir is connected in series. One is set to the on state, and in the overcurrent prevention circuit 14, only a current flows in one direction. Therefore, in the N-side switch measurement, even if the transistor Qir is set to the on state before the transistors Qp and Qhp are turned off, no short-circuit current flows in the transistor Qdn; in the P-side switch measurement, That is, it is convenient to set the transistor Qif to the on state before setting the transistors Qp and Qhn to the off state, and no short-circuit current flows in the transistor Qdp. Therefore, it is possible to reduce the limitation of the timing for operating the overcurrent prevention circuit 14 and simplify the control.

In addition, the DUT50 is not limited to a 2in1 type power semiconductor module, as long as it is a device including a transistor Qdp and a transistor Qdn. For example, DUT50 can also be 4in1 type, 6in1 type and 8in1 type power semiconductor modules.

Fig. 26 is a circuit diagram showing another modified example of the dynamic characteristic tester. The dynamic characteristic test device 1A shown in FIG. 26 is a dynamic characteristic test device when a 6in1 type power semiconductor module is used as a DUT. The dynamic characteristic test device 1A is different from the dynamic characteristic test device 1 in that it replaces DUT50, uses DUT50A as a device under test, and includes test circuit 10A instead of test circuit 10. The test circuit 10A is different from the test circuit 10 in that it further includes a selection circuit 17. Note that, in FIG. 26, the illustration of the overcurrent detection circuit 20 is omitted.

DUT50A is a 6in1 type power semiconductor module containing 6 transistors. Specifically, the DUT50A is a group of three-phase (U, V, W-phase) DUT50 transistors Qdp, Qdn and diodes Ddp, Ddn in parallel. That is, the DUT50A includes transistors Qdpu, Qdnu and diodes Ddpu, Ddnu (first diode, second diode) for the U-phase, and transistors Qdpv, Qdnv, and diode for the V-phase. Ddpv and Ddnv (the first diode and the second diode) include transistors Qdpw and Qdnw for the W phase and diodes Ddpw and Ddnw. DUT50A has P terminal, U terminal, V terminal, W terminal and N terminal. P end The daughter is electrically connected to the collectors of the transistors Ddpu, Qdpv, and Qdpw, and the N terminal is electrically connected to the emitters of the transistors Qdnu, Qdnv, and Qdnw. The U terminal is electrically connected to the transistor Qdpu emitter and the transistor Qdnu collector, the V terminal is electrically connected to the transistor Qdpv emitter and the transistor Qdnv collector, and the W terminal is electrically connected to the transistor Qdpw. Emitter and collector of transistor Qdnw. For example, DUT50A can be used in 3-phase inverter circuits. Transistor Qdpu can be used for U-phase bridge arms. Transistor Qdnu can be used for U-phase bridge arms. Transistor Qdpv can be used for V-phase ones. On the upper bridge arm, the transistor Qdnv can be used for the bridge arm below the V phase, the transistor Qdpw can be used for the bridge arm above the W phase, and the transistor Qdnw can be used for the bridge arm below the W phase.

The selection circuit 17 is a circuit for selecting the three-phase (U, V, W-phase) transistors Qdp and Qdn included in the DUT50A to perform the switching measurement of the transistors Qdp and Qdn. The selection circuit 17 includes switches SWu, SWv, and SWw. The switches SWu, SWv, and SWw are relays. One ends of the switches SWu, SWv, and SWw are electrically connected to each other, and are electrically connected to the other end of the reactor L, the collector of the transistor Qir, the cathode of the diode Dir, the other end of the switch SWp, and one end of the switch SWn. . The other ends of the switches SWu, SWv, and SWw are electrically connected to the U, V, and W terminals of the DUT50A, respectively.

In the dynamic characteristic test device 1A thus configured, the control device 30 outputs gate signals Sqdpu, Sqdnu, Sqdpv, Sqdnv, Sqdpw, and Sqdnw to the transistors Qdpu, Qdnu, Qdpv, Qdnv, Qdpw, and Qdnw, respectively, and Switch on and off states of each transistor. In addition, the control device 30 outputs the relay signals Sswu, Sswv, and Ssww to the switches SWu, SWv, and SWw, respectively, to switch the on state and the off state of each switch. When the DUT is a power semiconductor module of another type, it may be configured in the same manner as the dynamic characteristic test device 1A.

Claims (13)

A dynamic characteristic tester is a tester for dynamic characteristics of a device under test. The device under test includes a first semiconductor and a second semiconductor electrically connected in series, and a first diode electrically connected in parallel to the first semiconductor. And a second diode electrically connected in parallel to the second semiconductor; and the dynamic characteristic test device includes: a power source that supplies a current for the dynamic characteristic test and is rechargeable; a reactor that becomes the above The load of the first semiconductor and the second semiconductor; a selection circuit having a first switch portion and a second switch portion electrically connected in series, a third diode electrically connected in parallel to the first switch portion, and The second diode is connected in parallel to the fourth diode of the second switching unit, and is used to select any one of the first semiconductor and the second semiconductor as the measurement target of the switch. The third switching unit is switched from the power source. Supply and interruption of current to the first semiconductor or the second semiconductor; and a control device that switches and controls the on states of the first switch section, the second switch section, and the third switch section, and Off state; and the first connection portion electrically connecting the first semiconductor and the second semiconductor, and the second connection portion electrically connecting the first switching portion and the second switching portion are via the reactor. And the electrical connection; the positive terminal of the power supply is electrically connected to the cathode of the first diode and the cathode of the third diode; the negative terminal of the power supply is electrically connected to the anode of the second diode and The anode of the fourth diode; and the third switch unit includes: a first transistor and a fifth diode electrically connected in parallel with the first transistor; and a cathode system of the fifth diode The positive terminal connected to the power supply; the control device sets the second switch section and the third switch section to the ON state when the switch measurement of the first semiconductor is started; the control device is: corresponding to When the measurement of the switch of the first semiconductor is completed, the second switch section is turned off, thereby forming the second diode, the reactor, and the third switch in order from the negative terminal of the power supply. Diode and above The three switching units return to the first current path of the positive terminal of the power supply, and recover the energy used in the switch measurement of the first semiconductor. For example, the dynamic characteristic test device of claim 1, wherein the control device is: after the second switch section is turned off in response to the end of the switch measurement of the first semiconductor, the third switch section is set as Disconnected. For example, the dynamic characteristic test device according to claim 2, wherein the control device is: after the second switch section is set to the off state corresponding to the end of the switch measurement of the first semiconductor, corresponding to the first current flowing The current amount of the path current is equal to or less than a specific threshold value, and the third switch unit is turned off. For example, the dynamic characteristic test device according to any one of claims 1 to 3, wherein the control device sets the first switch portion and the third switch portion to an ON state when starting the switch measurement of the second semiconductor, The control device is: in response to the end of the switch measurement of the second semiconductor, the first switch section is set to the off state, thereby forming the negative electrode terminal of the power supply to sequentially pass through the fourth diode, The reactor, the first diode, and the third switching unit return to the second current path of the positive terminal of the power supply, and recover the energy used in the switching measurement of the second semiconductor. For example, the dynamic characteristic test device of claim 4, wherein the control device is: after the first switch section is set to the off state corresponding to the end of the switch measurement of the second semiconductor, the third switch section is set to Disconnected. For example, the dynamic characteristic test device according to claim 5, wherein the control device is: after the first switch portion is turned off in response to the end of the switch measurement of the second semiconductor, the second current corresponds to the second current flowing The current amount of the path current is equal to or less than a specific threshold value, and the third switch unit is turned off. The dynamic characteristic test device according to any one of claims 1 to 3, wherein the first switch section and the second switch section are transistors. A dynamic characteristic test method is a tester for dynamic characteristics of a device under test. The device under test includes a first semiconductor and a second semiconductor electrically connected in series, and a first diode electrically connected in parallel to the first semiconductor. And the second diode connected electrically in parallel to the second semiconductor; and the dynamic characteristic test method includes the following steps: by electrically connecting the first switch section and the second switch section having electrical series connection, The third switching element connected in parallel to the first switching portion and the second switching portion of the selection circuit electrically connected in parallel to the fourth diode of the second switching portion are set to the ON state to select the above. The first semiconductor is the object of the switch measurement, and the third switch portion electrically connected in series to the rechargeable power source is set to the ON state, and the switch measurement of the first semiconductor is performed; and the switch corresponding to the first semiconductor is performed. At the end of the measurement, the second switch unit is turned off to form a first current path to recover the energy used in the switch measurement of the first semiconductor; the first semiconductor and the second semiconductor are recovered. The first connection portion of the semiconductor electrical connection and the second connection portion that electrically connects the first switch portion and the second switch portion are electrically connected through a reactor; the positive terminal of the power source is electrically connected to the first connection portion. The cathode of 1 diode and the cathode of the third diode; and the negative terminal of the power supply is electrically connected to the anode of the second diode and the anode of the fourth diode; and the third switch section includes : The first transistor and the fifth diode electrically connected in parallel to the first transistor; the cathode of the fifth diode is electrically connected to the positive terminal of the power source; the first current path is : The path from the negative terminal of the power source to the positive terminal of the power source in sequence through the second diode, the reactor, the third diode, and the third switching unit in this order. For example, the dynamic characteristic test method of claim 8 further includes a step of setting the third switch section to an off state after the step of recovering the energy used in the switch measurement of the first semiconductor. If the dynamic characteristic test method of the item 9 is requested, the current corresponding to the current flowing in the first current path is set to the off state corresponding to the end of the switch measurement of the first semiconductor, and the second switch is turned off. When the amount is equal to or less than a specific threshold, the third switching unit is turned off. The dynamic characteristic test method according to any one of claims 8 to 10, further comprising the step of: selecting the second semiconductor as a switch to be measured by setting the first switch portion of the selection circuit to an on state. The object, and set the third switch part to the on state to perform the switch measurement of the second semiconductor; and corresponding to the end of the switch measurement of the second semiconductor, to set the first switch part to the off state, Thereby, a second current is returned from the negative terminal of the power source to the positive terminal of the power source through the fourth diode, the reactor, the first diode, and the third switch in this order. Path to recover the energy used in the switch measurement of the second semiconductor. For example, the dynamic characteristic test method of claim 11 further includes a step of setting the third switch section to an off state after the step of recovering the energy used in the switch measurement of the second semiconductor. For example, if the dynamic characteristic test method of claim 12 is performed, the current corresponding to the current flowing through the second current path is set to the off state corresponding to the end of the switch measurement of the second semiconductor, and the first switch is turned off. When the amount is equal to or less than a specific threshold, the third switching unit is turned off.