CN107873084B

CN107873084B - Dynamic characteristic testing device and dynamic characteristic testing method

Info

Publication number: CN107873084B
Application number: CN201680008073.2A
Authority: CN
Inventors: 坂本阳一; 泷田伸幸
Original assignee: Sintokogio Ltd
Current assignee: Sintokogio Ltd
Priority date: 2015-05-28
Filing date: 2016-03-14
Publication date: 2019-12-24
Anticipated expiration: 2036-03-14
Also published as: JP2016223833A; WO2016189930A1; CN107873084A; TWI676038B; TW201641947A; JP6477257B2

Abstract

The dynamic characteristic testing device comprises: a power source; a reactor; a selection circuit having a 1 st switching unit and a 2 nd switching unit electrically connected in series, a 3 rd diode electrically connected in parallel to the 1 st switching unit, and a 4 th diode electrically connected in parallel to the 2 nd switching unit, and selecting the 1 st semiconductor or the 2 nd semiconductor as a target of switching measurement; a 3 rd switching unit for switching supply and interruption of a current from a power supply to the 1 st semiconductor or the 2 nd semiconductor; and a control device for switching and controlling the on state and the off state of each switch unit. A1 st connection part electrically connecting the 1 st and 2 nd semiconductors and a 2 nd connection part electrically connecting the 1 st and 2 nd switch parts are electrically connected via a reactor. The control device turns on the 2 nd and 3 rd switching units when the 1 st semiconductor switching measurement is started, and turns off the 3 rd switching unit after the 2 nd switching unit is turned off according to the end of the 1 st semiconductor switching measurement.

Description

Dynamic characteristic testing device and dynamic characteristic testing method

Technical Field

The present disclosure relates to a dynamic characteristic testing apparatus and a dynamic characteristic testing method.

Background

Conventionally, dynamic characteristics (AC) tests have been performed as tests of power semiconductor modules such as Insulated Gate Bipolar Transistors (IGBTs). For example, in the test device described in patent document 1, a capacitor is charged by a high-voltage power supply, and switching measurement is performed in a state where the capacitor is charged.

Patent document 1: japanese patent laid-open publication No. 2013-160572

In the conventional test apparatus, since the energy stored in the capacitor is consumed in the dynamic characteristic test circuit, the capacitor needs to be charged by the high-voltage power supply every time the switching measurement is performed. Therefore, the amount of power used increases each time the dynamic characteristics test is performed.

In the art, it is desired to reduce the amount of power used in the dynamic characteristics test.

Disclosure of Invention

A dynamic characteristic test apparatus according to an aspect of the present disclosure is a dynamic characteristic test apparatus for performing a dynamic characteristic test of a device under test including a 1 st semiconductor and a 2 nd semiconductor electrically connected in series, a 1 st diode electrically connected in parallel to the 1 st semiconductor, and a 2 nd diode electrically connected in parallel to the 2 nd semiconductor. The dynamic characteristic testing device comprises: a chargeable power supply for supplying a current for a dynamic characteristic test; a reactor serving as a load for the 1 st semiconductor and the 2 nd semiconductor; a selection circuit having a 1 st switching unit and a 2 nd switching unit electrically connected in series, a 3 rd diode electrically connected in parallel to the 1 st switching unit, and a 4 th diode electrically connected in parallel to the 2 nd switching unit, for selecting either the 1 st semiconductor or the 2 nd semiconductor as a target of switching measurement; a 3 rd switching unit for switching between supply and interruption of a current from a power supply to the 1 st semiconductor or the 2 nd semiconductor; and a control device for controlling the on state and the off state of the 1 st switch unit, the 2 nd switch unit and the 3 rd switch unit. A1 st connection part electrically connecting the 1 st semiconductor and the 2 nd semiconductor and a 2 nd connection part electrically connecting the 1 st switch part and the 2 nd switch part are electrically connected via a reactor. The positive terminal of the power supply is electrically connected to the cathode of the 1 st diode and the cathode of the 3 rd diode, and the negative terminal of the power supply is electrically connected to the anode of the 2 nd diode and the anode of the 4 th diode. The control device turns on the 2 nd switching unit and the 3 rd switching unit when the 1 st semiconductor switching measurement is started, and turns off the 2 nd switching unit and then turns off the 3 rd switching unit after the 2 nd switching unit is turned off according to the fact that the 1 st semiconductor switching measurement is finished.

According to this dynamic characteristic testing apparatus, the 2 nd switching unit and the 3 rd switching unit are turned on when the 1 st semiconductor switching measurement is started, and the 3 rd switching unit is turned off after the 2 nd switching unit is turned off when the 1 st semiconductor switching measurement is completed. During the switching measurement of the 1 st semiconductor, a current supplied from a power supply to the 1 st semiconductor flows through the reactor from the 1 st connection part of the 1 st semiconductor and the 2 nd semiconductor to the 2 nd connection part of the 1 st switching part and the 2 nd switching part, and energy is accumulated in the reactor at the time when the switching measurement of the 1 st semiconductor is completed. Therefore, when the switching measurement of the 1 st semiconductor is completed, the 2 nd switching unit is turned off, a current path is formed from the negative terminal of the power supply to the positive terminal of the power supply through the 2 nd diode, the reactor, the 3 rd diode, and the 3 rd switching unit, and the energy stored in the reactor flows into the positive terminal of the power supply as a current. This enables recovery of a part of the energy (electric power) of the power source used for the switching measurement of the 1 st semiconductor. As a result, the amount of power used in the dynamic characteristic test can be reduced. In the present specification, the term "electrically connected" includes not only a case where 2 elements to be connected are directly connected but also a case where another element capable of electrically connecting is connected between 2 elements to be connected. Other elements may include a relay, a switch unit such as a transistor, and the like.

The control device may turn on the 1 st switching unit and the 3 rd switching unit when the 2 nd semiconductor switching measurement is started, and turn off the 1 st switching unit and then turn off the 3 rd switching unit after the 2 nd semiconductor switching measurement is completed. In this case, during the switching measurement of the 2 nd semiconductor, the current supplied from the power supply to the 2 nd semiconductor flows through the reactor from the 2 nd connection part of the 1 st switching part and the 2 nd switching part toward the 1 st connection part of the 1 st semiconductor and the 2 nd semiconductor, and energy is accumulated in the reactor at the time when the switching measurement of the 2 nd semiconductor is completed. Therefore, when the switching measurement of the 2 nd semiconductor is completed, the 1 st switching unit is turned off, a current path is formed from the negative terminal of the power supply to the positive terminal of the power supply through the 4 th diode, the reactor, the 1 st diode, and the 3 rd switching unit, and the energy stored in the reactor flows into the positive terminal of the power supply as a current. This enables recovery of a part of the energy (power) of the power supply used for the switching measurement of the 2 nd semiconductor. As a result, the amount of power used in the dynamic characteristic test can be further reduced.

The 1 st switching unit and the 2 nd switching unit may be transistors. In this case, the on state and the off state of the 1 st switch unit and the 2 nd switch unit can be switched at high speed, and the accuracy of the switch measurement can be improved.

A dynamic characteristic test method according to another aspect of the present disclosure is a dynamic characteristic test method for performing a dynamic characteristic test of a device under test including a 1 st semiconductor and a 2 nd semiconductor electrically connected in series, a 1 st diode electrically connected in parallel to the 1 st semiconductor, and a 2 nd diode electrically connected in parallel to the 2 nd semiconductor. The dynamic characteristic test method comprises the following steps: a step of selecting a 1 st semiconductor as a target of switching measurement by turning on a 2 nd switching unit of a selection circuit having a 1 st switching unit and a 2 nd switching unit electrically connected in series, a 3 rd diode electrically connected in parallel to the 1 st switching unit, and a 4 th diode electrically connected in parallel to the 2 nd switching unit, and supplying a current to the 1 st semiconductor by turning on the 3 rd switching unit electrically connected in series to a chargeable power supply, thereby performing switching measurement of the 1 st semiconductor; a step of recovering energy used in the switching measurement of the 1 st semiconductor by turning off the 2 nd switching unit according to the end of the switching measurement of the 1 st semiconductor; and a step of turning off the 3 rd switching unit after the step of recovering the energy used in the switching measurement of the 1 st semiconductor. A1 st connection part electrically connecting the 1 st semiconductor and the 2 nd semiconductor and a 2 nd connection part electrically connecting the 1 st switch part and the 2 nd switch part are electrically connected via a reactor. The positive terminal of the power supply is electrically connected to the cathode of the 1 st diode and the cathode of the 3 rd diode, and the negative terminal of the power supply is electrically connected to the anode of the 2 nd diode and the anode of the 4 th diode.

According to this dynamic characteristic test method, the 2 nd switching unit and the 3 rd switching unit are turned on when the 1 st semiconductor switching measurement is started, and the 3 rd switching unit is turned off after the 2 nd switching unit is turned off according to the completion of the 1 st semiconductor switching measurement. During the switching measurement of the 1 st semiconductor, a current supplied from a power supply to the 1 st semiconductor flows through the reactor from the 1 st connection part of the 1 st semiconductor and the 2 nd semiconductor toward the 2 nd connection part of the 1 st switching part and the 2 nd switching part, and energy is accumulated in the reactor at the time when the switching measurement of the 1 st semiconductor is completed. Therefore, when the switching measurement of the 1 st semiconductor is completed, the 2 nd switching unit is turned off, a current path is formed from the negative terminal of the power supply to the positive terminal of the power supply through the 2 nd diode, the reactor, the 3 rd diode, and the 3 rd switching unit, and the energy stored in the reactor flows into the positive terminal of the power supply as a current. This enables recovery of a part of the energy (electric power) of the power source used for the switching measurement of the 1 st semiconductor. As a result, the amount of power used in the dynamic characteristic test can be reduced.

The dynamic characteristics testing method of another other aspect of the present disclosure may further include: selecting a 2 nd semiconductor as a target of switching measurement by turning a 1 st switching unit of the selection circuit on, and performing switching measurement of the 2 nd semiconductor by turning a 3 rd switching unit on and supplying a current to the 2 nd semiconductor; a step of recovering energy used in the switching measurement of the 2 nd semiconductor by turning off the 1 st switching unit according to the end of the switching measurement of the 2 nd semiconductor; and a step of turning off the 3 rd switching unit after the step of recovering the energy used in the switching measurement of the 2 nd semiconductor. In this case, during the switching measurement of the 2 nd semiconductor, the current supplied from the power supply to the 2 nd semiconductor flows from the 2 nd connection part of the 1 st switching part and the 2 nd switching part to the 1 st connection part of the 1 st semiconductor and the 2 nd semiconductor through the reactor, and energy is accumulated in the reactor at the time when the switching measurement of the 2 nd semiconductor is completed. Therefore, when the switching measurement of the 2 nd semiconductor is completed, the 1 st switching unit is turned off, a current path is formed from the negative terminal of the power supply to the positive terminal of the power supply through the 4 th diode, the reactor, the 1 st diode, and the 3 rd switching unit, and the energy stored in the reactor flows into the positive terminal of the power supply as a current. This enables recovery of a part of the energy (power) of the power supply used for the switching measurement of the 2 nd semiconductor. As a result, the amount of power used in the dynamic characteristic test can be further reduced.

According to the present disclosure, the amount of power used in the dynamic characteristic test can be reduced.

Drawings

Fig. 1 is a circuit diagram schematically showing a dynamic characteristic testing apparatus according to an embodiment.

Fig. 2 is a timing chart of the measurement of the N-side switch in the dynamic characteristic testing apparatus of fig. 1.

Fig. 3 is a diagram showing a current path when the switch is turned on in the N-side switch measurement of fig. 2.

Fig. 4 is a diagram showing a current path when the switch is off in the N-side switch measurement of fig. 2.

Fig. 5 is a diagram showing a current path in energy recovery in the N-side switch measurement in fig. 2.

Fig. 6 is a timing chart of the measurement of the P-side switch in the dynamic characteristic testing apparatus of fig. 1.

Fig. 7 is a diagram showing a current path when the switch is turned on in the P-side switch measurement of fig. 6.

Fig. 8 is a diagram showing a current path when the switch is off in the P-side switch measurement of fig. 6.

Fig. 9 is a diagram showing a current path in energy recovery in the P-side switch measurement of fig. 6.

Fig. 10 is a timing chart of measurement of the N-side switch of the comparative example.

Fig. 11 is a timing chart of measurement of the P-side switch of the comparative example.

Fig. 12 is a timing chart of N-side switch measurement including overcurrent prevention processing in the dynamic characteristic testing apparatus of fig. 1.

Fig. 13 is a diagram showing a current path in the overcurrent prevention process in the N-side switch measurement in fig. 12.

Fig. 14 is a timing chart of measurement of the P-side switch including the overcurrent prevention process in the dynamic characteristic test apparatus of fig. 1.

Fig. 15 is a diagram showing a current path in the overcurrent prevention processing in the P-side switch measurement of fig. 14.

Fig. 16 is a timing chart of N-side switch measurement including overcurrent prevention processing using the high-speed shutdown circuit in the dynamic characteristic test apparatus of fig. 1.

Fig. 17 is a diagram showing a current path in an overcurrent prevention process using the high-speed shutdown circuit in the N-side switch measurement in fig. 16.

Fig. 18 is a timing chart of measurement of the P-side switch including overcurrent prevention processing using the high-speed shutdown circuit in the dynamic characteristic test apparatus of fig. 1.

Fig. 19 is a diagram showing a current path in an overcurrent prevention process using the high-speed shutdown circuit in the P-side switch measurement of fig. 18.

Fig. 20 is a timing chart of N-side short-circuit capacity measurement in the dynamic characteristic testing apparatus of fig. 1.

Fig. 21 is a timing chart of the P-side short-circuit capacity measurement in the dynamic characteristic testing apparatus of fig. 1.

Fig. 22 is a circuit diagram showing a modification of the dynamic characteristic testing apparatus of fig. 1.

Fig. 23 is a diagram showing a current path in the overcurrent prevention process measured by the N-side switch in the dynamic characteristic test apparatus of fig. 22.

Fig. 24 is a diagram showing a current path in the overcurrent prevention process measured by the P-side switch in the dynamic characteristic test apparatus of fig. 22.

Fig. 25 is a diagram for comparing the overcurrent prevention processing in the dynamic characteristic testing apparatus of fig. 1 with the overcurrent prevention processing in the dynamic characteristic testing apparatus of fig. 22.

Fig. 26 is a circuit diagram showing another modification of the dynamic characteristics testing apparatus of fig. 1.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted.

Fig. 1 is a circuit diagram schematically showing a dynamic characteristic testing apparatus according to an embodiment. As shown in fig. 1, the dynamic characteristic test apparatus 1 is an apparatus for performing a dynamic characteristic test of the DUT50, and includes a test circuit 10, an overcurrent detection circuit 20, and a control device 30. As the dynamic characteristics test, the dynamic characteristics test apparatus 1 performs switching measurement, short-circuit capacity measurement (SC measurement), and the like. In the switching measurement, IGBT characteristics and diode characteristics can be measured. As IGBT characteristics, there are rise time, fall time, on delay time, off surge voltage, gate charge, on loss, off loss, and the like. The diode characteristics include a reverse recovery time, a reverse recovery current, and a reverse recovery energy.

The DUT50 is a device under test of the dynamic characteristic test apparatus 1, and is a 2in1 type power semiconductor module including 2 semiconductor elements electrically connected in series. Specifically, the DUT50 includes transistors Qdp, Qdn (1 st semiconductor, 2 nd semiconductor) and diodes dpp, Ddn (1 st diode, 2 nd diode). The transistors Qdp, Qdn are IGBTs. The emitter of the transistor Qdp and the collector of the transistor Qdn are electrically connected to each other. Collectors of the transistors Qdp and Qdn are electrically connected to cathodes of the diodes Ddp and Ddn, respectively, and emitters of the transistors Qdp and Qdn are electrically connected to anodes of the diodes Ddp and Ddn, respectively. In other words, the transistors Qdp, Qdn are electrically connected in series in the same orientation, the diode Ddp is a freewheeling diode electrically connected in parallel with the transistor Qdp, and the diode Ddn is a freewheeling diode electrically connected in parallel with the transistor Qdn. The DUT50 has a P terminal, an O terminal, and an N terminal. The P terminal is electrically connected to the collector of the transistor Qdp and the cathode of the diode Ddp, the N terminal is electrically connected to the emitter of the transistor Qdn and the anode of the diode Ddn, and the O terminal is electrically connected to the emitter of the transistor Qdp, the collector of the transistor Qdn, the anode of the diode Ddp, and the cathode of the diode Ddn. In other words, the O terminal is electrically connected to a connection part Cd (1 st connection part) that electrically connects the transistors Qdp, Qdn. For example, the DUT50 can be used for the inverter circuit of 1 phase, the transistor Qdp can be used for the upper arm, and the transistor Qdn can be used for the lower arm.

The test circuit 10 is a circuit for performing a dynamic characteristic test of the DUT 50. The test circuit 10 includes a power supply capacitor 11, a main switch unit 12, a selection circuit 13, an overcurrent prevention circuit 14, a high-speed cutoff circuit 15, a selection circuit 16, and a reactor L. The power supply capacitor 11 is a power supply for supplying a current for a dynamic characteristic test to the test circuit 10. As the power supply capacitor 11, for example, a thin film capacitor having excellent frequency characteristics can be used. When the energy (charge) stored in the power supply capacitor 11 decreases, the power supply capacitor 11 is connected to a high-voltage power supply (not shown) and charged by the high-voltage power supply.

Main switch unit 12 is a circuit for switching between supply and interruption of current from power supply capacitor 11 to DUT50 (transistor Qdp or transistor Qdn). The main switching section 12 includes a transistor Qp (3 rd switching section) and a diode Dp. The transistor Qp is an IGBT. The collector of the transistor Qp is electrically connected to the cathode of the diode Dp, and the emitter of the transistor Qp is electrically connected to the anode of the diode Dp. In other words, the diode Dp is a freewheeling diode electrically connected in parallel with the transistor Qp. The collector of transistor Qp is electrically connected to the + terminal (positive terminal) of power supply capacitor 11, and the emitter of transistor Qp is electrically connected to the collector of transistor Qhp, the cathode of diode Dhp, one end of switch SWp, and the P terminal of DUT50, which will be described later.

The selection circuit 13 is a circuit for selecting either one of the transistors Qdp and Qdn included in the DUT50 as a target of switch measurement. The selection circuit 13 includes transistors Qhp and Qhn (1 st switch unit and 2 nd switch unit) and diodes Dhp and Dhn (3 rd diode and 4 th diode). The transistors Qhp, Qhn are IGBTs. Collectors of the transistors Qhp and Qhn are electrically connected to cathodes of the diodes Dhp and Dhn, respectively, and emitters of the transistors Qhp and Qhn are electrically connected to anodes of the diodes Dhp and Dhn, respectively. In other words, the diode Dhp is a freewheeling diode electrically connected in parallel with the transistor Qhp, and the diode Dhn is a freewheeling diode electrically connected in parallel with the transistor Qhn. The emitter of the transistor Qhp and the collector of the transistor Qhn are electrically connected to each other, and to the collector of a transistor Qcf and the cathode of a diode Dcf, which will be described later. In other words, the transistors Qhp and Qhn are electrically connected in series in the same direction, and the connection Cs (2 nd connection) to which the transistors Qhp and Qhn are electrically connected is electrically connected to the O terminal of the DUT50 via the high-speed disconnection circuit 15 and the reactor L. The collector of transistor Qhp is electrically connected to the emitter of transistor Qp, the anode of diode Dp, one end of switch SWp, and the P terminal of DUT 50. The emitter of transistor Qhn is electrically connected to the negative terminal (negative terminal) of power supply capacitor 11, the other end of switch SWn, and the N terminal of DUT 50.

The overcurrent prevention circuit 14 is a circuit for consuming energy stored in the reactor L. The overcurrent prevention circuit 14 is provided to be electrically connected in parallel with the reactor L. The overcurrent prevention circuit 14 includes transistors Qif, Qir and diodes Dif, Dir. The transistors Qif, Qir are IGBTs. Collectors of the transistors Qif and Qir are electrically connected to cathodes of the diodes Dif and Dir, respectively, and emitters of the transistors Qif and Qir are electrically connected to anodes of the diodes Dif and Dir, respectively. In other words, the diode Dif is a freewheeling diode electrically connected in parallel with the transistor Qif, and the diode Dir is a freewheeling diode electrically connected in parallel with the transistor Qir. The emitter of the transistor Qif and the emitter of the transistor Qir are electrically connected to each other. In other words, the transistors Qif, Qir are electrically connected in series in mutually opposite orientations. The collector of the transistor Qif is electrically connected to a collector of a transistor Qcr, a cathode of the diode Dcr, and one end of the reactor L, which will be described later. The collector of the transistor Qir is electrically connected to the other end of the reactor L, the other end of the switch SWp, one end of the switch SWn, and the O terminal of the DUT 50.

The high-speed shutdown circuit 15 is a circuit for causing the overcurrent prevention circuit 14 to consume the energy stored in the reactor L at a high speed. The high-speed cutoff circuit 15 is provided to be electrically connected in series with the reactor L. The high-speed cutoff circuit 15 includes transistors Qcf, Qcr and diodes Dcf, Dcr. The transistors Qcf, Qcr are IGBTs. Collectors of the transistors Qcf and Qcr are electrically connected to cathodes of the diodes Dcf and Dcr, respectively, and emitters of the transistors Qcf and Qcr are electrically connected to anodes of the diodes Dcf and Dcr, respectively. In other words, the diode Dcf is a freewheeling diode electrically connected in parallel with the transistor Qcf, and the diode Dcr is a freewheeling diode electrically connected in parallel with the transistor Qcr. The emitter of the transistor Qcf and the emitter of the transistor Qcr are electrically connected to each other. In other words, the transistors Qcf, Qcr are electrically connected in series in mutually opposite orientations. The collector of transistor Qcf is electrically connected to the emitter of transistor Qhp, the collector of transistor Qhn, the anode of diode Dhp, and the cathode of diode Dhn. The collector of the transistor Qcr is electrically connected to the collector of the transistor Qif, the cathode of the diode Dif, and one end of the reactor L.

The selection circuit 16 is a circuit for selecting either one of the transistors Qdp and Qdn included in the DUT50 as a target of short circuit capacity measurement. The selection circuit 16 includes switches SWp, SWn. The switches SWp, SWn are relays. One end of switch SWp is electrically connected to the emitter of transistor Qp, the anode of diode Dp, the collector of transistor Qhp, the cathode of diode Dhp, and the P terminal of DUT 50. The other end of the switch SWp and one end of the switch SWn are electrically connected to each other, and to the other end of the reactor L, the collector of the transistor Qir, the cathode of the diode Dir, and the O terminal of the DUT 50. The other end of switch SWn is electrically connected to a-terminal of power supply capacitor 11, an emitter of transistor Qhn, an anode of diode Dhn, and an N-terminal of DUT 50.

The reactor L is a load for the dynamic characteristic test. In other words, the reactor L is a load of the transistors Qdp, Qdn. One end of the reactor L is electrically connected to the collector of the transistor Qcr and the cathode of the diode Dcr, and the other end of the reactor L is electrically connected to the O terminal of the DUT 50.

The overcurrent detection circuit 20 is a circuit that detects an overcurrent flowing through the test circuit 10 and the DUT 50. The overcurrent detection circuit 20 includes a current sensor 21, a current sensor 22, a comparator 23, and a comparator 24.

The current sensor 21 is a sensor for detecting the current value of the current flowing through the test circuit 10 and the DUT50 when the N-side switch is measured. The current sensor 21 is provided in the vicinity of the N terminal of the wiring connecting the N terminal of the DUT50 and the minus terminal of the power supply capacitor 11. The current sensor 21 outputs the detected current value to the comparator 23. The current sensor 22 is a sensor for detecting the current value of the current flowing through the test circuit 10 and the DUT50 when the P-side switch is measured. The current sensor 22 is provided in the vicinity of the P terminal of the wiring connecting the P terminal of the DUT50 and the emitter of the transistor Qp. The current sensor 22 outputs the detected current value to the comparator 24.

Comparator 23 compares the current value detected by current sensor 21 with N-side overcurrent threshold Ref _ N, and outputs the comparison result to control device 30. The overcurrent threshold Ref _ N is a value predetermined to detect overcurrent. The comparator 23 inputs the N-side overcurrent threshold Ref _ N to the + terminal, and inputs the current value detected by the current sensor 21 to the-terminal. In this case, comparator 23 outputs a high-level output signal to control device 30 when the current value detected by current sensor 21 is equal to or less than overcurrent threshold Ref _ N, and outputs a low-level output signal to control device 30 when the current value detected by current sensor 21 is greater than overcurrent threshold Ref _ N.

Comparator 24 compares the current value detected by current sensor 22 with P-side overcurrent threshold Ref _ P, and outputs the comparison result to control device 30. The overcurrent threshold Ref _ P is a value predetermined to detect overcurrent. The comparator 24 inputs the P-side overcurrent threshold Ref _ P to the + terminal, and inputs the current value detected by the current sensor 22 to the-terminal. In this case, comparator 24 outputs a high-level output signal to control device 30 when the current value detected by current sensor 22 is equal to or less than overcurrent threshold value Ref _ P, and outputs a low-level output signal to control device 30 when the current value detected by current sensor 22 is greater than overcurrent threshold value Ref _ P.

The control device 30 is a controller that performs switching control for switching the on state (on state) and the off state (off state) of the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn and the switches SWp and SWn. The control device 30 switches the on state and the off state of each transistor by outputting the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqcr, Sqdp, and Sqdn to the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn, respectively. Control device 30 switches the on state and the off state of each switch by outputting relay signals Sswp and Sswn to switches SWp and SWn, respectively. The switching control performed by the control device 30 will be described in detail in the following measurements. The on state of the transistor means an electrically conductive state between the collector and the emitter, and the off state of the transistor means an electrically disconnected state between the collector and the emitter. In addition, when the transistor is an IGBT, the on state and the off state are switched according to the gate-emitter voltage. In the following description, for convenience, when a high-level gate signal is supplied to a transistor, the transistor is turned on, and when a low-level gate signal is supplied to the transistor, the transistor is turned off.

(measurement of switch)

Next, the switching measurement using the dynamic characteristic test apparatus 1 will be described. First, a switching measurement of the transistor Qdn (which may be referred to as an "N-side switching measurement") will be described. Fig. 2 is a timing chart of the measurement of the N-side switch in the dynamic characteristic test apparatus 1. Fig. 3 is a diagram showing a current path when the switch is turned on in the N-side switch measurement. Fig. 4 is a diagram showing a current path when the switch is off in the N-side switch measurement. Fig. 5 is a diagram showing a current path in energy recovery in the N-side switch measurement.

In the switching measurement, the relay signals Sswp and Sswn are always set to the low level, and the switches SWp and SWn are always in the off state, so that the description of the relay signals and the switches is omitted in each step. In the following description, the current supplied from power supply capacitor 11 is denoted by Ic, the currents flowing through transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are denoted by currents Iqp, Iqhp, Iqhn, iqiif, iqiir, Iqcf, Iqcr, Iqdp, and Iqdn, respectively, and the current flowing through reactor L is denoted by current IL. The current flowing through each transistor is a positive value when flowing from the collector to the emitter, and a negative value when flowing from the emitter to the collector or when flowing from the anode to the cathode (forward direction) of the free wheel diode. The current flowing through reactor L is positive when it flows toward the O terminal of DUT50, and negative when it flows in the opposite direction. The steps are illustrated with the same length, but the time of each step does not need to be the same and can be appropriately adjusted as needed. In each step, the timing of switching control of each transistor may be the same or different.

As shown in fig. 2, in step ST11, the control device 30 sets and outputs the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all off, and no current flows in the transistors. The energy Ec (charge) of the power supply capacitor 11 is, for example, fully charged.

Next, in step ST12, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr, and Sqdn to high level and sets the other gate signals to low level to output. Thus, the transistors Qp, Qhp, Qcf, Qcr, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in fig. 3, a current path Pn1 is formed from the + terminal of the power supply capacitor 11 to the minus terminal of the power supply capacitor 11 through the transistor Qp, the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, and the transistor Qdn in this order, and the current supplied from the power supply capacitor 11 flows through the current path Pn 1. In this state, the amounts of currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, and Iqdn increase with the passage of time, and the energy Ec of the power supply capacitor 11 decreases with the passage of time. In addition, no current Iqhn, Iqif, Iqir, Iqdp flows through the transistors Qhn, Qif, Qir, Qdp. In other words, in step ST12, the controller 30 turns on the transistor Qhp to allow the transistor Qdn to be a target of the switching measurement, and turns on the transistors Qp, Qcf, and Qcr to supply current from the power supply capacitor 11 to the transistor Qdn.

Next, in step ST13, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, and Sqcr to high level and sets the other gate signals to low level for output. In other words, only the gate signal Sqdn is changed from the high level to the low level in step ST12, and the other gate signals are not changed. Thus, the transistors Qp, Qhp, Qcf, Qcr are turned on, and the other transistors are turned off. At this time, as shown in fig. 4, a current path Pn2 is formed which sequentially runs through the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, and the diode Ddp, and the current flowing through the current path Pn1 immediately before step ST13 flows through the current path Pn 2. Therefore, the current amounts of the currents Ic, Iqp, and Iqdn are 0, and no current is supplied from the power supply capacitor 11, so the energy Ec does not change. At this time, since energy is consumed by the transistor Qhp, the transistor Qcf, the transistor Qcr, the reactor L, the resistance component of the diode Ddp, and the like, the amount of current Iqhp, the Iqcf, -Iqcr, the IL, and the current-Iqdp flowing through the diode Ddp gradually decreases with time from the amount of current flowing through the current path Pn1 immediately before step ST 13. In addition, the currents Iqhn, Iqif, and Iqir are still 0.

Next, in step ST14, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, Sqcr, and Sqdn to high level and sets the other gate signals to low level to output, as in step ST 12. In other words, only the gate signal Sqdn is changed from the low level to the high level in step ST13, and the other gate signals are not changed. Thereby, the current path Pn1 is formed, and the current flowing in the current path Pn2 immediately before step ST14 and the current supplied from the power supply capacitor 11 flow in the current path Pn 1. At this time, the current amounts of the currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, Iqdn further increase with the passage of time from the current amount of the current flowing in the current path Pn2 immediately before step ST14, on the other hand, the energy Ec of the power supply capacitor 11 further decreases with the passage of time. In addition, no current Iqhn, Iqif, Iqir, Iqdp flows through the transistors Qhn, Qif, Qir, Qdp.

Next, in step ST15, the control device 30 sets the gate signals Sqp, Sqhp, Sqcf, and Sqcr to the high level and sets the other gate signals to the low level to output, as in step ST 13. In other words, only the gate signal Sqdn is changed from the high level to the low level in step ST14, and the other gate signals are not changed. Thereby, the current path Pn2 is formed, and the current flowing in the current path Pn1 immediately before step ST15 flows in the current path Pn 2. At this time, as in step ST13, the current amounts of the currents Ic, Iqp, Iqdn are 0, and the current amounts of the currents Iqhp, Iqcf, -Iqcr, IL, -Iqdp gradually decrease with the passage of time. In addition, the currents Iqhn, Iqif, and Iqir are still 0. In addition, since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this time, a waveform necessary for the N-side switch measurement is obtained. In other words, the waveforms necessary for the switching measurement of the transistor Qdn are obtained until the transistor Qdn is turned off in steps ST12 to ST 15. In this sense, the processing from step ST12 to step ST15 until the transistor Qdn is turned off can be said to be the switching measurement of the transistor Qdn in the narrow sense.

After that, control device 30 changes gate signal Sqhp from high level to low level. Thus, the transistors Qp, Qcf, Qcr are turned on, and the other transistors are turned off. At this time, as shown in fig. 5, a current path Pn3 is formed from the minus terminal of the power supply capacitor 11 to the plus terminal of the power supply capacitor 11 through the diode Dhn, the transistor Qcf, the transistor Qcr, the reactor L, the diode Ddp, and the transistor Qp in this order, and the current flowing in the current path Pn2 immediately before the gate signal Sqhp is switched to the low level flows in the current path Pn 3. Therefore, the current amount of the current Iqhp is 0. Further, since the current path Pn3 is directed from the-terminal of the power supply capacitor 11 to the + terminal, the power supply capacitor 11 is charged, the energy Ec increases with the passage of time, and on the other hand, the current amount of the current-Iqhn (current flowing through the diode Dhn), Iqcf, -Iqcr, IL, -Iqdp, -Iqp, -Ic (current flowing from the-terminal of the power supply capacitor 11 to the + terminal) decreases with the passage of time. The currents Iqdn, Iqif, and Iqir are still 0.

Next, in step ST16, the same state as in step ST15 is continued, the current amount of the current flowing through the current path Pn3 becomes 0, and the energy Ec of the power supply capacitor 11 is almost restored to the fully charged state.

Next, in step ST17, the control device 30 sets and outputs the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in the off state, and no current flows through the transistors. In this manner, the N-side switch measurement is ended. Note that it may be detected by a detection circuit (not shown) or the like that the current amount of the current flowing through the current path Pn3 is equal to or less than a predetermined threshold value, and the control device 30 detects that the current amount of the current flowing through the current path Pn3 is substantially 0 (the energy recovery process is completed) based on an output signal from the detection circuit. The predetermined threshold value is set to, for example, 0 or a value slightly larger than 0. Further, the control device 30 may perform the process of step ST17 in response to detecting that the energy recovery process is ended.

As described above, the control device 30 turns on the transistors Qp, Qhp, Qcf, Qcr at the start of the N-side switching measurement, and turns off the transistor Qhp according to the end of the waveform sampling in the N-side switching measurement, thereby recovering the energy used in the N-side switching measurement. Then, the control device 30 turns off the transistors Qp, Qcf, Qcr after recovering the energy used for the N-side switching measurement. Therefore, since the energy Ec is almost fully charged at the end of the N-side switch measurement, it is not necessary to charge the power supply capacitor 11 with the high-voltage power supply for the next measurement.

Next, switching measurement of the transistor Qdp (which may be referred to as "P-side switching measurement") will be described. Fig. 6 is a timing chart showing the measurement of the P-side switch in the dynamic characteristic test apparatus 1. Fig. 7 is a diagram showing a current path when the switch is turned on in the P-side switch measurement. Fig. 8 is a diagram showing a current path when the switch is off in the P-side switch measurement. Fig. 9 is a diagram showing a current path in energy recovery in the P-side switch measurement.

As shown in fig. 6, step ST21 is the same as step ST11 in fig. 2, and therefore, the description thereof is omitted. Next, in step ST22, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr, and Sqdp to high level and sets the other gate signals to low level for output. Thus, the transistors Qp, Qhn, Qcf, Qcr, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in fig. 7, a current path Pp1 is formed which returns from the + terminal of the power supply capacitor 11 to the-terminal of the power supply capacitor 11 through the transistor Qp, the transistor Qdp, the reactor L, the transistor Qcr, the transistor Qcf, and the transistor Qhn in this order, and the current supplied from the power supply capacitor 11 flows through the current path Pp 1. In this state, the amounts of currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn increase with the passage of time, and the energy Ec of the power supply capacitor 11 decreases with the passage of time. In addition, the transistors Qhp, Qif, Qir, and Qdn do not flow the currents Iqhp, Iqif, Iqir, and Iqdn. In other words, in step ST22, the control device 30 turns on the transistor Qhn to allow the transistor Qdp to be a target of the switching measurement, and turns on the transistors Qp, Qcf, and Qcr to supply current from the power supply capacitor 11 to the transistor Qdp.

Next, in step ST23, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, and Sqcr to high level and sets the other gate signals to low level for output. In other words, only the gate signal Sqdp is changed from the high level to the low level in step ST22, and the other gate signals are not changed. Thus, the transistors Qp, Qhn, Qcf, Qcr are turned on, and the other transistors are turned off. At this time, as shown in fig. 8, a current path Pp2 that sequentially goes around in the transistor Qhn, the diode Ddn, the reactor L, the transistor Qcr, and the transistor Qcf is formed, and a current flowing in the current path Pp1 immediately before step ST23 flows in the current path Pp 2. Therefore, the current amounts of the currents Ic, Iqp, and Iqdp are 0, and no current is supplied from the power supply capacitor 11, so that the energy Ec does not change. At this time, since energy is consumed by the transistor Qhn, the diode Ddn, the reactor L, the transistor Qcr, the resistance component of the transistor Qcf, and the like, the amounts of current Iqhn, -Iqdn (current flowing through the diode Ddn), -IL, Iqcr, and-Iqcf gradually decrease with time from the amount of current of the current flowing through the current path Pp1 immediately before step ST 23. The currents Iqhp, Iqif, and Iqir are still 0.

Next, in step ST24, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, Sqcr, and Sqdp to high level and sets the other gate signals to low level to output, as in step ST 22. In other words, only the gate signal Sqdp is changed from the low level to the high level in step ST23, and the other gate signals are not changed. Thereby, a current path Pp1 is formed, and the current flowing in the current path Pp2 immediately before step ST24 and the current supplied from the power supply capacitor 11 flow in the current path Pp 1. At this time, the current amounts of the currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn further increase with the passage of time from the current amount of the current flowing in the current path Pp2 immediately before step ST24, and on the other hand, the energy Ec of the power supply capacitor 11 further decreases with the passage of time. In addition, the transistors Qhp, Qif, Qir, and Qdn do not flow the currents Iqhp, Iqif, Iqir, and Iqdn.

Next, in step ST25, the control device 30 sets the gate signals Sqp, Sqhn, Sqcf, and Sqcr to high level and sets the other gate signals to low level to output, as in step ST 23. In other words, only the gate signal Sqdp is changed from the high level to the low level in step ST24, and the other gate signals are not changed. Thereby, a current path Pp2 is formed, and the current flowing in the current path Pp1 immediately before step ST25 flows in the current path Pp 2. At this time, as in step ST23, the current amounts of the currents Ic, Iqp, Iqdp are 0, and the current amounts of the currents Iqhn, -Iqdn, -IL, Iqcr, -Iqcf gradually decrease with the elapse of time. The currents Iqhp, Iqif, and Iqir are still 0. Since no current is supplied from the power supply capacitor 11, the energy Ec does not change. At this time, a waveform necessary for the P-side switch measurement is obtained. In other words, the waveform necessary for the switching measurement of the transistor Qdp is obtained until the transistor Qdp is turned off in steps ST22 to ST 25. In this sense, the processing from step ST22 to step ST25 until the transistor Qdp is turned off can be said to be the switching measurement of the transistor Qdp in the narrow sense.

After that, control device 30 changes gate signal Sqhn from high level to low level. Thus, the transistors Qp, Qcf, Qcr are turned on, and the other transistors are turned off. At this time, as shown in fig. 9, a current path Pp3 is formed from the minus terminal of the power supply capacitor 11 to the plus terminal of the power supply capacitor 11 through the diode Ddn, the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qp in this order, and the current flowing in the current path Pp2 immediately before the gate signal Sqhn is switched to the low level flows in the current path Pp 3. Therefore, the current amount of the current Iqhn is 0. Further, the current path Pp3 is directed from the-terminal to the + terminal of the power supply capacitor 11, so that the power supply capacitor 11 is charged, the energy Ec increases with the passage of time, and on the other hand, the current amounts of the currents-Iqdn, -IL, Iqcr, -Iqcf, -Iqhp (current flowing through the diode Dhp), -Iqp, -Ic decrease with the passage of time. The currents Iqdp, Iqif, and Iqir are still 0.

Next, in step ST26, the same state as in step ST25 is continued, the current amount of the current flowing through the current path Pp3 is 0, and the energy Ec of the power supply capacitor 11 is almost restored to the fully charged state.

Next, in step ST27, the control device 30 sets and outputs the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in the off state, and a current flows through the respective transistors. In this manner, the P-side switch measurement is ended. Note that, it may be detected by a detection circuit (not shown) or the like that the amount of current flowing through the current path Pp3 is equal to or less than a predetermined threshold value, and the control device 30 may detect that the amount of current flowing through the current path Pp3 is substantially 0 (end of the energy recovery process) based on an output signal from the detection circuit. The predetermined threshold value is set to, for example, 0 or a value slightly larger than 0. Further, control device 30 may perform the process of step ST27 upon detecting the end of the energy recovery process.

As described above, the control device 30 turns on the transistors Qp, Qhn, Qcf, Qcr at the start of the P-side switching measurement and turns off the transistor Qhn according to the end of the waveform sampling in the P-side switching measurement, thereby recovering energy used in the P-side switching measurement. Then, the control device 30 turns off the transistors Qp, Qcf, Qcr after recovering the energy used for the P-side switching measurement. Therefore, since the energy Ec is almost fully charged at the end of the P-side switch measurement, it is not necessary to charge the power supply capacitor 11 with a high-voltage power supply for the next measurement.

Next, a comparative example of the switching measurement using the dynamic characteristic test apparatus 1 will be described. Fig. 10 is a timing chart of measurement of the N-side switch of the comparative example. Fig. 11 is a timing chart of measurement of the P-side switch of the comparative example. As shown in fig. 10, the N-side switch measurement of the comparative example differs from the N-side switch measurement of fig. 2in the timing of switching the gate signal Sqhp from the high level to the low level. Specifically, in the N-side switching measurement of the comparative example, control device 30 maintains gate signal Sqhp at a high level in steps ST115 and ST 116. Therefore, the amount of current of the current (currents Iqhp, Iqcf, -Iqcr, IL, -Iqdp) flowing in the current path Pn2 slowly decreases with the passage of time to about 0, but the power supply capacitor 11 is not charged. Therefore, the power supply capacitor 11 needs to be charged by the high-voltage power supply before the next measurement is performed.

Similarly, as shown in fig. 11, the P-side switch measurement of the comparative example has a different timing of switching the gate signal Sqhn from the high level to the low level compared to the P-side switch measurement of fig. 6. Specifically, in the P-side switching measurement of the comparative example, control device 30 maintains gate signal Sqhn at a high level in step ST125 and step ST 126. Therefore, the amount of current of the current (currents Iqhn, -Iqdn, -IL, Iqcr, -Iqcf) flowing in the current path Pp2 slowly decreases with the passage of time to about 0, but the power supply capacitor 11 is not charged. Therefore, the power supply capacitor 11 needs to be charged by the high-voltage power supply before the next measurement is performed.

Next, overcurrent prevention in the dynamic characteristic testing apparatus 1 will be described. First, overcurrent prevention in the measurement of the N-side switch will be described. Fig. 12 is a timing chart of the N-side switch measurement including the overcurrent prevention process in the dynamic characteristic test apparatus 1. Fig. 13 is a diagram showing a current path in the overcurrent prevention process in the N-side switch measurement.

As shown in fig. 12, the gate signals in steps ST31 to ST33 are the same as those in steps ST11 to ST13 of fig. 2, and therefore, the description thereof is omitted. In this example, in step ST33, it is assumed that the transistor Qdn is not in the off state due to a failure of the DUT 50. In this case, after step ST32, the currents (currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, Iqdn) continue to flow in the current path Pn1, the current amounts thereof continuously increasing as time passes.

Then, in step ST34, the current amount of the current flowing through current path Pn1 becomes larger than overcurrent threshold Ref _ N on the N side, and comparator 23 outputs a low-level output signal to control device 30. Then, upon receiving the low-level output signal from comparator 23, control device 30 detects an overcurrent, changes gate signals Sqp and Sqhp from high level to low level, and changes gate signal Sqir from low level to high level. Thus, the transistors Qcf, Qcr, Qir, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in fig. 13, a current path Pn41 sequentially going through the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, and the diode Dhn is formed, and a current path Pn42 sequentially going through the reactor L, the transistor Qir, and the diode Dif is formed. The overcurrent flowing through the current path Pn1 flows into the current path Pn41 and the current path Pn42 separately. Thereby, an overcurrent is prevented from continuously flowing through the test circuit 10 and the DUT 50.

Next, in step ST35, the control device 30 changes only the gate signal Sqdn from the high level to the low level from the state of the gate signal in step ST34, and does not change the other gate signals, as in step ST 15. However, the transistor Qdn is not turned off due to the failure of the DUT50, and the transistors are maintained in the same state as step ST 34. Further, since the current flowing through the current path Pn41 circulates through the current path Pn41, energy is consumed by resistance components of the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, the diode Dhn, and the like, and the amount of current decreases with time. Similarly, since the current flowing through the current path Pn42 circulates through the current path Pn42, energy is consumed by the resistance components of the reactor L, the transistor Qir, and the diode Dif, and the amount of current decreases with time.

Next, in step ST36, the state of the gate signal in step ST35 continues, and the current amounts of the currents flowing through the current paths Pn41 and Pn42 further decrease to 0.

Next, in step ST37, the control device 30 sets and outputs the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in the off state, and no current flows through the transistors. Note that it may be detected by a detection circuit (not shown) that the current amounts of the currents flowing through the current paths Pn41 and Pn42 are equal to or less than a predetermined threshold value, and the control device 30 detects that the current amounts of the currents flowing through the current paths Pn41 and Pn42 are substantially 0 (end of the energy consumption processing) based on an output signal from the detection circuit. The predetermined threshold value is set to, for example, 0 or a value slightly larger than 0. Further, control device 30 may perform the process of step ST37 in response to detecting the end of the energy consumption process.

As described above, the control device 30 turns off the transistors Qp and Qhp and turns on the transistor Qir based on the detection of the overcurrent in the N-side switching measurement, thereby operating the overcurrent prevention circuit 14. Thus, the energy stored in the reactor L when an overcurrent occurs is consumed by the overcurrent prevention circuit 14, and a larger amount of overcurrent is prevented from flowing into the DUT50 in the N-side switching measurement.

Next, overcurrent prevention in the P-side switch measurement will be described. Fig. 14 is a timing chart of the measurement of the P-side switch including the overcurrent prevention process in the dynamic characteristic test apparatus 1. Fig. 15 is a diagram showing a current path in the overcurrent prevention process in the P-side switch measurement.

As shown in fig. 14, the gate signals in steps ST41 to ST43 are the same as those in steps ST21 to ST23 of fig. 6, and therefore, the description thereof is omitted. In this example, in step ST43, it is assumed that transistor Qdp is not in an off state due to a failure of DUT 50. In this case, after step ST42, the current (current Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, Iqhn) continues to flow in the current path Pp1, and the amount of current thereof continues to increase as time passes.

Then, in step ST44, the amount of current flowing through current path Pp1 becomes larger than overcurrent threshold Ref _ P on the P side, and comparator 24 outputs a low-level output signal to control device 30. Then, upon receiving the low-level output signal from the comparator 24, the control device 30 detects an overcurrent, changes the gate signals Sqp and Sqhn from high to low, and changes the gate signal Sqif from low to high. Thus, the transistors Qcf, Qcr, Qif, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in fig. 15, a current path Pp41 is formed which sequentially goes through the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp, and a current path Pp42 is formed which sequentially goes through the reactor L, the transistor Qif, and the diode Dir. The overcurrent flowing through the current path Pp1 flows into the current path Pp41 and the current path Pp42 separately. Thereby, an overcurrent is prevented from continuously flowing through the test circuit 10 and the DUT 50.

Next, in step ST45, the control device 30 changes only the gate signal Sqdp from the high level to the low level from the state of the gate signal in step ST44, and does not change the other gate signals, as in step ST 25. However, since DUT50 is defective, transistor Qdp does not become off, and each transistor maintains the same state as step ST 44. Further, since the current flowing through the current path Pp41 circulates through the current path Pp41, energy is consumed by resistance components of the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp, and the amount of current decreases with time. Similarly, since the current flowing through the current path Pp42 circulates through the current path Pp42, energy is consumed by resistance components of the reactor L, the transistor Qif, and the diode Dir, and the amount of current decreases with time.

Next, in step ST46, the state of the gate signal in step ST45 is continued, and the current amounts of the currents flowing through the current paths Pp41 and Pp42 are further reduced to 0.

Next, in step ST47, the control device 30 sets and outputs the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in the off state, and no current flows through the transistors. Note that, it may be detected by a detection circuit (not shown) or the like that the amount of current flowing through the current path Pp41 and the current path Pp42 is equal to or less than a predetermined threshold value, and the control device 30 may detect that the amount of current flowing through the current path Pp41 and the current path Pp42 is substantially 0 (end of the energy consumption process) based on an output signal from the detection circuit. The predetermined threshold value is set to, for example, 0 or a value slightly larger than 0. Further, control device 30 may perform the process of step ST47 in response to detecting the end of the energy consumption process.

As described above, the control device 30 turns off the transistors Qp and Qhn and turns on the transistor Qif in response to detection of an overcurrent in the P-side switching measurement, thereby operating the overcurrent prevention circuit 14. Thus, the energy stored in the reactor L when an overcurrent occurs is consumed by the overcurrent prevention circuit 14, and a larger amount of overcurrent is prevented from flowing into the DUT50 in the P-side switching measurement.

Further, overcurrent prevention using the high-speed cutoff circuit 15 will be described. First, overcurrent prevention in the measurement of the N-side switch using the high-speed cutoff circuit 15 will be described. Fig. 16 is a timing chart of N-side switch measurement including overcurrent prevention processing using the high-speed shutdown circuit in the dynamic characteristic test apparatus 1. Fig. 17 is a diagram showing a current path in the overcurrent prevention process using the high-speed shutdown circuit in the N-side switch measurement.

In step ST54, when comparing the timing chart of the gate signals shown in fig. 16 with the timing chart of the gate signals shown in fig. 12, control device 30 further changes the gate signals Sqcf and Sqcr from the high level to the low level in response to the detection of the overcurrent. Therefore, when an overcurrent is detected, the transistors Qir and Qdn are turned on, and the other transistors are turned off. At this time, as shown in fig. 17, since the current path Pn41 is not formed, but only the current path Pn42 is formed, the overcurrent flowing through the current path Pn1 flows into the current path Pn 42. Further, since the current flowing through the current path Pn42 circulates through the current path Pn42 to consume energy, the current amount decreases with time.

As described above, the control device 30 turns off the transistors Qp and Qhp and turns on the transistor Qir based on the detection of the overcurrent in the N-side switching measurement, thereby operating the overcurrent prevention circuit 14, and further turns off the transistors Qcf and Qcr, thereby operating the high-speed shutdown circuit 15. Thus, when an overcurrent occurs, energy stored in the reactor L flows into the overcurrent prevention circuit 14 as a current, and is consumed by the overcurrent prevention circuit 14. When the high-speed shutdown circuit 15 is not operated, the overcurrent flowing through the current path Pn1 flows into the current path Pn41 and the current path Pn42 separately. At this time, the resistance value contributing to the consumption of the overcurrent is a combined resistance value of the resistance component of the current path Pn41 and the resistance value of the resistance component of the current path Pn42, and is smaller than the resistance value of the resistance component of the current path Pn 42. Therefore, compared to the case where the high-speed shutdown circuit 15 is not operated, when the high-speed shutdown circuit 15 is operated, the resistance value contributing to the consumption of the overcurrent increases, so that the energy stored in the reactor L is consumed in a short time, and it is possible to more reliably prevent a larger amount of overcurrent from flowing into the DUT50 in the N-side switching measurement.

Next, overcurrent prevention in the measurement of the P-side switch using the high-speed cutoff circuit 15 will be described. Fig. 18 is a timing chart of measurement of the P-side switch including the overcurrent prevention process using the high-speed shutdown circuit in the dynamic characteristic test apparatus 1. Fig. 19 is a diagram showing a current path in an overcurrent prevention process using a high-speed shutdown circuit in P-side switch measurement.

In step ST64, control device 30 changes gate signals Sqcf and Sqcr from high to low in accordance with the detection of an overcurrent, in comparison with the timing chart of gate signals shown in fig. 14, in the timing chart of gate signals shown in fig. 18. Therefore, when an overcurrent is detected, the transistors Qif and Qdp are turned on, and the other transistors are turned off. At this time, as shown in fig. 19, since the current path Pp41 is not formed but only the current path Pp42 is formed, the overcurrent flowing through the current path Pp1 flows into the current path Pp 42. Further, since the current flowing through the current path Pp42 circulates through the current path Pp42 to consume energy, the current amount thereof decreases with the passage of time.

As described above, the control device 30 turns off the transistors Qp and Qhn and turns on the transistor Qif in response to detection of an overcurrent in the P-side switching measurement, thereby operating the overcurrent prevention circuit 14, and further turns off the transistors Qcf and Qcr, thereby operating the high-speed shutdown circuit 15. Thus, when an overcurrent occurs, energy stored in the reactor L flows as a current in the overcurrent prevention circuit 14, and is consumed by the overcurrent prevention circuit 14. When the high-speed shutdown circuit 15 is not operated, the overcurrent flowing through the current path Pp1 flows into the current path Pp41 and the current path Pp42 separately. At this time, the resistance value contributing to the consumption of the overcurrent is a combined resistance value of the resistance component of the current path Pp41 and the resistance value of the resistance component of the current path Pp42, and is smaller than the resistance value of the resistance component of the current path Pp 42. Therefore, compared to the case where the high-speed shutdown circuit 15 is not operated, when the high-speed shutdown circuit 15 is operated, the resistance value contributing to the consumption of the overcurrent increases, so that the energy stored in the reactor L is consumed in a short time, and more overcurrent is reliably prevented from flowing into the DUT50 in the P-side switching measurement.

(measurement of short-circuit Capacity)

Next, measurement of the short-circuit capacity using the dynamic characteristic test apparatus 1 will be described. First, measurement of the short-circuit capacity of the transistor Qdn (which may be referred to as "N-side short-circuit capacity measurement") will be described. Fig. 20 is a timing chart of the N-side short-circuit capacity measurement in the dynamic characteristic test apparatus 1. As shown in fig. 20, in step ST71, control device 30 sets and outputs relay signals Sswp, Sswn and gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the switches SWp and SWn and the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in the off state, and no current flows in the transistors and the switches.

Next, in step ST72, control device 30 sets relay signal Sswp and gate signals Sqp, Sqdn to high level and sets relay signal Sswn and gate signals Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp to low level for output. Thus, the switch SWp and the transistors Qp and Qdn are turned on, and the other switches and transistors are turned off. At this time, a current path is formed from the + terminal of the power supply capacitor 11 through the transistor Qp, the switch SWp, and the transistor Qdn in this order and returned to the-terminal of the power supply capacitor 11, and a current flows through the current path. In this manner, a short-circuit current flows through the transistor Qdn without passing through the reactor L.

Next, in step ST73, the control device 30 sets the relay signals Sswp and Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level and outputs them, as in step ST 71. Thus, all the switches and transistors are turned off, and no current flows through the transistors and switches. Through the above series of processing, N-side short-circuit capacity measurement was performed.

Next, measurement of the short-circuit capacity of the transistor Qdp (sometimes referred to as "P-side short-circuit capacity measurement") will be described. Fig. 21 is a timing chart of the measurement of the P-side short-circuit capacity in the dynamic characteristic test apparatus 1. As shown in fig. 21, in step ST81, control device 30 sets and outputs relay signals Sswp, Sswn and gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level. Therefore, the switches SWp and SWn and the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, Qcr, Qdp, and Qdn are all in the off state, and no current flows in the transistors and the switches.

Next, in step ST82, control device 30 sets relay signal Sswn and gate signals Sqp, Sqdp to high level and sets relay signal Sswp and gate signals Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, and Sqdn to low level for output. Accordingly, the switch SWn and the transistors Qp and Qdp are turned on, and the other switches and transistors are turned off. At this time, a current path is formed from the + terminal of the power supply capacitor 11 through the transistor Qp, the transistor Qdp, and the switch SWn in this order and returned to the-terminal of the power supply capacitor 11, and a current flows through the current path. In this manner, a short-circuit current flows through the transistor Qdp without passing through the reactor L.

Next, in step ST83, the control device 30 sets the relay signals Sswp and Sswn and the gate signals Sqp, Sqhp, Sqhn, Sqif, Sqir, Sqcf, Sqcr, Sqdp, and Sqdn to low level and outputs them, as in step ST 81. Thus, all the switches and transistors are turned off, and no current flows through the transistors and switches. Through the above series of processing, the P-side short-circuit capacity measurement was performed.

In the dynamic characteristics testing apparatus 1 described above, when the switching measurement of the transistor Qdn is started, the transistors Qp, Qhp, Qcf, and Qcr are turned on, and after the switching measurement of the transistor Qdn (acquisition of the waveform used for the switching measurement) is completed and the transistor Qhp is turned off, the transistors Qp, Qcf, and Qcr are turned off. When the transistor Qdn is switched, the current supplied from the power supply capacitor 11 to the transistor Qdn flows through the reactor L from the connection unit Cs to the connection unit Cd, and energy is accumulated in the reactor L at the time when the switching measurement (waveform sampling for switching measurement) of the transistor Qdn is completed. Therefore, when the switching measurement (acquisition of a waveform used for the switching measurement) of the transistor Qdn is completed, the transistor Qhp is turned off, so that a current path Pn3 is formed which returns from the minus terminal of the power supply capacitor 11 to the plus terminal of the power supply capacitor 11 through the diode Dhn, the transistor Qcf, the transistor Qcr, the reactor L, the diode Ddp, and the transistor Qp in this order, and energy stored in the reactor L flows as a current to the plus terminal of the power supply capacitor 11. This enables recovery of a part of the energy (electric power) of the power supply capacitor 11 used for the switching measurement of the transistor Qdn. As a result, the amount of power used in the dynamic characteristic test can be reduced. In addition, the time for charging the power supply capacitor 11 for the next measurement can be shortened, and the machine cycle can be shortened (improved).

In the dynamic characteristics testing apparatus 1, the transistors Qp, Qhn, Qcf, and Qcr are turned on when the switching measurement of the transistor Qdp is started, and are turned off after the transistor Qhn is turned off when the switching measurement of the transistor Qdp (the sampling of the waveform used for the switching measurement) is completed. At the time of switching measurement of the transistor Qdp, a current supplied from the power supply capacitor 11 to the transistor Qdp flows from the connection part Cd to the connection part Cs through the reactor L, and energy is accumulated in the reactor L at the time when the switching measurement of the transistor Qdp (waveform sampling for the switching measurement) is completed. Therefore, when the switching measurement of the transistor Qdp (acquisition of a waveform used for the switching measurement) is completed, the transistor Qhn is turned off, so that a current path Pp3 is formed which returns from the minus terminal of the power supply capacitor 11 to the plus terminal of the power supply capacitor 11 through the diode Ddn, the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qp in this order, and energy stored in the reactor L flows as a current to the plus terminal of the power supply capacitor 11. This enables recovery of a part of the energy (electric power) of the power supply capacitor 11 used for the switching measurement of the transistor Qdp. As a result, the amount of power used in the dynamic characteristic test can be further reduced. In addition, the time for charging the power supply capacitor 11 for the next measurement can be shortened, and the machine cycle can be further shortened (improved).

In the dynamic characteristic test apparatus 1, the transistor Qdn is selected as a target of switching measurement by turning on the transistor Qhp, and in the switching measurement of the transistor Qdn, a current from the connection part Cs to the connection part Cd flows through the reactor L. In addition, the transistor Qdp is selected as a target of switching measurement by turning on the transistor Qhn, and in the switching measurement of the transistor Qdp, a current from the connection part Cd to the connection part Cs flows through the reactor L. In other words, a bidirectional current can flow in the reactor L. In the switching measurement of the transistor Qdn, when an overcurrent exceeding the overcurrent threshold Ref _ N is detected in the dynamic characteristic test apparatus 1, the transistor Qir is turned on, thereby forming a current path Pn42 that runs through the reactor L, the transistor Qir, and the diode Dif. The energy stored in reactor L flows through current path Pn42 as a current and is consumed. On the other hand, in the switching measurement of the transistor Qdp, when the dynamic characteristic test apparatus 1 detects an overcurrent exceeding the overcurrent threshold Ref _ P, the transistor Qif is turned on to form a current path Pp42 circulating through the reactor L, the transistor Qif, and the diode Dir. The energy stored in the reactor L flows through the current path Pp42 as a current and is consumed. In this manner, in the dynamic characteristic test apparatus 1 of DUT50 including the transistor Qdp and the transistor Qdn electrically connected in series, although a bidirectional current can flow through the reactor L, it is possible to prevent a larger amount of overcurrent from flowing into the DUT50 in either direction. This can avoid a failure of the dynamic characteristic testing apparatus 1. As a result, the frequency of maintenance such as component replacement can be reduced, which contributes to cost reduction.

Diode Dif is a freewheeling diode for transistor Qif and diode Dir is a freewheeling diode for transistor Qir. The diode Dif is configured to: the forward direction thereof is a direction from the connection Cd toward the connection Cs, and the diode Dir is configured to: the forward direction thereof is a direction from the connection Cs toward the connection Cd. In this way, since the current paths Pn42 and Pp42 are formed using the flywheel diodes for protecting the transistors Qif and Qir, it is possible to prevent a bidirectional excessive overcurrent from flowing into the DUT50 while suppressing an increase in components.

In the switching measurement of the transistor Qdn, when an overcurrent is detected, the transistor Qir is turned on and the transistors Qcf and Qcr are turned off, whereby the current path Pn41 different from the current path Pn42 can be cut off. Therefore, the energy stored in the reactor L can be made to flow as a current in the overcurrent prevention circuit 14 (current path Pn42), and the energy stored in the reactor L can be consumed at high speed. Similarly, in the switching measurement of the transistor Qdp, when an overcurrent is detected, the transistor Qif is turned on, and the transistors Qcf and Qcr are turned off, whereby the current path Pp41 different from the current path Pp42 can be cut off. Therefore, the energy stored in the reactor L can be made to flow as a current in the overcurrent prevention circuit 14 (the current path Pp42), and the energy stored in the reactor L can be consumed at a high speed.

The dynamic characteristics testing apparatus and the dynamic characteristics testing method according to the present invention are not limited to the above-described embodiments. For example, the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, and Qcr are not limited to IGBTs, and may be switch units capable of switching between an on state and an off state. For example, as the transistors Qp, Qhp, Qhn, Qif, Qir, Qcf, and Qcr, other transistors such as an FET (Field Effect Transistor) and a bipolar Transistor, a relay capable of high-speed operation, and the like can be used. By using a transistor, the on state and the off state can be switched at high speed, and the accuracy of a dynamic characteristic test including switching measurement can be improved.

Instead of the power supply capacitor 11, another chargeable power supply may be used. In addition, when energy recovery in the switching measurement is not intended, a power supply that cannot be charged may be used, and the main switch unit 12 may not be provided. In this case, the + terminal of the power supply capacitor 11 is electrically connected to the collector of the transistor Qhp, the cathode of the diode Dhp, one end of the switch SWp, the collector of the transistor Qdp, and the cathode of the diode Ddp, and the-terminal of the power supply capacitor 11 is electrically connected to the emitter of the transistor Qhn, the anode of the diode Dhn, the other end of the switch SWn, the emitter of the transistor Qdn, and the anode of the diode Ddn.

When energy recovery in the switching measurement is to be performed, the overcurrent prevention circuit 14 and the high-speed cutoff circuit 15 may not be provided. In this case, an emitter of the transistor Qhp and a collector of the transistor Qhn are electrically connected to one end of the reactor L.

The high-speed cutoff circuit 15 may set at least the transistor Qcf to an off state when the overcurrent in the N-side switch measurement is cut off at high speed, and may set at least the transistor Qcr to an off state when the overcurrent in the P-side switch measurement is cut off at high speed. In addition, the high-speed cutoff circuit 15 may be provided in series with the reactor L in a portion of the current path Pn41 that does not overlap with the current path Pn42 when cutting off the overcurrent in the measurement of the N-side switch at high speed. In the high-speed cutoff circuit 15, when the overcurrent in the P-side switch measurement is cut off at a high speed, a portion of the current path Pp41 that does not overlap with the current path Pp42 may be provided in series with the reactor L. The high-speed cutoff circuit 15 may be provided between the DUT50 and the reactor L, for example. The high-speed cutoff circuit 15 may be provided with a switch unit capable of switching between an on state and an off state, and may be, for example, a single relay.

The overcurrent prevention circuit 14 may be configured to prevent bidirectional overcurrent. The overcurrent prevention circuit 14 may be a reverse blocking IGBT, for example. More specifically, the overcurrent prevention circuit 14 may include a switch and a diode electrically connected in series in one direction from the connection part Cd toward the connection part Cs, and include a switch and a diode electrically connected in series in the other direction from the connection part Cs toward the connection part Cd. It is sufficient that the diode in one direction is arranged such that its forward direction is one direction, and the diode in the other direction is arranged such that its forward direction is the other direction.

As shown in fig. 22, the overcurrent prevention circuit 14 may be configured as a diode bridge, for example. Specifically, the overcurrent prevention circuit 14 of the modification includes a transistor Qi, a diode Di, and diodes D1 to D4. The transistor Qi is an IGBT. The collector of the transistor Qi is electrically connected to the cathode of the diode Di, and the emitter of the transistor Qi is electrically connected to the anode of the diode Di. In other words, the diode Di is a freewheeling diode electrically connected in parallel with the transistor Qi. A collector of the transistor Qi is electrically connected to a cathode of the diode D1 and a cathode of the diode D3, and an emitter of the transistor Qi is electrically connected to an anode of the diode D2 and an anode of the diode D4. The anode of the diode D1 and the cathode of the diode D2 are electrically connected to each other, and are electrically connected to the collector of the transistor Qcr, the cathode of the diode Dcr, and one end of the reactor L. The anode of the diode D3 and the cathode of the diode D4 are electrically connected to each other, and are electrically connected to the other end of the reactor L, the other end of the switch SWp, one end of the switch SWn, and the O terminal of the DUT 50.

For example, in step ST34 of fig. 12, when the current amount of the current (currents Ic, Iqp, Iqhp, Iqcf, -Iqcr, IL, Iqdn) flowing through current path Pn1 increases and becomes greater than overcurrent threshold Ref _ N on the N side, and comparator 23 outputs an output signal of a low level to control device 30, control device 30 detects an overcurrent and changes gate signals Sqp, Sqhp from a high level to a low level in accordance with reception of an output signal of a low level from comparator 23. Thus, the transistors Qcf, Qcr, and Qdn are turned on, and the other transistors are turned off. At this time, as shown in fig. 23, a current path Pn41 is formed, and the overcurrent flowing through the current path Pn1 flows into the current path Pn 41.

Subsequently, control device 30 changes gate signal Sqi from low to high. Thus, the transistor Qi is further turned on, and as shown in fig. 23, a current path Pn43 is formed in which the reactor L, the diode D3, the transistor Qi, and the diode D2 sequentially circulate, and a part of the current flowing through the current path Pn41 flows into the current path Pn 43. Further, since the current flowing through the current path Pn41 circulates through the current path Pn41, energy is consumed by resistance components of the transistor Qcf, the transistor Qcr, the reactor L, the transistor Qdn, the diode Dhn, and the like, and thus the amount of current decreases with time. Similarly, since the current flowing through the current path Pn43 circulates through the current path Pn43, energy is consumed by resistance components of the reactor L, the diode D3, the transistor Qi, and the diode D2, and the amount of current decreases with time.

In step ST44 of fig. 14, when the current amount of the current (the currents Ic, Iqp, Iqdp, -IL, Iqcr, -Iqcf, and Iqhn) flowing through the current path Pp1 increases and becomes larger than the overcurrent threshold Ref _ P on the P side and the comparator 24 outputs the output signal of the low level to the control device 30, the control device 30 detects the overcurrent and changes the gate signals Sqp and Sqhn from the high level to the low level in response to receiving the output signal of the low level from the comparator 24. Thus, the transistors Qcf, Qcr, and Qdp are turned on, and the other transistors are turned off. At this time, as shown in fig. 24, a current path Pp41 is formed, and an overcurrent flowing in the current path Pp1 flows in the current path Pp 41.

Subsequently, control device 30 changes gate signal Sqi from low to high. As a result, the transistor Qi is further turned on, and as shown in fig. 24, a current path Pp43 is formed in which the reactor L, the diode D1, the transistor Qi, and the diode D4 sequentially circulate, and a part of the current flowing through the current path Pp41 flows into the current path Pp 43. Further, since the current flowing through the current path Pp41 circulates through the current path Pp41, energy is consumed by resistance components of the reactor L, the transistor Qcr, the transistor Qcf, the diode Dhp, and the transistor Qdp, and the amount of current decreases with time. Similarly, since the current flowing through the current path Pp43 circulates through the current path Pp43, energy is consumed by resistance components of the reactor L, the diode D1, the transistor Qi, and the diode D4, and the amount of current decreases with time. The overcurrent prevention circuit 14 configured as described above can prevent overcurrent in both directions in the dynamic characteristic testing apparatus 1.

In the case where the overcurrent prevention circuit 14 is configured by the transistors Qif and Qir and the diodes Dif and Dir, as shown in fig. 25 (a), even if the transistor Qir is turned on before the transistors Qp and Qhp are turned off in the N-side switching measurement, the short-circuit current that does not flow through the reactor L does not flow. In this way, when the overcurrent prevention circuit 14 is configured by the transistors Qif and Qir and the diodes Dif and Dir, the order of the timing to turn off the transistors Qp and Qhp and the timing to turn on the transistor Qir is arbitrary. The same is true in the P-side switch assay.

On the other hand, as shown in fig. 25 (b), in the case where the overcurrent prevention circuit 14 is configured by a diode bridge, when the transistor Qi is turned on before the transistors Qp and Qhp are turned off in the N-side switching measurement, a current path Pn5 is formed which returns from the + terminal of the power supply capacitor 11 to the minus terminal of the power supply capacitor 11 through the transistor Qp, the transistor Qhp, the transistor Qcf, the transistor Qcr, the diode D1, the transistor Qi, the diode D4, and the transistor Qdn. Since the current path Pn5 is a current path not passing through the reactor L, a short-circuit current flows through the dynamic characteristic test apparatus 1. Therefore, when the overcurrent prevention circuit 14 is configured by a diode bridge, it is necessary to turn the transistor Qi on after turning off the transistors Qp and Qhp when operating the overcurrent prevention circuit 14. The same is true in the P-side switch assay.

In this way, when the overcurrent prevention circuit 14 is configured by the transistors Qif and Qir and the diodes Dif and Dir, since the transistors Qif and Qir are electrically connected in series, a current flows only in one direction through the overcurrent prevention circuit 14 by turning on one of the transistors Qif and Qir. Therefore, in the N-side switching measurement, even if the transistor Qir is turned on before the transistors Qp and Qhp are turned off, the short-circuit current does not flow in the transistor Qdn, and in the P-side switching measurement, even if the transistor Qif is turned on before the transistors Qp and Qhn are turned off, the short-circuit current does not flow in the transistor Qdp. Therefore, the restriction on the timing of operating the overcurrent prevention circuit 14 can be reduced, and the control can be simplified.

The DUT50 is not limited to the 2in1 power semiconductor module, and may be a device including the transistor Qdp and the transistor Qdn. For example, the DUT50 may be a power semiconductor module such as a 4in 1 type, a 6in 1 type, or an 8in 1 type.

Fig. 26 is a circuit diagram showing another modification of the dynamic characteristics testing apparatus. The dynamic characteristic test apparatus 1A shown in fig. 26 is a dynamic characteristic test apparatus in the case of using a 6in 1 type power semiconductor module as a DUT. The dynamic characteristics testing apparatus 1A differs from the dynamic characteristics testing apparatus 1 in that the DUT50A is provided as a device under test instead of the DUT50, and the test circuit 10A is provided instead of the test circuit 10. The test circuit 10A differs from the test circuit 10 in that it further includes a selection circuit 17. In fig. 26, the overcurrent detection circuit 20 is not shown.

DUT50A is a 6in 1 type power semiconductor module that contains 6 transistors. Specifically, DUT50A includes, in parallel, 3-phase (U, V, W-phase) sets of transistors Qdp and Qdn and diodes Ddp and Ddn of DUT 50. In other words, DUT50A includes transistors Qdpu and Qdnu and diodes Ddpu and Ddnu (diode 1 and diode 2) as the U-phase, transistors Qdpv and Qdnv and diodes Ddpv and Ddnv (diode 1 and diode 2) as the V-phase, and transistors Qdpw and Qdnw and diodes Ddpw and Ddnw as the W-phase. DUT50A has a P terminal, a U terminal, a V terminal, a W terminal, and an N terminal. The P terminal is electrically connected to collectors of the transistors Qdpu, Qdpv, and Qdpw, and the N terminal is electrically connected to emitters of the transistors Qdnu, Qdnv, and Qdnw. The U terminal is electrically connected to an emitter of the transistor Qdpu and a collector of the transistor Qdnu, the V terminal is electrically connected to an emitter of the transistor Qdpv and a collector of the transistor Qdnv, and the W terminal is electrically connected to an emitter of the transistor Qdpw and a collector of the transistor Qdnw. For example, DUT50A is used for the 3-phase inverter circuit, transistor Qdpu can be used for the U-phase upper arm, transistor Qdnu can be used for the U-phase lower arm, transistor Qdpv can be used for the V-phase upper arm, transistor Qdnv can be used for the V-phase lower arm, transistor Qdpw can be used for the W-phase upper arm, and transistor Qdnw can be used for the W-phase lower arm.

The selection circuit 17 is a circuit for selecting the transistors Qdp and Qdn that perform switching measurement of the transistors Qdp and Qdn of the 3-phase (U, V, W-phase) included in the DUT 50A. The selection circuit 17 includes switches SWu, SWv, and SWw. The switches SWu, SWv, SWw are relays. One ends of the switches SWu, SWv, and SWw are electrically connected to each other, and are electrically connected to the other end of the reactor L, the collector of the transistor Qir, the cathode of the diode Dir, the other end of the switch SWp, and one end of the switch SWn. The other ends of the switches SWu, SWv, and SWw are electrically connected to a U, V, W terminal of the DUT50A, respectively.

In the dynamic characteristics testing apparatus 1A configured as described above, the controller 30 further outputs the gate signals Sqdpu, Sqdnu, Sqdpv, Sqdnv, Sqdpw, and Qdnw to the transistors Qdpu, Qdnu, Qdnw, Qdpv, Sqdnw, and Sqdnw, respectively, to switch the transistors between the on state and the off state. Further, control device 30 outputs relay signals Sswu, Sswv, and Ssww to switches SWu, SWv, and SWw, respectively, to switch on and off states of the switches. Even when the DUT is a power semiconductor module of another type, it can be configured in the same manner as the dynamic characteristic testing apparatus 1A.

Description of reference numerals: 1. 1A … dynamic characteristic testing device; 11 … power supply capacitor (power supply); 12 … main switch part; 13 … selection circuit; 30 … control device; 50. 50A … DUT (device under test); cd … connection (connection 1); cs … connection (No. 2 connection); diode Ddn, Ddnu, Ddnv, Ddnw … (diode 2); dpp, dpu, dpv, dpw … diodes (No. 1 diode); dhn … diode (4 th diode); a Dhp … diode (No. 3 diode); an L … reactor; qdn, Qdnu, Qdnv, Qdnw … transistors (2 nd semiconductor); qdp, Qdpu, Qdpv, Qdpw … transistors (No. 1 semiconductor); qhn … transistor (2 nd switch part); qhp … transistor (1 st switch part); a Qp … transistor (3 rd switching section).

Claims

1. A dynamic characteristic test apparatus for performing a dynamic characteristic test of a device under test including a 1 st semiconductor and a 2 nd semiconductor electrically connected in series, a 1 st diode electrically connected in parallel to the 1 st semiconductor, and a 2 nd diode electrically connected in parallel to the 2 nd semiconductor, the dynamic characteristic test apparatus comprising:

a chargeable power supply that supplies a current for the dynamic characteristic test;

a reactor serving as a load for the 1 st semiconductor and the 2 nd semiconductor;

a selection circuit having a 1 st switching unit and a 2 nd switching unit electrically connected in series, a 3 rd diode electrically connected in parallel to the 1 st switching unit, and a 4 th diode electrically connected in parallel to the 2 nd switching unit, for selecting one of the 1 st semiconductor and the 2 nd semiconductor as a target of switching measurement;

a 3 rd switching unit that switches between supply and interruption of a current from the power supply to the 1 st semiconductor or the 2 nd semiconductor; and

a control device for controlling the on state and off state of the 1 st switch unit, the 2 nd switch unit and the 3 rd switch unit,

a 1 st connection portion electrically connecting the 1 st semiconductor and the 2 nd semiconductor and a 2 nd connection portion electrically connecting the 1 st switching portion and the 2 nd switching portion are electrically connected via the reactor,

a positive terminal of the power supply is electrically connected to a cathode of the 1 st diode and a cathode of the 3 rd diode,

a negative terminal of the power supply is electrically connected to an anode of the 2 nd diode and an anode of the 4 th diode,

the 3 rd switching unit includes: a 1 st transistor, and a 5 th diode electrically connected in parallel with the 1 st transistor,

a cathode of the 5 th diode is electrically connected to the positive terminal of the power supply,

the control device turns on the 2 nd switching unit and the 3 rd switching unit when starting the switching measurement of the 1 st semiconductor,

the control device turns off the 2 nd switching unit in response to completion of the switching measurement of the 1 st semiconductor, thereby forming a 1 st current path that passes from the negative electrode terminal of the power supply through the 2 nd diode, the reactor, the 3 rd diode, and the 3 rd switching unit in this order and returns to the positive electrode terminal of the power supply, and thereby recovering energy used in the switching measurement of the 1 st semiconductor.

2. The dynamic characteristics test apparatus according to claim 1,

the control device turns on the 1 st switching unit and the 3 rd switching unit when starting the switching measurement of the 2 nd semiconductor,

the control device turns off the 1 st switching unit in response to completion of the switching measurement of the 2 nd semiconductor, thereby forming a 2 nd current path that passes from the negative electrode terminal of the power supply through the 4 th diode, the reactor, the 1 st diode, and the 3 rd switching unit in this order and returns to the positive electrode terminal of the power supply, and thereby recovering energy used in the switching measurement of the 2 nd semiconductor.

3. The dynamic characteristics test apparatus according to claim 1 or 2,

the 1 st switching unit and the 2 nd switching unit are transistors.

4. A dynamic characteristic test method for performing a dynamic characteristic test of a device under test including a 1 st semiconductor and a 2 nd semiconductor electrically connected in series, a 1 st diode electrically connected in parallel to the 1 st semiconductor, and a 2 nd diode electrically connected in parallel to the 2 nd semiconductor, the dynamic characteristic test method comprising:

a step of selecting the 1 st semiconductor as a target of switching measurement by turning on the 2 nd switching unit of a selection circuit having a 1 st switching unit and a 2 nd switching unit electrically connected in series, a 3 rd diode electrically connected in parallel to the 1 st switching unit, and a 4 th diode electrically connected in parallel to the 2 nd switching unit, and performing switching measurement of the 1 st semiconductor by turning on the 3 rd switching unit electrically connected in series to a chargeable power supply; and

a step of forming a 1 st current path by turning off the 2 nd switching unit in response to the end of the switching measurement of the 1 st semiconductor, thereby recovering energy used in the switching measurement of the 1 st semiconductor,

a 1 st connection portion electrically connecting the 1 st semiconductor and the 2 nd semiconductor and a 2 nd connection portion electrically connecting the 1 st switching portion and the 2 nd switching portion are electrically connected via a reactor,

the 1 st current path is a path from the negative terminal of the power supply to the positive terminal of the power supply through the 2 nd diode, the reactor, the 3 rd diode, and the 3 rd switching unit in this order.

5. The dynamic characteristics testing method according to claim 4, further comprising:

selecting the 2 nd semiconductor as a target of switching measurement by turning the 1 st switching unit of the selection circuit into an on state, and performing switching measurement of the 2 nd semiconductor by turning the 3 rd switching unit into an on state; and

and a step of forming a 2 nd current path from the negative electrode terminal of the power supply to the positive electrode terminal of the power supply through the 4 th diode, the reactor, the 1 st diode, and the 3 rd switching unit in this order by turning off the 1 st switching unit in response to the end of the switching measurement of the 2 nd semiconductor, thereby recovering energy used in the switching measurement of the 2 nd semiconductor.