WO2016176914A1 - 基板及其液晶显示装置 - Google Patents

基板及其液晶显示装置 Download PDF

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Publication number
WO2016176914A1
WO2016176914A1 PCT/CN2015/084764 CN2015084764W WO2016176914A1 WO 2016176914 A1 WO2016176914 A1 WO 2016176914A1 CN 2015084764 W CN2015084764 W CN 2015084764W WO 2016176914 A1 WO2016176914 A1 WO 2016176914A1
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WIPO (PCT)
Prior art keywords
pixel unit
pixel
sub
numbered
scan line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2015/084764
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English (en)
French (fr)
Inventor
曹尚操
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US14/769,781 priority Critical patent/US10319319B2/en
Publication of WO2016176914A1 publication Critical patent/WO2016176914A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G09G2300/0447—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations for multi-domain technique to improve the viewing angle in a liquid crystal display, such as multi-vertical alignment [MVA]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels

Definitions

  • the present application relates to the field of liquid crystal display technology, and in particular to a substrate and a liquid crystal display device thereof.
  • Liquid crystal display devices have been widely used in various electronic products, such as computer screens, television screens, and the like. Especially vertical alignment (English: vertical) Alignment, referred to as VA) type liquid crystal display device, is favored by more manufacturers due to its high contrast and low process difficulty.
  • VA vertical alignment
  • the display of the liquid crystal display is limited by the viewing angle.
  • the difference in brightness is large, resulting in distortion of the picture and color shift.
  • the present application provides a substrate and a liquid crystal display device thereof, which can reduce color shift.
  • a first aspect of the present application provides a substrate, wherein a plurality of pixel units including a plurality of data lines, a plurality of scan lines, and a matrix are arranged, each of the pixel units including a first sub-pixel and a second sub-pixel, wherein each of the two The pixel units adjacent to the column constitute a pixel unit column group, and each data line is connected to a pixel unit column group for providing a voltage signal for the pixel unit column group; in each row of pixel units, the pixel The first sub-pixel of the first pixel unit of the cell column group is connected to two scan lines, and the two scan lines connected to the first sub-pixel include a first scan line and a second scan line, the first scan line, a second scan line row is disposed on both sides or the same side of the first sub-pixel, and a second sub-pixel of the first pixel unit is connected to a first scan line connected to the first sub-pixel of the first pixel unit a first sub-pixel of the second pixel unit of the
  • the pixel unit of the odd column is the first pixel unit, and the pixel unit of the even column is the second pixel unit; or the pixel unit of the odd column is the second pixel unit, and the pixel unit of the even column is the The first pixel unit.
  • the pixel unit of the odd-numbered odd-numbered column and the pixel unit of the even-numbered even-numbered column are the first pixel unit
  • the odd-numbered-row even-numbered pixel unit and the even-numbered odd-numbered-column pixel unit are the second pixel unit
  • an odd-numbered row The pixel unit of the odd column and the pixel unit of the even row even column are the second pixel unit
  • the pixel unit of the odd row even column and the pixel unit of the even row odd column are the first pixel unit.
  • the pixel unit of one odd-even column in the adjacent two pixel unit column groups is the first pixel unit, and the pixels of another even one odd-column column in the adjacent two pixel unit column groups
  • the unit is the second pixel unit.
  • the on-signal of the scan line includes a first on-signal and a second on-signal, the length of the first on-signal is shorter than the length of the second on-signal, and the The start and end time of the first turn-on signal is at least partially located in the start and end time of the second turn-on signal of the scan line of the previous row.
  • the time length of the on-signal of each scan line is the same, and the start time of the on-signal of the scan line of the previous row is earlier than the start time of the turn-on signal of the scan line of the next row, and the scan line of the previous row
  • the end time of the on signal is later than the start time of the on signal of the next line of scan lines.
  • a second aspect of the present application provides a substrate including a plurality of data lines, a plurality of scan lines, and a plurality of pixel units arranged in a matrix, each of the pixel units including a first sub-pixel and a second sub-pixel, wherein each two columns
  • the adjacent pixel units form a pixel unit column group, and each data line is connected to a pixel unit column group for providing a voltage signal for the pixel unit column group; in each row of pixel units, the pixel unit column a first sub-pixel of the first pixel unit of the group is connected to two scan lines, a second sub-pixel of the first pixel unit is connected to one of the two scan lines; and a second group of the pixel unit is a first sub-pixel of the pixel unit is connected to one of the scan lines connected to the first pixel unit of the same row, and one of the scan lines connected by the adjacent one row of the first pixel unit, and the second sub-pixel of the second pixel unit The pixel is connected to one of the scan
  • the pixel unit of the odd column is the first pixel unit, and the pixel unit of the even column is the second pixel unit; or the pixel unit of the odd column is the second pixel unit, and the pixel unit of the even column is the The first pixel unit.
  • the pixel unit of the odd-numbered odd-numbered column and the pixel unit of the even-numbered even-numbered column are the first pixel unit
  • the odd-numbered-row even-numbered pixel unit and the even-numbered odd-numbered-column pixel unit are the second pixel unit
  • an odd-numbered row The pixel unit of the odd column and the pixel unit of the even row even column are the second pixel unit
  • the pixel unit of the odd row even column and the pixel unit of the even row odd column are the first pixel unit.
  • the pixel unit of one odd-even column in the adjacent two pixel unit column groups is the first pixel unit, and the pixels of another even one odd-column column in the adjacent two pixel unit column groups
  • the unit is the second pixel unit.
  • the two scan lines connected to the first sub-pixel of each row include a first scan line and a second scan line, and the first scan line and the second scan line are disposed on both sides or the same of the first sub-pixel. a side; wherein the second sub-pixel of the first pixel unit is connected to a first scan line of the first sub-pixel of the first pixel unit; and the first sub-pixel of the second pixel unit is connected to the same row a second scan line connected by one pixel unit, and a first scan line connected by the adjacent first row of the first pixel unit, and a second sub-pixel of the second pixel unit connected to the first pixel unit of the same row Scan line connection.
  • the on-signal of the scan line includes a first on-signal and a second on-signal, the length of the first on-signal is shorter than the length of the second on-signal, and the The start and end time of the first turn-on signal is at least partially located in the start and end time of the second turn-on signal of the scan line of the previous row.
  • the time length of the on-signal of each scan line is the same, and the start time of the on-signal of the scan line of the previous row is earlier than the start time of the turn-on signal of the scan line of the next row, and the scan line of the previous row
  • the end time of the on signal is later than the start time of the on signal of the next line of scan lines.
  • Each of the three adjacent pixel units in the same row is a red, green, and blue pixel unit.
  • the second sub-pixel is connected to the corresponding data line through a switching element, wherein the control end of the switching element is connected to the scan line corresponding to the second sub-pixel, and the first sub-pixel passes two
  • the switching elements are connected to the corresponding data lines, and the control ends of the two switching elements are respectively connected to the two scan lines corresponding to the first sub-pixels.
  • a third aspect of the present invention provides a liquid crystal display device including a first and a second substrate disposed opposite to each other, and a liquid crystal sandwiched between the first and second substrates, wherein the first substrate is the above Substrate.
  • the pixel unit of the substrate includes a first sub-pixel and a second sub-pixel, and the first sub-pixel is connected to two scan lines, and the second sub-pixel is connected to one of the scan lines of the first sub-pixel connection, and is driven.
  • the time lengths of the on signals output by the two scan lines connected to the pixel unit are different or the on signals are not synchronized, so that the on time between the second subpixels of the pixel unit and the corresponding data lines Longer than the on-time between the first sub-pixel and the corresponding data line, so that the first and second sub-pixels have different voltages due to different charging times, so as to drive different liquid crystals corresponding to the first and second sub-pixels.
  • the deflection achieves a reduction in color cast.
  • each of the two columns of pixel units of the above substrate shares one data line, which reduces the number of data lines, thereby ensuring the aperture ratio and cost.
  • FIG. 1 is a schematic structural view of an embodiment of a substrate of the present application.
  • FIG. 2 is a schematic view showing the polarity of a driving voltage of the substrate shown in FIG. 1;
  • FIG. 3 is a first schematic diagram of a scan signal of a portion of the scan lines shown in FIG. 1;
  • FIG. 4 is a schematic view showing the first and second sub-pixels of the substrate shown in FIG. 1 driving the liquid crystal to be deflected;
  • Figure 5 is a second schematic view of the scan signal of the partial scan line shown in Figure 1;
  • FIG. 6 is a schematic structural view of another embodiment of a substrate of the present application.
  • FIG. 7 is a schematic structural view of still another embodiment of the substrate of the present application.
  • FIG. 1 is a schematic structural view of an embodiment of a substrate of the present application.
  • the substrate 100 includes a plurality of data lines 110, a plurality of scan lines 120, and a plurality of pixel units 130 and 140 arranged in a matrix.
  • Each of the pixel units 130 and 140 includes first sub-pixels 131, 141 and a second.
  • the substrate 100 can be driven by two-dot inversion, that is, the polarity of the driving voltage between adjacent pixel unit columns in each row of pixel units of the substrate 110 is different, as shown in FIG. 2 .
  • the pixel unit adjacent to each two columns of the substrate 100 that is, the column of pixel units 130 and the column of pixel units 140 shown in FIG. 1 constitute a pixel unit column group 150.
  • Each of the data lines 120 is coupled to a pixel unit column group 150 for providing a voltage signal to the pixel unit column group 150.
  • the first sub-pixel 131 of the first pixel unit 130 of the pixel unit column group 150 is connected to two scan lines 120, and the second sub-pixel 132 of the first pixel unit 130 is One of the two scan lines 120 is connected; the first sub-pixel 141 of the second pixel unit 140 of the pixel unit column group 150 is connected to one of the scan lines 120 connected by the first pixel unit 130 of the same row, and adjacent One of the scan lines 120 connected to the next row of the first pixel unit 130, the second sub-pixel 142 of the second pixel unit 140 and one of the scan lines 120 connected to the first sub-pixel 141 of the second pixel unit 140 connection.
  • the first sub-pixel 141 of the second pixel unit 140 is connected to one of the scan lines 120 connected to the first pixel unit 130 of the same row, and one scan line 120 separately provided (FIG. 1) Shown).
  • the first sub-pixel 141 of the second pixel unit 140 is connected to one of the scan lines 120 connected to the first pixel unit 130 of the same row, and one of the scan lines 120 connected to the first row of the first pixel unit 130.
  • the two scan lines 120 connected to each row of the first sub-pixels 130 include a first scan line 120a and a second scan line 120b, and the first scan line 120a and the second scan line 120b are disposed in the row. Both sides of the first sub-pixel 130 are described.
  • the second sub-pixel 132 of the first pixel unit 130 is connected to the first scan line 120a connected to the first sub-pixel 131 of the first pixel unit 130; the first sub-pixel 141 of the second pixel unit 140 is connected to the same row a second scan line 120b connected to the first pixel unit 130, and a first scan line 120a connected to the adjacent next row of the first pixel unit 130, and a second sub-pixel 142 of the second pixel unit 140 and the same line
  • the second scan lines 120b connected to one pixel unit 130 are connected.
  • the scan line 120 is used to output an on signal to turn on the connection between the sub-pixels connected to the scan line 120 and the corresponding data line 110.
  • the pixel unit is connected to the data line and the scan line through a switching element such as a thin film transistor TFT, and the first sub-pixel 131, 141 of the pixel unit 130, 140 is connected to the data line 110 through two switching elements, wherein the two switching elements
  • the control terminals are connected to the two scan lines 120 corresponding to the first sub-pixels 131 and 141, so that the two switching elements are controlled to be turned on and off by the two scan lines 120 corresponding to the first sub-pixels 131 and 141, respectively.
  • the second sub-pixels 132, 142 of the pixel unit are connected to the data line 110 through a switching element, wherein the control end of the switching element is connected to the corresponding scan line 120 of the second sub-pixel 132, 142, and the switching element is The scan lines 120 corresponding to the second sub-pixels 132, 142 control on and off.
  • the scan signal of the scan line can be scanned by the line (English: gate Driver on array, referred to as: GOA) circuit generation.
  • the two scan lines 120a, 120b connected by the pixel unit have different time lengths of the on signals or the on signals are not synchronized, so that the second subunit of the pixel unit
  • the on-time between the pixel and the corresponding data line is longer than the on-time between the first sub-pixel and the corresponding data line.
  • each scan line inputs the scan signal G in time series.
  • FIG. 3 and FIG. 5 simply show the scan signals G1, G2, G3 of the partial scan lines in FIG. G4, G5, the scan signal of the scan line except the above partial scan lines in FIG. 1 is identical to the scan signal shown in the figure, except that the start time of the turn-on signal of the scan signal of each scan line is different to satisfy the progressive line.
  • the principle of scanning As shown in FIG. 3, the scan signal of each scan line includes an on signal, which is a high level signal in the scan signal such as a 3V or 5V voltage.
  • the turn-on signals of the scan lines 120 each include a first turn-on signal S1 and a second turn-on signal S2, and the time length T1 of the first turn-on signal S1 is shorter than the second turn-on signal S2.
  • the length of time T2, and the start and end time of the first conduction signal S1 is at least partially located in the start and end time of the second conduction signal S2 of the scan line of the previous row.
  • the data line corresponds to the driving voltage of the pixel unit to which the second sub-pixel is connected to the scanning line.
  • the scan line corresponding to G1 is input to S2
  • the data line corresponds to the first pixel unit 130 of the first row in FIG. 1 to provide the driving voltage
  • the second sub-pixel 132 of the first row of the first pixel unit 130 obtains the corresponding data line input.
  • the voltage is charged, and when the scan line corresponding to G2 is input to S1, the first sub-pixel 131 of the first row of the first pixel unit 130 of the first row also obtains a voltage corresponding to the input of the data line, and performs charging.
  • each scan line inputs a scan signal G according to a timing, wherein a scan signal of each scan line includes a turn-on signal, and the turn-on signal is a high-level signal in the scan signal. 3V or 5V voltage.
  • the turn-on signal of the scan line 120, and the turn-on signal of each scan line 120 have the same length of time, and are all T.
  • the start time t1 of the ON signal of the scan line of the previous row is earlier than the start time t1 of the ON signal of the scan line of the next row, and the end time t2 of the ON signal of the scan line of the previous row is later than the lower
  • the start time t1 of the on signal of one line of the scan line is later than the lower.
  • the substrate shown in FIG. 1 is driven by the scanning signal shown in FIG. 5.
  • the scanning line inputs an on signal
  • the data line corresponds to the pixel in which the second sub-pixel is connected to the scanning line.
  • the driving voltage of the unit When the scan line corresponding to G1 inputs the turn-on signal, the data line corresponds to the first pixel unit 130 in the first row of FIG. 1 to provide the driving voltage, and the second sub-pixel 132 of the first row of the first pixel unit 130 obtains the corresponding data line.
  • the input voltage is charged, and during the G1 input signal, when the scan line corresponding to G2 also starts to input the on-signal, the first sub-pixel 131 of the first pixel unit 130 of the first row also obtains the voltage corresponding to the data line input. Charging. Since the charging times of the first sub-pixel 131 and the second sub-pixel 132 of the first pixel unit 130 are different, the voltages of the first sub-pixel 131 and the second sub-pixel 132 are different, and the corresponding liquid crystal 160 is deflected. The difference (as shown in Figure 4), which in turn reduces the color cast.
  • the two scanning signals shown in FIG. 3 and FIG. 5 are only briefly described above for the substrate structure shown in FIG. 1.
  • the substrate of the present application is not limited to using only the above two scanning signals, and the specific structure of the combined substrate is scanned.
  • the signals can be set to be different, but the principle is that the time lengths of the on signals output by the two scan lines connected by the pixel unit are different or the on signals are not synchronized, so that the second subpixels of the pixel unit and the corresponding data are The on-time between lines is longer than the on-time between the first sub-pixel and the corresponding data line.
  • the first and second pixel units in each pixel unit group may be set according to requirements, such as pre-charging according to the second sub-pixel of the second pixel unit (ie, the substrate structure as described above)
  • the second sub-pixel of the other pixel unit is also connected to the data line.
  • the charging is performed by charging, which is called pre-charging.
  • the first pixel unit is the pixel unit of the odd column in FIG. 1
  • the second pixel unit is the pixel unit of the even column in FIG.
  • the pixel unit of the odd column may be the second pixel unit
  • the pixel unit of the even column is the first pixel unit.
  • first and second pixel units of each row can also be located in different columns. Two embodiments are briefly listed below:
  • FIG. 6 is a schematic structural diagram of another embodiment of the substrate of the present application. Different from the embodiment shown in FIG. 1 , the pixel unit of the odd-numbered rows of odd-numbered columns and the pixel units of the even-numbered rows of even-numbered columns of the substrate 600 in the present embodiment are the first pixel unit 630, and the odd-numbered rows of even-numbered columns of pixel units and The even-numbered odd-numbered column pixel unit is the second pixel unit 640.
  • the pixel unit of the odd-numbered odd-numbered column and the pixel unit of the even-numbered even-numbered column are the second pixel unit, and the pixel unit of the odd-numbered even-numbered column, that is, the even-numbered odd-numbered column of the pixel unit is the first Pixel unit.
  • FIG. 7 is a schematic structural diagram of still another embodiment of the substrate of the present application. Different from the embodiment shown in FIG. 1 , one of the two adjacent pixel unit column groups 750 of the substrate 700 in the present embodiment is the first pixel unit 730, adjacent to each other. The pixel unit of the other even one of the two pixel unit column groups is the second pixel unit 740. For example, the four columns of pixel units shown in FIG.
  • the pixel units of the odd columns of the first group of pixel unit column groups 750 and the pixels of the even columns of the second group of pixel unit column groups 750 The unit is the first pixel unit 730, the pixel unit of the even column of the first group of pixel unit column group 750 and the pixel unit of the odd column of the second group pixel unit column group 750 are the second pixel unit 740.
  • each of the three adjacent pixel units in the same row is a red, green, and blue pixel unit.
  • the first and second scan lines are respectively arranged on both sides of the first sub-pixel of the corresponding row.
  • the first scan line and the second scan line are disposed on the same side of the first sub-pixel, such as at a top or bottom side of the first sub-pixel of the row.
  • the application also provides an embodiment of a liquid crystal display device.
  • the liquid crystal display device includes first and second substrates disposed opposite to each other, and liquid crystal sandwiched between the first and second substrates, wherein the first substrate is the substrate of the above embodiment.
  • the first substrate charges the first and second sub-pixels of the pixel unit of the first substrate according to the signals corresponding to the scan lines and the data lines, and the first and second sub-pixels after charging form an electric field with different potentials Further, the liquid crystals of the first and second sub-pixel corresponding regions are driven to be deflected differently, thereby reducing the variation.
  • the liquid crystal display device described above is a VA liquid crystal display device.
  • the pixel unit of the substrate includes a first sub-pixel and a second sub-pixel, and the first sub-pixel is connected to two scan lines, and the second sub-pixel is connected to one of the scan lines of the first sub-pixel connection, and is driven.
  • the time lengths of the on signals output by the two scan lines connected to the pixel unit are different or the on signals are not synchronized, so that the on time between the second subpixels of the pixel unit and the corresponding data lines Longer than the on-time between the first sub-pixel and the corresponding data line, so that the first and second sub-pixels have different voltages due to different charging times, so as to drive different liquid crystals corresponding to the first and second sub-pixels.
  • the deflection achieves a reduction in color cast.
  • each of the two columns of pixel units of the above substrate shares one data line, which reduces the number of data lines, thereby ensuring the aperture ratio and cost.

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Abstract

一种基板及其液晶显示装置。其中，所述基板（100）包括多条数据线（110）、多条扫描线（120）和矩阵排列的多个像素单元（130,140），每个像素单元（130,140）包括第一子像素（131,141）和第二子像素（132,142），在每行像素单元（130）中，像素单元（130）的第一子像素（131）与两条扫描线（120）连接，所述像素单元（130）的第二子像素（132）与所述两条扫描线（120）的其中一条连接；所述扫描线（120）用于输出导通信号以导通所述扫描线连接的子像素与对应数据线间的连接；在驱动所述像素单元（130,140）时，所述像素单元连接的两条扫描线（120）输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元（130,140）的第二子像素（132,142）与对应数据线间的导通时间长于第一子像素（131,141）与对应数据线间的导通时间。通过上述方式，能够降低色偏。

Description

基板及其液晶显示装置
【技术领域】
本申请涉及液晶显示技术领域，特别是涉及基板及其液晶显示装置。
【背景技术】
液晶显示装置已被广泛应用在各种电子产品中，例如计算机显示屏、电视屏等。特别是垂直配向（英文：vertical alignment，简称：VA）型液晶显示装置，由于具有对比度高，工艺难度低的特点而受到更大生产厂商的青睐。
然而，液晶显示器的显示通过会受到视角的限制，如上述的VA型液晶显示装置，从不同角度观看时，亮度差异较大，从而造成画面失真，出现色偏。
【发明内容】
本申请提供基板及其液晶显示装置，能够降低色偏。
本申请第一方面提供一种基板，其中，包括多条数据线、多条扫描线和矩阵排列的多个像素单元，每个像素单元包括第一子像素和第二子像素，其中，每两列相邻的所述像素单元组成一像素单元列组，每条数据线与一像素单元列组连接，用于为所述像素单元列组提供电压信号；在每行像素单元中，所述像素单元列组的第一像素单元的第一子像素与两条扫描线连接，所述第一子像素连接的两条扫描线包括第一扫描线和第二扫描线，所述第一扫描线、第二扫描线行设置在所述第一子像素的两侧或者同一侧，所述第一像素单元的第二子像素与所述第一像素单元的第一子像素连接的第一扫描线连接；所述像素单元列组的第二像素单元的第一子像素连接至同一行的第一像素单元连接的第二扫描线，以及相邻的下一行第一像素单元连接的第一扫描线，所述第二像素单元的第二子像素与同一行的第一像素单元连接的第二扫描线连接；所述扫描线用于输出导通信号以导通所述扫描线连接的子像素与对应数据线间的连接；在驱动所述像素单元时，所述像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间；所述第二子像素通过一开关元件与对应数据线连接，其中所述开关元件的控制端连接于所述第二子像素对应的所述扫描线，所述第一子像素通过两个开关元件与对应数据线连接，所述两个开关元件的控制端分别连接于所述第一子像素对应的所述两条扫描线。
其中，奇数列的像素单元为所述第一像素单元，偶数列的像素单元为所述第二像素单元；或奇数列的像素单元为所述第二像素单元，偶数列的像素单元为所述第一像素单元。
其中，奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第一像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第二像素单元；或奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第二像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第一像素单元。
其中，相邻两个所述像素单元列组中的一奇一偶列的像素单元为所述第一像素单元，相邻两个所述像素单元列组中的另一偶一奇列的像素单元为所述第二像素单元。
其中，所述扫描线的导通信号均包括第一导通信号和第二导通信号，所述第一导通信号的时间长度短于所述第二导通信号的时间长度，且所述第一导通信号的起止时间至少部分位于上一行扫描线的第二导通信号的起止时间之中。
其中，每条扫描线的导通信号的时间长度相同，且上一行扫描线的导通信号的起始时间早于下一行扫描线的导通信号的起始时间，且所述上一行扫描线的导通信号的结束时间晚于所述下一行扫描线的导通信号的起始时间。
本申请第二方面提供一种基板，包括多条数据线、多条扫描线和矩阵排列的多个像素单元，每个像素单元包括第一子像素和第二子像素，其中，每两列相邻的所述像素单元组成一像素单元列组，每条数据线与一像素单元列组连接，用于为所述像素单元列组提供电压信号；在每行像素单元中，所述像素单元列组的第一像素单元的第一子像素与两条扫描线连接，所述第一像素单元的第二子像素与所述两条扫描线的其中一条连接；所述像素单元列组的第二像素单元的第一子像素连接至同一行的第一像素单元连接的其中一条扫描线，以及相邻的下一行第一像素单元连接的其中一条扫描线，所述第二像素单元的第二子像素与所述第二像素单元的第一子像素连接的其中一条扫描线连接；所述扫描线用于输出导通信号以导通所述扫描线连接的子像素与对应数据线间的连接；在驱动所述像素单元时，所述像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间。
其中，奇数列的像素单元为所述第一像素单元，偶数列的像素单元为所述第二像素单元；或奇数列的像素单元为所述第二像素单元，偶数列的像素单元为所述第一像素单元。
其中，奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第一像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第二像素单元；或奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第二像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第一像素单元。
其中，相邻两个所述像素单元列组中的一奇一偶列的像素单元为所述第一像素单元，相邻两个所述像素单元列组中的另一偶一奇列的像素单元为所述第二像素单元。
其中，每行第一子像素连接的两条扫描线包括第一扫描线和第二扫描线，所述第一扫描线、第二扫描线行设置在所述第一子像素的两侧或者同一侧；其中，所述第一像素单元的第二子像素与所述第一像素单元的第一子像素连接的第一扫描线连接；第二像素单元的第一子像素连接至同一行的第一像素单元连接的第二扫描线，以及相邻的下一行第一像素单元连接的第一扫描线，所述第二像素单元的第二子像素与同一行的第一像素单元连接的第二扫描线连接。
其中，所述扫描线的导通信号均包括第一导通信号和第二导通信号，所述第一导通信号的时间长度短于所述第二导通信号的时间长度，且所述第一导通信号的起止时间至少部分位于上一行扫描线的第二导通信号的起止时间之中。
其中，每条扫描线的导通信号的时间长度相同，且上一行扫描线的导通信号的起始时间早于下一行扫描线的导通信号的起始时间，且所述上一行扫描线的导通信号的结束时间晚于所述下一行扫描线的导通信号的起始时间。
其中，同一行每三个相邻像素单元分别为红、绿、蓝像素单元。
其中，所述第二子像素通过一开关元件与对应数据线连接，其中所述开关元件的控制端连接于所述第二子像素对应的所述扫描线，所述第一子像素通过两个开关元件与对应数据线连接，所述两个开关元件的控制端分别连接于所述第一子像素对应的所述两条扫描线。
本申请第三方面提供一种液晶显示装置，包括相对设置的第一、第二基板，以及夹持在所述第一、第二基板之间的液晶，其中，所述第一基板为上述的基板。
上述方案中，基板的像素单元包括第一子像素和第二子像素，且第一子像素连接至两条扫描线，第二子像素连接于第一子像素连接的其中一条扫描线，在驱动所述像素单元时，像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间，进而使得所述第一、第二子像素由于充电时间的不同而电压也不同，以驱使第一、第二子像素对应的液晶发生不同的偏转，实现降低了色偏。而且，上述基板的每两列像素单元公用一条数据线，减少了数据线的数量，进而保证了开口率和成本。
【附图说明】
图1是本申请基板一实施方式的结构示意图；
图2是图1所示的基板的驱动电压的极性示意图；
图3是图1所示的部分扫描线的扫描信号的第一示意图；
图4是图1所示的基板的第一、第二子像素驱使液晶偏转的示意图；
图5是图1所示的部分扫描线的扫描信号的第二示意图；
图6是本申请基板另一实施方式的结构示意图；
图7是本申请基板再一实施方式的结构示意图。
【具体实施方式】
以下描述中，为了说明而不是为了限定，提出了诸如特定系统结构、接口、技术之类的具体细节，以便透彻理解本申请。然而，本领域的技术人员应当清楚，在没有这些具体细节的其它实施方式中也可以实现本申请。在其它情况中，省略对众所周知的装置、电路以及方法的详细说明，以免不必要的细节妨碍本申请的描述。
请参阅图1，图1是本申请基板一实施方式的结构示意图。本实施方式中，该基板100包括多条数据线110、多条扫描线120和矩阵排列的多个像素单元130、140，每个像素单元130、140包括第一子像素131、141和第二子像素132、142。其中，所述基板100可采用行两点反转进行驱动，即基板110的每行像素单元中相邻的像素单元列组间的驱动电压的极性不同，如图2所示。
具体，基板100的每两列相邻的所述像素单元即图1示的一列像素单元130和一列像素单元140组成一像素单元列组150。每条数据线120与一像素单元列组150连接，用于为所述像素单元列组150提供电压信号。
在每行像素单元中，所述像素单元列组150的第一像素单元130的第一子像素131与两条扫描线120连接，所述第一像素单元130的第二子像素132与所述两条扫描线120的其中一条连接；所述像素单元列组150的第二像素单元140的第一子像素141连接至同一行的第一像素单元130连接的其中一条扫描线120，以及相邻的下一行第一像素单元130连接的其中一条扫描线120，所述第二像素单元140的第二子像素142与所述第二像素单元140的第一子像素141连接的其中一条扫描线120连接。对于最后一行的像素单元，其第二像素单元140的第一子像素141连接至同一行的第一像素单元130连接的其中一条扫描线120，以及另外单独设置的一条扫描线120（如图1所示）。或者，其第二像素单元140的第一子像素141连接至同一行的第一像素单元130连接的其中一条扫描线120，以及第一行第一像素单元130连接的其中一条扫描线120。
如图1所示，每行第一子像素130连接的两条扫描线120包括第一扫描线120a和第二扫描线120b，所述第一扫描线120a、第二扫描线120b行设置在所述第一子像素130的两侧。第一像素单元130的第二子像素132与所述第一像素单元130的第一子像素131连接的第一扫描线120a连接；第二像素单元140的第一子像素141连接至同一行的第一像素单元130连接的第二扫描线120b，以及相邻的下一行第一像素单元130连接的第一扫描线120a，所述第二像素单元140的第二子像素142与同一行的第一像素单元130连接的第二扫描线120b连接。
上述基板中，扫描线120用于输出导通信号以导通所述扫描线120连接的子像素与对应数据线110间的连接。例如，像素单元通过开关元件如薄膜晶体管TFT与数据线、扫描线连接，像素单元130、140的第一子像素131、141通过两个开关元件与数据线110连接，其中所述两个开关元件的控制端连接于所述第一子像素131、141对应的两条扫描线120，以使所述两个开关元件分别由第一子像素131、141对应的两条扫描线120控制通断，像素单元的第二子像素132、142通过一开关元件与数据线110连接，其中所述开关元件的控制端连接于所述第二子像素132、142对应的扫描线120，所述开关元件由第二子像素132、142对应的扫描线120控制通断。其中，扫描线的扫描信号可由行扫描（英文：gate driver on array，简称：GOA）电路产生。
在驱动所述像素单元130、140时，所述像素单元连接的两条扫描线120a、120b输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间。
例如，如图3所示，每条扫描线依时序输入扫描信号G，可以理解的是，图3及下图5仅简单示出图1中的部分扫描线的扫描信号G1、G2、G3、G4、G5，图1中的除上述部分扫描线外的扫描线的扫描信号与图示的扫描信号一致，只是每条扫描线的扫描信号的导通信号的起始时间不同，以满足逐行扫描的原则。如图3所示，每条扫描线的扫描信号中包括导通信号，所述导通信号为扫描信号中的高电平信号如3V或5V电压。而且，所述扫描线120的导通信号均包括第一导通信号S1和第二导通信号S2，所述第一导通信号S1的时间长度T1短于所述第二导通信号S2的时间长度T2，且所述第一导通信号S1的起止时间至少部分位于上一行扫描线的第二导通信号S2的起止时间之中。
结合图1和3对本基板驱动原理进行说明，当扫描线输入第二导通信号S2时，数据线对应输出第二子像素与该扫描线连接的像素单元的驱动电压。如G1对应的扫描线输入S2时，数据线对应为图1中第一行的第一像素单元130提供驱动电压，第一行第一像素单元130的第二子像素132获得对应数据线输入的电压，进行充电，当G2对应的扫描线输入S1时，第一行第一像素单元130的第一子像素131也获得对应数据线输入的电压，进行充电。由于第一像素单元130的第一子像素131和第二子像素132的充电时间不同，故最终导致第一子像素131和第二子像素132的电压不同，进而使得其对应的液晶160偏转有所不同（如图4所示），进而降低了色偏。
又例如，如图5所示，每条扫描线依时序输入扫描信号G，其中，每条扫描线的扫描信号中包括导通信号，所述导通信号为扫描信号中的高电平信号如3V或5V电压。而且，所述扫描线120的导通信号，且每条扫描线120的导通信号的时间长度相同，均为T。且上一行扫描线的导通信号的起始时间t1早于下一行扫描线的导通信号的起始时间t1，且所述上一行扫描线的导通信号的结束时间t2晚于所述下一行扫描线的导通信号的起始时间t1。
同理于上述图3的驱动原理，采用图5所示的扫描信号驱动图1所示的基板，当扫描线输入导通信号时，数据线对应输出第二子像素与该扫描线连接的像素单元的驱动电压。如G1对应的扫描线输入导通信号时，数据线对应为图1中第一行的第一像素单元130提供驱动电压，第一行第一像素单元130的第二子像素132获得对应数据线输入的电压，进行充电，在G1输入信号期间，G2对应的扫描线也开始输入导通信号时，第一行第一像素单元130的第一子像素131也获得对应数据线输入的电压，进行充电。由于第一像素单元130的第一子像素131和第二子像素132的充电时间不同，故最终导致第一子像素131和第二子像素132的电压不同，进而使得其对应的液晶160偏转有所不同（如图4所示），进而降低了色偏。
可以理解的是，上面仅针对图1所示的基板结构简述图3、5示的两种扫描信号，但本申请基板并不限于仅采用上述两种扫描信号，结合基板的具体结构，扫描信号可设置为不同，但其原则均是：像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间。
另外，在不同实施方式中，每个像素单元组中的第一、第二像素单元可根据需求设定，如根据第二像素单元的第二子像素的预充电情况（即如上述的基板结构中，在驱动像素单元组中的一像素单元时，由于其另一像素单元的第二子像素连接于该像素单元的其中一条扫描线，故另一像素单元的第二子像素也与数据线导通而进行充电，即称为预充电）进行设定。例如，在图1所示的实施方式中，上述第一像素单元为图1中的奇数列的像素单元，第二像素单元为图1中的偶数列的像素单元为所述第二像素单元。但在其他实施方式中，同样可将奇数列的像素单元为所述第二像素单元，偶数列的像素单元为所述第一像素单元。
当然，每行的第一、第二像素单元也可位于不同列，下面简单列举两种实施方式：
请参阅图6，图6是本申请基板另一实施方式的结构示意图。区别于图1所示的实施方式，本实施方式中的基板600的奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第一像素单元630，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第二像素单元640。或，在其他实施方式中，奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第二像素单元，奇数行偶数列的像素单元即偶数行奇数列像素单元为所述第一像素单元。
请参阅图7，图7是本申请基板再一实施方式的结构示意图。区别于图1所示的实施方式，本实施方式中的基板700的相邻两个所述像素单元列组750中的一奇一偶列的像素单元为所述第一像素单元730，相邻两个所述像素单元列组中的另一偶一奇列的像素单元为所述第二像素单元740。例如，图7示的四列像素单元组成相邻两个像素单元列组750，其中第一组像素单元列组750的奇数列的像素单元和第二组像素单元列组750的偶数列的像素单元为第一像素单元730，第一组像素单元列组750的偶数列的像素单元和第二组像素单元列组750的奇数列的像素单元为第二像素单元740。
在上述实施方式中，同一行每三个相邻像素单元分别为红、绿、蓝像素单元。
上述实施方式中，第一、第二扫描线分别行设置在对应行的第一子像素的两侧。但在其他实施方式中，第一扫描线、第二扫描线行设置在所述第一子像素的同一侧，如间隔设置在该行第一子像素的顶侧或者底侧。
本申请还提供一种液晶显示装置的实施方式。本实施方式中，液晶显示装置包括相对设置的第一、第二基板，以及夹持在所述第一、第二基板之间的液晶，其中，所述第一基板为上面实施方式的基板。
第一基板根据对应扫描线和数据线的信号对第一基板的像素单元的第一、第二子像素分别进行充电，充电后的第一、第二子像素与第二基板形成不同电位的电场，进而驱动第一、第二子像素对应区域的液晶发生不同的偏转，实现降低偏差。
其中，上述液晶显示装置为VA型液晶显示装置。
上述方案中，基板的像素单元包括第一子像素和第二子像素，且第一子像素连接至两条扫描线，第二子像素连接于第一子像素连接的其中一条扫描线，在驱动所述像素单元时，像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间，进而使得所述第一、第二子像素由于充电时间的不同而电压也不同，以驱使第一、第二子像素对应的液晶发生不同的偏转，实现降低了色偏。而且，上述基板的每两列像素单元公用一条数据线，减少了数据线的数量，进而保证了开口率和成本。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种基板，其中，包括多条数据线、多条扫描线和矩阵排列的多个像素单元，每个像素单元包括第一子像素和第二子像素，其中，
    每两列相邻的所述像素单元组成一像素单元列组，每条数据线与一像素单元列组连接，用于为所述像素单元列组提供电压信号；
    在每行像素单元中，所述像素单元列组的第一像素单元的第一子像素与两条扫描线连接，所述第一子像素连接的两条扫描线包括第一扫描线和第二扫描线，所述第一扫描线、第二扫描线行设置在所述第一子像素的两侧或者同一侧，所述第一像素单元的第二子像素与所述第一像素单元的第一子像素连接的第一扫描线连接；所述像素单元列组的第二像素单元的第一子像素连接至同一行的第一像素单元连接的第二扫描线，以及相邻的下一行第一像素单元连接的第一扫描线，所述第二像素单元的第二子像素与同一行的第一像素单元连接的第二扫描线连接；
    所述扫描线用于输出导通信号以导通所述扫描线连接的子像素与对应数据线间的连接；在驱动所述像素单元时，所述像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间；
    所述第二子像素通过一开关元件与对应数据线连接，其中所述开关元件的控制端连接于所述第二子像素对应的所述扫描线，所述第一子像素通过两个开关元件与对应数据线连接，所述两个开关元件的控制端分别连接于所述第一子像素对应的所述两条扫描线。
  2. 根据权利要求1所述的基板，其中，奇数列的像素单元为所述第一像素单元，偶数列的像素单元为所述第二像素单元；或
    奇数列的像素单元为所述第二像素单元，偶数列的像素单元为所述第一像素单元。
  3. 根据权利要求1所述的基板，其中，奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第一像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第二像素单元；或
    奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第二像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第一像素单元。
  4. 根据权利要求1所述的基板，其中，相邻两个所述像素单元列组中的一奇一偶列的像素单元为所述第一像素单元，相邻两个所述像素单元列组中的另一偶一奇列的像素单元为所述第二像素单元。
  5. 根据权利要求1所述的基板，其中，所述扫描线的导通信号均包括第一导通信号和第二导通信号，所述第一导通信号的时间长度短于所述第二导通信号的时间长度，且所述第一导通信号的起止时间至少部分位于上一行扫描线的第二导通信号的起止时间之中。
  6. 根据权利要求1所述的基板，其中，每条扫描线的导通信号的时间长度相同，且上一行扫描线的导通信号的起始时间早于下一行扫描线的导通信号的起始时间，且所述上一行扫描线的导通信号的结束时间晚于所述下一行扫描线的导通信号的起始时间。
  7. 一种基板，其中，包括多条数据线、多条扫描线和矩阵排列的多个像素单元，每个像素单元包括第一子像素和第二子像素，其中，
    每两列相邻的所述像素单元组成一像素单元列组，每条数据线与一像素单元列组连接，用于为所述像素单元列组提供电压信号；
    在每行像素单元中，所述像素单元列组的第一像素单元的第一子像素与两条扫描线连接，所述第一像素单元的第二子像素与所述两条扫描线的其中一条连接；所述像素单元列组的第二像素单元的第一子像素连接至同一行的第一像素单元连接的其中一条扫描线，以及相邻的下一行第一像素单元连接的其中一条扫描线，所述第二像素单元的第二子像素与所述第二像素单元的第一子像素连接的其中一条扫描线连接；
    所述扫描线用于输出导通信号以导通所述扫描线连接的子像素与对应数据线间的连接；在驱动所述像素单元时，所述像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间。
  8. 根据权利要求7所述的基板，其中，奇数列的像素单元为所述第一像素单元，偶数列的像素单元为所述第二像素单元；或
    奇数列的像素单元为所述第二像素单元，偶数列的像素单元为所述第一像素单元。
  9. 根据权利要求7所述的基板，其中，奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第一像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第二像素单元；或
    奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第二像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第一像素单元。
  10. 根据权利要求7所述的基板，其中，相邻两个所述像素单元列组中的一奇一偶列的像素单元为所述第一像素单元，相邻两个所述像素单元列组中的另一偶一奇列的像素单元为所述第二像素单元。
  11. 根据权利要求7所述的基板，其中，每行第一子像素连接的两条扫描线包括第一扫描线和第二扫描线，所述第一扫描线、第二扫描线行设置在所述第一子像素的两侧或者同一侧；其中，
    所述第一像素单元的第二子像素与所述第一像素单元的第一子像素连接的第一扫描线连接；第二像素单元的第一子像素连接至同一行的第一像素单元连接的第二扫描线，以及相邻的下一行第一像素单元连接的第一扫描线，所述第二像素单元的第二子像素与同一行的第一像素单元连接的第二扫描线连接。
  12. 根据权利要求11所述的基板，其中，所述扫描线的导通信号均包括第一导通信号和第二导通信号，所述第一导通信号的时间长度短于所述第二导通信号的时间长度，且所述第一导通信号的起止时间至少部分位于上一行扫描线的第二导通信号的起止时间之中。
  13. 根据权利要求11所述的基板，其中，每条扫描线的导通信号的时间长度相同，且上一行扫描线的导通信号的起始时间早于下一行扫描线的导通信号的起始时间，且所述上一行扫描线的导通信号的结束时间晚于所述下一行扫描线的导通信号的起始时间。
  14. 根据权利要求7所述的基板，其中，同一行每三个相邻像素单元分别为红、绿、蓝像素单元。
  15. 根据权利要求7所述的基板，其中，所述第二子像素通过一开关元件与对应数据线连接，其中所述开关元件的控制端连接于所述第二子像素对应的所述扫描线，所述第一子像素通过两个开关元件与对应数据线连接，所述两个开关元件的控制端分别连接于所述第一子像素对应的所述两条扫描线。
  16. 一种液晶显示装置，其中，包括相对设置的第一、第二基板，以及夹持在所述第一、第二基板之间的液晶，所述第一基板包括多条数据线、多条扫描线和矩阵排列的多个像素单元，每个像素单元包括第一子像素和第二子像素，其中，
    每两列相邻的所述像素单元组成一像素单元列组，每条数据线与一像素单元列组连接，用于为所述像素单元列组提供电压信号；
    在每行像素单元中，所述像素单元列组的第一像素单元的第一子像素与两条扫描线连接，所述第一像素单元的第二子像素与所述两条扫描线的其中一条连接；所述像素单元列组的第二像素单元的第一子像素连接至同一行的第一像素单元连接的其中一条扫描线，以及相邻的下一行第一像素单元连接的其中一条扫描线，所述第二像素单元的第二子像素与所述第二像素单元的第一子像素连接的其中一条扫描线连接；
    所述扫描线用于输出导通信号以导通所述扫描线连接的子像素与对应数据线间的连接；在驱动所述像素单元时，所述像素单元连接的两条扫描线输出的导通信号的时间长度不同或导通信号不同步，以使所述像素单元的第二子像素与对应数据线间的导通时间长于第一子像素与对应数据线间的导通时间。
  17. 根据权利要求16所述的液晶显示装置，其中，奇数列的像素单元为所述第一像素单元，偶数列的像素单元为所述第二像素单元；或
    奇数列的像素单元为所述第二像素单元，偶数列的像素单元为所述第一像素单元。
  18. 根据权利要求16所述的液晶显示装置，其中，奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第一像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第二像素单元；或
    奇数行奇数列的像素单元以及偶数行偶数列的像素单元为所述第二像素单元，奇数行偶数列的像素单元及偶数行奇数列像素单元为所述第一像素单元。
  19. 根据权利要求16所述的液晶显示装置，其中，相邻两个所述像素单元列组中的一奇一偶列的像素单元为所述第一像素单元，相邻两个所述像素单元列组中的另一偶一奇列的像素单元为所述第二像素单元。
  20. 根据权利要求16所述的液晶显示装置，其中，每行第一子像素连接的两条扫描线包括第一扫描线和第二扫描线，所述第一扫描线、第二扫描线行设置在所述第一子像素的两侧或者同一侧；其中，
    所述第一像素单元的第二子像素与所述第一像素单元的第一子像素连接的第一扫描线连接；第二像素单元的第一子像素连接至同一行的第一像素单元连接的第二扫描线，以及相邻的下一行第一像素单元连接的第一扫描线，所述第二像素单元的第二子像素与同一行的第一像素单元连接的第二扫描线连接。
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