WO2016165395A1

WO2016165395A1 - Decoding method and decoder

Info

Publication number: WO2016165395A1
Application number: PCT/CN2015/098959
Authority: WO
Inventors: 丁春丽; 倪萌
Original assignee: 中兴通讯股份有限公司
Priority date: 2015-09-15
Filing date: 2015-12-25
Publication date: 2016-10-20
Also published as: CN106533453A; CN106533453B

Abstract

Disclosed are a decoding method and a decoder. The decoding method comprises: receiving a convolutional code of a service; de-duplicating a generator polynomial of the convolutional code to obtain a reduced order convolutional code; and decoding the reduced order convolutional code.

Description

Decoding method and decoder

Technical field

This application relates to, but is not limited to, the field of mobile communications.

Background technique

In the communication system, a variety of voice and data services are used in the encoding process. Convolutional coding is used in the coding process. When the receiver decodes it, it is usually selected by Viterbi software.

Principle of viterbi software decoding: For a sequence of information of length kL, the possible number of corresponding code sequences is about 2 ^KL . When L is large, this will be an astronomical number. Therefore, it is difficult to find a sequence of information with the smallest path metric of the received sequence among so many possible code sequences. The viterbi algorithm is an algorithm introduced in solving this difficulty. The basic idea of the algorithm is that instead of comparing 2 ^KL paths (sequences) on the trellis diagram, it is to receive a segment, calculate a segment, and select the segment. A possible code segment (branch) such that the entire code sequence is a sequence with a maximum likelihood function.

There are 2 ^k(N-1) states in the trellis diagram of the convolutional code, and the number of branches leaving or arriving in each state is 2 ^K (which corresponds to the number of "states" of the signal input by this code). For the sake of simplicity, we discuss the case of k=1, starting from the starting point of the all-zero state (state 0). In the viterbi algorithm, the path metrics of the two paths converge to each node are compared, and then the path with the smaller path metric (European distance) is saved (this path is called "survival path") and discarded. Another path and store the corresponding path metric. Since each node leads to two branches, the extension of the path in each stage after the N-1th level is doubled, but after comparison and selection, half of the path is discarded, and the total number of remaining paths remains constant ( Equal to 2 ^(N-1) ), which is the number of states of the encoder). It can be seen that the basic operation in the above decoding process is "add-and-select" (ACS), that is, the accumulated value of the path metric is obtained for each stage, and then the two are compared and selected. Sometimes there are two cases where the accumulated path metrics are equal. In this case, you can choose one as the “survival path”. This is the basic idea of viterbi software decoding. The path metric is often referred to as a cumulative metric, and the branch metric is referred to as a branch metric.

There are two different methods for storing and processing surviving paths, one called register swapping, and one called "Traceback". Because of the high coding state and high-speed decoding, GSM uses the "return method" decoding strategy:

(1) At each time instant T, calculate the soft decision distance of the received signal and each branch state value as a branch metric of the branch;

(2) at time T+1, adding a branch metric value entering a certain state to a cumulative metric value of a corresponding state at a previous time to calculate a new cumulative metric value;

(3) comparison;

(4) selecting and storing a maximum cumulative metric, storing a branch decision value corresponding to the maximum cumulative metric as a surviving path decision value of the corresponding state;

(5) If the length of the unreturned cable is greater than 2 to 3 times the decoding depth, start the retrieval and obtain the surviving path of the segment; or, if L is not large, the cable can be started after the end of the entire code segment processing;

(6) If there is no more than 2 to 3 times the decoding depth, T increases by 1, returning to (1);

(7) Reverse the sorted surviving paths and output them.

It can be seen that, since there are many coding states, when the coding is performed according to the protocol coding, the processing amount is very large, so the decoding scheme of the related art has a problem of low coding efficiency.

Summary of the invention

The following is an overview of the topics detailed in this document. This Summary is not intended to limit the scope of the claims.

A decoding method and a decoder are provided to solve the problem that the decoding method in the related art has low decoding efficiency.

According to an aspect of an embodiment of the present invention, a decoding method is provided, including:

Receive a convolutional code of the service;

Dequantizing the generator polynomial of the convolutional code to obtain a reduced-order convolutional code;

The reduced order convolutional code is decoded.

Optionally, in the method of the embodiment of the present invention, the generating polynomial of the convolutional code is further The line de-reprocessing includes combining the same polynomials in the generator polynomial of the convolutional code to implement de-duplication processing.

Optionally, in the method of the embodiment of the present invention, after combining the same polynomial in the generator polynomial of the convolutional code, the method further comprises: performing quantization process on the result of the merge according to the dimension of the original polynomial.

Optionally, in the method of the embodiment of the present invention, the dequantizing the generating polynomial of the convolutional code comprises: comparing a puncturing bit of the same polynomial in a generator polynomial of the convolutional code, Deduplication processing is achieved by retaining only the polynomial with the least number of punctured bits.

Optionally, in the method of the embodiment of the present invention, the decoding the reduced-order convolutional code comprises: performing viterbi decoding on the reduced-order convolutional code.

According to another aspect of the embodiments of the present invention, a decoder is provided, including:

a receiving module, configured to: receive a convolutional code of the service;

The reduction module is configured to perform deduplication processing on the generator polynomial of the convolutional code to obtain a reduced-order convolutional code;

The decoding module is configured to: decode the reduced-order convolutional code.

Optionally, in the decoder of the embodiment of the present invention, the reduced order module is configured to combine the same polynomials in the generator polynomial of the convolutional code to implement deduplication processing.

Optionally, in the decoder of the embodiment of the present invention, the reduced order module is further configured to perform quantization processing according to the dimension of the original polynomial.

Optionally, in the decoder according to the embodiment of the present invention, the reduced order module is configured to: compare the puncturing bits of the same polynomial in the generator polynomial of the convolutional code, by retaining only the puncturing bit Polynomial to achieve de-duplication.

Optionally, in the decoder of the embodiment of the present invention, the decoding module is configured to: decode the reduced-order convolutional code by using viterbi software decoding.

A computer readable storage medium storing computer executable instructions for performing the method of any of the above.

The embodiment of the invention adopts a reduced order method to improve the decoding algorithm, which not only reduces the calculation of the cumulative metric, but also reduces the number of times of the algorithm cycle, and more importantly reduces the complexity of the decoding operation and improves the decoding efficiency.

Other aspects will be apparent upon reading and understanding the drawings and detailed description.

BRIEF abstract

FIG. 1 is a flowchart of a decoding method according to an embodiment of the present invention;

2 is a comparison diagram of simulation performance before and after reduction in an application example of the present invention;

FIG. 3 is a comparison diagram of simulation performance before and after TU3 channel soft decoding reduction step;

Figure 4 is a comparison of simulation performance of the TU50 interference channel before and after soft decoding reduction;

Figure 5 is a comparison of the performance of the TU50 environment before and after the soft decoding reduction step;

Figure 6 is a comparison of the performance of the TU1.5 environment measured soft decoding before and after the reduction order;

FIG. 7 is a structural block diagram of a decoder according to an embodiment of the present invention.

Embodiments of the invention

Embodiments of the present invention will be described below in conjunction with the drawings in the embodiments of the present invention.

Embodiment 1

The embodiment of the invention provides a decoding method, as shown in FIG. 1 , including the following steps:

Step S101, receiving a convolutional code of the service;

Step S102, performing deduplication processing on the generator polynomial of the convolutional code to obtain a reduced-order convolutional code;

In this step, the manner of performing deduplication processing on the generator polynomial of the convolutional code includes, but is not limited to, the following manner:

Manner 1: Combining the same polynomials in the generator polynomial of the convolutional code; wherein, combining refers to simple accumulation;

Manner 2: Combine the same polynomials in the generator polynomial of the convolutional code, and quantize the combined result according to the dimension of the original polynomial, that is, keep the same as the dimension of the original polynomial, for example: if The two polynomials are combined and added, and the result needs to be divided by 2 to eliminate the dimensional change caused by the addition;

Manner 3: Comparing the puncturing bits of the same polynomial in the generator polynomial of the convolutional code, and implementing the de-duplication process by retaining only the polynomial with the least puncturing bit. The implementation principle of the deduplication mode is that after the convolutional code is encoded, in order to adapt to the requirements of the channel coding standard length, the encoded data is rounded off, which is called puncturing. Under each polynomial, the number of data bits and the number to be chiseled are different. For the receiving end, it is necessary to recover the data that has been chiseled for decoding. The general practice is to zero. If the more data a polynomial is scrambled, the lower its confidence. On the contrary, we want to keep the polynomial with the least number of puncturing bits, and the confidence is higher.

Step S103, decoding the reduced-order convolutional code.

In this embodiment, the reduced-order convolutional code is optionally subjected to viterbi decoding.

In summary, it can be seen that the embodiment of the present invention provides a decoding optimization scheme, which considers that the convolutional code generator polynomials used in various services are all above 5th order, and finds repetitiveness according to the structural characteristics of the generator polynomial. The polynomial, do the merging or selection process, implement the reduced order processing of the convolutional code, and decode the reduced convolutional code, which decodes the convolutional code after the reduced order, saving resources And the complexity of the operation increases the decoding speed.

The process of the embodiment of the present invention will be described in detail below through an application example.

This application example takes the (5, 1, 6) convolutional code of the service AFS4.75 as an example. The (5, 1, 6) decoding can be reduced to (3, 1, 6) for processing, and other services have similar volumes. The characteristics of the product coding can also be emulated, and the implementation is as follows.

See GSM Protocol 45003, AFS4.75 convolutional code generator polynomial is as follows:

G ₄ /G ₆ =1+D ² +D ³ +D ⁵ +D ⁶ /1+D+D ² +D ³ +D ⁴ +D ⁶

G ₅ /G ₆ =1+D+D ⁴ +D ⁶ /1+D+D ² +D ³ +D ⁴ +D ⁶

G ₆ /G ₆ =1

It can be seen that the first and second bit generator polynomials are the same, and the fourth and fifth bits are also the same. The same bits are removed and the remaining bits are combined into a (3, 1, 6) convolutional code.

Therefore, in the decoding process, the (5, 1, 6) software decoding is reduced to (3, 1, 6) decoding. The embodiment of the invention obtains three implementation methods:

(1)

Combine

1, 2, and 4, 5, and this becomes (3, 1, 6) decoding.

(2) Considering that the soft information of the demodulated output is quantized, on the basis of (1), the result after the combination is quantized according to the dimension of the original polynomial.

(3) The 1st and 2nd digits are repeated, and the 4th and 5th digits are also repeated. For the 1st and 2nd digits, the punctured positions of the two are compared, and one of the punctured bits is reserved; the same applies to the 4th and 5th positions. Do the same. This rounds off 2 bits and constitutes (3, 1, 6) decoding.

For the above-mentioned reduced-order decoding processing method, we performed performance verification on the simulation platform with the previous (5, 1, 6) decoding. Method (3) directly delete the effective number of bits of information, which will bring about 2.5dB sensitivity loss compared with (5,1,6) decoding. See Figure 2, it is recommended not to adopt the step-down process. This method.

Figure 3 shows the simulation results of the GSM900 single-antenna TU3 channel. It can be seen that the sensitivity of the (5,1,6) decoding is completely consistent with (1); compared with (2), the difference is only about 0.1 dB.

Figure 4 is a simulation result of GSM900 single-antenna TU50 co-channel interference. It can be seen that the performance of the (5,1,6) decoding interference is about 0.2 dB compared with (1); compared with (2) , almost exactly the same.

As explained above, whether (i) or (b) is used, the simulated performance is very close to the original (5, 1, 6) decoding, so this (5, 1, 6) is reduced to ( The method of 3, 1, 6) is feasible. We need to validate the two methods in the actual test environment and choose an optimal solution. The measured data in the environment are as follows:

Table 1 TU50 data

Table 2 TU1.5 data

(FER％)(FER%)	方法(一)增益(db)Method (1) Gain (db)	方法(二)增益(db)Method (2) Gain (db)
1616	-0.25-0.25	-0.5-0.5
1212	-0.1-0.1	-0.25-0.25
88	-0.2-0.2	-0.7-0.7
77	00	-0.4-0.4
44	-0.5-0.5	-1-1
33	-0.4-0.4	-0.6-0.6
22	-0.2-0.2	-0.4-0.4

Referring to Fig. 5 and Fig. 6, combined with the above two tables, it can be seen that the method (1) is the closest to the performance of the original (5, 1, 6) decoding algorithm in the actual measurement. Therefore, we choose to merge the first and second bits directly after entering the viterbi decoding; 4, 5 bits are combined, and (3, 1, 6) soft decoding is performed.

It can be seen that as long as the high-order convolutional code generates a polynomial, there are multiple repeated bits. This reduced order method can be used to improve the decoding algorithm, and it can be used after verifying that the performance after the reduction is not lost, and is not limited to the GSM system. The improved soft decoding algorithm not only reduces the calculation of cumulative metrics, but also reduces the number of algorithm cycles. The most important point is to reduce the complexity of receiver decoding.

Embodiment 2

An embodiment of the present invention provides a decoder, as shown in FIG. 7, including:

The receiving module 710 is configured to: receive a convolutional code of the service;

The reduction step module 720 is configured to: perform deduplication processing on the generator polynomial of the convolutional code, To the reduced order convolutional code;

The decoding module 730 is configured to decode the reduced-order convolutional code.

In this embodiment, the manner in which the reduced order module 720 implements deduplication processing on the generating polynomial of the convolutional code includes:

Manner 1: Combine the same polynomials in the generator polynomial of the convolutional code.

Manner 2: The same polynomial in the generator polynomial of the convolutional code is combined, and the combined result is quantized according to the dimension of the original polynomial.

Manner 3: Comparing the puncturing bits of the same polynomial in the generator polynomial of the convolutional code, and implementing the de-duplication process by retaining only the polynomial with the least puncturing bit.

In this embodiment, the decoding module 730 is configured to decode the reduced-order convolutional code using viterbi software decoding.

The decoder of the embodiment of the invention adopts a reduced order method to improve the decoding algorithm, which not only reduces the calculation of the cumulative metric, but also reduces the number of times of the algorithm cycle, and more importantly reduces the complexity of the decoding operation and improves The decoding efficiency.

One of ordinary skill in the art will appreciate that all or a portion of the steps of the above-described embodiments can be implemented using a computer program flow, which can be stored in a computer readable storage medium, such as on a corresponding hardware platform (eg, The system, device, device, device, etc. are executed, and when executed, include one or a combination of the steps of the method embodiments.

Alternatively, all or part of the steps of the above embodiments may also be implemented by using an integrated circuit. These steps may be separately fabricated into individual integrated circuit modules, or multiple modules or steps may be fabricated into a single integrated circuit module. achieve.

The devices/function modules/functional units in the above embodiments may be implemented by a general-purpose computing device, which may be centralized on a single computing device or distributed over a network of multiple computing devices.

When the device/function module/functional unit in the above embodiment is implemented in the form of a software function module and sold or used as a stand-alone product, it can be stored in a computer readable storage medium. The above mentioned computer readable storage medium may be a read only memory, a magnetic disk or an optical disk or the like.

Industrial applicability

Claims

A decoding method comprising:

Receive a convolutional code of the service;

Dequantizing the generator polynomial of the convolutional code to obtain a reduced-order convolutional code;

The reduced order convolutional code is decoded.
The method of claim 1, wherein said dequantizing the generator polynomial of said convolutional code comprises combining the same polynomials in the generator polynomial of said convolutional code to implement deduplication processing.
The method according to claim 2, wherein after combining the same polynomials in the generator polynomial of the convolutional code, the method further comprises: performing quantization processing on the result of the combining according to the dimension of the original polynomial.
The method of claim 1 wherein said de-emphasizing said generator polynomial of said convolutional code comprises: comparing punctured bits of the same polynomial of said generator polynomial of said convolutional code by retaining only The polynomial with the least number of punctured bits implements de-weighting.
The method of any one of claims 1 to 4, wherein said decoding said reduced-order convolutional code comprises: performing viterbi decoding on said reduced-order convolutional code.
A decoder comprising:

a receiving module, configured to: receive a convolutional code of the service;

The reduction module is configured to perform deduplication processing on the generator polynomial of the convolutional code to obtain a reduced-order convolutional code;

The decoding module is configured to: decode the reduced-order convolutional code.
The decoder according to claim 6, wherein said reduced order module is configured to combine the same polynomials in the generator polynomial of said convolutional code to implement deduplication processing.
The decoder according to claim 7, wherein said reduced order module is further arranged to quantize the result of the combining according to the dimension of the original polynomial.
The decoder according to claim 6, wherein said reduced order module is configured to: compare the puncturing bits of the same polynomial in the generator polynomial of said convolutional code, by retaining only the punctured bits Less polynomial, to achieve de-duplication.
A decoder according to any one of claims 6 to 9, wherein said decoding module is arranged to decode said reduced-order convolutional code using viterbi software decoding.
A computer readable storage medium storing computer executable instructions for performing the method of any of claims 1-5.