WO2005015750A1

WO2005015750A1 - Re-configurable viterbi detector for partial response signals

Info

Publication number: WO2005015750A1
Application number: PCT/EP2004/007716
Authority: WO
Inventors: Axel Kochale; Andreas Kluger; Friedrich Timmermann; Stefan Rapp
Original assignee: Thomson Licensing
Priority date: 2003-07-15
Filing date: 2004-07-13
Publication date: 2005-02-17

Abstract

The invention relates to a method and apparatus for bit recovery from a sequence of signal samples (hf in) obtained from a recording medium, for one or more partial-response cases. In the method, a Viterbi decoder (6) is re-configured to match a target polynomial to different data channel transfer functions by adapting (22) target reference levels, making the respective target polynomial follow the real data channel. The apparatus has memory means containing distinct target reference levels (TRLi) for all state transitions and partial-response cases. A state machine is employed which addresses the target reference levels by means of indexes or pointers into the memory means.

Description

RE- CONFIGURABLE VITERBI DETECTOR FOR PARTIAL RESPONSE SIGNALS

The present invention relates to a method for bit recovery from a sequence of signal samples obtained from a recording medium. The invention further relates to an apparatus for reading recording media using such method.

For bit recovery from harddisk media commonly the Viterbi decoding algorithm is used. This approach has also been adapted to the recovery of data from optical recording media. Contrary to harddisk media, optical disk formats such as Compact Disk (CD) , Digital Versatile Disk (DVD) , or Blu-ray Disk (BD) specify interchangeable media, which need to be compatible to a multitude of playback devices. Moreover, these devices need to be able to playback all optical disk formats simply by reconfiguring themselves to the encountered type of optical disk.

Research with blue laser optical pickups showed that the real optical channel is closely matched by a Viterbi polynomial following a so-called PR (1221) partial response of a channel approximated by:

y(n) = x(n) (1 + 2-z -^_i^J- + 2-z^" + l-z^" )

It has further been shown that the channel transfer function of red laser optics (DVD, CD) has a slightly different shape. Since Viterbi decoding asks for the best channel match a different target polynomial PR (1111)

y(n) = x(n) * (1 + 1-z^"1 + l"z^~2 + l-z^"3)

or others are preferred. It is an object of the invention to propose a method for bit recovery from a data stream, wherein a single Viterbi decoder is used for different channel transfer functions.

According to the invention, this object is achieved by a method for bit recovery from a sequence of samples, wherein a Viterbi decoder is re-configured to match a target polynomial to different data channel transfer functions by adapting target reference levels, making the respective target polynomial follow the real data channel. In this way a closer match of the decoder to the actual data channel is achieved, which increases the performance of compensating channel distortions like signal asymmetry. Furthermore, since the hardware for one Viterbi decoder implementation is re-used for different data channel transfer functions, the same decoder is used for data streams obtained from different types of recording media.

Favourably, the Viterbi decoder is reconfigurable to match a run length limitation following the expected real data channel. The invention uses a state machine implementation for the

Viterbi decoding for the PR (1221) polynomial that features the PR (1111) polynomial as a subset at close to none extra hardware cost.

Favourably, a Viterbi decoder for bit recovery from a sequence of samples is re-configurable to match a target polynomial to different data channel transfer functions by adapting target reference levels, making the respective target polynomial follow the real data channel. Such a Viterbi decoder allows to easily implement a method according to the invention.

Advantageously, an apparatus for reading recording media uses a method or comprises a Viterbi decoder according to the invention for bit recovery from a sequence of samples.

For a better understanding of the invention, an exemplary embodiment is specified in the following description with reference to the figures. It is understood that the invention is not limited to this exemplary embodiment and that specified features can also expediently be combined and/or modified without departing from the scope of the present invention. In the figures:

Fig. 1 shows a circuit for processing a read channel of an optical recording medium;

Fig. 2 depicts basic processing blocks of a Viterbi decoder;

Fig. 3 shows adjusted target reference levels in comparison to the incoming channel data;

Fig. 4 shows a coefficient update of an equalizer and a target value update of a Viterbi decoder;

Fig. 5 depicts target reference levels for PR (1221) and PR (1111) for run length limited codes with d_min=2 and umin ~> r

Fig. 6 shows a Trellis diagram for a pattern with d_mι_n=2 on a PR (1221) polynomial;

Fig. 7 shows a Trellis diagram for a pattern with d_mi_n=3 on a PR (1111) polynomial;

Fig. 8 shows two approaches for making the target reference levels adaptive to the data reception system;

Fig. 9 shows a top level view of an implementation of the adaptivity schemes; and

Fig. 10 shows a flow chart of a method according to the invention. Figure 1 schematically shows a circuit for processing a read channel of an optical recording medium. A so-called high frequency signal HF obtained from the recording medium is sampled and quantized by an analog-to-digital converter 1. The quantized samples are sample rate converted to the channel data clock by a sample rate converter 4. The sample rate conversion 4 is based on a clock recovered by a clock recovery 10 comprizing an equalizer 2 and a phase locked loop 3. For recovering the data bits a Bit Recovery 11 comprises a partial response maximum likelihood decoder 6, which is typically implemented as a Viterbi Decoder. An adaptive channel match is achieved by adaptively changing the filter coefficients of an equalizer 5 arranged before the decoder 6, e.g. by using a target filter 7 to reverse the Viterbi decoding process and a Least Mean Square block 8 to compare the equalized data with the recovered representation. The obtained data bits and the recovered clock are input to a demodulator 9 for demodulation. The demodulated data are then output for further processing such as error correction.

In Fig. 2 the basic processing blocks of the Viterbi decoder 6 are depicted. In the example, samples are quantized to 8 bits, they are distorted by intersymbol interference and noise. First, in a branch metric block 61, distances are calculated between the incoming data sample hf_in and a set of target reference levels, which depend on the chosen partial response polynomial, like PR(1221). The smallest TRL distance indicates the best match of the incoming data bit.

Current formats for optical recording media specify run length limited codes. Therefore, only certain transitions from one TRL to the next are possible. This simplifies the PRML decoder design and a table of possible transitions is maintained. This transition table is commonly referred to as path metric and represents a cost function of all TRL differences, i.e. the branch metric, along a data sequence. The smallest path metric gives the most probable data representation. Incrementally, the paths having the smallest path metric value are stored in a path memory. After a certain time period, the path is traced back and the oldest storage is output as the decoded data bit. The time period is empirically chosen as 5xkxm, where k=l represents the number of bits per codeword and m=3 represents the degree of the PR polynomial, i.e. as 15 channel clocks for the example of PR (1221) .

Before that, an Add-Compare-Select block 62 adds up the path metric in a block 63, compares the possible transitions to find the smallest path metric in a block 64, selects the smallest path metric for each TRL, and stores the transition in a path memory. A trace back and path memory block 65 monitors the smallest path metric and follows the stored path to find the most probable output. By comparing the decoded bit pattern with the incoming equalized channel data hf_in, which is delayed by a delay block 66, the TRLs are adjusted by a target value adaptation block 67.

Fig. 3 shows these adjusted TRLs in comparison to the incoming channel data and the recovered bit sequence. The channel data is run length limited between 2 and 8 channel bits (RLL (1, 7) ) .

The adaptive Viterbi scheme can also be combined with an adaptive equalizer process. However, these methods of adaptation are not supposed to run at the same time. Fig. 4 documents in part a) the coefficient update of the equalizer 5 and in part b) the target value update of the Viterbi decoder 6. The equalizer coefficients are frozen during the adaptation of the Viterbi decoder 6. It can be seen from Fig. 4 that certain target values are less often updated than others, which indicates that the partial response polynomial selected for decoding is not optimal for the current data pattern. In fact, the figure was deliberately generated to show this feature by feeding a noise distorted DVD pattern to a PR(1221) Viterbi decoding process. Fig. 5 depicts all possible target reference levels for the partial response polynomials PR (1221) and PR (1111) and a signal being decoded into them. In parts a) and b) the TRLs for the partial response polynomial PR (1221) are shown while decoding a data pattern having a minimum run length d_mi_n of 2 and 3, respectively. In parts c) and d) the same TRLs are shown for the partial response polynomial PR(llll). Fig. 5b shows that the pattern with d_mi_n=3 does not employ the two TRLs 2 and -2 in the PR (1221) case, whereas Fig. 5c shows that the pattern with mi_n ⁼2 looses resolution for the smallest run lengths in the PR(llll) case.

Target reference levels are calculated using the following table, where the bit combinations are listed on the left and the respective partial response is listed in the columns on the right. The bits are written as -1 for 0 and +1 for 1, later referenced as - and + , respectively. Due to run length limited coding several bit combinations are not possible. For defining PR(1221) and PR(llll) state machines all combinations stored in the machine are listed in the state definition in the very right column. Both partial response cases have a storage of 3 bits. The 4th bit gives the first transition of the state machines .

For simplicity these state definitions are kept during the description of the corresponding Trellis diagram showing the transition between different states of Viterbi decoding in time. Such a Trellis diagram is shown in Fig. 6 for the pattern with d_mi_n=2 on a PR (1221) polynomial. The allowed bit combinations forming the different states are numbered from 0 to 5. The arrows between the states show the incoming bit (+ or -) and the resulting target reference, e.g. +6 for state 5 in the case of a 1 coming in. For further simplification all states and branches are numbered and shown in the right part of the figure. Such a simplification is useful for the actual implementation of Viterbi decoding.

Fig. 7 shows a comparable case for a PR (1111) system and a pattern with d_min=3, i.e. a DVD. As can be seen the missing TRLs described with reference to Fig. 5 are caused by unrequired transitions path p3_l from the state 3 to the state 1 and path p2_4 from the state 2 to the state 4. All other transitions/paths are named as in Fig. β, only the target reference levels are changed. In a hardware implementation this is a register entry with different content but the same address/index for both polynomials. In order to make the TRLs adaptive to the data reception system, which may include an interchangeable recording medium, the difference between the recovered data sequence and the channel data is evaluated. There are various approaches to implement such an adaptivity, basically by low-pass filtering the received channel data and using the result to update the stored TRL, either limited to the one with the lowest path metric or applied to all. Fig. 8 shows two variants 81, 82 of such low pass filters, namely a first filter 81 corresponding to

TRLnew = cl * TRLold + cO * hf_in; (cl=127/128, c0=l/128)

which constitutes a so called leaky integrator; and a second filter 82 corrsponding to

TRLnew = cl * TRLold + cO * (hf_in - TRLold) .

The latter integrates the difference to the actual target reference level and might also be referred to as a PI- Controller. Lowpass filter 81 constitutes an infinite impulse response (IIR) stage, and filter 82 is less likely to oscillate.

Fig. 9 shows a top level view of a tested implementation of the adaptivity schemes. A vit_decode block 12 contains the decoding scheme described above and a tv_adaption block 13 provides the adaptivity described with reference to Fig. 8. A delay block 14 delays the channel data eq_out coming from the equalizer 5 to coincide with the proper target reference level.

Favourably, means for switching between different bit recovery methods for updating the target reference levels are provided. This basically constitutes a PRML filtering to find the proper target reference level, which needs to be updated. This is especially helpful during a run-in procedure, where the Viterbi decoding might fail to find the most probable data path.

In Fig. 10 a method according to the invention is shown schematically. In a first step 20 an incoming data sample is received. The corresponding branch metric is then calculated in a step 21. For this purpose the target reference levels TRLi are selected according to the required partial response in a step 22. Note that an implementation typically is done on 8 bit integer values corresponding to a value range of [-128,127], to which the TRLs are mapped. For the case of PR (1221) as an example, TRLs of [-127, -85, -42, 0, +42, +85 +127] result. The corresponding path metric is added up in the next step 23. In a compare and select step 24 the smallest path for each state is determined. The scope of branches to be compared depends on the control signal d_mι_n Select. Note that all branches may be calculated but ignored later, like the numbers shaded in grey in the TRL table are ignored in the DVD case where d_mi_n=3. In a step 25 the smallest path metric for all states is determined. The smallest state will determine the output decision. Before the transition are stored in a path memory in a step 27, a path metric normalization (or subtraction of the smallest state) is favourably performed in a step 26 to prevent data range overflow. In a step 29 a trace back and path memory block monitors the smallest path metric and follows the stored path to find the most probable output, which is the output in a step 30.

In the following a short description of a possible implementation is given. As described earlier the following stages need to be performed:

Branch metric calculation (Euclidian or Hamming distance) Path metric accumulation

Path metric comparison and selection of smallest for each state

Storage of branch in path memory Selection of smallest path metric for tracing back to find the most likely bit representing the recovered data

Distance calculation for(i=0 to NO_OF__TRL-l) // number of Target Reference Level = 7 d[i] = (TRL[i_ - hf_in)^Λ2 end

Path metrics accumulation p5_5 = PM[5 ] + d[6] // + + + + = + 6 p5_4 = PM[5 + d[5] // + + + - = +4 p4_3 = PM[4 + d[3] // + + - - = 0 p3_l = PM[3 + d[2] // + - - + = -2 _> not for DVD p3_0 = PM[3^" + d[l] // + - - - = -4 p2 5 = PM[2 + d[5] // - + + + = + 4 p2_4 = PM[2 + d[4] // - + + - = +2 _> not for DVD pl_2 = PM[1 + d[3] // - - + + = 0 p0_l = PM[0 + d[l] // - - - + = -4 pO 0 = PM[0 + d[0] // -6

Compare and select if (p5_5 <= p2_5) // state 5 state [5] = p5_5; ACS [5] 1; else state [5] = p2_5; ACS [5] - 0;

if ( (p5_4 <= p2_4) || (DISCJTYPE == DVD)) // state 4 state [4] = p5_4; ACS [4] = 1; else state [4] = p2 4; ACS [4] = 0;

state [3] = p4_3; ACS [3] = 1; // state 3 state [2] = pi 2; ACS [2] = 0; // state 2

if ( (p3_l <= p0_l) && (! DISCJTYPE \- DVD) // state 1 state [1] = p3_l; ACS[1] = 1; else state [1] = p0_l; ACS[1] = 0;

if (p3_0 <= p0_0) { // state 0 state [0] = p3_0; ACS[0] = 1; else state [0] = p0_0; ACS[0] = 0;

Find smallest

(state [5] <= state [4]) ? sm_l = state [5] : sm_l = state [4] ; (state [3] <= state [2]) ? sm_2 = state [3] : sm_2 = state [2]; (state [1] <= state [0]) ? sm_3 = state [1] : sm_3 = state [0] ; if (sm_l >= sm_2) sm_l = sm_2; if (sm_l >= sm_3) sm_l = sm_3;

for (i = 0 to NOJOFJTRL -1) if (state [I] = sm_l) select = i; end

Update path metrics for (i= 0 to NO_OF_TRL-l)

PM[i] = state [i] - sm_l; end

Store in path memory and trace back for (i = PATH_MEMORY_LENGTH-l downto 0) for (j = 0 to NO_OF_TRL-l) mem[i+l][j] = mem[i] [j ] ; end end

for (i = 0 to NO_OF_TRL-l) mem [ 0 ] [ i] = ACS [i] ; end

state = select ; for ( i=0 to path_memory_length-l ) for ( j =0 ; j <=5 ; ++ j ) temp[j] = mem[i] [j] ; if (state == 5)

(temp [5] == 1) ? new_state = 5 : new_state = 2; else if (state == 4)

// temp [4] always 1 for DVD

((temp [4] == 1) I I (DISK_TYPE == DVD)) ? new_state = 5 : new_state = 2; else if (state == 3) new_state = 4; else if (state == 2) new_state = 1; else if (state == 1)

// temp[l] always 0 for DVD

((temp[l] == 1) && (DISK_TYPE != DVD)) ? new_state = 3 : new_state = 0; else if (state == 0)

(temp[0] == 1) ? new state = 3 : new state = 1;

state new state; end

decode = { 1, 0, 0, 1, 1, 0 };

// + - - + + - as the states are defined (Figure 6) rec_data = decode [state] ;

In the example described above the multiplex between different Viterbi decoding procedures is done by preventing certain state transitions, i.e. setting the appropriate transition index to a different target reference level (TRL[i], see above) . For PR (1221) and d_mi_n=2 criterion, we have:

Using this general idea it is possible to create other partial response polynomials:

For PR (2332) and d_min=2 criterion, we have:

or

For PR ( 2332 ) and d_min=3 criterion, we have :

Claims

1. Viterbi decoder for bit recovery from a sequence of signal samples (hf_in) , characterized in that it is re-configurable to match a target polynomial to different data channel transfer functions by adapting target reference levels (TRLi) making the respective target polynomial follow the real data channel.

2. Apparatus for decoding a runlength-limited bit sequence from a sequence of signal samples (20) for a set of one or more partial-response cases (PR(1221), PR(llll), PR(2332)) each associated with a number of allowable state transitions, each state transition associated with a target reference level (TRL) , the apparatus containing distance calculation means (21) using as a first input the signal samples (20) and as a second input the target reference levels (TRLi) from memory means (22), the apparatus characterized in that

- the memory means is equipped to contain the distinct target reference level values (TRLi) for the partial-response cases and for the state transitions; and

- the allowable state transitions are implemented as a state machine (601, 701) which addresses the target reference levels by means of indexes or pointers into the memory means.

3. The apparatus of claim 2, additionally characterized in that the memory means (22) is organized as an array dimensioned for the number of partial-response cases handled and the maximum number of distinct target reference values over all the partial-response cases (PR(1221), PR(llll), PR(2332)).

4. The apparatus of claim 3, wherein the memory means (22) is organized as a two-dimensional array.

5. The apparatus of any one of claims 2-4, wherein the memory means (22) has an input to receive a partial-response case information (PRML-select ) and is equipped to select, based on the partial-response case information, the target reference levels to be output to the distance calculation means (21) .

6. The apparatus of any previous claim, equipped to receive the signal samples in quantized form, or equipped to quantize the signal samples (20) .

7. The apparatus of claim 6, equipped to convert the signal samples (20) and the target reference levels (TRLi) to relate to a same value range.

8. The apparatus of claim 7, wherein the conversion is performed by scaling the target reference levels (TRL) to a value range of the quantized signal samples (20).

9. The apparatus of any previous claim, additionally containing an adaptation unit (67) for adapting the target reference levels (TRLi) , the adaptation unit equipped to use, for each target reference level, those signal samples that were decoded into the target reference level.

10. The apparatus of claim 9, wherein the adaptation unit (67) contains a low-pass filter (81, 82) .

11. The apparatus of any one of claims 2-10, wherein the state machine (23, 24, 25, 26, 27, 29) has an input to receive a runlength constraint information (dmin-select) and is equipped to select, based on the runlength constraint information, the allowable state transitions.

12. A method for decoding a runlength-limited bit sequence from a sequence of signal samples (20) for a set of one or more partial-response cases (PR1221, PRllll, PR2332) each associated with a number of allowable state transitions, each state transition associated with a target reference level (TRL) , containing the steps of receiving an incoming data sample (20); calculating (21) corresponding branch metrics; accumulating (23) the branch metrics into corresponding path metrics; determining (24) the path of smallest path metric for each state in a compare and select step; determining (25) the smallest path metric over all states; storing (27) the transitions in a path memory; monitoring (29) the smallest path metric and following the stored path to find the most probable output; - outputting (3) the most probable output; the method characterized in that in calculating (21) the branch metrics, target reference levels (TRLi) are selected (22) according to the partial- response case; and - in determining (24) the smallest path, the scope of branches to be compared is controlled by a runlength constraint information (d_mi_n-Select) .

13. The method of claim 12, wherein before storing (27) the transitions, path metrics are normalized (26) by subtracting the smallest state, in order to prevent data range overflow.

14. The method of claim 12 or 13, wherein the step of receiving (20) incoming data samples involves an equalization filtering (5) ; wherein, in a first time interval after start of decoding, coefficients of the equalization filter are adapted (7, 8); and/or wherein, in a second time interval after the first time interval, the target reference levels (TRLi) are adapted (67) .