WO2016165158A1 - 一种显示面板的驱动方法和驱动系统 - Google Patents

一种显示面板的驱动方法和驱动系统 Download PDF

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WO2016165158A1
WO2016165158A1 PCT/CN2015/077416 CN2015077416W WO2016165158A1 WO 2016165158 A1 WO2016165158 A1 WO 2016165158A1 CN 2015077416 W CN2015077416 W CN 2015077416W WO 2016165158 A1 WO2016165158 A1 WO 2016165158A1
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data signals
data
area
signal
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PCT/CN2015/077416
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French (fr)
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熊正松
朱立伟
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深圳市华星光电技术有限公司
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Priority to US14/785,942 priority Critical patent/US9886935B2/en
Publication of WO2016165158A1 publication Critical patent/WO2016165158A1/zh

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18Timing circuits for raster scan displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/02Composition of display devices
    • G09G2300/026Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/08Details of timing specific for flat panels, other than clock recovery
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0247Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00Aspects of data communication
    • G09G2370/08Details of image data interface between the display device controller and the data line driver circuit

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  • the present invention relates to the field of display technologies, and in particular to a driving method and a driving system for a display panel.
  • TCON Timing Controller
  • IC Timing Controller
  • the structure of the existing FHD, HD or lower resolution display device Due to the long development time of these display devices, a matching TCON IC has been developed, which does not require the use of multiple TCON ICs to match the drive. Since these display devices are only provided with one signal source, there is no problem that the signals are not synchronized, and the display effect is ideal.
  • the synchronization processor in the display device needs to utilize a large amount of storage and computing power.
  • the multi-channel signals output by this signal source are synchronized. Then, through the processing of the Control Board System and the TCON IC, the processed signal can be output to a display panel that is "spliced" by a plurality of sub-areas.
  • each sub-area signal passes through the system board and the TCON IC, due to the path and other parties
  • the difference in surface interference makes it almost impossible to synchronize the signals of the input display panel, so that there will be flickering and blooming at the boundary of different sub-areas, which reduces the display effect of the display device.
  • An object of the present invention is to provide a driving method and a driving system for a display panel, which can solve the technical problem that flickering and flowering appear between sub-areas of the display device, resulting in poor display effect.
  • a first aspect of the present invention provides a driving method for a display panel.
  • the display panel includes N sub-regions of equal size, and each sub-region corresponds to a 1/N sub-picture of a full frame display screen, where N ⁇ 2 and an integer, the method includes:
  • the data signals outputted by the timing controller corresponding to each sub-area are acquired, and the data signals of the same row in each sub-area are matched and matched to the display frame of the same frame;
  • each type of control signal outputted by the timing controller corresponding to each sub-area is acquired, and the same type of control signals respectively belonging to each sub-area are synchronously processed to obtain respective synchronization control signals;
  • Each synchronization control signal is output to the display panel, and the same row data signal of each sub-area that is matched and matched is output.
  • outputting each synchronization control signal to the display panel, and outputting the same row data signal of each sub-area that is matched and matched includes:
  • the synchronizing processing is performed on each of the control signals of the same type that belong to each sub-area, and obtaining the synchronization control signals includes:
  • Each of the control signals of the same type belonging to each sub-area is separately processed and processed to obtain each synchronization control signal.
  • the data signal outputted by the timing controller corresponding to each sub-area is matched at the front end of the display panel, and the data signals of the same row in each sub-area are matched and matched to the display frame of the same frame.
  • the data signals of the respective rows corresponding to the laterally connected sub-regions respectively connected at the current time are connected and consecutively connected.
  • the method further includes: when it is determined that the data signals of the respective rows corresponding to the horizontally connected sub-regions that are connected at the current time are not connected or the connections are not continuous,
  • the one-line data signal acquired at the previous time is replaced with the one-row data signal acquired at the later time, and matched with other row data signals acquired at a later time, if If the matching is successful, the data signal acquired at the previous moment is bound and buffered with other row data signals acquired at a later time.
  • the present invention provides the following advantageous effects: in the driving method of the display panel provided by the embodiment of the present invention, the data signals and control signals sent by the timing controller corresponding to each sub-area are synchronously processed at the front end of the display panel, and directly after the processing is completed. Output to the display panel.
  • the possibility that the signals corresponding to the sub-regions are not synchronized is greatly reduced, and the phenomenon of blooming and flickering at the boundary of each sub-region is prevented, and the display effect of the high-resolution or even ultra-high-resolution display device is ensured.
  • a second aspect of the present invention provides a driving system for a display panel.
  • the display panel includes N sub-regions, and each sub-region corresponds to a 1/N sub-picture of a full frame display screen, where N ⁇ 2 and is an integer.
  • the driving system includes a plurality of timing controllers corresponding to the respective sub-areas, and further includes a synchronization processor between the timing controllers and the display panel, the synchronization processor includes a data control module and a timing control module.
  • the data control module acquires a data signal outputted by a timing controller corresponding to each sub-area, and matches data signals of the same row in each sub-area bound to the same frame display screen;
  • the timing control module acquires each type of control signal outputted by the timing controller corresponding to each sub-area, and performs synchronization processing on the same type of control signals respectively belonging to each sub-area to obtain each synchronization control signal;
  • the timing control module outputs respective synchronization control signals to the display panel, and the data control module outputs the same row data signals that are matched and bound to the respective sub-regions.
  • the timing control module synchronizes the gate line start signal outputted by the timing controller corresponding to each sub-area, obtains a synchronous gate line start signal, and sends the synchronous gate line start signal to the data control module;
  • the data control module feeds back a response signal to the timing control module according to the received synchronization gate line start signal, and simultaneously issues a first row of data signals of each sub-area in the current frame display screen;
  • the timing control module After receiving the response signal, the timing control module sends a synchronous clock signal in each synchronization control signal;
  • the data control module Upon arrival, the data control module outputs the same row of data signals corresponding to the sub-regions of the synchronous clock signal that have been matched for binding.
  • the synchronizing processing is performed on each of the control signals of the same type that belong to each sub-area, and obtaining the synchronization control signals includes:
  • Each of the control signals of the same type belonging to each sub-area is separately processed and processed to obtain each synchronization control signal.
  • the data control module acquires data signals output by the timing controllers corresponding to the sub-regions, and determines whether data signals of the respective rows corresponding to the sub-regions connected in the horizontal direction are connected at the current time and are consecutively connected. When it is determined that the data signals of the respective rows corresponding to the horizontally connected sub-areas connected at the current time are connected and consecutively connected, the data signals of the respective rows are bound and buffered.
  • the data control module determines that the data signals of the respective rows corresponding to the horizontally connected sub-regions that are respectively connected at the current time are not connected or the connections are not consecutive, the data signals of the rows are buffered, and the following Comparing the data signals of each row acquired at a certain moment; if it is found that the two rows of data signals acquired at different times in a certain sub-area are the same, then replacing one row of data signals acquired at a prior time with a row of data signals acquired at a later time, and The other row data signals acquired at a later time match, and if the matching is successful, the one row of data signals acquired at the previous time is bound and buffered with other row data signals acquired at a later time.
  • FIG. 1 is a schematic structural view 1 of a display device in the prior art
  • FIG. 2 is a schematic structural view 2 of a display device in the prior art
  • FIG. 3 is a schematic structural diagram of a display device in an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a data control module in an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a timing control module in an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of processing of an output enable control signal in an embodiment of the present invention.
  • FIG. 7 is a schematic flow chart of a driving method of a display panel in an embodiment of the present invention.
  • the embodiment of the invention mainly relates to a driving method and a driving system for a display panel.
  • the display panel in the embodiment of the invention is a large-screen display panel such as FHD or UHD.
  • the display panel includes N equal-sized sub-regions, and each sub-region corresponds to a 1/N sub-picture displaying a full frame display screen, where N ⁇ 2 and is an integer.
  • the display panel driving system includes a signal source, a system board, and a plurality of timing controllers disposed in one-to-one correspondence with the sub-areas, and a synchronization processor located behind each timing controller and before the display panel.
  • the synchronization processor includes a data control module and a timing control module, where the synchronization processor is specifically configured to synchronously match each signal processed and outputted by each timing controller to ensure a display panel.
  • Each sub-area can simultaneously display the same frame display screen, preventing flickering and blooming on the edges of each sub-area, and improving the display effect of the large-screen, high-resolution display panel.
  • the data control module in the embodiment of the present invention includes a plurality of data control sub-modules corresponding to each sub-area, and each data control sub-module correspondingly acquires a data signal of a sub-area and the rest thereof The data signals of the sub-areas are matched and processed.
  • the data control module further includes a storage sub-module for storing data signals of the sub-areas that have been matched to be output until the data signal of the unmatched binding is also stored.
  • the data control module acquires a data signal outputted by the timing controller corresponding to each sub-area, and matches data signals of the same row in each sub-area bound to the same frame display screen. Specifically, after the data control sub-modules of the data control module acquire a row of data signals output by the corresponding timing controller, they cooperate with each other to match the data signals received by the data control sub-modules to determine the rows received at the same time. Whether the data signal can be bound together for output. Specifically, it is detected whether the data signals of the respective rows of the sub-regions that are laterally connected to each other are laterally connected in a plurality of data signals received at a certain time, and if they are connected, whether the junctions are consecutive. In this way, the data signals of the same row in the same frame image can be matched and bound.
  • each data control sub-module in the data control module can receive one row of data signals corresponding to the sub-region each time.
  • the data control module detects whether the two rows of data signals respectively belonging to the sub-area A and the sub-area B received at the current time are data signals of the same row, for example, the sub-area A is received at this time.
  • the sixth line of the data signal if the sub-area B also receives the sixth line of data signals, indicating that the current time is received, respectively belong to The two rows of data signals of sub-area A and sub-area B are data signals of the same row.
  • the portion corresponding to the rightmost pixel of the sixth row data signal of the sub-region A can be connected to the portion corresponding to the leftmost pixel of the sixth row data signal of the sub-region B can be detected. If it can be connected, it indicates that the data signals of the sixth row of the sub-area A and the sub-area B match at this time, and the data signals of the sixth row of the sub-area A and the sub-area B can be bound and stored, and the corresponding output of the synchronization processor is output. When the control signal is synchronized, the bound data signal is output.
  • the data control module performs similar processing on the data signals of the sub-area C and the sub-area D.
  • the data control module determines that the data signals of the respective rows corresponding to the horizontally connected sub-areas connected at the current time are not connected or the connection is not continuous, the data signals of each row are buffered, and the next one is The data signals of each row acquired at one time are compared; if two rows of data signals acquired at different times in a certain sub-region are found to be the same, then one row of data signals acquired at a prior time is replaced with a row of data signals acquired at a later time, and The other row data signals acquired at the time match, and if the matching is successful, the one row of data signals acquired at the previous time is bound and buffered with other row data signals acquired at a later time. If a certain row of data signals is not bound to other row data signals after several times of matching, it can be determined that the row data signal is an erroneous data signal, and then the row data signal is discarded.
  • the timing control module in the embodiment of the present invention includes a plurality of control signal sub-modules, such as a Start Vertical (STV) signal sub-module, a clock (CKV) signal sub-module, and an output enabler (Output Enable (referred to as OE) signal sub-module and other control signal sub-modules for processing corresponding control signals.
  • STV Start Vertical
  • CKV clock
  • OE output enabler
  • These sub-modules can synchronize the asynchronous control signals processed by the timing controllers of the respective sub-regions so that the sub-regions can be displayed synchronously.
  • the timing control module in the embodiment of the present invention may acquire various types of control signals outputted by the timing controllers corresponding to the respective sub-regions, and perform synchronization processing on the same type of control signals to obtain respective synchronization control signals.
  • the corresponding sub-modules of the timing control module can obtain corresponding synchronization control signals in different ways.
  • Each control signal sub-module of each timing control module uses a trigger and a counter to perform triggering and counting processing of the corresponding control signals. For example, for an OE signal, assuming that the OE signal is at a high level, the signals on each gate line are forced to a low level.
  • each OE signal corresponds to a counter. Assume that the rising edge of the OE1 signal precedes the other three OE signals. At this time, the counter OE_CNT1 of OE1 starts counting from zero, and when the falling edge of OE1 is triggered, OE_CNT1 is reset to zero.
  • control signals it is possible to use and process, and other signal processing methods can also be used. Specifically, it should be processed according to the requirements of the display panel for the signal, which is not limited by the embodiment of the present invention.
  • the timing control module and the data control module should cooperate. That is, the timing control module outputs each synchronization control signal to the display panel, and the data control module outputs the same row data signal that each sub-area is matched and matched.
  • the timing control module needs to communicate with the data control module to ensure that the display of the displayed image for each frame can be started at the same time. Specifically, the timing control module synchronizes the STV signals output by the timing controllers corresponding to the respective sub-regions, obtains a synchronous STV signal, and transmits the synchronous STV signal to the data control module.
  • the response signal is fed back to the timing control module, and simultaneously the sub-areas in the current frame display screen are issued.
  • the data control module Upon arrival, the data control module outputs the same row of data signals corresponding to the matched sub-regions of the synchronous CKV signal that are matched and bound.
  • the synchronization processor is located between each timing controller and the display panel.
  • the synchronization processor synchronizes the data signals and control signals output by the respective timing controllers and directly outputs them to the display panel.
  • the possibility that the signals corresponding to the sub-regions are not synchronized is greatly reduced, and the phenomenon of blooming and flickering at the boundary of each sub-region is prevented, and the display effect of the high-resolution or even ultra-high-resolution display device is ensured.
  • the driving method of the display panel may include the following specific steps:
  • Step S101 Obtain a data signal outputted by the timing controller corresponding to each sub-area at the front end of the display panel, and match the data signals of the same row in each sub-area bound to the same frame display screen.
  • Step S102 At the front end of the display panel, acquire various types of control signals outputted by the timing controllers corresponding to the respective sub-regions, and perform synchronization processing on the same type of control signals respectively belonging to the respective sub-regions to obtain respective synchronization control signals. .
  • Step S103 outputting each synchronization control signal to the display panel, and outputting the same row data signal of each sub-area that is matched and matched.
  • the data sent by the timing controller corresponding to each sub-area The signal and control signals are synchronized at the front end of the display panel, and are directly output to the display panel after processing.
  • the possibility that the signals corresponding to the sub-regions are not synchronized is greatly reduced, and the phenomenon of blooming and flickering at the boundary of each sub-region is prevented, and the display effect of the high-resolution or even ultra-high-resolution display device is ensured.

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Abstract

提供了一种显示面板的驱动方法和驱动系统,可解决显示装置的子区域之间出现闪烁与花屏问题。该显示面板的驱动方法包括:在显示面板前端,获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号(S101);获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对相同类型的控制信号进行同步处理,获得各同步控制信号(S102);向显示面板输出各同步控制信号,并且输出经过匹配绑定的各子区域相同行数据信号(S103)。

Description

一种显示面板的驱动方法和驱动系统
本申请要求享有2015年4月16日提交的名称为“一种显示面板的驱动方法和驱动系统”的中国专利申请CN201510180647.1的优先权,其全部内容通过引用并入本文中。
技术领域
本发明涉及显示技术领域,具体地说,涉及一种显示面板的驱动方法和驱动系统。
背景技术
随着生活水平及生产工艺的提高,消费者越来越喜欢高附加值的显示面板,高分辨率(Full High Definition,简称FHD)与超高分辨率(Ultra High Definition Television,简称UHD)的产品无疑是较优的选择。
但是,由于时序控制器(Timing Controller,简称TCON)集成电路(Integrated Circuit,简称IC)的产品研发进度落后于显示面板。这使得在生产FHD、UHD等大屏显示装置时,生产厂家不得不使用多颗适用于低分辨率显示装置的TCON IC进行设计,通过“多屏”拼接的方式组合形成高解析度(4K2K/8K4K/16K8K或者更高解析度)或者奇异解析度(3K1K/5K2K/8K3K或者其他非常规解析度)的显示装置,例如4个2K1K(分辨率1920×1080)拼接形成4K2K(分辨率3840×2160),16个2K1K拼接形成8K4K(分辨率7680×4320)等。
如图1所示,为现有FHD、HD或分辨率更低的显示装置的结构。这些显示装置由于发展时间较久,已经研制出配套的TCON IC,不需要使用多颗TCON IC来配合驱动。由于这些显示装置仅设置有一路信号源,不存在信号不同步的问题,显示效果较为理想。
而对于如图2所示的目前主流使用的低分辨率TCON IC拼接而成的高分辨率显示装置(在此以4个子区域“拼接”为例,也可以是2个、8个、16个或者任意整数个)而言,由于这些显示装置设置有信号源输出多路信号(图2中的信号源输出4路信号),该显示装置内的同步处理器需要利用大量的存储与运算能力来对这信号源输出的多路信号进行同步处理。然后通过系统板(Control Board System)与TCON IC的处理,处理后的信号可输出到由若干个子区域“拼接”而成的显示面板上。
发明人发现,每一个子区域的信号通过系统板与TCON IC时,由于路径上与其他方 面干扰的差异,导致输入显示面板的信号几乎不可能同步,从而不同的子区域的分界处会存在闪烁与花屏现象,降低了显示装置的显示效果。
发明内容
本发明的目的在于提供一种显示面板的驱动方法和驱动系统,可解决显示装置的子区域之间出现闪烁与花屏,导致显示效果较差的技术问题。
本发明第一方面提供了一种显示面板的驱动方法,所述显示面板包括N个大小相等的子区域,每一子区域对应显示一整帧显示画面的1/N子画面,其中,N≥2且为整数,所述方法包括:
在显示面板的前端,获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号;
在显示面板的前端,获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号;
向显示面板输出各同步控制信号,并且输出经过匹配绑定的各子区域相同行数据信号。
其中,向显示面板输出各同步控制信号,并且输出经过匹配绑定的各子区域相同行数据信号包括:
对各子区域对应的时序控制器输出的栅线启动信号进行同步处理,获得同步栅线启动信号;
根据所述同步栅线启动信号,确定开始发出匹配绑定的同一行数据信号的时间和输出同步时钟信号的时间;
在向显示面板输出的各同步控制信号中的同步时钟信号的上升沿到来时,输出对应于同步时钟信号的各子区域经过匹配绑定的相同行数据信号。
其中,对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号包括:
对分别属于各子区域的各同一类型的控制信号分别进行与处理,获得各同步控制信号。
其中,在显示面板的前端,获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号包括:
获取各子区域对应的时序控制器输出的数据信号;
确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号是否相接且 相接处连贯;
当确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号相接且相接处连贯,将各行数据信号绑定并缓存。
其中,该方法还包括:当确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号不相接或相接处不连贯时,
将各行数据信号缓存,与接下来的某一时刻获取的各行数据信号进行比较;
若发现某一子区域不同时刻获取的两行数据信号相同,则将在先时刻获取的一行数据信号替换在后时刻获取的一行数据信号,并与在后时刻获取的其他行数据信号匹配,若匹配成功,则将该在先时刻获取的一行数据信号与在后时刻获取的其他行数据信号绑定并缓存。
本发明提供了以下有益效果:在本发明实施例提供的显示面板的驱动方法中,各子区域对应的时序控制器发出的数据信号和控制信号在显示面板的前端进行同步处理,处理完毕之后直接输出给显示面板。大大降低了各子区域对应的信号不同步的情况发生的可能性,防止各子区域的交界处发生花屏、闪烁的现象,保证了高分辨率甚至超高分辨率显示装置的显示效果。
本发明第二方面提供了一种显示面板的驱动系统,所述显示面板包括N个子区域,每一子区域对应显示一整帧显示画面的1/N子画面,其中,N≥2且为整数,所述驱动系统包括对应各子区域设置的若干时序控制器,还包括位于各时序控制器和显示面板之间的同步处理器,所述同步处理器包括数据控制模块和时序控制模块,
所述数据控制模块获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号;
所述时序控制模块获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号;
所述时序控制模块向显示面板输出各同步控制信号,并且所述数据控制模块输出各子区域经过匹配绑定的相同行数据信号。
其中,所述时序控制模块对各子区域对应的时序控制器输出的栅线启动信号进行同步处理,获得同步栅线启动信号,并将所述同步栅线启动信号发送给数据控制模块;
所述数据控制模块根据接收到的所述同步栅线启动信号,向所述时序控制模块反馈响应信号,并同时发出当前帧显示画面中各子区域的第一行数据信号;
所述时序控制模块接收到所述响应信号后,发出各同步控制信号中的同步时钟信号;
在所述时序控制模块向显示面板输出的各同步控制信号中的同步时钟信号的上升沿 到来时,所述数据控制模块输出对应于同步时钟信号的各子区域经过匹配绑定的相同行数据信号。
其中,对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号包括:
对分别属于各子区域的各同一类型的控制信号分别进行与处理,获得各同步控制信号。
其中,所述数据控制模块获取各子区域对应的时序控制器输出的数据信号;确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号是否相接且相接处连贯;当确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号相接且相接处连贯,将各行数据信号绑定并缓存。
其中,当所述数据控制模块确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号不相接或相接处不连贯时,将各行数据信号缓存,与接下来的某一时刻获取的各行数据信号进行比较;若发现某一子区域不同时刻获取的两行数据信号相同,则将在先时刻获取的一行数据信号替换在后时刻获取的一行数据信号,并与在后时刻获取的其他行数据信号匹配,若匹配成功,则将该在先时刻获取的一行数据信号与在后时刻获取的其他行数据信号绑定并缓存。
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要的附图做简单的介绍:
图1是现有技术中的显示装置的结构示意图一;
图2是现有技术中的显示装置的结构示意图二;
图3是本发明实施例中的显示装置的结构示意图;
图4是本发明实施例中的数据控制模块的结构示意图;
图5是本发明实施例中的时序控制模块的结构示意图;
图6是本发明实施例中的输出使能控制信号的处理示意图;
图7是本发明实施例中的显示面板的驱动方法的流程示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术手段来解决技术问题,并达成技术效果的实现过程能充分理解并据以实施。需要说明的是,只要不构成冲突,本发明中的各个实施例以及各实施例中的各个特征可以相互结合,所形成的技术方案均在本发明的保护范围之内。
本发明实施例主要涉及一种显示面板的驱动方法和驱动系统,本发明实施例中的显示面板为FHD或UHD等大屏显示面板。该显示面板包括N个大小相等的子区域,每一子区域对应显示一整帧显示画面的1/N子画面,其中,N≥2且为整数。如图3所示,该显示面板驱动系统包括信号源、系统板、与子区域一一对应设置的多个时序控制器,还设置有位于各时序控制器之后、显示面板之前的同步处理器。
具体的,如图3所示,该同步处理器包括数据控制模块和时序控制模块,该同步处理器具体用于将经过各时序控制器处理输出的各路信号进行同步匹配,以保证显示面板的各子区域可同步显示同一帧显示画面,防止各子区域的边缘出现闪烁与花屏的现象,提高了超大屏、高分辨率的显示面板的显示效果。
进一步的,如图4所示,本发明实施例中的数据控制模块包括对应各子区域的若干个数据控制子模块,每一数据控制子模块对应获取一个子区域的数据信号并将其与其余子区域的数据信号进行匹配、处理。该数据控制模块还包括存储子模块,该存储子模块用于存储已匹配绑定的各子区域的数据信号直至输出,同时还可存储未匹配绑定的数据信号。
其中,数据控制模块获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号。具体的,数据控制模块的各数据控制子模块获取到对应的时序控制器输出的一行数据信号后,会互相配合来匹配各数据控制子模块接收到的数据信号,以确定这些同一时刻接收的各行数据信号是否可绑定一同输出。具体的是检测某一次所接收到的多行数据信号中,对应横向相接各子区域的各行数据信号是否横向相接,若相接,相接处是否连贯。如此可将同一帧图像中相同行的数据信号匹配绑定。
如图3所示,假设显示面板平均划分为4个子区域,为子区域A、子区域B、子区域C和子区域D,其中,子区域A和子区域B横向相接,子区域C和子区域D横向相接。数据控制模块中的各数据控制子模块每一次能接受到对应子区域的一行数据信号。对于子区域A和子区域B而言,数据控制模块检测当前时刻所接收到的、分别属于子区域A和子区域B的两行数据信号是否为相同行的数据信号,例如此时子区域A接收到的第六行数据信号,若子区域B也接收到第六行数据信号,说明当前时刻所接收到的、分别属于 子区域A和子区域B的两行数据信号为相同行的数据信号。
进一步的,需要检测这两行数据信号是否有错。在本发明实施例中,可通过检测子区域A的第六行数据信号对应最右侧像素的部分是否能与子区域B的第六行数据信号对应最左侧像素的部分相连接。若可接上,说明此时子区域A和子区域B的第六行数据信号相匹配,可将子区域A和子区域B的第六行数据信号进行绑定并存储,留待同步处理器输出对应的同步控制信号时,输出绑定的数据信号。相应的,数据控制模块对子区域C和子区域D的数据信号进行类似的处理。
另外,若是数据控制模块确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号不相接或相接处不连贯时,会将各行数据信号缓存,与接下来的某一时刻获取的各行数据信号进行比较;若发现某一子区域不同时刻获取的两行数据信号相同,则将在先时刻获取的一行数据信号替换在后时刻获取的一行数据信号,并与在后时刻获取的其他行数据信号匹配,若匹配成功,则将该在先时刻获取的一行数据信号与在后时刻获取的其他行数据信号绑定并缓存。若是某一行数据信号在经过若干次匹配后,都没有与其他行数据信号绑定,则可确定该行数据信号为错误的数据信号,进而将该行数据信号丢弃。
如图5所示,本发明实施例中的时序控制模块包括多个控制信号子模块,例如栅线启动(Start Vertical,简称STV)信号子模块、时钟(CKV)信号子模块、输出使能(Output Enable,简称OE)信号子模块等用于处理对应的控制信号的控制信号子模块。这些子模块可将各子区域的时序控制器处理后的不同步的控制信号进行同步处理,使得各子区域可同步显示。
本发明实施例中的时序控制模块可获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对相同类型的控制信号进行同步处理,获得各同步控制信号。对于不同类型的控制信号,时序控制模块的相应子模块可通过不同的方式来获得对应的同步控制信号。每一时序控制模块的各控制信号子模块使用触发器与计数器来做相应控制信号的触发与计数处理。例如,对于OE信号而言,假设OE信号在高电平时,各栅线上的信号被强制变为低电平。由于此时该显示装置包括子区域A、子区域B、子区域C和子区域D共计四个子区域,因此对应具有OE1、OE2、OE3和OE4四个信号,这四个OE信号各自对应一个子区域。另外,每一OE信号各自对应一个计数器。假设OE1信号的上升沿先于其他三个OE信号,此时OE1的计数器OE_CNT1从零开始计数,当OE1下降沿触发后,OE_CNT1归零。同理,OE2、OE3和OE4的上升沿、下降沿到来时,各自对应的计数器OE_CNT2、OE_CNT3、OE_CNT4都做如此的操作。如图6所示,当四个计数器都处于计时状态且都不为零的时候,该OE信号子模块输出高电平,其他时间输出低电平, 即对四个OE信号进行与处理。
对于其他控制信号,可以采用与处理,也可采用其他的信号处理方式。具体的,应根据显示面板对信号的要求来处理,本发明实施例对此不进行限制。
为了使得各子区域能够在同一时刻开始时,同步显示同一帧显示画面,时序控制模块和数据控制模块应当协同合作。即时序控制模块向显示面板输出各同步控制信号,并且数据控制模块输出各子区域经过匹配绑定的相同行数据信号。
时序控制模块需要和数据控制模块进行沟通,以保证可同时开始每一帧显示图像的显示工作。具体的,时序控制模块对各子区域对应的时序控制器输出的STV信号进行同步处理,获得同步STV信号,并将同步STV信号发送给数据控制模块。
在数据控制模块已经准备好输出当前这一帧显示图像的第一行数据信号后,根据接收到的同步STV信号,向时序控制模块反馈响应信号,并同时发出当前帧显示画面中各子区域的第一行数据信号;之后,时序控制模块接收到响应信号后,发出各同步控制信号中的同步CKV信号。由于数据控制模块和时序控制模块之间的距离很近,两者之间信号的传输速度较快,因此相当于在时序控制模块向显示面板输出的各同步控制信号中的同步CKV信号的上升沿到来时,数据控制模块输出对应于同步CKV信号的各子区域经过匹配绑定的相同行数据信号。
本发明实施例所提供的显示面板的驱动系统中,同步处理器位于各时序控制器和显示面板之间。同步处理器将各时序控制器输出的数据信号和控制信号进行同步处理后,直接输出给显示面板。大大降低了各子区域对应的信号不同步的情况发生的可能性,防止各子区域的交界处发生花屏、闪烁的现象,保证了高分辨率甚至超高分辨率显示装置的显示效果。
显然,根据前文所述,在本发明实施例中,如图7所示,该显示面板的驱动方法可包括以下具体步骤:
步骤S101、在显示面板的前端,获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号。
步骤S102、在显示面板的前端,获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号。
步骤S103、向显示面板输出各同步控制信号,并且输出经过匹配绑定的各子区域相同行数据信号。
本发明实施例提供的显示面板的驱动方法中,各子区域对应的时序控制器发出的数据 信号和控制信号在显示面板的前端进行同步处理,处理完毕之后直接输出给显示面板。大大降低了各子区域对应的信号不同步的情况发生的可能性,防止各子区域的交界处发生花屏、闪烁的现象,保证了高分辨率甚至超高分辨率显示装置的显示效果。
虽然本发明所公开的实施方式如上,但所述的内容只是为了便于理解本发明而采用的实施方式,并非用以限定本发明。任何本发明所属技术领域内的技术人员,在不脱离本发明所公开的精神和范围的前提下,可以在实施的形式上及细节上作任何的修改与变化,但本发明的专利保护范围,仍须以所附的权利要求书所界定的范围为准。

Claims (10)

  1. 一种显示面板的驱动方法,所述显示面板包括N个大小相等的子区域,每一子区域对应显示一整帧显示画面的1/N子画面,N≥2且为整数,其中,所述方法包括:
    在显示面板的前端,获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号;
    在显示面板的前端,获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号;
    向显示面板输出各同步控制信号,并且输出经过匹配绑定的各子区域相同行数据信号。
  2. 根据权利要求1所述的方法,其中,向显示面板输出各同步控制信号,并且输出经过匹配绑定的各子区域相同行数据信号包括:
    对各子区域对应的时序控制器输出的栅线启动信号进行同步处理,获得同步栅线启动信号;
    根据所述同步栅线启动信号,确定开始发出匹配绑定的同一行数据信号的时间和输出同步时钟信号的时间;
    在向显示面板输出的各同步控制信号中的同步时钟信号的上升沿到来时,输出对应于同步时钟信号的各子区域经过匹配绑定的相同行数据信号。
  3. 根据权利要求1所述的方法,其中,对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号包括:
    对分别属于各子区域的各同一类型的控制信号分别进行与处理,获得各同步控制信号。
  4. 根据权利要求1所述的方法,其中,在显示面板的前端,获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号包括:
    获取各子区域对应的时序控制器输出的数据信号;
    确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号是否相接且相接处连贯;
    当确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号相接且相接处连贯,将各行数据信号绑定并缓存。
  5. 根据权利要求4所述的方法,其中,还包括:当确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号不相接或相接处不连贯时,
    将各行数据信号缓存,与接下来的某一时刻获取的各行数据信号进行比较;
    若发现某一子区域不同时刻获取的两行数据信号相同,则将在先时刻获取的一行数据信号替换在后时刻获取的一行数据信号,并与在后时刻获取的其他行数据信号匹配,若匹配成功,则将该在先时刻获取的一行数据信号与在后时刻获取的其他行数据信号绑定并缓存。
  6. 一种显示面板的驱动系统,所述显示面板包括N个子区域,每一子区域对应显示一整帧显示画面的1/N子画面,N≥2且为整数,所述驱动系统包括对应各子区域设置的若干时序控制器,其中,还包括位于各时序控制器和显示面板之间的同步处理器,所述同步处理器包括数据控制模块和时序控制模块,
    所述数据控制模块获取经过各子区域对应的时序控制器输出的数据信号,匹配绑定同一帧显示画面中,各子区域相同行的数据信号;
    所述时序控制模块获取经过各子区域对应的时序控制器输出的各类型的控制信号,并对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号;
    所述时序控制模块向显示面板输出各同步控制信号,并且所述数据控制模块输出各子区域经过匹配绑定的相同行数据信号。
  7. 根据权利要求6所述的系统,其中,
    所述时序控制模块对各子区域对应的时序控制器输出的栅线启动信号进行同步处理,获得同步栅线启动信号,并将所述同步栅线启动信号发送给数据控制模块;
    所述数据控制模块根据接收到的所述同步栅线启动信号,向所述时序控制模块反馈响应信号,并同时发出当前帧显示画面中各子区域的第一行数据信号;
    所述时序控制模块接收到所述响应信号后,发出各同步控制信号中的同步时钟信号;
    在所述时序控制模块向显示面板输出的各同步控制信号中的同步时钟信号的上升沿到来时,所述数据控制模块输出对应于同步时钟信号的各子区域经过匹配绑定的相同行数据信号。
  8. 根据权利要求6所述的系统,其中,对分别属于各子区域的各同一类型的控制信号进行同步处理,获得各同步控制信号包括:
    对分别属于各子区域的各同一类型的控制信号分别进行与处理,获得各同步控制信号。
  9. 根据权利要求6所述的系统,其中,
    所述数据控制模块获取各子区域对应的时序控制器输出的数据信号;确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号是否相接且相接处连贯;当确定当 前时刻所接入的分别对应于横向相接的各子区域的各行数据信号相接且相接处连贯,将各行数据信号绑定并缓存。
  10. 根据权利要求9所述的系统,其中,
    当所述数据控制模块确定当前时刻所接入的分别对应于横向相接的各子区域的各行数据信号不相接或相接处不连贯时,将各行数据信号缓存,与接下来的某一时刻获取的各行数据信号进行比较;若发现某一子区域不同时刻获取的两行数据信号相同,则将在先时刻获取的一行数据信号替换在后时刻获取的一行数据信号,并与在后时刻获取的其他行数据信号匹配,若匹配成功,则将该在先时刻获取的一行数据信号与在后时刻获取的其他行数据信号绑定并缓存。
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