WO2016095852A1 - 光子晶体全光多步延迟自与变换逻辑门 - Google Patents

光子晶体全光多步延迟自与变换逻辑门 Download PDF

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WO2016095852A1
WO2016095852A1 PCT/CN2015/097851 CN2015097851W WO2016095852A1 WO 2016095852 A1 WO2016095852 A1 WO 2016095852A1 CN 2015097851 W CN2015097851 W CN 2015097851W WO 2016095852 A1 WO2016095852 A1 WO 2016095852A1
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photonic crystal
signal
logic gate
optical
output
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PCT/CN2015/097851
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French (fr)
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欧阳征标
余铨强
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深圳大学
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Priority to US15/626,228 priority Critical patent/US10338453B2/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/35—Non-linear optics
    • G02F1/365—Non-linear optics in an optical waveguide structure
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/1225—Basic optical elements, e.g. light-guiding paths comprising photonic band-gap structures or photonic lattices
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/125—Bends, branchings or intersections
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/35—Non-linear optics
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/35—Non-linear optics
    • G02F1/3515—All-optical modulation, gating, switching, e.g. control of a light beam by another light beam
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F3/00—Optical logic elements; Optical bistable devices
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/1213—Constructional arrangements comprising photonic band-gap structures or photonic lattices

Definitions

  • the invention relates to two-dimensional photonic crystals, optical and logic gates
  • a photonic crystal is a material structure in which dielectric materials are periodically arranged in space, and is usually composed of two or more kinds of artificial crystals having materials having different dielectric constants.
  • All-optical logic devices mainly include optical amplifier-based logic devices, nonlinear ring mirror logic devices, Sagnac interferometric logic devices, ring cavity logic devices, multimode interference logic devices, coupled optical waveguide logic devices, and photoisomerization.
  • Logic devices, polarization switching optical logic devices, transmission grating optical logic devices, etc. These optical logic devices have a large common disadvantage for the development of large-scale integrated optical paths. With the advancement of science and technology in recent years, people have also developed quantum optical logic devices, nanomaterial optical logic devices and photonic crystal light.
  • Logic devices these logic devices are in line with the size requirements of large-scale photonic integrated optical paths, but for modern manufacturing processes, quantum optical logic devices and nanomaterial optical logic devices have great difficulties in the fabrication, and photonic crystal optical logic The device has a competitive edge in the manufacturing process.
  • Photonic crystal logic devices have been a hot research topic, and it is very likely to replace the widely used electronic logic devices in the near future.
  • Photonic crystal logic devices can directly perform all-optical "AND”, “OR”, and “NO” logic functions. They are the core devices for all-optical calculation.
  • Photonic crystal logic devices such as ",” “exclusive” and “exclusive OR” have been successfully designed and studied, and the goal of achieving all-optical calculation still requires a variety of complex logic components.
  • the object of the present invention is to overcome the deficiencies in the prior art and to provide a photonic crystal all-optical multi-step delay self-transform logic gate with compact structure, strong anti-interference ability and easy integration with other optical logic components.
  • the photonic crystal all-optical multi-step delay self-transform logic gate of the present invention is composed of a photonic crystal structure unit, an optical switch unit, a memory or retarder, an absorbing load, a non-logic gate and a D flip-flop unit;
  • the logic signal X is connected through an input end of a two-branch waveguide, and the two-branch waveguide output ends are respectively connected to the memory input end and the logic signal input end of the optical switch unit; the memory output end and the delay signal input end of the optical switch unit Connecting; two intermediate signal output ends of the optical switch unit are respectively connected with an intermediate signal input end of the photonic crystal structure unit and a absorbing load; clock control
  • the signal CP is connected through an input end of a three-branch waveguide, and the three-branch waveguide output ends are respectively connected to the non-logic gate input terminal, the clock signal input end of the photonic crystal structure unit, and the clock signal CP input end of the optical switch unit;
  • the non-logic gate output is connected to the
  • the photonic crystal structural unit is a two-dimensional photonic crystal cross-waveguide nonlinear cavity, which is composed of a high-refractive-index dielectric rod to form a two-dimensional photonic crystal "ten" cross-waveguide four-port network, and the left end and the lower end of the four-port network
  • the upper end and the right end are respectively provided with a clock signal input end, an intermediate signal input end, a signal output end, and an idle end; and two mutually orthogonal quasi-one-dimensional photonic crystal structures are placed along the two waveguide directions through the cross-fork waveguide center;
  • An intermediate medium column is disposed in the middle, the intermediate medium column is a nonlinear material, and the intermediate medium column has a square, a polygonal shape, a circular shape or an elliptical shape; a rectangular linear rod which is close to the central nonlinear rod and close to the signal output end
  • the dielectric constant is equal to the dielectric constant of the central nonlinear rod under low light conditions; the quasi-one-
  • the optical switch unit is a 2 ⁇ 2 optical strobe switch, which is composed of a clock signal CP input end, a delay signal input end, a logic signal input end and two intermediate signal output ends; the two intermediate signals The output ends are a first intermediate signal output end and a second intermediate signal output end, respectively.
  • the memory is composed of an input terminal and an output terminal; the output signal of the memory is an input signal input to the memory before the k step; the delay device is input by an input
  • the terminal is composed of an output; the output signal of the delay has a k-step delay with respect to the input signal of the delay.
  • the memory or delay is a k-step delayed memory or delay.
  • the D flip-flop unit is composed of a clock signal input end, a D signal input end and a system output end; the input signal D of the D flip-flop unit is equal to the output signal of the output end of the photonic crystal structure unit.
  • the two-dimensional photonic crystal is a (2k+1) ⁇ (2k+1) structure, where k is a positive integer greater than or equal to 3.
  • the high refractive index dielectric column of the two-dimensional photonic crystal has a circular, elliptical, triangular or polygonal cross section.
  • the background filling material of the two-dimensional photonic crystal is air or a low refractive index medium having a refractive index of less than 1.4.
  • the refractive index of the dielectric column in the quasi-one-dimensional photonic crystal in the cross-waveguide is 3.4 or greater, and the cross-sectional shape of the dielectric column in the quasi-one-dimensional photonic crystal is rectangular, polygonal, circular or Oval.
  • FIG. 1 is a schematic structural view of a photonic crystal all-optical multi-step delay self-and-transform logic gate of the present invention
  • FIG. 4 is a logic function truth table of the two-dimensional photonic crystal cross-waveguide nonlinear cavity shown in FIG. 1.
  • photonic crystal structure unit 01 clock signal input terminal 11 intermediate signal input terminal 12 idle terminal 13 signal output terminal 14 circular high refractive index linear dielectric rod 15 first rectangular high refractive index linear dielectric rod 16 second rectangular high refractive index Linear medium rod 17 central non-linear dielectric rod 18 clock control signal CP logic signal X-ray switch unit 02 delay signal input terminal 21 logic signal input terminal 22 first intermediate signal output terminal 23 second intermediate signal output terminal 24 memory or delay 03 Absorbing load 04D trigger unit 05 clock signal input terminal 51D signal input terminal 52 system signal output terminal 53 non-logic gate 06
  • the photonic crystal all-optical multi-step delay self-transform logic gate of the present invention consists of a photonic crystal structure unit 01, an optical switch unit 02, a memory or delay unit 03, a absorbing load 04, and a D.
  • the flip-flop unit 05 and a non-logic gate 06 are composed;
  • the photonic crystal structure unit 01 is a two-dimensional photonic crystal cross-waveguide nonlinear cavity, which is disposed at the rear end of the optical switch unit, and the background filling material of the two-dimensional photonic crystal is Air or a low refractive index medium with a refractive index of less than 1.4, the cross-section of the high refractive index dielectric column of the two-dimensional photonic crystal is circular, elliptical, triangular or polygonal, and the two-dimensional photonic crystal cross-waveguide nonlinear cavity is composed of a high refractive index.
  • the dielectric rod constitutes a two-dimensional photonic crystal "ten" cross-waveguide four-port network, the four-port network has a four-port photonic crystal structure, the left end is a first intermediate signal input end, and the lower end is a second intermediate signal input end, The upper end is the signal output end and the right end is the idle end; two mutually orthogonal quasi-one-dimensional photonic crystal junctions are placed along the two waveguide directions through the center of the cross-waveguide
  • the cross section of the dielectric column in the quasi-one-dimensional photonic crystal is rectangular, and may also be polygonal, circular or elliptical, with a refractive index of 3.4 or greater, and an intermediate dielectric column in the middle of the cross-waveguide, the intermediate medium
  • the column is a nonlinear material, and the cross section of the intermediate medium column is square, and may also be a polygon, a circle or an ellipse.
  • the quasi-one-dimensional photonic crystal structure and the intermediate dielectric column constitute a waveguide defect cavity.
  • the two-dimensional photonic crystal array has a lattice constant d and an array number of 11 ⁇ 11;
  • the circular high refractive index linear dielectric rod 25 is made of silicon (Si) material, has a refractive index of 3.4 and a radius of 0.18 d;
  • the linear dielectric rod 26 has a refractive index of 3.4, a long side of 0.613d, and a short side of 0.162d.
  • the second rectangular high refractive index linear dielectric rod 27 has a dielectric constant and a dielectric constant under a low dielectric condition of a nonlinear dielectric rod.
  • the size of the second rectangular high refractive index linear dielectric rod 27 is equal to the size of the first rectangular high refractive index linear dielectric rod 26;
  • the central square nonlinear dielectric rod 28 is a Kerr type nonlinear material having a side length of 1.5d.
  • the dielectric constant under low light conditions is 7.9, and the third-order nonlinear coefficient is 1.33*10 -2 ⁇ m 2 /V 2 .
  • the center of the nonlinear cavity of the two-dimensional photonic crystal cross-waveguide is composed of twelve rectangular high-linear dielectric rods and a square nonlinear dielectric rod aligned in the longitudinal and transverse directions of the two waveguides.
  • the central nonlinear dielectric rod and phase The adjacent four rectangular linear dielectric rods are attached with a distance of 0, and the adjacent rectangular linear dielectric rods are spaced apart by 0.2668 d.
  • the dielectric constant of a rectangular linear rod close to the central nonlinear rod and close to the signal output end is The central nonlinear rod has the same dielectric constant under low light conditions.
  • the optical switch unit 02 is a 2 ⁇ 2 optical strobe switch controlled by a clock signal CP for controlling a selection logic signal for selective output; the optical strobe switch is composed of a clock signal CP input terminal and a delay signal.
  • the input end, a logic signal input end and two intermediate signal output ends; the memory is composed of an input end and an output end, the logic signal X is input through the input end of a bifurcated waveguide, and the end of the bifurcated waveguide output is connected to the memory 03
  • the memory 03 outputs the output delayed signal X(nk) to the delay signal input terminal 21 of the optical gate switch; the delay device is composed of an input terminal and an output terminal, and the memory or the delay device is a k-step delay memory or delay device.
  • the memory stores and outputs the input signal X(nk) of the signal X before the k step; the delay output signal has a k step delay with respect to the input signal of the delay device;
  • the other end directly inputs the logic signal X(n) to the logic signal input terminal 22 of the optical gate switch, and the first intermediate signal output of the light gate switch.
  • the end 23 is connected to the intermediate signal input end 12 of the photonic crystal structure unit 01, and the second intermediate signal output end 24 of the optical strobe switch is connected to the absorbing load 04 for absorbing the light wave entering therein; the clock control signal CP
  • the input end of the three-branch waveguide is connected to the input end of the non-logic gate 06, the second output end is connected to the clock signal input end 11 of the photonic crystal structure unit 01, and the third output end is connected to the light.
  • the clock signal CP input end of the switch unit; the output end of the non-logic gate 06 is connected to the clock signal input end 51 of the D flip-flop unit 05; the non-logic gate is disposed between the input end of the clock signal CP and the D flip-flop unit, the non-logic The gate is used for non-logic operation on the input signal, and is projected to the clock signal input end 51 of the D flip-flop unit 05; the D flip-flop unit is composed of a clock signal input end, a D signal input end and a system output end; photons
  • the signal output terminal 14 of the crystal structure unit 01 is connected to the D signal input terminal 52 of the D flip-flop unit 05, that is, the input signal D of the D flip-flop unit 05 is equal to the photonic crystal structural unit.
  • the output signal of the output terminal 14 of the 01, the system signal output terminal 53 of the D flip-flop unit 05 is the system output end of the photonic crystal all-optical multi-step delay self-conversion logic gate of the present invention.
  • the invention is based on the photonic band gap characteristic, the quasi-one-dimensional photonic crystal defect state, the tunneling effect and the optical Kerr nonlinear effect of the two-dimensional photonic crystal cross-waveguide nonlinear cavity shown in FIG.
  • the multi-step delay self-and-change logic gate function can be realized.
  • the basic principle of the photonic crystal nonlinear cavity in the present invention is introduced: the two-dimensional photonic crystal provides a photonic band gap with a certain bandwidth, and the light wave whose wavelength falls within the band gap can propagate in the designed optical path in the photonic crystal.
  • the operating wavelength of the device is set to a certain wavelength in the photonic band gap;
  • the quasi-one-dimensional photonic crystal structure disposed at the center of the cross-waveguide combined with the nonlinear effect of the central nonlinear dielectric rod provides a defect state mode when the input light wave satisfies
  • the defect state mode is shifted to the operating frequency of the system, the structure generates a tunneling effect, and the signal is output from the output terminal 14.
  • the clock signal input terminal 11 and the intermediate signal input terminal 12 are signals.
  • port 11 inputs signal A and port 12 inputs signal B.
  • the logic output waveform diagram of the two-dimensional photonic crystal cross-waveguide nonlinear cavity of the present invention when the port 11 and the port 12 respectively input the waveform signals as shown in Fig. 2, the logic output waveform below the figure can be obtained.
  • the logical operation truth table of the structure shown in FIG. 4 can be obtained.
  • C is the current state Q n
  • Y is the signal output of the output terminal 14 of the photonic crystal structural unit 01, that is, the secondary state Q n+1 .
  • the logical expression of the structure can be derived:
  • the logic output of the above stage is used as a logic input to realize a predetermined logic function.
  • the input signal X(nk) of the optical gate switch strobe delay signal input terminal 21 is output by the first intermediate signal output terminal 23 of the optical strobe switch, and is projected to the photonic crystal.
  • the intermediate signal input terminal 12 of the structural unit 01 that is, the input signal of the intermediate signal input terminal 12 of the photonic crystal junction unit 01 is equal to the input signal X(nk) of the delay signal input terminal 21; meanwhile, the optical strobe switch strobe logic signal input
  • the logic signal X(n) of terminal 22 is output by the second intermediate signal output 24 of the optical gate switch and is projected to the absorbing load 04.
  • the input signal X(n-k+1) of the optical strobe switch strobe delay logic signal input terminal 21 is output by the second intermediate signal output terminal 24 of the optical strobe switch, and is projected to the absorbing load. 04;
  • the logic signal X(n+1) of the optical strobe switch strobe logic signal input terminal 22 is output by the first intermediate signal output terminal 23 of the optical strobe switch and projected to the intermediate signal of the photonic crystal structure unit 01.
  • Input terminal 12, that is, photonic crystal structure unit 01 The input signal of the intermediate signal input terminal 12 is equal to the logic signal X(n+1) of the logic signal input terminal 22.
  • the multi-step delay self-transformation logic function of the all-optical logic signal can be realized.
  • the photonic crystal structure of the device of the present invention may adopt an array structure of (2k+1) ⁇ (2k+1), and k is an integer of 3 or more.
  • k is an integer of 3 or more.
  • the optical strobe switch turns on the delayed signal X(nk) of the delay signal input terminal 21 to the second intermediate signal output terminal 23, and projects it to the intermediate signal input of the photonic crystal structure unit 01.
  • the terminal 12; the optical gate switch turns on the signal X(n) of the logic signal input terminal 22 to the second intermediate output terminal 24, and outputs it to the absorbing load 04; meanwhile, the clock signal input terminal 11 of the photonic crystal structure unit 01
  • the light gate switch turns on the delay signal of the delay signal input terminal 21 to the second intermediate signal output terminal 24, and outputs it to the absorbing load 04; the light strobe switch is turned on.
  • the output of the output port 14 of the photonic crystal structure unit 01 is equal to the input of the D signal input terminal 52 of the D flip-flop unit 05, and the input signal of the D signal input terminal 52 can be derived from the equations (3) and (4).
  • the device of the present invention can implement the multi-step delay self-transformation logic function of the logic signal; if the above memory is changed to a k-step delay device, the same function can be realized.
  • the lattice constant d of the photonic crystal structural unit 01 is 0.5208 ⁇ m; the radius of the circular high refractive index linear dielectric rod 15 is 0.093744 ⁇ m; the long side of the first rectangular high refractive index linear dielectric rod 16 0.3192504 ⁇ m, the short side is 0.0843696 ⁇ m; the size of the second rectangular high refractive index linear dielectric rod 17 is the same as the size of the first rectangular high refractive index linear dielectric rod 16; the side length of the central square nonlinear dielectric rod 18 is 0.7812 ⁇ m
  • the third-order nonlinear coefficient is 1.33*10 -2 ⁇ m 2 /V 2 ; the adjacent rectangular linear dielectric rods are separated by 0.13894944 ⁇ m.
  • the device of the present invention achieves the same logic function at different lattice constants and corresponding operating wavelengths by scaling.
  • a self-convolution operation of a single logic signal can be defined, and the self-and logical operation of the above logic signal is the basic operation of the logical signal self-convolution operation; the logic signal realized by the invention is It plays an important role in the implementation of autocorrelation transformation or self-convolution operation of logic logic with transformation logic function.

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Abstract

一种光子晶体全光多步延迟自与变换逻辑门，由一个光子晶体结构单元（01）、一个光开关单元（02）、一个存储器或延迟器（03）、一个吸波负载（04）、一个非逻辑门（06）和一个D触发器单元（05）组成。逻辑信号X与存储器（03）输入端和光开关单元（02）的逻辑信号输入端（22）连接。存储器（03）输出端与光开关单元（02）的延迟信号输入端（21）连接。光开关单元（02）的两个中间信号输出端（23，24）与光子晶体结构单元（01）的中间信号输入端（12）和吸波负载（04）连接。时钟控制信号CP与非逻辑门（06）输入端、光子晶体结构单元（01）的时钟信号输入端（11）和光开关单元（02）的时钟信号CP输入端连接。非逻辑门（06）输出端与触发器单元（05）的时钟信号输入端（51）连接。光子晶体结构单元（01）的信号输出端（14）与触发器单元（05）的D信号输入端（52）连接。该逻辑门易与其它光学逻辑元件集成。

Description

光子晶体全光多步延迟自与变换逻辑门 技术领域
本发明涉及二维光子晶体、光学与逻辑门
背景技术
1987年，美国Bell实验室的E.Yablonovitch在讨论如何抑制自发辐射和Princeton大学的S.John在讨论光子区域各自独立地提出了光子晶体(Photonic Crystal)的概念。光子晶体是一种介电材料在空间中呈周期性排列的物质结构，通常由两种或两种以上具有不同介电常数材料构成的人工晶体。
随着光子晶体的提出和深入研究，人们可以更灵活、更有效地控制光子在光子晶体材料中的运动。在与传统半导体工艺和集成电路技术相结合下，人们通过设计与制造光子晶体及其器件不断的往全光处理飞速迈进，光子晶体成为了光子集成的突破口。1999年12月，美国权威杂志《科学》将光子晶体评为1999年十大科学进展之一，也成为了当今科学研究领域的一个研究热点。
全光逻辑器件主要包括基于光放大器的逻辑器件、非线性环形镜逻辑器件、萨格纳克干涉式逻辑器件、环形腔逻辑器件、多模干涉逻辑器件、耦合光波导逻辑器件、光致异构逻辑器件、偏振开关光逻辑器件、传输光栅光逻辑器件等。这些光逻辑器件对于发展大规模集成光路来说都有体积大的共同缺点。随着近年来科学技术的提高，人们还发展研究出了量子光逻辑器件、纳米材料光逻辑器件和光子晶体光 逻辑器件，这些逻辑器件都符合大规模光子集成光路的尺寸要求，但对于现代的制作工艺来说，量子光逻辑器件与纳米材料光逻辑器件在制作上存在很大的困难，而光子晶体光逻辑器件则在制作工艺上具有竞争优势。
近年来，光子晶体逻辑器件是一个备受瞩目的研究热点，它极有可能在不久将来取代目前正广泛使用的电子逻辑器件。光子晶体逻辑器件可直接进行全光的“与”、“或”、“非”等逻辑功能，是实现全光计算的核心器件，在实现全光计算的进程中，基于“与”、“或”、“非”、“异或”等光子晶体逻辑功能器件已经被成功设计研究，而实现全光计算的目标仍需要各种各样复杂的逻辑元器件。
发明内容
本发明的目的是克服现有技术中的不足，提供一种结构紧凑、抗干扰能力强，且易与其它光学逻辑元件实现集成的光子晶体全光多步延迟自与变换逻辑门。
本发明的目的通过下列技术方案予以实现。
本发明的光子晶体全光多步延迟自与变换逻辑门由一个光子晶体结构单元、一个光开关单元、一个存储器或延迟器、一个吸波负载、一个非逻辑门和一个D触发器单元组成；逻辑信号X通过一个二分支波导的输入端连接，所述的二分支波导输出端分别与存储器输入端和光开关单元的逻辑信号输入端连接；所述存储器输出端与光开关单元的延迟信号输入端连接；所述光开关单元的两个中间信号输出端分别与光子晶体结构单元的中间信号输入端和吸波负载连接；时钟控制 信号CP通过一个三分支波导的输入端连接，所述的三分支波导输出端分别与非逻辑门输入端、光子晶体结构单元的时钟信号输入端和光开关单元的时钟信号CP输入端连接；所述非逻辑门输出端与D触发器单元的时钟信号输入端连接；所述光子晶体结构单元的信号输出端与D触发器单元的D信号输入端连接。
所述光子晶体结构单元为一个二维光子晶体交叉波导非线性腔，它由高折射率介质杆构成二维的光子晶体“十”字交叉波导四端口网络，所述四端口网络的左端、下端、上端、右端分别设置有时钟信号输入端、中间信号输入端、信号输出端、闲置端；通过交叉叉波导中心沿两波导方向放置两相互正交的准一维光子晶体结构；在交叉波导的中部设置中间介质柱，该中间介质柱为非线性材料，所述中间介质柱的横截面为正方形、多边形、圆形或者椭圆形；紧贴中心非线性杆且靠近信号输出端的一根矩形线性杆的介电常数与中心非线性杆在弱光条件下的介电常数相等；所述的准一维光子晶体结构与中间介质柱构成波导缺陷腔。
所述光开关单元为一个2×2光选通开关，它由一个时钟信号CP输入端、一个延迟信号输入端、一个逻辑信号输入端和两个中间信号输出端组成；所述两个中间信号输出端分别为第一中间信号输出端、第二中间信号输出端。
所述的存储器由一个输入端和一个输出端组成；所述存储器的输出信号为k步之前输入存储器的输入信号；所述的延迟器由一个输入 端和一个输出端组成；所述延迟器的输出信号相对于延迟器的输入信号存在k步延迟。
所述的存储器或延迟器为k步延迟的存储器或延迟器。
所述D触发器单元由一个时钟信号输入端、一个D信号输入端和一个系统输出端组成；所述D触发器单元的输入信号D与光子晶体结构单元输出端的输出信号相等。
所述二维光子晶体为(2k+1)×(2k+1)结构，其中k为大于等于3的正整数。
所述二维光子晶体的高折射率介质柱的横截面为圆形、椭圆形、三角形或者多边形。
所述二维光子晶体的背景填充材料为空气或者折射率小于1.4的低折射率介质。
所述交叉波导中的准一维光子晶体中的介质柱的折射率为3.4或者大于2的值，且所述准一维光子晶体中的介质柱的横截面形状为矩形、多边形、圆形或者椭圆形。
本发明与现有技术相比的积极有益效果是：
1.结构紧凑，易于制作。
2.抗干扰能力强，易与其它光学逻辑元件集成。
3.具有高、低逻辑输出对比度高，运算速度快。
附图说明
图1为本发明的光子晶体全光多步延迟自与变换逻辑门的结构示意图；
图2为图1所示光子晶体结构单元在晶格常数d＝1μm，工作波长为2.976μm的基本逻辑功能波形图；
图3为本发明的光子晶体全光多步延迟自与逻辑门在晶格常数d＝0.5208μm，工作波长为1.55μm的逻辑信号多步延迟自与变换逻辑功能的波形图；
图4为图1所示二维光子晶体交叉波导非线性腔的逻辑功能真值表。
图中：光子晶体结构单元01时钟信号输入端11中间信号输入端12闲置端13信号输出端14圆形高折射率线性介质杆15第一长方形高折射率线性介质杆16第二长方形高折射率线性介质杆17中心非线性介质杆18时钟控制信号CP逻辑信号X光开关单元02延迟信号输入端21逻辑信号输入端22第一中间信号输出端23第二中间信号输出端24存储器或延迟器03吸波负载04D触发器单元05时钟信号输入端51D信号输入端52系统信号输出端53非逻辑门06
具体实施方式
下面结合附图与具体实施方式对本发明作进一步详细描述：
如图1所示，本发明的光子晶体全光多步延迟自与变换逻辑门由一个光子晶体结构单元01、一个光开关单元02、一个存储器或延迟器03、一个吸波负载04、一个D触发器单元05和一个非逻辑门06组成；光子晶体结构单元01为一个二维光子晶体交叉波导非线性腔，其设置在所述光开关单元的后端，二维光子晶体的背景填充材料为空 气或者为折射率小于1.4的低折射率介质，二维光子晶体的高折射率介质柱的横截面为圆形、椭圆形、三角形或者多边形，二维光子晶体交叉波导非线性腔由高折射率介质杆构成二维的光子晶体“十”字交叉波导四端口网络，该四端口网络具有一种四端口的光子晶体结构，左端为第一中间信号输入端、下端为第二中间信号输入端、上端为信号输出端、右端为闲置端；通过交叉波导中心沿两波导方向放置两相互正交的准一维光子晶体结构，准一维光子晶体中的介质柱的横截面为矩形，也可以采用多边形、圆形或者椭圆形，其折射率为3.4或者大于2的值，在交叉波导的中部设置中间介质柱，中间介质柱为非线性材料，中间介质柱的横截面为正方形，也可以采用多边形、圆形或者椭圆形，准一维光子晶体结构与中间介质柱构成波导缺陷腔。二维光子晶体阵列晶格常数为d，阵列数为11×11；圆形高折射率线性介质杆25采用硅(Si)材料，折射率为3.4，半径为0.18d；第一长方形高折射率线性介质杆26，折射率为3.4，长边为0.613d，短边为0.162d；第二长方形高折射率线性介质杆27，其介电常数与非线性介质杆弱光条件下的介电常数一致，第二长方形高折射率线性介质杆27的尺寸与第一长方形高折射率线性介质杆26的尺寸相等；中心正方形非线性介质杆28采用克尔型非线性材料，边长为1.5d，弱光条件下的介电常数为7.9，三阶非线性系数为1.33*10-2μm2/V2。二维光子晶体交叉波导非线性腔中心由十二根长方形高线性介质杆与一根正方形非线性介质杆在纵、横两个波导方向呈准一维光子晶体排列，中心非线性介质杆与相邻的四根长方形线性介质杆相贴，距离为0， 而两两相邻的长方形线性介质杆相距0.2668d，紧贴中心非线性杆且靠近信号输出端的一根矩形线性杆的介电常数与中心非线性杆在弱光条件下的介电常数相等。光开关单元02为一个由时钟信号CP控制的2×2光选通开关，该光选通开关用于控制选择逻辑信号进行选择输出；光选通开关由一个时钟信号CP输入端、一个延迟信号输入端、一个逻辑信号输入端和两个中间信号输出端组成；存储器由一个输入端和一个输出端组成，逻辑信号X通过一个二分支波导的输入端输入，二分支波导输出的一端连接存储器03，存储器03将输出的延迟信号X(n-k)输出至光选通开关的延迟信号输入端21；延迟器由一个输入端和一个输出端组成，存储器或延迟器为k步延迟的存储器或延迟器，其设置在系统的输入端与光开关单元之间，存储器存储并输出信号X在k步之前的输入信号X(n-k)；延迟器输出信号相对于延迟器的输入信号存在k步延迟；存储器的另一端将逻辑信号X(n)直接输入至光选通开关的逻辑信号输入端22，光选通开关的第一中间信号输出端23连接光子晶体结构单元01的中间信号输入端12、光选通开关的第二中间信号输出端24连接吸波负载04，该吸波负载用于吸收进入其内的光波；时钟控制信号CP通过一个三分支波导的输入端输入，三分支波导的第一输出端连接非逻辑门06的输入端、第二输出端连接光子晶体结构单元01的时钟信号输入端11、第三输出端连接光开关单元的时钟信号CP输入端；非逻辑门06的输出端连接D触发器单元05的时钟信号输入端51；非逻辑门设置在时钟信号CP输入端与D触发器单元之间，该非逻辑门用于对输入信号进行 非逻辑运算，并投射至D触发器单元05的时钟信号输入端51；D触发器单元由一个时钟信号输入端、一个D信号输入端和一个系统输出端组成；光子晶体结构单元01的信号输出端14连接D触发器单元05的D信号输入端52，即D触发器单元05的输入信号D等于光子晶体结构单元01输出端14的输出信号，D触发器单元05的系统信号输出端53即为本发明的光子晶体全光多步延迟自与变换逻辑门的系统输出端。
本发明基于图1所示二维光子晶体交叉波导非线性腔所具有的光子带隙特性、准一维光子晶体缺陷态、隧穿效应及光克尔非线性效应，通过光开关等单元器件的配合可实现多步延迟自与变换逻辑门功能。首先介绍本发明中光子晶体非线性腔的基本原理：二维光子晶体提供一个具有一定带宽的光子带隙，波长落在该带隙内的光波可在光子晶体内所设计好的光路中传播，因此将器件的工作波长设置为光子带隙中的某一波长；交叉波导中心所设置的准一维光子晶体结构结合中心非线性介质杆的非线性效应提供了一个缺陷态模式，当输入光波满足一定光强时，使得该缺陷态模式偏移至系统的工作频率，结构产生隧穿效应，信号从输出端14输出。
当晶格常数d＝1μm，工作波长为2.976μm，参照图1中的光子晶体结构单元01所示的二维光子晶体交叉波导非线性腔，时钟信号输入端11与中间信号输入端12为信号输入端，端口11输入信号A，端口12输入信号B。如图2所示本发明的二维光子晶体交叉波导非线性腔的逻辑输出波形图，当端口11与端口12分别输入如图2所示 的波形信号可得出该图下方的逻辑输出波形。根据图2所示的逻辑运算特性可得出图4所示该结构的逻辑运算真值表。图4中C为现态Qn，Y为光子晶体结构单元01输出端14的信号输出，即次态Qn+1。根据该真值表可得出结构的逻辑表达式：
Y＝AB+BC  (1)
即
Qn+1＝AB+BQn  (2)
根据上述二维光子晶体交叉波导非线性腔自身的基本逻辑运算特性，以上一级的逻辑输出作为逻辑输入以实现既定的逻辑功能。
如图1所示，当CP＝1时，光选通开关选通延迟信号输入端21的输入信号X(n-k)由光选通开关的第一中间信号输出端23输出，并投射到光子晶体结构单元01的中间信号输入端12，即光子晶体结单元01的中间信号输入端12的输入信号等于延迟信号输入端21的输入信号X(n-k)；同时，光选通开关选通逻辑信号输入端22的逻辑信号X(n)由光选通开关的第二中间信号输出端24输出，并投射至吸波负载04。
当CP＝0时，光选通开关选通延迟逻辑信号输入端21的输入信号X(n-k+1)由光选通开关的第二中间信号输出端24输出，并投射至吸波负载04；同时，光选通开关选通逻辑信号输入端22的逻辑信号X(n+1)由光选通开关的第一中间信号输出端23输出，并投射到光子晶体结构单元01的中间信号输入端12，即光子晶体结构单元01的 中间信号输入端12的输入信号等于逻辑信号输入端22的逻辑信号X(n+1).
通过上述配合即可实现全光逻辑信号的多步延迟自与变换逻辑功能。
本发明器件的光子晶体结构可以采用(2k+1)×(2k+1)的阵列结构，k为大于等于3的整数。下面结合附图给出的实施例，在实施例中以11×11阵列结构，晶格常数以d＝0.5208μm为例给出设计和模拟结果。
通过时钟信号CP控制使其工作如下：
在tn时刻，令CP＝1，光选通开关接通延迟信号输入端21的延迟信号X(n-k)至第二中间信号输出端23输出，并投射到光子晶体结构单元01的中间信号输入端12；光选通开关接通逻辑信号输入端22的信号X(n)至第二中间输出端24输出，并投射到吸波负载04；同时，光子晶体结构单元01的时钟信号输入端11的输入信号与时钟控制信号CP同步，即A＝CP＝1，由式子(2)可得出此时端口14的输出为
Qn+1＝X(n-k)  (3)
在tn+1时刻，令CP＝0，光选通开关接通延迟信号输入端21的延迟信号至第二中间信号输出端24输出，并投射到吸波负载04；光选通开关接通逻辑信号输入端22的信号X(n+1)至第一中间信号输出端23输出，并投射到光子晶体结构单元01的中间信号输入端12；同时，光子晶体结构单元01的时钟信号输入端11与时钟控制信号CP同步，即A＝CP＝0，由式子(2)可得出此时端口14的输出为
Qn+1＝X(n+1)X(n-k)  (4)
光子晶体结构单元01的输出端口14的输出等于D触发器单元05的D信号输入端52的输入，由式式子(3)与式子(4)可得出D信号输入端52的输入信号在CP＝1时D＝X(n-k)；CP＝0时D＝X(n+1)X(n-k).
由于D触发器单元05的时钟信号输入端51与非逻辑门06的输出连接，因此D触发器单元05在CP＝0时，系统输出跟随输入信号D；CP＝1时，系统输出保持上一时刻的输入信号D。由此可得出本发明器件的系统输出端口53的输出在CP＝0时，Qn+1＝D＝X(n+1)X(n-k)；在下一时刻CP＝1时，系统输出保持上一时刻的输出，即在一个时钟周期内的系统输出为
Qn+1＝X(n+1)X(n-k)  (5)
可见，本发明器件可实现逻辑信号的多步延迟自与变换逻辑功能；若将上述存储器改为一个k步的延迟器可实现同样功能。
当器件工作波长为1.55μm，光子晶体结构单元01的晶格常数d为0.5208μm；圆形高折射率线性介质杆15的半径为0.093744μm；第一长方形高折射率线性介质杆16的长边为0.3192504μm，短边为0.0843696μm；第二长方形高折射率线性介质杆17的尺寸与第一长方形高折射率线性介质杆16的尺寸一致；中心正方形非线性介质杆18的边长为0.7812μm，三阶非线性系数为1.33*10-2μm2/V2；两两相邻的长方形线性介质杆相距0.13894944μm。在上述尺寸参数下，当光选通开关的延迟信号输入端21的延迟信号X(n-k)与逻辑信号端的信号X(n)如图2所示的波形输入，在时钟信号CP控制下，可得出该图 下方的系统输出波形图。可见，系统将逻辑输入量X(n+1)与上一时刻的逻辑输入量X(n-k)作与逻辑运算。即实现了对逻辑信号的多步延迟自与变换逻辑功能。
结合图3，本发明器件通过缩放，可在不同晶格常数及相应工作波长下实现同样的逻辑功能。
综上可知，在所述非逻辑门和D触发器单元的配合下，加入一个存储器或延迟器、一个光开关单元和一个吸波负载，通过时钟信号输入端的时钟信号CP控制即可实现本发明全光逻辑信号的多步延迟自与变换逻辑门功能。
在集成光路的逻辑信号处理中，可定义一种单一逻辑信号的自卷积运算，而上述逻辑信号的自与逻辑运算即为逻辑信号自卷积运算的基本运算；本发明实现的逻辑信号自与变换逻辑功能对逻辑变量的自相关变换或自卷积运算的实现起着重要应用。
以上所述本发明在具体实施方式及应用范围均有改进之处，不应当理解为对本发明限制。

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  1. 一种光子晶体全光多步延迟自与变换逻辑门，其特征在于：它由一个光子晶体结构单元、一个光开关单元、一个存储器或延迟器、一个吸波负载、一个非逻辑门和一个D触发器单元组成；逻辑信号X通过一个二分支波导的输入端连接，所述的二分支波导输出端分别与存储器输入端和光开关单元的逻辑信号输入端连接；所述存储器输出端与光开关单元的延迟信号输入端连接；所述光开关单元的两个中间信号输出端分别与光子晶体结构单元的中间信号输入端和吸波负载连接；时钟控制信号CP通过一个三分支波导的输入端连接，所述的三分支波导输出端分别与非逻辑门输入端、光子晶体结构单元的时钟信号输入端和光开关单元的时钟信号CP输入端连接；所述非逻辑门输出端与D触发器单元的时钟信号输入端连接；所述光子晶体结构单元的信号输出端与D触发器单元的D信号输入端连接。
  2. 按照权利要求1所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述光子晶体结构单元为一个二维光子晶体交叉波导非线性腔，它由高折射率介质杆构成二维的光子晶体“十”字交叉波导四端口网络，所述四端口网络的左端、下端、上端、右端分别设置有时钟信号输入端、中间信号输入端、信号输出端、闲置端；通过交叉叉波导中心沿两波导方向放置两相互正交的准一维光子晶体结构；在交叉波导的中部设置中间介质柱，该中间介质柱为非线性材料，所述中间介质柱的横截面为正方形、多边形、圆形或者椭圆形；紧贴中心非线性杆且靠近信号输出端的一根矩形线性杆的介电常数与中 心非线性杆在弱光条件下的介电常数相等；所述的准一维光子晶体结构与中间介质柱构成波导缺陷腔。
  3. 按照权利要求1所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述光开关单元为一个2×2光选通开关，它由一个时钟信号CP输入端、一个延迟信号输入端、一个逻辑信号输入端和两个中间信号输出端组成；所述两个中间信号输出端分别为第一中间信号输出端、第二中间信号输出端。
  4. 按照权利要求1所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述的存储器由一个输入端和一个输出端组成；所述存储器的输出信号为k步之前输入存储器的输入信号；所述的延迟器由一个输入端和一个输出端组成；所述延迟器的输出信号相对于延迟器的输入信号存在k步延迟。
  5. 按照权利要求5所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述的存储器或延迟器为k步延迟的存储器或延迟器。
  6. 按照权利要求1所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述D触发器单元由一个时钟信号输入端、一个D信号输入端和一个系统输出端组成；所述D触发器单元的输入信号D与光子晶体结构单元输出端的输出信号相等。
  7. 按照权利要求2所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述二维光子晶体为(2k+1)×(2k+1)结构，其中k为大于等于3的正整数。
  8. 按照权利要求2所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述二维光子晶体的高折射率介质柱的横截面为圆形、椭圆形、三角形或者多边形。
  9. 按照权利要求2所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述二维光子晶体的背景填充材料为空气或者折射率小于1.4的低折射率介质。
  10. 按照权利要求2所述的光子晶体全光多步延迟自与变换逻辑门，其特征在于：所述交叉波导中的准一维光子晶体中的介质柱的折射率为3.4或者大于2的值，且所述准一维光子晶体中的介质柱的横截面形状为矩形、多边形、圆形或者椭圆形。
PCT/CN2015/097851 2014-12-19 2015-12-18 光子晶体全光多步延迟自与变换逻辑门 WO2016095852A1 (zh)

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