WO2016090839A1 - 倒装高压发光器件及其制作方法 - Google Patents

倒装高压发光器件及其制作方法 Download PDF

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WO2016090839A1
WO2016090839A1 PCT/CN2015/078570 CN2015078570W WO2016090839A1 WO 2016090839 A1 WO2016090839 A1 WO 2016090839A1 CN 2015078570 W CN2015078570 W CN 2015078570W WO 2016090839 A1 WO2016090839 A1 WO 2016090839A1
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light
type semiconductor
layer
light emitting
emitting
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PCT/CN2015/078570
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English (en)
French (fr)
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钟志白
江彦志
方秋艳
李佳恩
徐宸科
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厦门市三安光电科技有限公司
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Publication of WO2016090839A1 publication Critical patent/WO2016090839A1/zh
Priority to US15/418,774 priority Critical patent/US10014460B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
    • H01L33/502—Wavelength conversion materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0025—Processes relating to coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0075—Processes relating to semiconductor body packages relating to heat extraction or cooling elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements

Definitions

  • the invention relates to a semiconductor light emitting device structure and a manufacturing method thereof, and more particularly to a flip-chip high voltage thin film light emitting device and a manufacturing method thereof.
  • LED Light Emitting Diode
  • the thermal conductivity of the substrate is relatively low, so that the temperature of the PN junction of the laterally structured LED is relatively high.
  • the flip chip soldering structure of the chip has been proposed, and the luminous efficiency and the heat dissipation effect have been improved.
  • the substrate of the flip chip structure chip is further peeled off to form a flip chip chip.
  • the invention aims to propose a light emitting device combined with a high voltage chip and a flip chip chip and a manufacturing method thereof.
  • a flip-chip high-voltage light-emitting device includes: a light-emitting module comprising a plurality of flip-chip light-emitting units connected in series, having opposite first and second surfaces, each of the flip-chip light-emitting units Each having a gap, each of the light-emitting units includes an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer; a light-converting layer is formed on the first surface of the light-emitting module and covers a side surface of each of the light-emitting units; An insulating layer is formed on the second surface of the light emitting module, covering the second surface of the entire light emitting module, exposing only the n-type semiconductor layer and the last light of the first light emitting unit of the light emitting module a p-type semiconductor layer of the unit; the first and second supporting electrodes are formed on the insulating layer, and the two are electrically isolated from each other, wherein the first
  • the flip-chip high voltage light emitting device further includes a metal reflective layer formed between the insulating layer and the first and second support electrodes, which is divided into first and second portions, wherein One portion is connected to the first supporting electrode, the second portion is connected to the second supporting electrode, and the first and second portions are respectively provided with electrode connecting regions at the ends, and the insulating layer does not cover the surface of the electrode connecting region.
  • a bridge metal layer formed between the second surface of the light emitting module and the insulating layer is further included for connecting the respective flip-chip lighting units in series.
  • the bridging metal layer is a reflective material.
  • the light conversion layer fills a gap between the respective flip-chip light emitting units and directly overlies the bridge metal layer.
  • the first and second support electrodes are made of a metal material having excellent heat dissipation properties.
  • the first and second support electrodes are of a multi-layered structure comprising a reflective layer.
  • a method of fabricating a flip-chip high voltage light emitting device comprising the steps of: 1) providing a light emitting epitaxial structure having opposing first and second surfaces, comprising an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer, wherein a surface of one side of the n-type semiconductor layer is a first surface, a surface of one side of the p-type semiconductor layer is a second surface; 2) etching a portion of the p-type semiconductor layer and the light-emitting layer of the light-emitting epitaxial structure to expose n a partial surface of the semiconductor layer, thereby dividing the p-type semiconductor layer and the light-emitting layer of the light-emitting epitaxial structure into a series of cells; 3) connecting the p-type semiconductor layers of the respective cells to the adjacent n-type semiconductor layers, thereby The illuminating epitaxial structure forms a parallel electrical structure; 4) forming
  • the n-type semiconductor layer of the entire surface is used as a parallel structure, and the support, the epitaxial growth substrate peeling, the roughening of the n-type semiconductor layer, and the like are assisted, and the n-type semiconductor layer is post-etched to form a series structure.
  • a bridging metal layer is formed in the step 3), and the p-type semiconductor layers of the respective units are respectively connected to the adjacent n-type semiconductor layers. More preferably, the light conversion layer formed in step 7) is directly overlaid on the bridge metal layer.
  • a metal reflective layer is formed on the surface of the insulating layer, and the first and second supporting electrodes are formed on the surface of the metal reflective layer, wherein the metal The reflective layer is electrically isolated from each other The first portion and the second portion, wherein the first portion is electrically connected to the n-type semiconductor layer at the leading end of the light-emitting epitaxial structure, and the second portion is electrically connected to the p-type semiconductor layer at the end of the light-emitting epitaxial structure.
  • Figure 1 is a side cross-sectional view showing a flip-chip high voltage light emitting device according to a first preferred embodiment of the present invention.
  • FIG. 2 is a side cross-sectional view showing a flip-chip high voltage light emitting device according to a first preferred embodiment of the present invention.
  • 3 to 13 show a method of fabricating a flip-chip high voltage light emitting device in accordance with an embodiment of the present invention.
  • 100 sapphire substrate; 101: n-type semiconductor layer; 102: p-type semiconductor layer and luminescent layer; 103: transparent insulating material; 104: P electrode layer; 105: N electrode; 106: bridging metal layer; 107: transparent insulating Material; 108: reflective metal layer; 108a: first portion of the reflective metal layer; 108b: second portion of the reflective metal layer; 109a: first support electrode; 109b: second support electrode; 110: filler material; 111: gap; 112: fluorescent glue; 113: n electrode region; 114: separation region; 115 etching region.
  • FIG. 1 discloses a first preferred embodiment of the present invention.
  • a flip-chip high-voltage light-emitting device includes: a plurality of flip-chip light-emitting units (LED1, LED2, and LED3) connected in series with each other.
  • FIG. 1 shows only three light-emitting units for simplicity of illustration, and is specifically implemented.
  • the light-emitting module formed by selecting the number of the light-emitting units according to the actual application, the light-converting layer 112 formed on the upper surface of the light-emitting module, the transparent insulating layer 107 formed on the lower surface of the light-emitting module, and The first supporting electrode 109a and the second supporting electrode 109b formed on the transparent insulating layer 107.
  • each of the flip-chip light emitting units of the light emitting module has a gap 111 therebetween, and each of the light emitting units includes an n-type semiconductor layer 101, a light emitting layer, and a p-type semiconductor layer 102.
  • a p-electrode layer 104 is disposed on a surface of the p-type semiconductor layer 102 of each of the light-emitting units, and an n-electrode 105 is disposed on a surface of the n-type semiconductor layer 101 of the first light-emitting unit LED1 of the light-emitting module, and each of the light-emitting modules
  • the light emitting units are connected by a bridge metal layer 106, and the bridge metal layer 106 is located at the bottom of the gap 111; the p electrode layer 104, the n electrode 105 and the bridge metal layer 106 have good reflection characteristics, and the material thereof Ni/Ag/Ti/Pt is preferred, and it can also be made of any alloy including Cr, Al, Co, Cu, Sn, and Au.
  • the gap 111 of the light conversion layer 112 filling the respective light emitting units directly covers the bridge metal layer 106 and covers the side surfaces of the respective light emitting units, thereby forming a wrap shape in the epitaxial structure of the light emitting module.
  • the transparent insulating layer 107 covers the lower surface of the entire light emitting module, and only exposes the n electrode 105 of the first light emitting unit LED1 of the light emitting module and the p electrode layer 104 of the last light emitting unit LED3, and the first supporting electrode 109a and the first The n-electrode 105 of the light-emitting unit LED1 is connected, and the second support electrode 109b is connected to the p-electrode layer 104 of the last light-emitting unit LED3.
  • the first supporting electrode 109a and the second supporting electrode 109b are electrically isolated by a filling material 110.
  • the filling material 110 may be an organic photoresist, silicon dioxide, silicon nitride, SOG, organic resin, or insulating material.
  • An insulating material such as a sealant preferably has a height of not less than 95% of the height of the supporting electrode.
  • the light emitting unit of the light emitting module generates blue light and realizes white light through the light conversion layer. Since the sidewalls of the respective light emitting units are all wrapped by the light conversion layer 112, the blue side leakage can be avoided. Further, the p-electrode layer 104, the n-electrode 105, and the bridging metal layer 106 have good reflection characteristics, so that the light of each of the light-emitting units from the surface can be totally reflected.
  • Figure 2 discloses a second preferred embodiment of the invention.
  • the flip-chip high voltage light emitting device further includes a metal reflective layer 108 disposed between the transparent insulating layer 107 and the supporting electrode, and the metal reflective layer 108 covers the position of the partition 114 between the light emitting units.
  • the reflective layer 108 is divided into a first portion 108a and a second portion 108b, wherein the first portion 108a is connected to the first support electrode 109a, the second portion 108b is connected to the second support electrode 109b, and the first and second portions are respectively disposed at the ends
  • the electrode connection regions 108A, 108B, the insulating layer does not cover the electrode connection region surfaces 108A, 108B, the electrode connection region 108A of the first portion 108a is connected to the n electrode 105 of the first light emitting unit LED1, and the electrode connection region 108B of the second portion 108b is
  • the p-electrode layer 104 of the last light-emitting unit LED3 is connected.
  • the p-electrode layer 104 is mainly used as a current spreading layer, and may be formed without using a reflective material.
  • the transparent insulating layer 107 is a low refractive index material and the metal reflective layer 108. Forms an omnidirectional mirror.
  • 3 to 14 show a method of fabricating a flip-chip high voltage light emitting device according to an embodiment of the present invention, which will be described below with reference to the accompanying drawings.
  • a light-emitting epitaxial structure is provided, specifically including a sapphire substrate 100, an n-type semiconductor layer 101, a light-emitting layer, and a p-type semiconductor layer 102.
  • an etched region 115 is defined on the surface of the luminescent epitaxial structure, the etched region includes an n-electrode region 113 and a separation region 114, wherein the separation region 114 divides the entire luminescent epitaxial structure into a series of light-emitting units, LEDs, and n-electrode regions. 113 is adjacent to the partition 114.
  • the p-type semiconductor layer and the light-emitting layer 102 of the light-emitting epitaxial structure etched region 115 are etched to expose the surface of the n-type semiconductor layer 101. Referring to FIG. 5, the p-type semiconductor layer and the light-emitting layer 102 of the light-emitting epitaxial structure are divided into A series of units A.
  • a p-electrode layer 104 is formed on the surface of the p-type semiconductor layer of each cell A, a transparent insulating material 103 is overlaid on the surface of the exposed n-type semiconductor layer 101, and an n-electrode 105 and a bridge metal layer 106 are formed by opening.
  • each unit A of the entire luminescent epitaxial structure forms a parallel structure.
  • a transparent insulating layer 107 is covered on the surface of the entire light-emitting epitaxial structure to expose only a part of the surface of the n-electrode 105 at the leading end of the light-emitting epitaxial structure and a part of the surface of the terminal p-electrode layer 104a.
  • a metal reflective layer 108 is formed on the insulating layer.
  • the metal reflective layer 108 covers the position of the partition 114 between the light emitting units.
  • the metal reflective layer 108 is divided into first portions 108a and second electrically isolated from each other.
  • Portion 108b wherein the first portion 108a is coupled to the n-electrode 105 at the leading end of the light-emitting epitaxial structure, and the second portion 108b is coupled to the light-emitting epitaxial structure terminal p-electrode layer 104a.
  • a first supporting electrode 109a and a second supporting electrode 109b are formed on the metal reflective layer 108 by electroplating.
  • the electrode material is preferably Cu, having a thickness of 50 um to 500 um, and is filled in the middle of the first and second supporting electrodes.
  • the insulating material 110 wherein the first supporting electrode 109a is connected to the first portion 108a of the metal reflective layer, and the second supporting electrode 109b is connected to the second portion 108b of the metal reflective layer.
  • the sapphire substrate 100 is removed by laser lift-off and the surface is washed with hydrochloric acid.
  • the n-type semiconductor layer 101 of the light-emitting epitaxial structure isolation region 114 is etched from the back surface to expose the bottom transparent insulating material 103.
  • the entire light-emitting epitaxial structure is divided into a series of light-emitting units connected in series to form a light-emitting module. There is a gap 111 between each unit.
  • the n-type semiconductor surface of the entire light-emitting module is covered with a light-converting layer 112, which fills the gaps 111 between the respective cells and covers the side surfaces of the epitaxial structures of the respective light-emitting units.
  • a method of fabricating a high-voltage tandem chip is generally used.
  • the bridge metal layer is fabricated, only the n-type semiconductor layer is etched, the parallel structure is formed by the n-type semiconductor layer, and the entire n-type semiconductor layer is formed.
  • the material filling is completed under the support, thereby avoiding the breakage of the bridge metal layer due to stress release after the substrate is removed by laser stripping, and the n-type semiconductor layer of the separation region is removed after the substrate is removed to form a series structure, thereby avoiding deep well filling of the insulating material.
  • the problem and the risk of bridging the metal layer are easy to break.
  • FIG. 14 to FIG. 15 illustrate a method of fabricating a flip-chip high-voltage light-emitting device according to an embodiment of the present invention.
  • the structure shown in FIG. 12 is formed according to the foregoing method, and then the transparent insulating material 103 of the partition region 114 is further etched, and the bridge is exposed.
  • the metal layer 106 forms a deeper structure groove, and its structural diagram is as shown in FIG.
  • the n-type semiconductor surface of the entire light-emitting module is covered with a light-converting layer 112 which fills the gaps 111 between the respective cells and covers the side surfaces of the epitaxial structures of the respective light-emitting cells.
  • the insulating material of the partition region 114 is removed to expose the bridge metal layer, thereby improving the reflectance and increasing the light extraction efficiency.
  • the bottom formed by laser stripping is a planar structure.
  • the tandem chip is formed by dry etching after the laser stripping, and after the phosphor layer is filled and filled, the chip is epitaxially packaged. In the form of a white light chip at the chip level, the risk of side leakage of blue light is avoided.

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Abstract

一种倒装高压发光器件及其制作方法，其中器件包括：由多个相互串联的倒装发光单元构成的发光模组，具有相对的第一表面和第二表面，各个倒装发光单元之间具有间隙（111），每个发光单元包含n型半导体层(101)、发光层和p型半导体层(102)；光转换层(112)，形成于发光模组的第一表面上，并覆盖各个发光单元的侧表面；绝缘层(107)，形成于发光模组的第二表面上，其覆盖整个发光模组的第二表面，仅露出发光模组的首个发光单元的n型半导体层(101)和最后一个发光单元的p型半导体层(102)；第一、第二支撑电极(109a、109b)，形成于绝缘层（107）上，两者相互电性隔离，其中第一支撑电极（109a）与发光模组的首个发光单元的n型半导体层(101)形成电性连接，第二支撑电极(109b)与发光模组的最后一个发光单元的p型半导体层(102)形成电性连接。

Description

倒装高压发光器件及其制作方法
本申请要求于2014年12月08日提交中国专利局、申请号为201410735775.3、发明名称为“倒装高压发光器件及其制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及一种半导体发光器件结构及其制作方法，更具体地为一种倒装高压薄膜发光器件及其制作方法。
背景技术
发光二极管(英文为Light Emitting Diode，简称LED)在日常生活中被广泛的应用，与传统光源相比，LED具有寿命长，光效高，能耗低，体积小等优良特性，是现代照明发展的一个重要趋势。
对于采用蓝宝石等绝缘衬底的LED芯片来讲，其衬底的导热率比较低，因此横向结构的LED的PN结的温度比较高。为了解决散热的问题，芯片的倒装焊结构被提出，发光效率和散热效果都有了改进。为了进一步解决光取出问题，倒装焊结构芯片的衬底进一步被剥离掉形成倒装薄膜芯片。随着应用的开发，为了提高芯片的光电转化效率，高压芯片结构与倒装薄膜芯片的结合将成为另一个新的开发应用。
发明内容
本发明旨在提出一种结合高压芯片与倒装薄膜芯片结合的发光器件以及其制作方法。
根据本发明的第一个方面，倒装高压发光器件，包括：由多个相互串联的倒装发光单元构成的发光模组，具有相对的第一表面和第二表面，各个倒装发光单元之间具有间隙，每个发光单元包含n型半导体层、发光层和p型半导体层；光转换层，形成于所述发光模组的第一表面上，并覆盖所述各个发光单元的侧表面；绝缘层，形成于所述发光模组的第二表面上，其覆盖所述整个发光模组的第二表面，仅露出所述发光模组的首个发光单元的n型半导体层和最后一个发光单元的p型半导体层；第一、第二支撑电极，形成于所述绝缘层上，两者相互电性隔离，其中第一支撑电极与所述发光模组的首个发光单元的n型半导体层形成电性连接，第二支撑电极与所述发光模组的最后一个发光单元的p型半导体层形成电性连接。
在一些实施例中，所述倒装高压发光器件还包括形成于所述绝缘层与所述第一、第二支撑电极之间的金属反射层，其分为第一、第二部分，其中第一部分与所述第一支撑电极连接，第二部分与第二支撑电极连接，所述第一、第二部分分别在端部设置电极连接区，所述绝缘层未覆盖所述电极连接区表面。
在一些实施例中，还包括形成于所述发光模组的第二表面与所述绝缘层之间的桥接金属层，用于串联各个倒装发光单元。在一些较佳实施实施例中，所述桥接金属层为反射性材料。在一些更佳实施例中，所述光转换层填充所述各个倒装发光单元之间的间隙并直接覆盖在所述桥接金属层上。
在一些实施例中，所述第一、第二支撑电极采用散热性优良的金属材料。
在一些实施例中，所述第一、第二支撑电极为多层结构，包含一反射层。
根据本发明的第二个方面，倒装高压发光器件的制作方法，包括步骤：1)提供一发光外延结构，具有相对的第一表面和第二表面，依次包含n型半导体层、发光层和p型半导体层，其中n型半导体层一侧表面为第一表面，p型半导体层一侧表面为第二表面；2)蚀刻所述发光外延结构的部分p型半导体层和发光层，露出n型半导体层的部分表面，从而将所述发光外延结构的p型半导体层和发光层划分为一系列单元；3)将前述各个单元的p型半导体层分别与邻近的n型半导体层连接，从而所述发光外延结构形成并联电性结构；4)制作绝缘层，其覆盖所述发光外延结构的第二表面，仅露出所述发光外延结构首端的n型半导体层和末端的p型半导体层；5)在所述绝缘层上制作相互电性隔离的第一、第二支撑电极，其中第一支撑电极与所述发光外延结构首端的n型半导体层形成电性连接，第二去支撑电极与所述发光外延结构末端的p型半导体层形成电性连接；6)蚀刻所述发光外延结构的n型半导体层，从而将所述发光外延结构划分为一系列串联的发光单元，构成发光模组；7)所述发光外延结构的第一表面上制作光转换层，其覆盖所述各个发光单元的侧表面。
在本制作方法中，先采用整面n型半导体层作并联结构，并可辅助作为支撑、外延生长衬底剥离、n型半导体层的粗化等，后蚀刻n型半导体层形成串联结构。
在一些实施例中，所述步骤3)中制作一桥接金属层，将各个单元的p型半导体层分别与邻近的n型半导体层连接。更佳的，在步骤7)形成的光转换层直接覆盖在所述桥接金属层上。
在一些实施例中，步骤4)完成后，先在所述绝缘层的表面上制作一金属反射层，再在该金属反射层表面上制作所述第一、第二支撑电极，其中所述金属反射层分为相互电性隔离 的第一、第二部分，其中第一部分与所述发光外延结构首端的n型半导体层形成电性连接，第二部分与所述发光外延结构末端的p型半导体层形成电性连接。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。
附图说明
图1为本发明第一个较佳实施例之一种倒装高压发光器件的侧面剖视图。
图2为本发明第一个较佳实施例之一种倒装高压发光器件的侧面剖视图。
图3～13显示了根据本发明实施的一种倒装高压发光器件的制作方法。
图14～15显示了根据本发明实施的一种倒装高压发光器件的制作方法。
图中各标号表示：
100：蓝宝石衬底；101：n型半导体层；102：p型半导体层和发光层；103：透明绝缘材料；104：P电极层；105：N电极；106：桥接金属层；107：透明绝缘材料；108：反射金属层；108a：反射金属层的第一部分；108b：反射金属层的第二部分；109a：第一支撑电极；109b：第二支撑电极；110：填充材料；111：间隙；112：荧光胶；113：n电极区；114：分隔区；115蚀刻区。
具体实施方式
下面将结合实施例和附图对本发明的具体实施作详细说明。
附图1公开了本发明的第一个较佳实施例。请参看附图1，一种倒装高压发光器件，包括：由多个相互串联的倒装发光单元(LED1、LED2、LED3，图1为了简化图示仅示意了三个发光单元，在具体实施中，可根据实际应用选择发光单元的个数)构成的发光模组、形成于该发光模组上表面上的光转换层112，形成于所述发光模组下表面上的透明绝缘层107以及形成于透明绝缘层107上的第一支撑电极109a和第二支撑电极109b。
具体地，发光模组的各个倒装发光单元之间具有间隙111，每个发光单元包含n型半导体层101、发光层和p型半导体层102。在各个发光单元的p型半导体层102的表面上设有p电极层104，在发光模组的第一个发光单元LED1的n型半导体层101表面设有n电极105，该发光模组的各个发光单元之间通过桥接金属层106连接，桥接金属层106位于间隙111的底部；该p电极层104、n电极105和桥接金属层106具有良好的反射特性，其材料 首选Ni/Ag/Ti/Pt，也可以为包括Cr、Al、Co、Cu、Sn、Au在内的任何一种合金制成。光转换层112填充各个发光单元的间隙111直接覆盖在桥接金属层106上，并覆盖所述各个发光单元的侧表面，从而在发光模组的外延结构形成包裹状。透明绝缘层107覆盖所述整个发光模组的下表面，仅露出发光模组的首个发光单元LED1的n电极105和最后一个发光单元LED3的p电极层104，第一支撑电极109a与首个发光单元LED1的n电极105连接，第二支撑电极109b与最后一个发光单元LED3的p电极层104连接。第一支撑电极109a与第二支撑电极109b之间通过填充材料110保证电性隔离，该填充材料110可选用有机光刻胶、二氧化硅、氮化硅、SOG、有机树酯类材料、绝缘密封胶等绝缘材料，其高度以不低于支撑电极高度的95％为佳。
在本实施例中，发光模组的发光单元产生蓝光，并通过光转换层实现白光，由于各个发光单元的侧壁均由光转长层112包裹，可避免蓝光侧漏。进一步地，p电极层104、n电极105和桥接金属层106具有良好的反射特性，因此可全面反射各个发光单元射下表面的光线。
附图2公开了本发明的第二个较佳实施例。请参看附图2，该倒装高压发光器件还包括设置在透明绝缘层107与支撑电极之间的金属反射层108，金属反射层108覆盖到发光单元之间的分隔区114的位置，该金属反射层108分为第一部分108a和第二部分108b，其中第一部分108a与第一支撑电极109a连接，第二部分108b与第二支撑电极109b连接，且第一、第二部分分别在端部设置电极连接区108A、108B，绝缘层未覆盖该电极连接区表面108A、108B，第一部分108a的电极连接区108A与首个发光单元LED1的n电极105连接，第二部分108b的电极连接区108B与最后一个发光单元LED3的p电极层104连接，在本实施例中，p电极层104主要作为电流扩展层，可不采用反射性材料构成，透明绝缘层107为低折射率材料，与金属反射层108构成全方位反射镜。
图3～14显示了根据本发明实施的一种倒装高压发光器件的制作方法，下面结合附图进行说明。
请参看图3，提供发光外延结构，具体包括蓝宝石衬底100、n型半导体层101、发光层和p型半导体层102。
请参看图4，在发光外延结构的表面上定义蚀刻区115，该蚀刻区包括n电极区113和分隔区114，其中分隔区114将整个发光外延结构划分为一系列发光单元LED，n电极区113紧邻分隔区114。蚀刻该发光外延结构蚀刻区115的p型半导体层和发光层102，露出n型半导体层101的表面。请参看图5，该发光外延结构的p型半导体层和发光层102划分为 一系列单元A。
请参看图6，在各个单元A的p型半导体层表面上制作p电极层104，在露出的n型半导体层101表面上覆盖透明绝缘材料103，并开孔制作n电极105和桥接金属层106，至此整个发光外延结构的各个单元A形成一个并联结构。
请参看图7，在整个发光外延结构的表面上覆盖透明绝缘层107，仅露出发光外延结构首端的n电极105的部分表面和末端p电极层104a的部分表面。
请参看图8，在绝缘层上制作金属反射层108，金属反射层108覆盖到发光单元之间的分隔区114的位置，该金属反射层108分为相互电性隔离的第一部分108a和第二部分108b，其中第一部分108a与发光外延结构首端的n电极105连接，第二部分108b与发光外延结构末端p电极层104a连接。
请参看图9，采用电镀的方式在金属反射层108上制作第一支撑电极109a和第二支撑电极109b，电极材料首选Cu，厚度为50um～500um，并在第一、第二支撑电极中间填充绝缘材料110，其中第一支撑电极109a与金属反射层的第一部分108a连接，第二支撑电极109b与金属反射层的第二部分108b连接。
请参看图10，利用激光剥离去除蓝宝石衬底100，并用盐酸清洗表面。
请参看图11和12，从背面蚀刻发光外延结构分隔区114的n型半导体层101，露出底部的透明绝缘材料103，至此整个发光外延结构被划分为一系列串联的发光单元，构成发光模组，各个单元之间具有间隙111。
请参看图13，在整个发光模组的n型半导体表面是覆盖一层光转换层112，该光转换层填充各个单元之间的间隙111，并覆盖各个发光单元的外延结构的侧表面。
对比已知的倒装高压发光器件一般采用先制作高压串联芯片的方法，本发明制作桥接金属层时只蚀刻至n型半导体层，通过n型半导体层形成并联结构，同时在整个n型半导体层支撑下完成材料填充，从而避免采用激光剥离生长衬底后因应力释放导致桥接金属层的断裂，待衬底移除后再去除分隔区的n型半导体层形成串联结构，避免深井填充绝缘材料的问题以及桥接金属层容易断裂等风险。
图14～图15为根据本发明实施的另一种倒装高压发光器件的制作方法，首先依照前述方式方法形成图12所示结构，接着进一步蚀刻分隔区114的透明绝缘材料103，并露出桥接金属层106，形成更深结构的凹槽，其结构图如图14所示。
参看图15，在整个发光模组的n型半导体表面是覆盖一层光转换层112，该光转换层填充各个单元之间的间隙111，并覆盖各个发光单元的外延结构的侧表面。
在本实施例中，将分隔区114的绝缘材料去除，露出桥接金属层，提高反射率，增加光取出效率。对比已知倒装高压薄膜芯片，激光剥离后形成的底部是平面结构，本实施例激光剥离后利用干蚀刻制作串联芯片后会形成凹槽结构，将荧光层覆盖填充后，对芯片外延形成包裹状，在芯片级即形成白光芯片，避免侧漏蓝光的风险。

Claims (10)

  1. 倒装高压发光器件，包括：
    由多个相互串联的倒装发光单元构成的发光模组，具有相对的第一表面和第二表面，各个倒装发光单元之间具有间隙，每个发光单元包含n型半导体层、发光层和p型半导体层；
    光转换层，形成于所述发光模组的第一表面上，并覆盖所述各个发光单元的侧表面；
    绝缘层，形成于所述发光模组的第二表面上，其覆盖所述整个发光模组的第二表面，仅露出所述发光模组的首个发光单元的n型半导体层和最后一个发光单元的p型半导体层；
    第一、第二支撑电极，形成于所述绝缘层上，两者相互电性隔离，其中第一支撑电极与所述发光模组的首个发光单元的n型半导体层形成电性连接，第二支撑电极与所述发光模组的最后一个发光单元的p型半导体层形成电性连接。
  2. 根据权利要求1所述的倒装高压发光器件，其特征在于：还包括形成于所述绝缘层与所述第一、第二支撑电极之间的金属反射层，金属反射层覆盖住发光单元之间的间隙位置，其分为第一、第二部分，其中第一部分与所述第一支撑电极连接，第二部分与第二支撑电极连接，所述第一、第二部分分别在端部设置电极连接区，所述绝缘层未覆盖所述电极连接区表面。
  3. 根据权利要求1所述的倒装高压发光器件，其特征在于：还包括形成于所述发光模组的第二表面与所述绝缘层之间的桥接金属层，用于串联各个倒装发光单元。
  4. 根据权利要求1所述的倒装高压发光器件，其特征在于：所述桥接金属层为反射性材料。
  5. 根据权利要求3所述的倒装高压发光器件，其特征在于：所述光转换层填充所述各个倒装发光单元之间的间隙并直接覆盖在所述桥接金属层上。
  6. 倒装高压发光器件的制作方法，包括步骤：
    1)提供一发光外延结构，具有相对的第一表面和第二表面，依次包含n型半导体层、发光层和p型半导体层，其中n型半导体层一侧表面为第一表面，p型半导体层一侧表面为第二表面；
    2)蚀刻所述发光外延结构的部分p型半导体层和发光层，露出n型半导体层的部分表面， 从而将所述发光外延结构的p型半导体层和发光层划分为一系列单元；
    3)将前述各个单元的p型半导体层分别与邻近的n型半导体层连接，从而所述发光外延结构形成并联电性结构；
    4)制作绝缘层，其覆盖所述发光外延结构的第二表面，仅露出所述发光外延结构首端的n型半导体层和末端的p型半导体层；
    5)在所述绝缘层上制作相互电性隔离的第一、第二支撑电极，其中第一支撑电极与所述发光外延结构首端的n型半导体层形成电性连接，第二去支撑电极与所述发光外延结构末端的p型半导体层形成电性连接；
    6)蚀刻所述发光外延结构的部分n型半导体层，从而将所述发光外延结构划分为一系列串联的发光单元，构成发光模组；
    7)所述发光外延结构的第一表面上制作光转换层，其覆盖所述各个发光单元的侧表面。
  7. 根据权利要求6所述的倒装高压发光器件的制作方法，其特征在于：先采用整面n型半导体层作并联结构。
  8. 根据权利要求6所述的倒装高压发光器件的制作方法，其特征在于：步骤3)中制作一桥接金属层，将各个单元的p型半导体层分别与邻近的n型半导体层连接。
  9. 根据权利要求8所述的倒装高压发光器件的制作方法，其特征在于：步骤7)形成的光转换层直接覆盖在所述桥接金属层上。
  10. 根据权利要求6所述的倒装高压发光器件的制作方法，其特征在于：在步骤4)完成后，先在所述绝缘层的表面上制作一金属反射层，再在该金属反射层上制作第一支撑电极和第二支撑电极，其中所述金属反射层分为相互电性隔离的第一、第二部分，其中第一部分与所述发光外延结构首端的n型半导体层形成电性连接，第二部分与所述发光外延结构末端的p型半导体层形成电性连接。
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