WO2016068127A1 - 異方導電性フィルム及び接続構造体 - Google Patents

異方導電性フィルム及び接続構造体 Download PDF

Info

Publication number
WO2016068127A1
WO2016068127A1 PCT/JP2015/080233 JP2015080233W WO2016068127A1 WO 2016068127 A1 WO2016068127 A1 WO 2016068127A1 JP 2015080233 W JP2015080233 W JP 2015080233W WO 2016068127 A1 WO2016068127 A1 WO 2016068127A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductive particles
conductive
anisotropic
conductive film
anisotropic conductive
Prior art date
Application number
PCT/JP2015/080233
Other languages
English (en)
French (fr)
Inventor
恭志 阿久津
Original Assignee
デクセリアルズ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by デクセリアルズ株式会社 filed Critical デクセリアルズ株式会社
Priority to US15/521,189 priority Critical patent/US20170352636A1/en
Priority to CN201580055238.7A priority patent/CN106797080B/zh
Priority to KR1020177004491A priority patent/KR20170033378A/ko
Publication of WO2016068127A1 publication Critical patent/WO2016068127A1/ja

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B5/00Non-insulated conductors or conductive bodies characterised by their form
    • H01B5/16Non-insulated conductors or conductive bodies characterised by their form comprising conductive material in insulating or poorly conductive material, e.g. conductive rubber
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/12Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R11/00Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts
    • H01R11/01Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts characterised by the form or arrangement of the conductive interconnection between the connecting locations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/20Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/202Conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20Conductive material dispersed in non-conductive organic material
    • H01B1/22Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29387Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29499Shape or distribution of the fillers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02Contact members
    • H01R13/22Contacts for co-operating by abutting
    • H01R13/24Contacts for co-operating by abutting resilient; resiliently-mounted
    • H01R13/2407Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means
    • H01R13/2414Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means conductive elastomers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0277Bendability or stretchability details
    • H05K1/028Bending or folding regions of flexible printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0215Metallic fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0263Details about a collection of particles
    • H05K2201/0266Size distribution
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/041Stacked PCBs, i.e. having neither an empty space nor mounted components in between

Definitions

  • the present invention relates to an anisotropic conductive film, a connection method using the anisotropic conductive film, and a connection structure connected by the anisotropic conductive film.
  • Anisotropic conductive films are widely used when electronic parts such as IC chips are mounted on a substrate.
  • electronic parts such as IC chips are mounted on a substrate.
  • insulating adhesives for anisotropic conductive films are used.
  • a technique is known in which conductive particles are evenly arranged in a lattice pattern in a layer.
  • the first arrangement direction of the conductive particles is the longitudinal direction of the anisotropic conductive film
  • the second arrangement direction intersecting the first arrangement direction is the longitudinal direction of the anisotropic conductive film. It has been proposed to incline at an angle of 5 ° or more and 15 ° or less with respect to an orthogonal direction (Patent Document 1).
  • the bump size of the electronic component connected by the anisotropic conductive film is further reduced, the number of conductive particles that can be captured by the bump is further reduced.
  • the anisotropic conductive film described in Patent Document 1 has sufficient conduction reliability. In some cases, it was not possible to obtain.
  • COG Chip on ⁇ ⁇ Glass
  • the bump size is increased due to the increase in the number of terminals and the miniaturization of the IC chip due to the higher definition of the liquid crystal screen.
  • connection terminal becomes a fine pitch.
  • FOG Flexible on Glass
  • this invention makes it a subject to obtain stable conduction
  • the present inventor uses the anisotropic conductive film in which the conductive particles are arranged in a lattice shape as a reference for arranging the conductive particles at a high density and preventing short-circuiting during anisotropic conductive connection.
  • Arbitrary conductive particles hereinafter referred to as reference conductive particles
  • the present invention is an anisotropic conductive film comprising an insulating adhesive layer and conductive particles arranged in a lattice pattern on the insulating adhesive layer, Reference conductive particles; First conductive particles closest to the reference conductive particles; For the second conductive particles that are the same as or close to the reference conductive particles next to the first conductive particles and are not on the lattice axis including the reference conductive particles and the first conductive particles, The projected image in the longitudinal direction of the anisotropic conductive film of the reference conductive particles overlaps with the first conductive particles or the second conductive particles, The projected image in the short direction of the anisotropic conductive film of the reference conductive particles overlaps with the second conductive particles or the first conductive particles, The maximum width in the short direction of the anisotropic conductive film in the overlapping region of the anisotropic conductive film of the reference conductive particles in the longitudinal direction and the first conductive particles or the second conductive particles (hereinafter referred to as anisotropic conductivity).
  • the width of the adjacent conductive particles in the longitudinal direction of the film) and the projected image of the anisotropic conductive film in the short direction of the reference conductive particles and the anisotropic region of the overlapping region of the second conductive particles or the first conductive particles At least one of the maximum width in the longitudinal direction of the conductive film (hereinafter referred to as the overlapping width of the conductive particles adjacent in the short direction of the anisotropic conductive film) is less than 1 times the particle diameter of the conductive particles.
  • the present invention also provides a connection structure in which the first electronic component and the second electronic component are anisotropically conductively connected with the anisotropic conductive film described above.
  • conductive particles can be reliably supplemented to the terminals even when the area of the anisotropic conductive connection is small by arranging the conductive particles in the insulating adhesive layer at a high density. And even if the terminal is formed in fine pitch, it can suppress that a short circuit generate
  • FIG. 1 is an arrangement view of conductive particles in the anisotropic conductive film 1A of the example.
  • FIG. 2 is a layout diagram of conductive particles in the anisotropic conductive film 1B of the example.
  • FIG. 3 is an arrangement view of conductive particles in the anisotropic conductive film 1C of the example.
  • FIG. 4 is a layout diagram of conductive particles in the anisotropic conductive film 1D of the example.
  • FIG. 5 is an arrangement view of conductive particles in the anisotropic conductive film 1x of the comparative example.
  • FIG. 6 is an arrangement view of conductive particles in the anisotropic conductive film 1y of the comparative example.
  • FIG. 1 is an arrangement view of conductive particles P in an anisotropic conductive film 1A according to an embodiment of the present invention.
  • This anisotropic conductive film 1 ⁇ / b> A has an insulating adhesive layer 10 and conductive particles P fixed to the insulating adhesive layer 10 in a grid-like arrangement.
  • the conductive particles P are arranged in a square lattice or a rectangular lattice in the insulating adhesive layer 10, and the reference conductive particles P0 and the first conductive particles P1 closest to the reference conductive particles P0 and (Hereinafter referred to as the first array axis A1) is inclined with respect to the longitudinal direction F1 and the lateral direction F2 of the anisotropic conductive film 1A.
  • the center-to-center distance between the reference conductive particle P0 and the first conductive particle P1 is L1.
  • the second conductive particle P2 and the reference conductive particle P0 which are equal to the first conductive particle P1 or close to the reference conductive particle P0 next to the first conductive particle P1, and which are not on the first array axis A1.
  • a lattice axis (hereinafter, referred to as a second array axis A2) is also inclined with respect to the longitudinal direction F1 and the short direction F2 of the anisotropic conductive film 1A.
  • L2 the center-to-center distance between the reference conductive particle P0 and the second conductive particle P2 ⁇ L1.
  • the center-to-center distance L1 between the reference conductive particle P0 and the first conductive particle P1 and the center-to-center distance L2 between the reference conductive particle P0 and the second conductive particle P2 are the FOG connection, COG connection, etc. to which the anisotropic conductive film is applied.
  • it is 1.5 to 2000 times the particle diameter D of the conductive particles P, but preferably 2.5 to 1000 times, more preferably 3 times in the case of FOG connection. 700 times, particularly preferably more than 5 times and less than 400 times.
  • COG connection it is preferably 1.5 to 5 times, more preferably 1.8 to 4.5 times, and particularly preferably 2 to 4 times.
  • the conductive particles P are arranged at such a high density, the conductive particles P are reliably captured by the terminals even if the area of the terminals to be anisotropically connected using the anisotropic conductive film 1A is small. , Conduction reliability can be obtained. On the other hand, if the center-to-center distances L1 and L2 are too short, short-circuiting is likely to occur when the terminals are connected using an anisotropic conductive film. It becomes insufficient.
  • the projection image q1 of the anisotropic conductive film in the longitudinal direction of the reference conductive particle P0 that is, the reference conductive particle P0 is projected with parallel light in the longitudinal direction F1 of the anisotropic conductive film 1A. Image
  • the first conductive particle P1 overlap, and the projected image q2 of the anisotropic conductive film of the reference conductive particle P0 in the short direction F2 (that is, the reference conductive particle P0 is converted into the anisotropic conductive film 1A).
  • the second conductive particles P2 are overlapped with each other).
  • the second conductive particle P2 are each greater than 0 times and less than 1 time, preferably less than 0.5 times the particle diameter D of the conductive particles P.
  • the particle diameter D of the conductive particles P is the average particle diameter of the conductive particles used in the anisotropic conductive film.
  • the particle diameter D of the conductive particles P is preferably 1 to 30 ⁇ m, more preferably 2 to 15 ⁇ m, from the viewpoint of prevention of short circuit and the stability of the connection between terminals to be connected.
  • the particle diameter D of the conductive particles and the range of the distance between the particle centers are closely related.
  • the connection region length is usually 2 mm, and the particle diameter on one array axis.
  • the upper limit of the distance between the particle centers can be calculated as 1998 times the particle diameter (in this case, the array axis adjacent to this array axis) And the distance to is sufficiently short).
  • the upper limit of the distance between the particle centers can be calculated as 998 times the particle diameter and 663.7 ⁇ m, respectively (3 conductive particles of 1 ⁇ m exist within 2 mm) It is also a range that can be included).
  • the conductive particle diameter has a margin of 0.5 times and can exist inside the end of the wiring, the upper limit of the distance between the particle centers can be calculated to be less than 398 times the particle diameter.
  • the lower limit of the distance between the particle centers corresponds to an interval that can be arranged with a margin when the particle diameter D of the conductive particles is 30 ⁇ m.
  • the overlapping width W1 between the reference conductive particles P0 and the first conductive particles P1 adjacent in the longitudinal direction F1 and the short direction F2 of the anisotropic conductive film 1A are adjacent.
  • the overlapping width W2 of the reference conductive particle P0 and the second conductive particle P2 to be performed is both less than 1 times the particle diameter D of the conductive particle P.
  • at least one of these overlapping widths W1 and W2 is used. May be less than 1 times the particle diameter D of the conductive particles P.
  • the overlapping widths W1 and W2 of both are not equal to the particle diameter D of the conductive particles P at the same time.
  • the projected image q1 of the reference conductive particle P0 and the first conductive particle P1 or the second conductive particle P2 just overlap, and the projected image q2 of the reference conductive particle P0 and the second conductive particle P2 or the first conductive particle P1 Just don't overlap.
  • an alignment axis is formed in accordance with the original design by drawing a straight line (auxiliary line) of the long and short sides of the film or a skew angle designed in advance on the surface field image at an arbitrary location. Can be easily confirmed.
  • the effect of suppressing the occurrence of this short circuit is obtained by the following mechanism of action of the conductive particles P and the insulating adhesive layer 10. That is, when the anisotropic conductive film 1A is used to connect the connection terminals 3 of the electronic component anisotropically conductive, for example, as shown in FIG. 1, the longitudinal direction F1 of the anisotropic conductive film 1A and the connection terminals 3 are aligned and heated and pressed with a heating head covering the connection terminal 3, the insulating adhesive layer 10 is melted, the molten resin flows in the direction of the arrow X, and the connection terminal 3 is caused by the flow of the molten resin. The conductive particles P between them also move in the arrow X direction.
  • both the overlapping widths W1 and W2 are equal to the particle diameter D of the conductive particles P as in the anisotropic conductive film 1x of the comparative example shown in FIG.
  • the conductive particles P are arranged in a line both in the direction of the arrow X and in the direction orthogonal thereto, and the conductive particles P are easily connected by a plurality of three or more by the flow of the molten resin. For this reason, when connecting a fine pitch connection terminal, a short circuit is likely to occur.
  • this anisotropic conductive film 1A as shown in FIG. 1, the conductive particles P3, P1, P4 adjacent in the X direction are displaced in the longitudinal direction F1 of the anisotropic conductive film 1A.
  • the flow of the molten resin is disturbed, it is prevented that three or more conductive particles after flowing with the molten resin are connected, and even a fine pitch connection terminal can be connected without causing a short circuit. That is, it becomes possible to give a margin to the design of the melt viscosity of the film.
  • the melt viscosity is designed to be relatively high in order to suppress the flow of the conductive particles, there is a concern that the indentation may be hindered.
  • such a problem can be easily avoided by designing as described above.
  • it is easy to grasp the behavior of the fluid state at the stage of blending design it can contribute to the reduction of the design man-hour.
  • the minimum distance between adjacent terminals with a gap (this distance is within the range where anisotropic conductive connection is possible). (Which may be shifted in the parallel direction) can be less than 4 times the particle diameter D of the conductive particles. In this case, the width in the short direction of the connecting surface of the terminal to be connected can be less than 7 times the particle diameter D of the conductive particles.
  • the first conductive particles P1 closest to the reference conductive particles P0 are projected in the longitudinal direction F1 of the anisotropic conductive film of the reference conductive particles P0.
  • the conductive particles Px and Py which are not overlapped with the image q1 and do not overlap with the projected image q2 in the short direction F2 and are further away from the reference conductive particle P0 than the first conductive particle P1, are projected images q1, When q2 overlaps, the density of the conductive particles P becomes low, so that a short circuit hardly occurs.
  • connection terminals 3 are arranged in parallel, and the bonding of the anisotropic conductive film to the connection terminals is performed along the arrangement direction of the connection terminals 3. If the bonding is displaced or bent, the conductive particles P sparsely arranged on the connection terminal 3 are more difficult to be captured by the connection terminal.
  • anisotropic conductive film 1A of the present invention can improve conduction reliability.
  • the anisotropic conductive film of the present invention can take various forms with respect to the arrangement of the conductive particles.
  • the projection image q1 of the anisotropic conductive film 1A of the reference conductive particle P0 in the longitudinal direction F1 and the second conductive particle overlap, and the anisotropic conductive film of the reference conductive particle P0.
  • the projected image q2 in the short direction F2 of 1A may overlap the first conductive particles.
  • the arrangement of the conductive particles P in the above-described anisotropic conductive film 1A is an oblique lattice, and the anisotropic conductive film is adjacent in the short direction F2.
  • the overlapping width W2 between the reference conductive particles P0 and the second conductive particles P2 may be made equal to the particle diameter D of the conductive particles P.
  • the overlapping width W1 between the reference conductive particles P0 and the first conductive particles P1 adjacent in the longitudinal direction F1 of the anisotropic conductive film 1B is less than 1 times the particle diameter D of the conductive particles P, preferably 0. Less than 5 times.
  • the circumscribed line in the longitudinal direction F1 of the anisotropic conductive film of the reference conductive particle P0 does not overlap with that of the first conductive particle P1. That is, it is preferable that the outer tangent line in the longitudinal direction F1 of the anisotropic conductive film of the reference conductive particle P0 penetrates the first conductive particle P1.
  • the conductive particles P are arranged in an oblique lattice in the anisotropic conductive film 1A, and the reference conductive adjacent in the longitudinal direction F1 of the anisotropic conductive film is used.
  • the overlapping width W1 between the particles P0 and the first conductive particles P1 may be made equal to the particle diameter D of the conductive particles P.
  • the overlapping width W2 between the reference conductive particles P0 and the second conductive particles P2 adjacent in the short direction F2 of the anisotropic conductive film 1C is less than 1 times the particle diameter D of the conductive particles P, preferably 0. Less than 5 times.
  • the circumscribed line in the short direction F2 of the anisotropic conductive film of the reference conductive particle P0 does not overlap with that of the second conductive particle P2. That is, it is preferable that the outer tangent line in the short direction F2 of the anisotropic conductive film of the reference conductive particle P0 penetrates the second conductive particle P2.
  • the conductive particles P arranged in a line in the longitudinal direction F1 of the anisotropic conductive film and adjacent in the short direction F2 of the anisotropic conductive film are electrically conductive. If the particle P is shifted by an overlap width W2 that is less than 1 times the particle diameter D of the particle P, the conductive particle P is arranged to be inclined only in the X direction, which is the resin flow direction. It is possible to easily grasp the conductive particles moved and the conductive particles moved by the resin flow. Moreover, since the superposition of the conductive particles P in the flow direction becomes small, the occurrence of a short circuit can be particularly suppressed.
  • the degree of freedom in blending the insulating binder forming the insulating adhesive layer 10 can be increased. This makes it easier to prepare for changes in the production conditions and connection conditions of the directionally conductive film.
  • the arrangement of the conductive particles P in the anisotropic conductive film 1A described above may be an oblique lattice.
  • the density of the conductive particles P is preferably 400 to 250,000 / mm 2 , more preferably 800 to 200000 / mm 2 , and still more preferably 1200 to 100,000 / mm 2 .
  • This particle density is appropriately adjusted according to the particle diameter D and the arrangement position of the conductive particles P.
  • the configuration of the conductive particles P itself, the layer configuration of the insulating adhesive layer 10 or the constituent resin can take various forms.
  • the conductive particles P can be appropriately selected from those used in known anisotropic conductive films.
  • examples thereof include metal particles such as nickel, cobalt, silver, copper, gold, and palladium, and metal-coated resin particles. Two or more kinds can be used in combination.
  • an insulating resin layer used in a known anisotropic conductive film can be appropriately adopted.
  • a photo radical polymerization type resin layer containing an acrylate compound and a photo radical polymerization initiator a heat radical polymerization type resin layer containing an acrylate compound and a heat radical polymerization initiator, a heat containing an epoxy compound and a heat cationic polymerization initiator
  • a cationic polymerization type resin layer, a thermal anion polymerization type resin layer containing an epoxy compound and a thermal anion polymerization initiator, or the like can be used.
  • These resin layers can be polymerized in order to fix the conductive particles P to the insulating adhesive layer 10 as necessary.
  • the insulating adhesive layer 10 may be formed from a plurality of resin layers.
  • the insulating adhesive layer 10 may be mixed with an insulating filler such as silica as necessary.
  • a mold having a dent corresponding to the arrangement of the conductive particles P is manufactured by a known method such as machining, laser processing, or photolithography. Conductive particles are put into a mold, and an insulating adhesive layer forming composition is filled thereon, cured, and taken out of the mold. From such a mold, the mold may be made of a material having lower rigidity.
  • a member in which through holes are formed in a predetermined arrangement is provided on the insulating adhesive layer forming composition layer.
  • the conductive particles P may be supplied and passed through the through holes.
  • a connection terminal of a first electronic component such as a flexible substrate (FPC), a glass substrate, a plastic substrate (a substrate made of a thermoplastic resin such as PET), a ceramic substrate, and an IC chip
  • FPC flexible substrate
  • second electronic components such as an IC module and a flexible substrate (FPC)
  • FIG. 1 the longitudinal direction F1 of the anisotropic conductive film 1A and the second The short direction of the connection terminal 3 of the first electronic component or the second electronic component is aligned.
  • a glass substrate having a connection terminal formed of a transparent electrode is used, and as a second electronic component, an IC chip or the like is used to perform high density wiring COG connection. More specifically, when the size of the connection surface of these connection terminals is 8 to 60 ⁇ m in width and 400 ⁇ m or less in length (the lower limit is equal to the width), the conventional anisotropic conduction is performed. The number of conductive particles that can be captured by the connection terminal is stably increased as compared with the sexual connection, and the connection reliability can be improved.
  • the width of the connecting terminal surface in the short direction is smaller than this, poor connection occurs frequently, and if it is larger, it is difficult to cope with high-density mounting required for COG connection. Further, if the length of the connection terminal surface is shorter than this, it becomes difficult to achieve stable conduction, and if the length is longer than this, it becomes a factor of per contact.
  • the second electronic component is such that a short circuit with a distance between wirings of 40 ⁇ m or more is unlikely to occur, such as a flexible substrate (FPC), conductive particles having a relatively large diameter of 6 ⁇ m or more can be used.
  • the upper limit of the particle diameter depends on the space, but is preferably 30 ⁇ m or less, more preferably 15 ⁇ m or less, and even more preferably less than 15 ⁇ m).
  • the present invention also includes a connection structure of the first electronic component and the second electronic component thus anisotropically connected.
  • a mold having an arrangement pattern of convex portions is prepared in the arrangement shown in Table 1, and a well-known transparent resin pellet is poured into a molten state in a melted state, cooled and solidified, whereby the concave portions are formed in Table 1.
  • a resin mold having the arrangement shown in FIG. The resin-shaped recess is filled with conductive particles (Sekisui Chemical Co., Ltd., AUL704, particle size 4 ⁇ m), and the adhesive layer of the above-mentioned insulating resin is placed thereon, and is contained in the insulating resin by ultraviolet curing. The curable resin was cured. And insulating resin was peeled from the type
  • each IC for evaluation and the glass substrate correspond to their terminal patterns, and the sizes are as follows.
  • the anisotropic conductive film of each example and comparative example is sandwiched between an evaluation IC for short-circuit occurrence rate and a glass substrate having a pattern corresponding to the evaluation IC, and heated under the same connection conditions as in (a). Pressurized to obtain a connection object, and the occurrence rate of short circuit of the connection object was determined.
  • the short-circuit occurrence rate is calculated by “number of short-circuit occurrences / total number of 7.5 ⁇ m spaces”. A short-circuit occurrence rate of 50 ppm or more is not preferable from the viewpoint of manufacturing a practical connection structure.
  • connection object for evaluation of IC for evaluation of initial conduction resistance and anisotropic conductive film of each example and comparative example it is connected to a terminal among 100 adjacent connection terminals.
  • the anisotropic conductive films of Examples 1 to 3 and the conductive film of Comparative Example 1 both have high density of conductive particles, but the anisotropic conductive film of Comparative Example 1 has connected conductive particles. It can be seen that three conductive particle lumps are generated and a short circuit is likely to occur, whereas in the anisotropic conductive films of Examples 1 to 3, the conductive particle lumps are hardly generated and the terminals are not easily short-circuited.
  • Anisotropic conductive film 3 Terminal or connection terminal 10 Insulating adhesive layer A1 First array axis A2 Second array axis F1 Longitudinal direction of anisotropic conductive film F2 Short side of anisotropic conductive film Direction L1 Distance between centers of reference conductive particles and first conductive particles L2 Distance between centers of reference conductive particles and second conductive particles P conductive particles P0 reference conductive particles P1 first conductive particles P2 second conductive particles q1 reference conductive particles Q2 Projection image of anisotropic conductive film in the longitudinal direction q2 Projection image of anisotropic conductive film in the short direction of reference conductive particles W1 Overlapping width of conductive particles adjacent in the longitudinal direction of anisotropic conductive film W2 Anisotropic conductivity Width of conductive particles adjacent to each other in the short direction of conductive film

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Insulated Conductors (AREA)

Abstract

絶縁接着剤層(10)、該絶縁接着剤層に格子状に配置された導電粒子(P)を含む異方導電性フィルム(1A)であって、基準導電粒子(P0)と、基準導電粒子(P0)に最も近接した第1導電粒子(P1)と、第1導電粒子(P1)と同等又は第1導電粒子(P1)の次に基準導電粒子(P0)に近接した導電粒子であって、基準導電粒子(P0)と第1導電粒子(P1)を含む格子軸上に無い第2導電粒子(P2)について、基準導電粒子(P0)の異方導電性フィルムの長手方向の投影像(q1)と第1導電粒子(P1)又は第2導電粒子(P2)が重なり、基準導電粒子(P)の異方導電性フィルムの短手方向の投影像(q2)と第2導電粒子(P2)又は第1導電粒子(P1)が重なる。これらの重なり幅(W1)、幅(W2)の少なくとも一方が導電粒子(P)の粒子径(D)の1倍未満である。

Description

異方導電性フィルム及び接続構造体
 本発明は、異方導電性フィルム、異方導電性フィルムを用いる接続方法、及び異方導電性フィルムで接続された接続構造体に関する。
 異方導電性フィルムは、ICチップ等の電子部品を基板に実装する際に広く使用されている。近年では、携帯電話、ノートパソコン等の小型電子機器において配線の高密度化が求められており、この高密度化に異方導電性フィルムを対応させる手法として、異方導電性フィルムの絶縁接着剤層に導電粒子を格子状に均等配置する技術が知られている。
 しかしながら、導電粒子を均等配置しても導通抵抗がばらつくという問題が生じる。これは、端子の縁辺上に位置した導電粒子が絶縁性バインダーの溶融によりスペースに流れ出て、上下の端子で挟まれにくいためである。この問題に対しては、導電粒子の第1の配列方向を異方導電性フィルムの長手方向とし、第1の配列方向に交差する第2の配列方向を、異方導電性フィルムの長手方向に直交する方向に対して5°以上15°以下で傾斜させることが提案されている(特許文献1)。
特許4887700号公報
 しかしながら、異方導電性フィルムで接続する電子部品のバンプサイズがさらに小さくなると、バンプで捕捉できる導電粒子の数もさらに少なくなり、特許文献1に記載の異方導電性フィルムでは導通信頼性を十分に得られない場合があった。特に、液晶画面等の制御用ICをガラス基板上の透明電極に接続する、所謂COG(Chip on Glass)接続では、液晶画面の高精細化に伴う多端子化とICチップの小型化によりバンプサイズが小さくなり、また、テレビのディスプレイ用のガラス基板とフレキシブルプリント配線板(FPC:Flexible Printed Circuits)とを接合するFOG(Film on Glass)接続を行う場合でも接続端子がファインピッチとなり、接続端子で捕捉できる導電粒子数を増加させて導通信頼性を高めることが課題となっていた。
 そこで、本発明は、従前のFOG接続やCOG接続のみならずファインピッチのFOG接続やCOG接続においても、異方導電性フィルムを用いて安定した導通信頼性を得られるようにすることを課題とする。
 本発明者は、導電粒子を格子状に配置した異方導電性フィルムにおいて、導電粒子を高密度に配置し、かつ異方導電性接続時にショートが引き起こされないようにするには、基準とする任意の導電粒子(以下、基準導電粒子という)と、基準導電粒子に最も近接した第1導電粒子又はその次に近接した第2導電粒子について、基準導電粒子の異方導電性フィルムの長手方向及び短手方向の投影像と第1導電粒子又は第2導電粒子が重なり、かつそれらの重なり幅を特定の範囲とすることにより、異方導電性フィルムの接続信頼性を向上できることを見出し、本発明を想到した。
 即ち、本発明は、絶縁接着剤層と、該絶縁接着剤層に格子状に配置された導電粒子を含む異方導電性フィルムであって、
基準導電粒子と、
基準導電粒子に最も近接した第1導電粒子と、
第1導電粒子と同等又は第1導電粒子の次に基準導電粒子に近接した導電粒子であって、基準導電粒子と第1導電粒子を含む格子軸上に無い第2導電粒子について、
基準導電粒子の異方導電性フィルムの長手方向の投影像と第1導電粒子又は第2導電粒子が重なり、
基準導電粒子の異方導電性フィルムの短手方向の投影像と第2導電粒子又は第1導電粒子が重なり、
基準導電粒子の異方導電性フィルムの長手方向の投影像と、第1導電粒子又は第2導電粒子との重なり領域の異方導電性フィルムの短手方向の最大幅(以下、異方導電性フィルムの長手方向で隣接する導電粒子の重なり幅という)、及び基準導電粒子の異方導電性フィルムの短手方向の投影像と、第2導電粒子又は第1導電粒子との重なり領域の異方導電性フィルムの長手方向の最大幅(以下、異方導電性フィルムの短手方向で隣接する導電粒子の重なり幅という)の少なくとも一方が導電粒子の粒子径の1倍未満である異方導電性フィルムを提供する。
 また、本発明は、上述の異方導電性フィルムで第1電子部品と第2電子部品が異方導電性接続されている接続構造体を提供する。
 本発明の異方導電性フィルムによれば、絶縁接着剤層に導電粒子を高密度に配置することにより異方導電性接続する端子の面積が狭くても該端子に導電粒子を確実に補足でき、かつ、端子がファインピッチに形成されていても、導電粒子によりショートが発生することを抑制できる。
図1は、実施例の異方導電性フィルム1Aにおける導電粒子の配置図である。 図2は、実施例の異方導電性フィルム1Bにおける導電粒子の配置図である。 図3は、実施例の異方導電性フィルム1Cにおける導電粒子の配置図である。 図4は、実施例の異方導電性フィルム1Dにおける導電粒子の配置図である。 図5は、比較例の異方導電性フィルム1xにおける導電粒子の配置図である。 図6は、比較例の異方導電性フィルム1yにおける導電粒子の配置図である。
 以下、図面を参照しつつ本発明を詳細に説明する。なお、各図中、同一符号は同一又は同等の構成要素を表している。
 図1は、本発明の一実施例の異方導電性フィルム1Aにおける導電粒子Pの配置図である。この異方導電性フィルム1Aは、絶縁接着剤層10と、絶縁接着剤層10に格子状の配置で固定された導電粒子Pを有する。
 より具体的には、導電粒子Pは、絶縁接着剤層10内に正方格子又は長方格子に配置されており、基準導電粒子P0と該基準導電粒子P0に最も近接した第1導電粒子P1とを含む格子軸(以下、第1配列軸A1という)が、異方導電性フィルム1Aの長手方向F1及び短手方向F2に対して傾いている。ここで、基準導電粒子P0と第1導電粒子P1との中心間距離はL1である。
 また、第1導電粒子P1と同等又は第1導電粒子P1の次に基準導電粒子P0に近接した導電粒子であって、第1配列軸A1上に無い第2導電粒子P2と基準導電粒子P0とを含む格子軸(以下、第2配列軸A2という)も異方導電性フィルム1Aの長手方向F1及び短手方向F2に対して傾いている。ここで、基準導電粒子P0と第2導電粒子P2との中心間距離をL2とすると、L2≧L1である。
 基準導電粒子P0と第1導電粒子P1との中心間距離L1、及び基準導電粒子P0と第2導電粒子P2との中心間距離L2は、異方導電性フィルムを適用するFOG接続やCOG接続等に応じて適宜決定することができ、通常、それぞれ導電粒子Pの粒子径Dの1.5~2000倍であるが、FOG接続の場合には好ましくは2.5~1000倍、より好ましくは3~700倍、特に好ましくは5倍より大きく400倍未満である。COG接続の場合には好ましくは1.5~5倍、より好ましくは1.8~4.5倍、特に好ましくは2~4倍である。導電粒子Pがこのように高密度で配置されていることにより、異方導電性フィルム1Aを用いて異方導電性接続する端子の面積が狭くても該端子に導電粒子Pが確実に捕捉され、導通信頼性を得ることができる。これに対し、中心間距離L1、L2が短すぎると異方導電性フィルムを用いて端子間を接続した場合にショートが生じ易くなり、反対に長すぎると端子間に捕捉される導電粒子数が不十分となる。
 この異方導電性フィルム1Aでは、基準導電粒子P0の異方導電性フィルムの長手方向の投影像q1(即ち、基準導電粒子P0を、異方導電性フィルム1Aの長手方向F1の平行光で投影した場合の像)と第1導電粒子P1が重なり、かつ、基準導電粒子P0の異方導電性フィルムの短手方向F2の投影像q2(即ち、基準導電粒子P0を、異方導電性フィルム1Aの短手方向F2の平行光で投影した場合の像)と第2導電粒子P2が重なっている。さらに、異方導電性フィルム1Aの長手方向F1で隣接する基準導電粒子P0と第1導電粒子P1との重なり幅W1と、異方導電性フィルム1Aの短手方向F2で隣接する基準導電粒子P0と第2導電粒子P2との重なり幅W2が、それぞれ導電粒子Pの粒子径Dの0倍より大きく1倍未満、好ましくは0.5倍未満である。
 なお、本発明において導電粒子Pの粒子径Dは、異方導電性フィルムで使用されている導電粒子の平均粒子径である。導電粒子Pの粒子径Dは、ショート防止と、接続する端子間接合の安定性の点から、好ましくは1~30μm、より好ましくは2~15μmである。なお、導電粒子の粒子径Dと粒子中心間距離の範囲とは密接に関連しており、例えば、一般的なFPC配線の場合、接続領域長さが通常2mmで、一つの配列軸で粒子径1μmの導電粒子2個が導電粒子径0.5倍の余裕をもって捕捉されるとすると、粒子中心間距離の上限は粒子径の1998倍と算出できる(この場合、この配列軸に隣接する配列軸との距離は十分に短いものとなる)。粒子径が2μm及び3μmのFOG接続の場合も上記同様の理由から、粒子中心間距離の上限はそれぞれ粒子径の998倍及び663.7μmと算出できる(1μmの導電粒子が2mm内に3個存在する場合も包含できる範囲でもある)。また、一般的なFPC配線について、その幅を200μm、L/S=1とした場合に、配線幅とそのスペースの合計である400μm内で、一つの配列軸で最小径1μmの導電粒子2個が、導電粒子径0.5倍の余裕を持ち、更に配線の端部より内側に存在できるとすると、粒子中心間距離の上限は、粒子径の398倍未満と算出できる。また、粒子中心間距離の下限は、導電粒子の粒子径Dが30μmの場合に、余裕を持って配置できる間隔に相当する。
 この異方導電性フィルム1Aでは、上述のように、長手方向F1で隣接する基準導電粒子P0と第1導電粒子P1との重なり幅W1と、異方導電性フィルム1Aの短手方向F2で隣接する基準導電粒子P0と第2導電粒子P2との重なり幅W2が、双方とも導電粒子Pの粒子径Dの1倍未満であるが、本発明においては、これらの重なり幅W1、W2の少なくとも一方が導電粒子Pの粒子径Dの1倍未満であればよい。言い換えると、双方の重なり幅W1、W2が同時に導電粒子Pの粒子径Dに等しくなることは無い。即ち、基準導電粒子P0の投影像q1と第1導電粒子P1又は第2導電粒子P2とがちょうど重なり、かつ基準導電粒子P0の投影像q2と第2導電粒子P2又は第1導電粒子P1とがちょうど重なることはない。
 このように重なり幅W1、W2を調整することにより、導電粒子Pが高密度に配置されているにも関わらず、異方導電性フィルム1Aを用いて端子を異方導電性接続した場合に、端子間にショートが発生することを抑制できる。また、高密度に配置された状態でも意図的にずらしていることで、異方導電性フィルムの製造時に不良が発生したとしても容易に検出することができる。例えば、任意の箇所における面視野画像にフィルムの長手や短手もしくはこれらに予め設計した斜行の角度の直線(補助線)を引くことで、当初の設計に合致して配列軸が形成されているかを容易に確認できる。
 このショート発生の抑制効果は、導電粒子Pと絶縁接着剤層10との次のような作用機構により得られると考えられる。即ち、異方導電性フィルム1Aを用いて電子部品の接続端子3を異方導電性接続する場合に、例えば、図1に示したように、異方導電性フィルム1Aの長手方向F1と接続端子3の短手方向を合わせ、接続端子3を覆う加熱ヘッドで加熱加圧すると、絶縁接着剤層10が溶融し、その溶融した樹脂が矢印X方向に流れ、溶融した樹脂の流れにより接続端子3間の導電粒子Pも矢印X方向に移動する。ここで、図5に示す比較例の異方導電性フィルム1xのように、重なり幅W1及びW2の双方が導電粒子Pの粒子径Dに等しいと、異方導電性接続時に接続端子3間の導電粒子Pは矢印X方向にもそれに直交する方向にも一列に並ぶこととなり、溶融した樹脂の流れにより導電粒子Pが3個以上の複数個で連結し易くなる。このため、ファインピッチの接続端子を接続する場合、ショートが起こりやすくなる。
 これに対し、この異方導電性フィルム1Aでは図1に示したようにX方向に隣接する導電粒子P3、P1、P4は異方導電性フィルム1Aの長手方向F1の位置がずれているので、溶融した樹脂の流れが乱れ、溶融した樹脂で流された後の導電粒子が3個以上連結することが防止され、ファインピッチの接続端子でもショートを発生させることなく接続することができる。即ち、フィルムの溶融粘度の設計にマージンを持たせることが可能になる。例えば、高密度に導電粒子が存在し、且つ導電粒子の流動を抑制するために溶融粘度を比較的高く設計すると、押し込みを阻害する懸念が生じる。しかし上述のように設計することで、このような問題は回避しやすくなる。また、配合設計の段階においても流動状態の挙動を把握しやすいことから、設計工数の削減にも寄与することができる。
 このファインピッチの接続においては、互いに接続する対向する接続端子を含めた接続端子の並列方向において、間隙をあけて隣接する最小端子間距離(この距離は、異方導電性接続が可能な範囲で並列方向にずれていてもよい)を導電粒子の粒子径Dの4倍未満とすることができる。この場合、接続される端子の接続面の短手方向の幅は、導電粒子の粒子径Dの7倍未満とすることができる。
 また、図6に示す比較例の異方導電性フィルム1yのように、基準導電粒子P0に最も近接した第1導電粒子P1は、基準導電粒子P0の異方導電性フィルムの長手方向F1の投影像q1と重ならず、短手方向F2の投影像q2とも重なっておらず、第1導電粒子P1よりも基準導電粒子P0から離れた導電粒子Px、Pyが基準導電粒子P0の投影像q1、q2と重なる場合、導電粒子Pの密度が低くなるためショートは発生しにくくなる。しかしながら、導電粒子Pの密度が低いため、接続すべき端子のサイズが小さい場合には導電粒子Pが端子3で捕捉されにくく、導通信頼性が劣る。一般に、同図に示すように、ICチップなどでは複数の接続端子3が並列しており、異方導電性フィルムの接続端子への貼り合わせは接続端子3の配列方向に沿って行われるが、この貼り合わせにズレや撓みが生じると、接続端子3上で疎に配置されている導電粒子Pが一層接続端子に捕捉されにくくなる。
 これに対し、本発明の異方導電性フィルム1Aでは導通信頼性を向上させることができる。
 本発明の異方導電性フィルムは、導電粒子の配置について種々の態様をとることができる。例えば、上述の異方導電性フィルム1Aにおいて、基準導電粒子P0の異方導電性フィルム1Aの長手方向F1の投影像q1と第2導電粒子とが重なり、基準導電粒子P0の異方導電性フィルム1Aの短手方向F2の投影像q2と第1導電粒子とが重なるようにしても良い。
 また、図2に示す異方導電性フィルム1Bのように、上述の異方導電性フィルム1Aにおいて導電粒子Pの配置を斜方格子とし、さらに、異方導電性フィルムの短手方向F2で隣接する基準導電粒子P0と第2導電粒子P2との重なり幅W2を導電粒子Pの粒子径Dに等しくしてもよい。この場合、異方導電性フィルム1Bの長手方向F1で隣接する基準導電粒子P0と第1導電粒子P1との重なり幅W1は、導電粒子Pの粒子径Dの1倍未満、好ましくは、0.5倍未満とする。この態様では、基準導電粒子P0の異方導電性フィルムの長手方向F1の外接線が、第1導電粒子P1のそれと重複しないことが好ましい。即ち、基準導電粒子P0の異方導電性フィルムの長手方向F1の外接線が第1導電粒子P1を貫くことが好ましい。
 図3に示す異方導電性フィルム1Cのように、上述の異方導電性フィルム1Aにおいて導電粒子Pの配置を斜方格子とし、さらに、異方導電性フィルムの長手方向F1で隣接する基準導電粒子P0と第1導電粒子P1との重なり幅W1を導電粒子Pの粒子径Dに等しくしてもよい。この場合、異方導電性フィルム1Cの短手方向F2で隣接する基準導電粒子P0と第2導電粒子P2との重なり幅W2は、導電粒子Pの粒子径Dの1倍未満、好ましくは、0.5倍未満とする。この態様では、基準導電粒子P0の異方導電性フィルムの短手方向F2の外接線が、第2導電粒子P2のそれと重複しないことが好ましい。即ち、基準導電粒子P0の異方導電性フィルムの短手方向F2の外接線が第2導電粒子P2を貫くことが好ましい。
 この異方導電性フィルム1Cのように、異方導電性フィルムの長手方向F1に導電粒子Pを一列に配列し、かつ異方導電性フィルムの短手方向F2で隣接する導電粒子Pが、導電粒子Pの粒子径Dの1倍未満の重なり幅W2でずれていくようにすると、導電粒子Pが樹脂の流動方向であるX方向にのみ傾斜して配置されるため、接続端子3に捕捉された導電粒子と樹脂流動により移動した導電粒子を容易に把握できる。また、流動方向での導電粒子Pの重畳が小さくなるので、ショートの発生を特に抑制することができる。
 なお、このように導電粒子Pの配置を、接続時の樹脂の流動を加味して設計することで、絶縁接着剤層10を形成する絶縁性バインダーの配合の自由度が増やすことができ、異方導電性フィルムの作製条件や接続条件などの変更に備えやすくなる。
 図4に示す異方導電性フィルム1Dのように、上述の異方導電性フィルム1Aにおいて導電粒子Pの配置を斜方格子としてもよい。
 本発明において導電粒子Pの密度は、好ましくは400~250000個/mm2、より好ましくは800~200000個/mm2、さらに好ましくは1200~100000個/mm2である。この粒子密度は、導電粒子Pの粒子径Dと配置位置によって適宜調整される。
 導電粒子P自体の構成や絶縁接着剤層10の層構成又は構成樹脂については、種々の態様をとることができる。
 即ち、導電粒子Pとしては、公知の異方導電性フィルムに用いられているものの中から適宜選択して使用することができる。例えば、ニッケル、コバルト、銀、銅、金、パラジウムなどの金属粒子、金属被覆樹脂粒子などが挙げられる。2種以上を併用することもできる。
 絶縁接着剤層10としては、公知の異方導電性フィルムで使用される絶縁性樹脂層を適宜採用することができる。例えば、アクリレート化合物と光ラジカル重合開始剤とを含む光ラジカル重合型樹脂層、アクリレート化合物と熱ラジカル重合開始剤とを含む熱ラジカル重合型樹脂層、エポキシ化合物と熱カチオン重合開始剤とを含む熱カチオン重合型樹脂層、エポキシ化合物と熱アニオン重合開始剤とを含む熱アニオン重合型樹脂層等を使用することができる。これらの樹脂層は、必要に応じて絶縁接着剤層10に導電粒子Pを固定するため、それぞれ重合したものとすることができる。絶縁接着剤層10を、複数の樹脂層から形成してもよい。
 また、絶縁接着剤層10に導電粒子Pを固定するため、絶縁接着剤層10には、必要に応じてシリカ等の絶縁性フィラーを配合してもよい。
 絶縁接着剤層10に導電粒子Pを上述の配置で固定する方法としては、導電粒子Pの配置に対応した凹みを有する型を機械加工やレーザー加工、フォトリソグラフィなど公知の方法で作製し、その型に導電粒子を入れ、その上に絶縁接着剤層形成用組成物を充填し、硬化させ、型から取り出せばよい。このような型から、更に剛性の低い材質で型を作成しても良い。
 また、絶縁接着剤層10に導電粒子Pを上述の配置におくために、絶縁接着剤層形成組成物層の上に、貫通孔が所定の配置で形成されている部材を設け、その上から導電粒子Pを供給し、貫通孔を通過させるなどの方法でもよい。
 本発明の異方導電性フィルムを用いて、フレキシブル基板(FPC)、ガラス基板、プラスチック基板(PETなどの熱可塑性樹脂からなる基板)、セラミック基板などの第1電子部品の接続端子と、ICチップ、ICモジュール、フレキシブル基板(FPC)などの第2電子部品の接続端子を異方導電性接続する場合、例えば、図1に示したように、異方導電性フィルム1Aの長手方向F1と、第1電子部品又は第2電子部品の接続端子3の短手方向を合わせる。これにより、本発明の異方導電性フィルム1Aにおける導電粒子Pの配置を活かして接続端子3における導電粒子Pの捕捉数を十分に高めることができ、特に、導電粒子Pの第1配列軸A1又は第2配列軸A2の少なくとも一方が異方導電性フィルムの長手方向F1又は短手方向F2に対して傾いている場合に、接続端子3における導電粒子Pの捕捉性を顕著に高めることができる。
 より具体的には、例えば、第1電子部品として、透明電極で接続端子が形成されたガラス基板等を使用し、第2電子部品として、ICチップ等を使用して高密度配線のCOG接続を行う場合、より具体的には、これらの接続端子の接続面の大きさが、幅8~60μm、長さ400μm以下(下限は幅と等倍)である場合に、特に、従前の異方導電性接続に比して接続端子で捕捉できる導電粒子数が安定して増加し、接続信頼性を向上させることができる。なお、接続端子面の短手方向の幅がこれより小さいと接続不良が多発し、大きいとCOG接続で必要とされる高密度実装への対応が難しくなる。また、接続端子面の長さがこれより短いと安定した導通をとりにくくなり、長さがこれよりも長いと片当たりの要因となる。また、第2電子部品としてフレキシブル基板(FPC)のように配線間距離が40μm以上になる比較的ショートが発生しにくいものの場合には、6μm以上の比較的大きな径の導電粒子を用いることができる(粒子径の上限はスペースによるが、30μm以下が好ましく、15μm以下がより好ましく、15μm未満が更により好ましい)。このような比較的大きな導電粒子を用いることで、第1電子部品の接続面における配線高さの位置に軽微なばらつきがあっても安定して接続することができる。このような配線高さの位置にばらつきが生じるものとしては、製造上の問題から表面にうねりを持つセラミック基盤が挙げられる。
 本発明は、こうして異方導電性接続した第1電子部品と第2電子部品の接続構造体も包含する。
 以下、実施例に基づき、本発明を具体的に説明する。
 実施例1~3、比較例1
(1)異方導電性フィルムの製造
 フェノキシ樹脂(熱可塑性樹脂)(新日鐵住金(株)、YP-50)60質量部、エポキシ樹脂(熱硬化性樹脂)(三菱化学(株)、jER828)40質量部、カチオン系硬化剤(三新化学工業(株)、SI-60L)2質量部、及びシリカ微粒子(日本アエロジル(株)、アエロジルRY200)20質量部を含む絶縁性樹脂の混合溶液を調製し、それを、フィルム厚さ50μmのPETフィルム上に塗布し、80℃のオーブンにて5分間乾燥させ、PETフィルム上に厚み20μmの粘着層を形成した。
 一方、表1に示す配置で凸部の配列パターンを有する金型を作成し、公知の透明性樹脂のペレットを溶融させた状態で該金型に流し込み、冷やして固めることで、凹部が表1に示す配置の樹脂型を形成した。この樹脂型の凹部に導電粒子(積水化学工業(株)、AUL704、粒径4μm)を充填し、その上に上述の絶縁性樹脂の粘着層を被せ、紫外線硬化により該絶縁性樹脂に含まれる硬化性樹脂を硬化させた。そして、型から絶縁性樹脂を剥離し、各実施例及び比較例の異方導電性フィルムを製造した。
(2)最近接導電粒子の中心間距離
 各実施例及び比較例の異方導電性フィルムにおいて、基準導電粒子P0と、該基準導電粒子P0に最も近接した第1導電粒子P1との中心間距離L1を、光学顕微鏡を用いて計測して確認した。この場合、基準導電粒子P0の中心と第1導電粒子P1の中心とを結んだ第1配列軸A1上にある導電粒子100個50組を任意に計測し、その平均値を求め、所期の中心間距離L1であることを確認した。結果を表1に示す。
(3)隣接する導電粒子の重なり幅W1、W2
 各実施例及び比較例の異方導電性フィルムにおいて、異方導電性フィルムの長手方向F1において隣接する導電粒子Pの重なり幅W1及び異方導電性フィルムの短手方向F2で隣接する導電粒子Pの重なり幅W2を金属顕微鏡を用いて計測した。結果を表1に示す。
(4)導通評価
 各実施例及び比較例の異方導電性フィルムの(a)初期導通抵抗、(b)導通信頼性、(c)ショート発生率を、それぞれ次のように評価した。結果を表1に示す。
(a)初期導通抵抗
 各実施例及び比較例の異方導電性フィルムを、初期導通および導通信頼性の評価用ICとガラス基板の間に挟み、加熱加圧(180℃、80MPa、5秒)して各評価用接続物を得た。この場合、異方導電性フィルムの長手方向と接続端子の短手方向を合わせた。そして、この評価用接続物の導通抵抗を測定した。
 ここで、この各評価用ICとガラス基板は、それらの端子パターンが対応しており、サイズは次の通りである。
初期導通および導通信頼性の評価用IC
 外径 0.7×20mm
 厚み 0.2mm
 バンプ仕様 金メッキ、高さ12μm、サイズ15×100μm、バンプ間距離15μm
ガラス基板
 ガラス材質 コーニング社製
 外径 30×50mm
 厚み 0.5mm
 電極 ITO配線 
(b)導通信頼性
 (a)初期導通抵抗の評価用ICと各実施例及び比較例の異方導電性フィルムとの評価用接続物を温度85℃、湿度85%RHの恒温槽に500時間おいた後の導通抵抗を、(a)と同様に測定した。なお、この導通抵抗が5Ω以上であると、接続した電子部品の実用的な導通安定性の点から好ましくない。
(c)ショート発生率
 ショート発生率の評価用ICとして次のIC(7.5μmスペースの櫛歯TEG(test element group))を用意した。
 外径 1.5×13mm
 厚み 0.5mm
 バンプ仕様 金メッキ、高さ15μm、サイズ25×140μm、バンプ間距離7.5μm
 各実施例及び比較例の異方導電性フィルムを、ショート発生率の評価用ICと、該評価用ICに対応したパターンのガラス基板との間に挟み、(a)と同様の接続条件で加熱加圧して接続物を得、その接続物のショート発生率を求めた。ショート発生率は、「ショートの発生数/7.5μmスペース総数」で算出される。ショート発生率が50ppm以上であると実用上の接続構造体を製造する点から好ましくない。
(5)連結粒子
 (a)初期導通抵抗の評価用ICと各実施例及び比較例の異方導電性フィルムとの評価用接続物において、隣り合う接続端子間100個中で、端子と接続することなく存在する導電粒子であって2個連結した導電粒子塊の数、又は3個連結した導電粒子塊の数を、金属顕微鏡を用いて計測した。結果を表1に示す。
Figure JPOXMLDOC01-appb-T000001
 
 表1から、実施例1~3の異方導電性フィルムと比較例1の導電性フィルムは、共に導電粒子が高密度であるが、比較例1の異方導電性フィルムでは連結した導電粒子が3個の導電粒子塊が発生し、ショートが生じ易いのに対し、実施例1~3の異方導電性フィルムでは導電粒子塊が発生し難く、端子がショートし難いことがわかる。
 また、これらの接続状態を観察したところ、比較例1では導電粒子の配列がバンプ列と平行な配列と直交する配列からなるためか、導電粒子の配列状態の接続前後の変化がわかりにくかった。しかしながら、隣接する導電粒子が異方導電性フィルムの長手方向及び短手方向の少なくとも一方で重複し、重複幅W1、W2が導電粒子の粒子径の1倍未満である実施例1~3では、接続前後の導電粒子の位置の変化を把握するのが容易であった。
 1A、1B、1C、1D 異方導電性フィルム
 3  端子又は接続端子
10  絶縁接着剤層
 A1  第1配列軸
 A2  第2配列軸
 F1  異方導電性フィルムの長手方向
 F2  異方導電性フィルムの短手方向
 L1  基準導電粒子と第1導電粒子との中心間距離
 L2  基準導電粒子と第2導電粒子との中心間距離
 P  導電粒子
 P0  基準導電粒子
 P1  第1導電粒子
 P2  第2導電粒子
 q1  基準導電粒子の異方導電性フィルムの長手方向の投影像
 q2  基準導電粒子の異方導電性フィルムの短手方向の投影像
 W1  異方導電性フィルムの長手方向で隣接する導電粒子の重なり幅
 W2  異方導電性フィルムの短手方向で隣接する導電粒子の重なり幅
 
 
 

Claims (8)

  1.  絶縁接着剤層と、該絶縁接着剤層に格子状に配置された導電粒子を含む異方導電性フィルムであって、
    基準とする任意の導電粒子(以下、基準導電粒子という)と、
    基準導電粒子に最も近接した第1導電粒子と、
    第1導電粒子と同等又は第1導電粒子の次に基準導電粒子に近接した導電粒子であって、基準導電粒子と第1導電粒子を含む格子軸上に無い第2導電粒子について、
    基準導電粒子の異方導電性フィルムの長手方向の投影像と第1導電粒子又は第2導電粒子が重なり、
    基準導電粒子の異方導電性フィルムの短手方向の投影像と第2導電粒子又は第1導電粒子が重なり、
    基準導電粒子の異方導電性フィルムの長手方向の投影像と、第1導電粒子又は第2導電粒子との重なり領域の異方導電性フィルムの短手方向の最大幅(以下、異方導電性フィルムの長手方向で隣接する導電粒子の重なり幅という)、及び基準導電粒子の異方導電性フィルムの短手方向の投影像と、第2導電粒子又は第1導電粒子との重なり領域の異方導電性フィルムの長手方向の最大幅(以下、異方導電性フィルムの短手方向で隣接する導電粒子の重なり幅という)の少なくとも一方が導電粒子の粒子径の1倍未満である異方導電性フィルム。
  2.  導電粒子の格子状の配置が斜方格子である請求項1記載の異方導電性フィルム。
  3.  異方導電性フィルムの長手方向で隣接する導電粒子の重なり幅が導電粒子の粒子径に等しい請求項1又は2記載の異方導電性フィルム。
  4.  異方導電性フィルムの短手方向で隣接する導電粒子の重なり幅が導電粒子の粒子径に等しい請求項1又は2記載の異方導電性フィルム。
  5.  異方導電性フィルムの長手方向で隣接する導電粒子の重なり幅及び異方導電性フィルムの短手方向で隣接する導電粒子の重なり幅の少なくとも一方が導電粒子の粒子径の0.5倍未満である請求項1~4記載の異方導電性フィルム。
  6.  基準導電粒子と第1導電粒子との中心間距離及び基準導電粒子と第2導電粒子の中心間距離が、それぞれ導電粒子の粒子径の1.5~2000倍である請求項1~5のいずれかに記載の異方導電性フィルム。
  7.  基準導電粒子と第1導電粒子との中心間距離及び基準導電粒子と第2導電粒子の中心間距離が、それぞれ導電粒子の粒子径の1.5~5倍である請求項1~6のいずれかに記載の異方導電性フィルム。
  8.  請求項1~7のいずれかに記載の異方導電性フィルムで第1電子部品と第2電子部品が異方導電性接続されている接続構造体。
     
     
     
PCT/JP2015/080233 2014-10-28 2015-10-27 異方導電性フィルム及び接続構造体 WO2016068127A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US15/521,189 US20170352636A1 (en) 2014-10-28 2015-10-27 Anisotropic conductive film and connection structure
CN201580055238.7A CN106797080B (zh) 2014-10-28 2015-10-27 各向异性导电膜及连接结构体
KR1020177004491A KR20170033378A (ko) 2014-10-28 2015-10-27 이방 도전성 필름 및 접속 구조체

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014-219794 2014-10-28
JP2014219794 2014-10-28

Publications (1)

Publication Number Publication Date
WO2016068127A1 true WO2016068127A1 (ja) 2016-05-06

Family

ID=55857463

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/080233 WO2016068127A1 (ja) 2014-10-28 2015-10-27 異方導電性フィルム及び接続構造体

Country Status (6)

Country Link
US (1) US20170352636A1 (ja)
JP (1) JP6690184B2 (ja)
KR (1) KR20170033378A (ja)
CN (1) CN106797080B (ja)
TW (1) TWI699788B (ja)
WO (1) WO2016068127A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6187665B1 (ja) * 2016-10-18 2017-08-30 デクセリアルズ株式会社 異方性導電フィルム
CN107393895A (zh) * 2016-05-17 2017-11-24 三星显示有限公司 显示装置
WO2020121787A1 (ja) * 2018-12-14 2020-06-18 デクセリアルズ株式会社 異方性導電フィルム、接続構造体、接続構造体の製造方法
WO2023153313A1 (ja) * 2022-02-10 2023-08-17 デクセリアルズ株式会社 導電フィルムの設計方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017191772A1 (ja) * 2016-05-05 2017-11-09 デクセリアルズ株式会社 フィラー配置フィルム
US20170338204A1 (en) * 2016-05-17 2017-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Device and Method for UBM/RDL Routing
KR102519126B1 (ko) * 2018-03-30 2023-04-06 삼성디스플레이 주식회사 표시 장치
CN112562886A (zh) * 2019-09-10 2021-03-26 南昌欧菲生物识别技术有限公司 异方性导电膜及其制备方法、邦定结构和超声波生物识别装置
KR20220016364A (ko) 2020-07-30 2022-02-09 삼성디스플레이 주식회사 전자장치
WO2023189416A1 (ja) * 2022-03-31 2023-10-05 デクセリアルズ株式会社 導電フィルム、接続構造体及びその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1021741A (ja) * 1996-07-03 1998-01-23 Asahi Chem Ind Co Ltd 異方導電性組成物及びフィルム
JP4887700B2 (ja) * 2005-09-09 2012-02-29 住友ベークライト株式会社 異方導電性フィルムおよび電子・電機機器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE794600A (fr) 1972-01-28 1973-05-16 Usel Hubert Cartouche sans etui pour mise a feu electrique
US20030155656A1 (en) * 2002-01-18 2003-08-21 Chiu Cindy Chia-Wen Anisotropically conductive film
US20070212521A1 (en) * 2004-03-30 2007-09-13 Tokai Rubber Industries, Ltd. Anisotropic Conductive Film and a Method of Manufacturing the Same
US8802214B2 (en) * 2005-06-13 2014-08-12 Trillion Science, Inc. Non-random array anisotropic conductive film (ACF) and manufacturing processes
KR101115271B1 (ko) * 2006-04-27 2012-07-12 아사히 가세이 일렉트로닉스 가부시끼가이샤 도전 입자 배치 시트 및 이방성 도전 필름
TWI307406B (en) * 2006-07-06 2009-03-11 Au Optronics Corp Misalignment detection devices
JP5234048B2 (ja) * 2009-04-28 2013-07-10 日立化成株式会社 異方導電粒子
KR101345694B1 (ko) * 2011-03-11 2013-12-30 옵토팩 주식회사 파이버, 파이버 집합체 및 이를 포함하는 접착제
US9102851B2 (en) * 2011-09-15 2015-08-11 Trillion Science, Inc. Microcavity carrier belt and method of manufacture
JP2013105636A (ja) * 2011-11-14 2013-05-30 Dexerials Corp 異方性導電フィルム、接続方法、及び接合体
JP6209313B2 (ja) * 2012-02-20 2017-10-04 デクセリアルズ株式会社 異方性導電フィルム、接続構造体、接続構造体の製造方法及び接続方法
US10350872B2 (en) * 2012-08-01 2019-07-16 Dexerials Corporation Method for manufacturing anisotropically conductive film, anisotropically conductive film, and conductive structure
KR101706821B1 (ko) * 2014-09-01 2017-02-14 삼성에스디아이 주식회사 이방 도전성 필름 및 상기 필름에 의해 접속된 반도체 장치

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1021741A (ja) * 1996-07-03 1998-01-23 Asahi Chem Ind Co Ltd 異方導電性組成物及びフィルム
JP4887700B2 (ja) * 2005-09-09 2012-02-29 住友ベークライト株式会社 異方導電性フィルムおよび電子・電機機器

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107393895A (zh) * 2016-05-17 2017-11-24 三星显示有限公司 显示装置
JP6187665B1 (ja) * 2016-10-18 2017-08-30 デクセリアルズ株式会社 異方性導電フィルム
WO2020121787A1 (ja) * 2018-12-14 2020-06-18 デクセリアルズ株式会社 異方性導電フィルム、接続構造体、接続構造体の製造方法
JP2020095922A (ja) * 2018-12-14 2020-06-18 デクセリアルズ株式会社 異方性導電フィルム
WO2023153313A1 (ja) * 2022-02-10 2023-08-17 デクセリアルズ株式会社 導電フィルムの設計方法

Also Published As

Publication number Publication date
JP2016085982A (ja) 2016-05-19
JP6690184B2 (ja) 2020-04-28
US20170352636A1 (en) 2017-12-07
CN106797080A (zh) 2017-05-31
KR20170033378A (ko) 2017-03-24
CN106797080B (zh) 2019-05-21
TWI699788B (zh) 2020-07-21
TW201635313A (zh) 2016-10-01

Similar Documents

Publication Publication Date Title
WO2016068127A1 (ja) 異方導電性フィルム及び接続構造体
JP6640141B2 (ja) 異方導電性フィルム及び接続構造体
JP7176550B2 (ja) 異方導電性フィルム及び接続構造体
JP7397357B2 (ja) 異方導電性フィルムの製造方法及び異方導電性フィルム
TWI834084B (zh) 異向導電性膜及其製造方法、以及使用有異向導電性膜之連接構造體及其製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15854879

Country of ref document: EP

Kind code of ref document: A1

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)
ENP Entry into the national phase

Ref document number: 20177004491

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 15521189

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15854879

Country of ref document: EP

Kind code of ref document: A1