WO2016042911A1 - Circuit à boucle à verrouillage de phase (pll) et dispositif semiconducteur - Google Patents

Circuit à boucle à verrouillage de phase (pll) et dispositif semiconducteur Download PDF

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Publication number
WO2016042911A1
WO2016042911A1 PCT/JP2015/070525 JP2015070525W WO2016042911A1 WO 2016042911 A1 WO2016042911 A1 WO 2016042911A1 JP 2015070525 W JP2015070525 W JP 2015070525W WO 2016042911 A1 WO2016042911 A1 WO 2016042911A1
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Prior art keywords
charge pump
switch
circuit
node
output node
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PCT/JP2015/070525
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English (en)
Japanese (ja)
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高以良亨
有馬大裕
時松淳詞
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ソニー株式会社
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Publication of WO2016042911A1 publication Critical patent/WO2016042911A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop

Definitions

  • This technology relates to a PLL circuit and a semiconductor device.
  • ⁇ Leakage current flowing through the charge pump while the charge pump operation is stopped gradually changes the voltage of the loop filter at the subsequent stage. Since the charge pump outputs a pulse only every PLL clock cycle, for example, when the clock cycle is 10 MHz, a leak current is continuously generated in a period of 100 nsec, and the voltage is restored to the original value by the charge pump. The vertical movement causes the voltage fluctuation of the loop filter. The voltage fluctuation is frequency-converted to deteriorate the jitter characteristic of the output clock.
  • FIG. 10 is a diagram illustrating a configuration of a charge pump circuit according to a second modification.
  • FIG. 10 is a diagram illustrating a configuration of a charge pump circuit according to a third modification. It is a figure which shows the structure of the charge pump circuit concerning the modification 4.
  • FIG. 10 is a diagram illustrating a configuration of a charge pump circuit according to Modification Example 5. It is a figure which shows the structure of the charge pump circuit concerning the modification 6.
  • FIG. 1 is a block diagram showing a PLL (Phase Locked Loop) circuit 1 as an electronic apparatus according to the present embodiment.
  • the PLL circuit 1 is formed as one circuit block on a chip of a semiconductor device, for example.
  • the PLL circuit 1 includes a phase frequency comparison unit (PFD) 10, a charge pump unit (CP) 20, a loop filter (LPF) 30, a voltage controlled oscillation unit (VCO) 40, and a frequency divider (1 / N) 50. Yes.
  • PFD phase frequency comparison unit
  • CP charge pump unit
  • LPF loop filter
  • VCO voltage controlled oscillation unit
  • the phase frequency comparison unit 10 includes phase frequency comparison units 10A and 10B as a plurality of phase frequency comparison units.
  • the phase frequency comparison unit 10 may be composed of one phase frequency comparison unit.
  • the phase frequency comparison unit 10 performs a charge pump operation for a charge pump circuit described later with reference to FIGS.
  • a control signal shown in FIG. 6 or FIG. 7 to be described later is generated and inputted to a charge pump circuit that generates and outputs a control signal shown in FIG. 5 and stops the charge pump operation.
  • FIG. 2 is a diagram illustrating the configuration of the charge pump unit 20 according to the present embodiment.
  • the charge pump unit 20 includes charge pump circuits 20A and 20B as a plurality of charge pump circuits.
  • the charge pump circuit 20A is a first charge pump circuit for a large current
  • the charge pump circuit 20B is a second charge pump circuit for a small current.
  • the charge current and the discharge current from both the charge pump circuit 20A and the charge pump circuit 20B are output,
  • the charge pump current supplied to the output node Nout can be adjusted by properly using the output of the charge current or discharge current from one of the pump circuit 20A and the charge pump circuit 20B.
  • phase frequency comparison units 10A and 10B can also operate exclusively, and the phase frequency comparison unit corresponding to the charge pump circuit during the charge pump operation is configured to operate. That is, the phase frequency comparison unit 10A operates during the charge pump operation of the charge pump circuit 20A, and the phase frequency comparison unit 10A also stops while the charge pump operation of the charge pump circuit 20A is stopped. On the other hand, the phase frequency comparison unit 10B operates during the charge pump operation of the charge pump circuit 20B, and the phase frequency comparison unit 10B also stops while the charge pump operation of the charge pump circuit 20B is stopped.
  • the charge pump circuit 20A includes a high-potential-side constant current source Is11, a low-potential-side constant current source Is12, a high-potential-side switch circuit SW11, a low-potential-side switch circuit SW12, and equipotential means 21. .
  • the switch circuit SW11 is controlled to be turned on / off by a control signal Ctl11 and is configured by a semiconductor switch element such as a MOS transistor, for example.
  • the switch circuit SW12 is controlled to be turned on / off by a control signal Ctl12 and is configured by a semiconductor switch element such as a MOS transistor, for example.
  • the equipotentializing means 21 equipotentializes the node N11, the node N12, and the output node Nout. Thereby, the voltage applied to both ends of the switch circuit SW11 and the switch circuit SW12 becomes the same, and the leakage current flowing through each switch circuit is ideally zero.
  • the constant current source Is21 is connected to the output node Nout via the switch circuit SW21, and functions as a discharge type constant current source for the output node Nout.
  • the constant current source Is22 is connected to the output node Nout via the switch circuit SW22, and functions as a sink type constant current source for the output node Nout.
  • the constant current source Is21 and the constant current source Is22 are controlled to be turned on / off by a control signal Ctl20.
  • the switch circuit SW21 is controlled to be turned on / off by a control signal Ctl21 and is configured by a semiconductor switch element such as a MOS transistor, for example.
  • the loop filter 30 has a capacitor as a loop filter capacitor connected between the output node Nout of the charge pump circuit and the ground potential GND. This capacitor is charged or discharged according to the charge current Iup and discharge current Idn output from the charge pump unit 20, generates a control voltage according to the amount of charge of the capacitor, and outputs it to the voltage controlled oscillator 40. Note that the stability of the loop may be improved by connecting not only the capacitor but also a resistance element as a loop filter resistor in series.
  • the loop filter 30 generates a voltage signal (referred to as a charge pump voltage) at one terminal of the loop filter (that is, the input of the voltage / current converter) based on the charge pump current output from the charge pump unit 20. Since the capacitor is charged / discharged, the loop filter 30 attenuates a frequency component equal to or higher than a predetermined cutoff frequency (also referred to as a roll-off frequency or a pole) of the comparison result signal from the phase frequency comparison unit 10 to generate a voltage. It functions as a low-pass filter that exhibits at least one cut-off frequency so as to smooth the control voltage supplied to the control oscillation unit 40.
  • a predetermined cutoff frequency also referred to as a roll-off frequency or a pole
  • the voltage-controlled oscillator 40 is controlled in oscillation frequency according to the control voltage generated by the loop filter 30. That is, the voltage controlled oscillator 40 generates an output clock having an oscillation frequency corresponding to the control voltage and supplies the output clock to the frequency divider 50.
  • the switch circuits SW11 and SW12 are turned off and the current output of the constant current sources Is11 and Is12 is stopped, while the equipotential means 21 outputs the nodes N11 and N12.
  • the node Nout is made equipotential.
  • the node N21 and the output node Nout at both ends of the switch circuit SW21 have the same potential, and the node N22 and the output node Nout at both ends of the switch circuit SW22 have the same potential. Thereby, a leak current from the switch circuit SW21 to the output node Nout is prevented, and a leak current from the switch circuit SW22 to the output node Nout is prevented.
  • the leak current that flows while the charge pump circuit 20A for large current is stopped is close to the charge pump current for the charge pump circuit 20B for small current, so that the leak current flows into the output node Nout.
  • the jitter characteristic of the PLL circuit can be greatly improved by preventing the leakage current of the charge pump circuit 20A from flowing into the output node Nout.
  • FIG. 3 is a diagram illustrating a configuration of the charge pump circuit 120 included in the PLL circuit of the present embodiment.
  • symbol is attached
  • the charge pump circuit 120 includes a charge pump circuit 120A for a large current, a charge pump circuit 120B for a small current, a current mirror circuit 130 for supplying a bias voltage to each constant current source described later, and each constant current source described below.
  • Switch circuits SW30 and SW31 for switching connection to the current mirror circuit 130, switch circuits SW41, SW42, SW51 and SW52 for switching on / off of each constant current source circuit described later, and an amplifier G1 are provided.
  • the discharge type constant current source Is11, the switch circuits SW11 and SW12, and the suction type constant current source Is12 are connected in series between the constant voltage source and the ground, and the switch circuits SW11 and SW12 A series circuit of switch circuits SW13 and SW14 is connected in parallel to the series circuit.
  • the switch circuits SW11 and SW13 are composed of pMOS transistors, and the switch circuits SW12 and SW14 are composed of nMOS transistors.
  • the output node Nout which is a connection point of the switch circuits SW11 and SW12 is connected to a node N13 which is a connection point of the switch circuits SW13 and SW14 through a voltage follower, that is, an amplifier G1 having a gain of 1.
  • the output node Nout is connected to the loop filter 30 at the next stage.
  • the constant current source Is11 is a supply source of the charge current Iup1
  • the constant current source Is12 is a supply source of the discharge current Idn1.
  • the magnitudes of the output currents (charge current Iup1, discharge current Idn1) of these constant current sources Is11, Is12 are controlled in conjunction with each other.
  • Is12 is a diagram illustrating an example of control signals TP1, TN1.
  • the control signals TP1 and TN1 are arbitrary voltages for supplying a constant current so that the constant current sources Is11 and Is12 are always turned on during the charge pump operation of the charge pump circuit 120A.
  • the control signals xup1 and dn1 are pulse signals having a pulse width corresponding to the phase frequency difference between the reference clock CKr and the divided clock CKv.
  • the control signal up1 is a signal obtained by inverting the logic level of the control signal xup1.
  • the control signal xdn1 is a signal obtained by inverting the logic level of the control signal dn.
  • the switch circuit SW11 when the switch circuit SW11 is off, the potential of the node N11, which is a connection point between the constant current source Is11 and the switch circuit SW11, is kept equal to the output node Nout by the amplifier G1. That is, both ends of the switch circuit SW11 have the same potential, and no leakage current flows through the switch circuit SW11.
  • the output node Nout and the node N13 are held at the same potential by the amplifier G1, even if the switch circuits SW11 to SW14 are switched, the potentials of the output node Nout and the node N13 do not change. There is no charge sharing effect, and matching characteristics between the constant current of the constant current source Is11 and the constant current of the constant current source Is12 are improved. Furthermore, since the constant current sources Is11 and Is12 themselves do not perform on / off operations, the charge pump circuit can be operated at high speed.
  • the discharge type constant current source Is21, the switch circuits SW21 and SW22, and the suction type constant current source Is22 are connected in series between the constant voltage source and the ground, and the switch circuits SW21 and SW22.
  • a series circuit of switch circuits SW23 and SW24 is connected in parallel to the series circuit.
  • FIG. 5 shows the control signals up2, xup2, xdn2, dn2 supplied from the phase frequency comparison unit 10 to the switch circuits SW21, SW22, SW23, SW24 and the constant current source Is21 during the charge pump operation of the charge pump circuit 120B.
  • Is22 is a diagram illustrating an example of control signals TP2, TN2.
  • the control signals TP2 and TN2 are arbitrary voltages for supplying a constant current so that the constant current sources Is21 and Is22 are always turned on during the charge pump operation of the charge pump circuit 120B.
  • the switch circuit SW24 is off, and when the switch circuit SW22 is off, the switch circuit SW24 is on.
  • the output node Nout and the node N23 are held at the same potential by the amplifier G1, even if the switch circuits SW21 to SW24 are switched, the potentials of the output node Nout and the node N23 do not change. There is no charge sharing effect, and matching characteristics between the constant current of the constant current source Is21 and the constant current of the constant current source Is22 are improved. Furthermore, since the constant current sources Is21 and Is22 themselves do not perform an on / off operation, the charge pump circuit can be operated at a high speed.
  • the charge pump circuits 120A and 120B are configured to be able to suppress the leakage current during the charge pump operation. Next, the operation when the charge pump circuit is stopping the charge pump operation will be described.
  • ⁇ Leakage current flows through the charge pump circuit when the charge pump operation is stopped.
  • this leak current flows through the switch circuits SW11 and SW12, the leak current flows into the output node Nout and fluctuates the voltage of the subsequent loop filter. Further, such a leakage current generates noise such as thermal noise and flicker, and affects the output clock.
  • the control signal TP1 becomes an H level voltage to turn off the constant current source Is11 composed of a pMOS transistor.
  • the control signal TN1 becomes an L level voltage to turn off the constant current source Is12 formed of an nMOS transistor.
  • the control signal xup1 becomes an H level voltage so as to turn off the switch circuit SW11 composed of a pMOS transistor, and the control signal dn1 becomes an L level voltage so as to turn off the switch circuit SW12 composed of an nMOS transistor.
  • control signal up1 becomes an L level voltage to turn on the switch circuit SW13 composed of pMOS transistors
  • control signal xdn1 becomes an H level voltage to turn on the switch circuit SW14 composed of nMOS transistors.
  • the switch circuits SW13 and SW14 that connect the nodes N11 and N12 in parallel can be turned on while the switch circuits SW11 and SW12 are turned off.
  • the node N13 between the switch circuits SW13 and SW14 and the output node Nout are connected by an amplifier G1.
  • the node N11 at both ends of the switch circuit SW11 and the output node Nout have the same potential, and leakage current from the switch circuit SW11 to the output node Nout is prevented.
  • the node N12 at both ends of the switch circuit SW12 and the output node Nout have the same potential, and leakage current from the switch circuit SW12 to the output node Nout is prevented.
  • the leak current generated in the stopped constant current source Is11 and constant current source Is12 flows from the switch circuit SW13 to the switch circuit SW14 via the amplifier G1, noise such as thermal noise or flicker due to the leak current is output to the output node. Without flowing into Nout, the voltage fluctuation of the subsequent loop filter caused by the charge pump circuit 120A is suppressed, and the influence on the jitter characteristics of the PLL circuit can be suppressed.
  • the switch circuits SW21 and SW22 are turned off, and the switch circuits SW23 and SW24 are kept on while the current output of the constant current sources Is21 and Is22 is stopped.
  • FIG. 7 shows the control signals up2, xup2, dn2, xdn2 supplied from the phase frequency comparison unit 10 to the switch circuits SW21, SW22, SW23, SW24 and the constant current source while the charge pump operation of the charge pump circuit 120B is stopped. It is a figure which shows an example of control signals TP2 and TN2 of Is21 and Is22.
  • the control signal TP2 becomes an H level voltage so as to turn off the constant current source Is21 formed of a pMOS transistor.
  • the control signal TN2 becomes an L level voltage to turn off the constant current source Is22 formed of an nMOS transistor.
  • the control signal xup2 becomes an H level voltage so as to turn off the switch circuit SW21 composed of pMOS transistors, and the control signal dn2 becomes an L level voltage so as to turn off the switch circuit SW22 composed of nMOS transistors.
  • control signal up2 becomes an L level voltage to turn on the switch circuit SW23 composed of pMOS transistors
  • control signal xdn2 becomes an H level voltage to turn on the switch circuit SW24 composed of nMOS transistors.
  • the switch circuits SW23 and SW24 that connect the nodes N21 and N22 in parallel with the switch circuits SW21 and SW22 are turned on while the switch circuits SW21 and SW22 are turned off.
  • the node N23 between the switch circuits SW23 and SW24 and the output node Nout are connected by an amplifier G1.
  • the node N21 at both ends of the switch circuit SW21 and the output node Nout have the same potential, and leakage current from the switch circuit SW21 to the output node Nout is prevented.
  • the node N22 at both ends of the switch circuit SW22 and the output node Nout have the same potential, and a leakage current from the switch circuit SW22 to the output node Nout is prevented.
  • the leak current generated in the stopped constant current source Is21 and constant current source Is22 flows from the switch circuit SW23 to the switch circuit SW24 via the amplifier G1, noise such as thermal noise or flicker due to the leak current is output to the output node. Without flowing into Nout, the voltage fluctuation of the subsequent loop filter caused by the charge pump circuit 120B is suppressed, and the influence on the jitter characteristics of the PLL circuit can be suppressed.
  • the leak current that flows while the charge pump circuit 120A for the large current is stopped is close to the charge pump current for the charge pump circuit 120B for the small current, and therefore the leak current flows into the output node Nout.
  • the jitter characteristic of the PLL circuit is greatly improved by preventing the leakage current of the charge pump circuit 120A from flowing into the output node Nout.
  • the leakage current can be eliminated while suppressing the deterioration of the characteristics of the charge pump circuit. That is, by using the charge pump circuit 120A for a large current and the charge pump circuit 120B for a small current in combination, the charge pump circuit 120 with a reduced leakage current can be realized while expanding the frequency band of the reference clock or the transmission frequency band. Further, low jitter can be realized in a PLL circuit equipped with such a charge pump circuit 120. As a result, in a system in which a plurality of low-jitter PLL circuits are conventionally mounted to widen the frequency band of the reference clock or the transmission frequency band, the same function can be realized with BR> P P PLL circuits. The area and cost can be reduced.
  • the switch circuit SW71 When the switch circuit SW71 is controlled to be turned on, the node N11 and the node N13 have the same potential.
  • the switch circuit SW72 When the switch circuit SW72 is controlled to be turned on, the node N12 and the node N13 have the same potential.
  • the node N13 and the output node Nout have the same potential due to the action of the amplifier G1.
  • the node N11, the node N12, and the output node Nout can be equipotential to prevent leakage current.
  • a switch circuit SW73 as an equipotential means is provided between the node N21 and the node N23, and a switch circuit SW74 as an equipotential means is provided between the node N22 and the node N23. It is provided.
  • the switch circuit SW73 When the switch circuit SW73 is controlled to be on, the node N21 and the node N23 have the same potential, and when the switch circuit SW74 is controlled to be on, the node N22 and the node N23 have the same potential.
  • the node N23 and the output node Nout have the same potential due to the action of the amplifier G2.
  • the node N21, the node N22, and the output node Nout can be equipotential to prevent leakage current.
  • the output node Nout and the nodes N11 and N12 are connected via the amplifier G1, and further, the amplifier G1 and the node N11 are connected via the switch circuit SW81.
  • the amplifier G1 and the node N12 are connected via the switch circuit SW82.
  • the switch circuit SW81 when the switch circuit SW81 is turned on, the node N11 and the output node Nout have the same potential, and when the switch circuit SW82 is turned on, the node N12 and the output node Nout have the same potential. Then, by controlling both the switch circuits SW81 and SW82 to be on, the node N11 and the node N12 are also at the same potential. As a result, the node N11, the node N12, and the output node Nout can be equipotential to prevent leakage current.
  • the output node Nout and the nodes N21 and N22 are connected via an amplifier G2, and further, the amplifier G2 and the node N21 are connected via a switch circuit SW83. The amplifier G2 and the node N22 are connected via a switch circuit SW84.
  • the switch circuit SW83 when the switch circuit SW83 is controlled to be turned on, the potential between the node N21 and the output node Nout becomes the same potential, and when the switch circuit SW84 is controlled to be turned on, the potential between the node N22 and the output node Nout becomes the same potential. Then, by controlling both the switch circuits SW83 and SW84 to be on, the nodes N21 and N22 are also at the same potential. As a result, the node N21, the node N22, and the output node Nout can be equipotential to prevent leakage current.
  • the node N11, the node N12, and the output node Nout are made equipotential to prevent leakage current, and in the charge pump circuit 120B, the node N21, the node N22, In addition, it is possible to prevent the leak current by setting the output node Nout to the same potential.
  • the node N11, the node N12, and the output node Nout are made equipotential to prevent leakage current, and in the charge pump circuit 120B, the node N21, the node N22, In addition, it is possible to prevent the leak current by setting the output node Nout to the same potential.
  • [Modification 6] 13 shows an example in which the positional relationship between the switch circuit and the constant current source with respect to the output node Nout is changed from the configuration of the modification 5 shown in FIG.
  • connection point between the constant current source Is11 and the switch circuit SW11 is a node N11
  • the connection point between the constant current source Is12 and the switch circuit SW12 is a node N12
  • the connection point between the constant current source Is21 and the switch circuit SW21 is A node N21 is shown
  • a connection point between the constant current source Is22 and the switch circuit SW22 is shown as a node N22.
  • the node N11, the node N12, and the output node Nout are made equipotential to prevent leakage current, and in the charge pump circuit 120B, the node N21, the node N22, In addition, it is possible to prevent the leak current by setting the output node Nout to the same potential.
  • a PLL (Phase Locked Loop) circuit comprising a phase frequency comparator that compares the phase frequencies of a reference signal and a signal to be compared, and a charge pump unit that supplies current to a low-pass filter according to the comparison result of the phase frequency comparator.
  • the charge pump unit includes a plurality of charge pump circuits that generate a charge pump current at a common output node connected to the low-pass filter, Each of the charge pump circuits includes a first current source as a discharge-type constant current source for the output node, a first switch for switching connection between the first current source and the output node, and a suction type for the output node.
  • a second current source as a constant current source, and a second switch for switching the connection between the second current source and the output node
  • At least one of the charge pump circuits includes a first node between the first current source and the first switch, the second current source, and the second current when the charge pump circuit stops the charge pump operation.
  • a PLL circuit comprising equipotential means for adjusting the second node between the switch and the output node to equipotential.
  • the plurality of charge pump units include a first charge pump circuit for supplying a large current to the low-pass filter and a second charge pump circuit for supplying a small current,
  • the equipotential means included in the first charge pump circuit includes a first charge pump circuit.
  • At least one of the charge pump circuits is connected between the first node and the second node by a third switch and a fourth switch connected in series, and a first switch between the third switch and the fourth switch.
  • the three nodes and the output node are connected by a voltage follower amplifier,
  • the equipotential means sets the first node, the second node, and the output node by turning on the third switch and the fourth switch while the charge pump circuit stops the charge pump operation.
  • the PLL circuit according to (1) or (2), wherein the PLL circuit is adjusted to a potential.
  • the third switch and the first switch are connected to the first node, and the fourth switch and the second switch are connected to the second node.
  • the first switch and the third switch are turned off when one is turned on, and the other is turned off when the second switch and the fourth switch are turned on.
  • a semiconductor device comprising the PLL circuit according to any one of (1) to (5).
  • Constant current source N11 ... Node, N12 ... Node, N13 ... Node, N21 ... Node, N22 ... Node, N23 ... Node, Nout ... Output node, SW11 ... Switch circuit, SW12 ... Switch circuit, SW1 ... Switch circuit, SW14 ... Switch circuit, SW21 ... Switch circuit, SW22 ... Switch circuit, SW23 ... Switch circuit, SW24 ... Switch circuit, SW30 ... Switch circuit, SW31 ... Switch circuit, SW41 ... Switch circuit, SW42 ... Switch circuit, SW51 ... Switch circuit, SW52 ... Switch circuit, SW71 ... Switch circuit, SW72 ... Switch circuit, SW73 ... Switch circuit, SW74 ... Switch circuit, SW81 ... Switch circuit, SW82 ... Switch circuit, SW83 ... Switch circuit, SW84 ... Switch circuit

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Abstract

La présente invention vise à réduire un courant de fuite qui circule à travers un circuit de pompe de charge lorsque le fonctionnement de la pompe de charge est arrêté. Pour ce faire, une pluralité de circuits de pompe de charge qui génèrent chacun un courant de pompe de charge au niveau d'un nœud de sortie commun relié à un filtre passe-bas. Chacun des circuits de pompe de charge comprend une première source de courant sous la forme d'une source de courant constant du type à décharge pour le nœud de sortie, un premier commutateur pour commuter la connexion entre la première source de courant et le nœud de sortie, une deuxième source de courant sous la forme d'une source de courant constant du type à aspiration pour le nœud de sortie, et un deuxième commutateur pour commuter la connexion entre la deuxième source de courant et le nœud de sortie. Au moins l'un des circuits de pompe de charge comprend des moyens d'égalisation de potentiel destinés à ajuster un premier nœud entre la première source de courant et le premier commutateur, un deuxième nœud entre la deuxième source de courant et le deuxième commutateur, et le nœud de sortie en vue d'obtenir des potentiels égaux lorsque le fonctionnement de la pompe de charge du circuit de pompe de charge est arrêté.
PCT/JP2015/070525 2014-09-18 2015-07-17 Circuit à boucle à verrouillage de phase (pll) et dispositif semiconducteur WO2016042911A1 (fr)

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JP2014190598A JP2016063437A (ja) 2014-09-18 2014-09-18 ＰＬＬ（ＰｈａｓｅＬｏｃｋｅｄＬｏｏｐ）回路および半導体装置

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CN111279598A (zh) * 2017-11-29 2020-06-12 国际商业机器公司 差分电荷泵
CN112953521A (zh) * 2019-12-11 2021-06-11 精工爱普生株式会社 电荷泵电路、pll电路和振荡器

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CN111279598A (zh) * 2017-11-29 2020-06-12 国际商业机器公司 差分电荷泵
CN111279598B (zh) * 2017-11-29 2024-05-24 国际商业机器公司 差分电荷泵
CN112953521A (zh) * 2019-12-11 2021-06-11 精工爱普生株式会社 电荷泵电路、pll电路和振荡器
CN112953521B (zh) * 2019-12-11 2023-06-13 精工爱普生株式会社 电荷泵电路、pll电路和振荡器

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