WO2016041228A1 - 一种显示面板及其像素结构和驱动方法 - Google Patents

一种显示面板及其像素结构和驱动方法 Download PDF

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Publication number
WO2016041228A1
WO2016041228A1 PCT/CN2014/088851 CN2014088851W WO2016041228A1 WO 2016041228 A1 WO2016041228 A1 WO 2016041228A1 CN 2014088851 W CN2014088851 W CN 2014088851W WO 2016041228 A1 WO2016041228 A1 WO 2016041228A1
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Prior art keywords
partition
electrically connected
pole
main area
voltage
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PCT/CN2014/088851
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English (en)
French (fr)
Inventor
姚晓慧
陈政鸿
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深圳市华星光电技术有限公司
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Priority to US14/416,878 priority Critical patent/US20160125825A1/en
Publication of WO2016041228A1 publication Critical patent/WO2016041228A1/zh

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
    • G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
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    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
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    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display

Definitions

  • the present invention relates to image display technology, and more particularly to a display panel having both two-dimensional and three-dimensional displays, and a pixel structure and driving method thereof.
  • Film Patterned Retarder is one of the mainstream technologies for 3D display.
  • the technology attaches a polarizing film to a liquid crystal display panel, and separates the three-dimensional image into a left-eye image and a right-eye image through cooperation with the polarized glasses, and then transmits the images to the left and right eyes of the viewer respectively.
  • Three-dimensional display has certain drawbacks. That is, when the viewer is at a large viewing angle, cross-talk of the left and right eye images occurs. This phenomenon can cause the image viewed by the observer to be blurred.
  • a large-size liquid crystal display panel employing a vertical alignment display mode also has a technical problem of large-color-shift.
  • current liquid crystal display panel manufacturers generally use charge-shared technology (Charge-shared), the pixel electrode of each sub-pixel in the pixel structure is divided into two parts of the main area (Main) and the partition (Sub), in the same gray level Under the driving of the voltage, different voltages are applied to the main area and the partition, and the liquid crystal molecules corresponding to the main area and the partition are controlled to be deflected according to different deflection angles to achieve a low color shift effect.
  • the liquid crystal display panel manufacturer will appropriately increase the shading distance between the adjacent pixels in the upper and lower directions when designing the three-dimensional FPR pixel structure, but this will affect the transmittance under the two-dimensional display condition.
  • the liquid crystal display panel cannot achieve the above-described low color shift effect under the three-dimensional display condition. Therefore, how to make the liquid crystal display panel have both a two-dimensional and three-dimensional display function and a low color shift display effect is a technical problem that the present in the industry is trying to solve.
  • the present invention provides a display panel having both a two-dimensional and three-dimensional display function and a low color shift display effect, and a pixel structure and a driving method thereof.
  • the pixel structure proposed by the present invention includes a plurality of sub-pixels, and the pixel electrodes of each sub-pixel include:
  • a main area configured to receive a scan signal of the first scan line, and further receive a data signal on the data line to have a main area voltage
  • a first partition electrically connected to the main area, configured to receive a scan signal of the first scan line, and further receive a main division voltage to have a first partition voltage
  • a second partition configured to receive a scan signal of the second scan line, and further receive the data signal on the data line to have a second partition voltage
  • the main area voltage, the first partition voltage, and the second partition voltage are different from each other.
  • the main area is electrically connected to the data line through the first pole and the second pole of the main area charging switch, and the control end of the main area charging switch is electrically connected to the first scan line;
  • a primary area liquid crystal capacitor and a main area storage capacitor are connected.
  • the first partition is electrically connected to the main area through the first pole and the second pole of the first partition charging switch, and the control end of the first partition charging switch is electrically connected to the first scan line;
  • a partition is electrically connected to a first partition liquid crystal capacitor and a first partition storage capacitor, and the first partition liquid crystal capacitor or the first partition storage capacitor is electrically connected to the first pole and the second pole of the first partition discharge switch The control end of the first zone discharge switch is electrically connected to the first scan line.
  • the second partition is electrically connected to the data line through the first pole and the second pole of the second partition charging switch, and the control end of the second partition charging switch is electrically connected to the second scan line;
  • the partition is electrically connected to a second partition liquid crystal capacitor and a second partition storage capacitor; the two ends of the second partition liquid crystal capacitor or the second partition storage capacitor are electrically connected to the first pole and the second pole of the second partition discharge switch
  • the control end of the second zone discharge switch is electrically connected to the second scan line.
  • the main area liquid crystal capacitor, the first partition liquid crystal capacitor and the second partition liquid crystal capacitor are respectively composed of a common electrode of the main area, the first partition and the second partition and the color filter substrate;
  • the first partition storage capacitor and the second partition storage capacitor are respectively composed of a main area, a first partition, and a second partition and a common electrode of the array substrate.
  • the present invention also provides a display panel, including:
  • a plurality of sub-pixels are disposed in the sub-pixel region, and the pixel electrodes of each sub-pixel include:
  • a main area configured to receive a scan signal of the first scan line, and further receive a data signal on the data line to have a main area voltage
  • a first partition electrically connected to the main area, configured to receive a scan signal of the first scan line, and further receive a voltage of the main area to have a first partition voltage
  • a second partition configured to receive a scan signal of the second scan line, and further receive the data signal on the data line to have a second partition voltage
  • the main area voltage, the first partition voltage, and the second partition voltage are different from each other.
  • the main area is electrically connected to the data line through the first pole and the second pole of the main area charging switch, and the control end of the main area charging switch is electrically connected to the first scan line; Connecting a main area liquid crystal capacitor and a main area storage capacitor;
  • the first partition is electrically connected to the main area through the first pole and the second pole of the first partition charging switch, and the control end of the first partition charging switch is electrically connected to the first scan line;
  • the first partition is electrically connected to the first partition a first partition liquid crystal capacitor and a first partition storage capacitor, the first partition liquid crystal capacitor or the first partition storage capacitor is electrically connected to the first pole and the second pole of the first partition discharge switch, and the first partition discharge switch
  • the control terminal is electrically connected to the first scan line;
  • the second partition is electrically connected to the data line through the first pole and the second pole of the second partition charging switch, and the control end of the second partition charging switch is electrically connected to the second scan line;
  • the second partition is electrically connected a second partition liquid crystal capacitor and a second partition storage capacitor;
  • the second partition liquid crystal capacitor or the second partition storage capacitor is electrically connected to the first pole and the second pole of the second partition discharge switch, and the second partition discharge switch
  • the control terminal is electrically connected to the second scan line.
  • the present invention further provides a driving method of a display panel
  • the display panel includes a plurality of data lines, a plurality of scan lines, and a plurality of sub-pixels, wherein the data lines and the scan lines are alternately arranged to form a plurality of sub-pixel regions, and the sub-pixels are disposed on a sub-pixel region, and the pixel electrode of each sub-pixel includes a main area, a first partition, and a second partition, wherein the main area is electrically connected to the first partition, and the driving method comprises a two-dimensional and/or three-dimensional display driving step;
  • the two-dimensional display driving step includes during the positive/negative polarity inversion period:
  • the data signal is transmitted to the main area through the data line, so that the main area has the main area voltage, so that the first partition has a first partition voltage different from the main area voltage;
  • the data signal is transmitted to the second partition through the data line, so that the second partition has a second partition voltage different from the main area voltage and the first partition voltage;
  • the three-dimensional display driving step includes:
  • the data signal is transmitted to the main area through the data line such that the main area has a main area voltage, thereby causing the first sub-area to have a first sub-area voltage different from the main area voltage.
  • the first partition is obtained by dividing the first partition voltage in series with the main region.
  • the above three-dimensional display driving step it is preferable to perform black insertion during the vertical retrace to form the second region to form a black region.
  • the display panel of the present invention adopts a pixel structure of a 1D2G structure (including one data line and two scan lines) and three regions (Main area, Sub1 area, and Sub2 area), which can be in a two-dimensional display mode.
  • the low color shift effect of the two-dimensional display is realized by voltages different from each other in the three regions, and in the three-dimensional display mode, after the Sub2 region is formed into a wider light-shielding region required for three-dimensional display, the Main region and the Sub1 region are utilized. The potential difference is used to achieve a low color shift effect of the three-dimensional display.
  • the compatibility between the two-dimensional display and the three-dimensional display is realized, and the two-dimensional display and the three-dimensional display both have good low color shift effects and improve the image display quality.
  • the main region and the first region are electrically connected, and the first region preferably obtains a first partition voltage different from the voltage of the main region by means of series voltage division.
  • This pixel structure is simpler and reduces the complexity of the manufacturing process.
  • FIG. 1 is a schematic structural view of a display panel according to Embodiment 1 of the present invention.
  • FIG. 2 is a schematic structural diagram of a pixel electrode of a sub-pixel according to Embodiment 1 of the present invention.
  • FIG. 3 is an equivalent circuit diagram of the sub-pixel shown in FIG. 2;
  • FIG. 4 is a schematic view showing an operation state of a pixel electrode of the sub-pixel shown in FIG. 2 in a three-dimensional display mode.
  • the display panel includes an image display area 100, a scan driving circuit 200, and a data driving circuit 300.
  • the image display area 100 includes an array in which a plurality of scanning lines GL1 to GLM and a plurality of data lines DL1 to DLN are alternately arranged, and a plurality of pixel structures 110 as array elements.
  • the scan driving circuit 200 transmits the supplied scan signal to the pixel structure 110 in the image display area 100 through the plurality of scan lines GL1 G GLM coupled thereto.
  • the data driving circuit 200 transmits the supplied data signal to the pixel structure 110 in the image display area 100 through a plurality of data lines DL1 DL DLN coupled thereto.
  • a pixel structure 110 of a color display panel includes red sub-pixels, green sub-pixels, and blue sub-pixels.
  • all sub-pixels adopt a 1D2G structure. That is, for one sub-pixel, the vertical data line and the horizontal first scan line and the second scan line together define a sub-pixel region, that is, a pixel electrode region that collectively defines a sub-pixel.
  • FIG. 2 is a schematic structural diagram of a pixel electrode of a sub-pixel drawn according to an embodiment of the present invention.
  • the pixel electrode is divided into three parts: a main area Main, a first partition Sub1, and a second partition Sub2. Each of these parts is divided into four domains in a preferred manner:
  • Main area Main configured to receive the scan signal Gn of the first scan line, receive the data signal Data on the data line under the action of the scan signal Gn and have a main area voltage V_Main;
  • the first partition Sub1 is electrically connected to the main area Main, configured to receive the scan signal Gn of the first scan line, and receive the main area voltage V_Main under the action of the scan signal Gn to have the first partition voltage V_Sub1;
  • the second partition Sub2 configured to receive the scan signal Gn+1 of the second scan line, receive the data signal Data on the data line under the action of the scan signal Gn+1 and have a second partition voltage V_Sub2;
  • the main area voltage V_Main, the first partition voltage V_Sub1 and the second partition voltage V_Sub2 should be different from each other, so that the liquid crystal display panel can achieve a low color shift effect in the two-dimensional display mode; in addition, when the liquid crystal display panel operates In the three-dimensional display mode, the second partition Sub2 turns off the display function and functions as a blackout area, and since the main area voltage V_Main and the first partition voltage V_Sub1 are different from each other, This also achieves a low color shift effect.
  • first scan line Gn and the second scan line Gn+1 are two adjacent scan lines, but the actual application may not be limited thereto.
  • FIG. 3 is an equivalent circuit diagram of the sub-pixel shown in FIG. 2.
  • the first pole and the second pole of the main area charging switch TFT_A are electrically connected between the data line and the main area Main, and the control end of the charging switch TFT_A is electrically connected to the first scanning line to receive the scan. Signal Gn.
  • the main area Main is also electrically connected to the storage capacitor Cst_Main and the liquid crystal capacitor Clc_Main.
  • the charging switch TFT_A is turned on, and the data signal Data on the data line is transmitted to the storage capacitor Cst_Main and the liquid crystal capacitor Clc_Main via the switching element TFT_A, and the storage capacitor Cst_Main and the liquid crystal capacitor Clc_Main are stored according to the data signal Data. Potential.
  • the main area Main has a corresponding main area voltage V_Main, so that the liquid crystal corresponding to the main area Main is deflected correspondingly, thereby displaying corresponding image data.
  • the main area storage capacitor Cst_Main may be composed of the main area Main and the common electrode A_com of the array substrate; the main area liquid crystal capacitor Clc_Main may be composed of the main area Main and the common electrode CF_com of the color filter substrate.
  • the first pole and the second pole of the first partition charging switch TFT_B are electrically connected between the main area Main and the first partition Sub1, and the control end of the charging switch TFT_B is electrically connected to the first scanning line.
  • the first partition Sub1 is electrically connected to the storage capacitor Cst_Sub1 and the liquid crystal capacitor Clc_Sub1.
  • the two ends of the storage capacitor Cst_Sub1 or the liquid crystal capacitor Clc_Sub1 are electrically connected to the first pole and the second pole of the discharge switch TFT_C, and the control terminal of the discharge switch TFT_C is electrically connected.
  • the first scan line is connected to receive the scan signal Gn.
  • the charging switch TFT_B Under the action of the scanning signal Gn, the charging switch TFT_B is turned on, the main area voltage V_Main is transmitted to the storage capacitor Cst_Sub1 and the liquid crystal capacitor Clc_Sub1 via the switching element TFT_B, and the storage capacitor Cst_Sub1 and the liquid crystal capacitor Clc_Sub1 are stored according to the main area voltage V_Main to store the corresponding potential. .
  • the charging switch TFT_C since the charging switch TFT_C is also turned on, the potential on the storage capacitor Cst_Sub1 and the liquid crystal capacitor Clc_Sub1 is lowered by the leakage of the switching element TFT_C. Based on this, the first partition Sub1 has a first partition voltage V_Sub1 different from the main region voltage V_Main, so that the liquid crystal corresponding to the first partition Sub1 is correspondingly deflected, thereby displaying corresponding image data.
  • the first partition storage capacitor Cst_Sub1 may be composed of the first partition Sub1 and the common electrode A_com of the array substrate; the first partition liquid crystal capacitor Clc_Sub1 may be composed of the first partition Sub1 and the common electrode CF_com of the color filter substrate. .
  • the first pole and the second pole of the second partition charging switch TFT_D are electrically connected between the data line and the second partition Sub2, and the control end of the charging switch TFT_D is electrically connected to the first scan line.
  • the second partition Sub2 is electrically connected to the storage capacitor Cst_Sub2 and the liquid crystal capacitor Clc_Sub2.
  • the two ends of the storage capacitor Cst_Sub2 or the liquid crystal capacitor Clc_Sub2 are electrically connected to the first pole and the second pole of the discharge switch TFT_E, and the control terminal of the discharge switch TFT_E is electrically connected.
  • the first scan line is connected to receive the scan signal Gn+1.
  • the charging switch TFT_D Under the action of the scanning signal Gn+1, the charging switch TFT_D is turned on, and the data signal Data on the data line is transmitted to the storage capacitor Cst_Sub2 and the liquid crystal capacitor Clc_Sub2 via the switching element TFT_D, and the storage capacitor Cst_Sub2 and the liquid crystal capacitor Clc_Sub2 are charged according to the data signal Data. Store the corresponding potential.
  • the charging switch TFT_E since the charging switch TFT_E is also turned on, the potential on the storage capacitor Cst_Sub2 and the liquid crystal capacitor Clc_Sub2 drops due to leakage of the switching element TFT_E.
  • the second partition Sub2 has a second partition voltage V_Sub2 different from the main region voltage V_Main, so that the liquid crystal corresponding to the second partition Sub2 is correspondingly deflected, thereby displaying corresponding image data.
  • the second partition storage capacitor Cst_Sub2 may be composed of the second partition Sub2 and the common electrode A_com of the array substrate; the second partition liquid crystal capacitor Clc_Sub2 may be composed of the second partition Sub2 and the common electrode CF_com of the color filter substrate. .
  • the potentials V_Main, V_Sub1, and V_Sub2 of the pixel electrodes of the above or below sub-pixels may refer to the potential of the pixel electrode itself, and may also refer to the common electrode A_com of the pixel electrode relative to the array substrate or to the color filter substrate.
  • the voltage difference of the common electrode CF_com is a common knowledge in the art. Therefore, the potential meaning of the pixel electrode in the present invention is not limited to the definition in the embodiment of the present invention.
  • Each of the above-mentioned charging switch and discharging switch is preferably made of a thin film transistor, and the first and second poles are generally a drain and a source, and the control terminal is a gate.
  • the voltage of the data signal is higher than the common electrode (in the present embodiment, the common electrode CF_com of the color filter substrate and/or the common electrode A_com of the array substrate) Voltage.
  • the charging switch TFT_A of the main area is turned on, so that the data signal Data on the data line is via the charging switch
  • the TFT_A is sent to the liquid crystal capacitor Clc_Main of the main area and the storage capacitor Cst_Main, the liquid crystal capacitor Clc_Main of the main area and the storage capacitor Cst_Main are charged according to the data signal Data to store the corresponding voltage, that is, the main area voltage V_Main;
  • the charging switch TFT_B and the discharging switch TFT_C of the first partition are turned on, so that the main-region voltage V_Main is transmitted to the liquid crystal capacitor Clc_Sub1 and the storage capacitor Cst_Sub1 of the first partition via the charging switch TFT_B, and the liquid crystal capacitor Clc_Sub1 and the storage capacitor Cst_Sub1 of the first partition are according to the main region.
  • the voltage V_Main is charged to store the corresponding voltage; at the same time, due to the opening of the discharge switch TFT_C, the potentials of the liquid crystal capacitor Clc_Sub1 and the storage capacitor Cst_Sub1 of the first partition are dropped to the first partition voltage different from the main region voltage V_Main via the leakage of the discharge switch TFT_C.
  • the charge switch TFT_D and the discharge switch TFT_E of the second partition are turned off, and the second division voltage V_Sub2 is zero.
  • the charging switch TFT_A of the main area is turned off, the charging switch TFT_B of the first partition and the discharging switch TFT_C are turned off, and the main area voltage V_Main and the first partition voltage V_Sub1 are unchanged;
  • the charging switch TFT_D and the discharging switch TFT_E of the second partition are turned on, so that the data signal Data on the data line is transmitted to the liquid crystal capacitor Clc_Sub2 and the storage capacitor Cst_Sub2 of the second partition via the charging switch TFT_D, and the liquid crystal capacitor Clc_Sub2 and the storage capacitor Cst_Sub2 of the second partition
  • the corresponding voltage is stored according to the charging of the data signal Data; and at the same time, due to the opening of the discharge switch TFT_E, the potential of the liquid crystal capacitor Clc_Sub2 and the storage capacitor Cst_Sub2 of the second partition is dropped to the second main voltage V_Main by the leakage of the discharge switch TFT_E. Partition voltage V_Sub2.
  • the voltage of the data signal is lower than that of the common electrode (in the present embodiment, the common electrode CF_com of the color filter substrate and/or the common electrode A_com of the array substrate) Voltage.
  • the charging switch TFT_A of the main area is turned on, so that the data signal Data on the data line is transmitted to the liquid crystal capacitor Clc_Main and the storage capacitor Cst_Main of the main area via the charging switch TFT_A, and the liquid crystal capacitor Clc_Main and the storage capacitor Cst_Main of the main area are stored according to the data signal Data discharge.
  • the corresponding voltage that is, the main area voltage V_Main;
  • the charging switch TFT_B and the discharging switch TFT_C of the first partition are turned on, so that the main-region voltage V_Main is transmitted to the liquid crystal capacitor Clc_Sub1 and the storage capacitor Cst_Sub1 of the first partition via the charging switch TFT_B, and the liquid crystal capacitor Clc_Sub1 and the storage capacitor Cst_Sub1 of the first partition are according to the main region.
  • the voltage V_Main is discharged to store the corresponding voltage.
  • the potential of the liquid crystal capacitor Clc_Sub1 and the storage capacitor Cst_Sub1 of the first partition rises to the first partition voltage different from the main region voltage V_Main via the leakage of the discharge switch TFT_C.
  • the charge switch TFT_D and the discharge switch TFT_E of the second partition are turned off, and the second division voltage V_Sub2 is zero.
  • the charging switch TFT_A of the main area is turned off, the charging switch TFT_B of the first partition and the discharging switch TFT_C are turned off, and the main area voltage V_Main and the first partition voltage V_Sub1 are unchanged;
  • the charging switch TFT_D and the discharging switch TFT_E of the second partition are turned on, so that the data signal Data on the data line is transmitted to the liquid crystal capacitor Clc_Sub2 and the storage capacitor Cst_Sub2 of the second partition via the charging switch TFT_D, and the liquid crystal capacitor Clc_Sub2 and the storage capacitor Cst_Sub2 of the second partition
  • the corresponding voltage is stored according to the data signal Data discharge; at the same time, due to the opening of the discharge switch TFT_E, the potential of the liquid crystal capacitor Clc_Sub2 and the storage capacitor Cst_Sub2 of the second partition rises to a second level different from the main area voltage V_Main via the discharge switch TFT_E leakage. Partition voltage V_Sub2.
  • RA, RB, and RC are the equivalent resistances of the main area charging switch TFT_A, the charging switch TFT_B of the first partition, and the discharge switch TFT_C, respectively.
  • the second partition obtains a second partition voltage V_sub2 different from the main region voltage V_Main and the first partition voltage V_Sub1 by the control of the second partition charging switch TFT_D and the discharging switch TFT_E.
  • the main region voltage, the first sub-region voltage, and the second sub-region voltage of the pixel electrode are different from each other during the positive polarity inversion period or during the negative polarity inversion period. This makes the images displayed in the three regions more distinct from each other, and thus enables low color shift display in two-dimensional display.
  • FIG. 4 is a schematic view showing an operation state of a pixel electrode of the sub-pixel shown in FIG. 2 in a three-dimensional display mode.
  • the second partition of the pixel electrode is blackened during the vertical retrace to form a black area, and then the scan signal Gn+1 for controlling the operation of the second partition is turned off, so that the second partition voltage V_Sub2 is zero.
  • the data signal is transmitted to the main area and the first partition through the data line at the same time, so that the main area and the first partition have the main area voltage and the first partition voltage, respectively, and the main area voltage and There is a set voltage difference between the first zone voltages. Since there is a voltage difference between the main area voltage and the first sub-area voltage, the images displayed by the main area and the first sub-area are significantly different from each other, so that the color shift problem in three-dimensional display can also be effectively solved.

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Abstract

一种显示面板及其像素结构（110）和驱动方法。像素结构（110）包括多个子像素，每个子像素包括：主区（Main），配置以接收第一扫描线（GL1）的扫描信号（Gn），进而接收数据线（DL1）上的数据信号（Data）而具有主区电压（V_Main）；第一分区（Sub1），电性连接主区（Main），配置以接收第一扫描线（GL1）的扫描信号（Gn），进而接收主区电压（V_Main）而具有第一分区电压（V_Sub1）；第二分区（Sub2），配置以接收第二扫描线（GL2）的扫描信号（Gn），进而接收数据线（DL1）上的数据信号（Data）而具有第二分区电压（V_Sub2）；并且主区电压（V_Main）、第一分区电压（V_Sub1）与第二分区电压（V_Sub2）互不相同。显示面板既可以实现2D低色偏显示，也可以在第二分区（Sub2）形成遮光区后，利用主区（Main）与第一分区（Sub1）的电压差实现3D低色偏显示。

Description

一种显示面板及其像素结构和驱动方法
本申请要求享有2014年9月18日提交的名称为“一种显示面板及其像素结构和驱动方法”的中国专利申请为CN201410478330.1的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及图像显示技术，特别是关于一种兼具二维和三维显示的显示面板及其像素结构和驱动方法。
背景技术
随着显示技术的不断发展，三维立体显示技术已经成为当下最引人注目的技术发展方向之一。薄膜交错相位差带式(Film Patterned Retarder，简称FPR)是目前三维显示的主流技术之一。该技术将偏振薄膜贴附于液晶显示面板上，通过其与偏振眼镜的配合将三维画面分离为左眼图像和右眼图像，然后将图像分别传送至观看者的左眼和右眼，以实现三维立体显示。但是这种技术存在一定的缺陷。即，当观看者处于较大视角时，会出现左右眼影像互相串扰(Cross-talk)的现象。这种现象会导致观察者观看到的图像模糊不清。
此外，采用垂直取向显示模式(Vertical Alignment，简称VA模式)的大尺寸液晶显示面板还存在大视角色偏(Color-shift)的技术问题。对此，当前液晶显示面板生产厂家一般采用电荷分享技术(Charge-shared)，将像素结构中每个子像素的像素电极划分为主区(Main)和分区(Sub)两个部分，在同一灰阶电压的驱动下，对主区和分区施加不同的电压，控制主区和分区对应的液晶分子按照不同的偏转角度进行偏转，以实现低色偏效果。
为了避免三维显示出现串扰现象，液晶显示面板生产厂家在设计三维FPR像素结构时，会适当地增大上下行相邻像素间的遮光距离，但这会影响二维显示条件下的穿透率。同时，液晶显示面板在三维显示条件下无法实现上述低色偏效果。因此，如何使液晶显示面板在兼具二维和三维显示功能的同时还具备低色偏显示效果，是当前业内技术人员致力解决的技术问题。
发明内容
针对上述问题，本发明提出了一种兼具二维和三维显示功能，同时还具备低色偏显示效果的显示面板及其像素结构和驱动方法。
本发明提出的像素结构，其包括多个子像素，每个子像素的像素电极包括：
主区，配置以接收第一扫描线的扫描信号，进而接收数据线上的数据信号而具有主区电压；
第一分区，电性连接主区，配置以接收第一扫描线的扫描信号，进而接收主区分压而具有第一分区电压；
第二分区，配置以接收第二扫描线的扫描信号，进而接收数据线上的数据信号而具有第二分区电压；
其中，主区电压、第一分区电压与第二分区电压互不相同。
根据本发明的实施例，上述主区通过一主区充电开关的第一极和第二极电性连接数据线，主区充电开关的控制端电性连接第一扫描线；同时主区还电性连接一主区液晶电容和一主区存储电容。
根据本发明的实施例，上述第一分区通过一第一分区充电开关的第一极和第二极电性连接主区，第一分区充电开关的控制端电性连接第一扫描线；同时第一分区还电性连接一第一分区液晶电容和一第一分区存储电容，第一分区液晶电容或第一分区存储电容的两端电性连接一第一分区放电开关的第一极和第二极，第一分区放电开关的控制端电性连接第一扫描线。
根据本发明的实施例，上述第二分区通过一第二分区充电开关的第一极和第二极电性连接数据线，第二分区充电开关的控制端电性连接第二扫描线；第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，第二分区放电开关的控制端电性连接第二扫描线。
根据本发明的实施例，上述主区液晶电容、第一分区液晶电容和第二分区液晶电容分别由主区、第一分区和第二分区与彩色滤波片基板的共同电极构成；主区存储电容、第一分区存储电容和第二分区存储电容分别由主区、第一分区和第二分区与所在阵列基板的共同电极构成。
此外，本发明还提出一种显示面板，其包括：
多条数据线；
多条扫描线，与数据线交错配置形成多个子像素区；
多个子像素，配置于子像素区内，每个子像素的像素电极包括：
主区，配置以接收第一扫描线的扫描信号，进而接收数据线上的数据信号而具有主区电压；
第一分区，电性连接主区，配置以接收第一扫描线的扫描信号，进而接收主区电压而具有第一分区电压；
第二分区，配置以接收第二扫描线的扫描信号，进而接收数据线上的数据信号而具有第二分区电压；
其中，主区电压、第一分区电压与第二分区电压互不相同。
根据本发明的实施例，上述主区通过一主区充电开关的第一极和第二极电性连接数据线，主区充电开关的控制端电性连接第一扫描线；主区还电性连接一主区液晶电容和一主区存储电容；
上述第一分区通过一第一分区充电开关的第一极和第二极电性连接主区，第一分区充电开关的控制端电性连接第一扫描线；第一分区还电性连接一第一分区液晶电容和一第一分区存储电容，第一分区液晶电容或第一分区存储电容的两端电性连接一第一分区放电开关的第一极和第二极，第一分区放电开关的控制端电性连接第一扫描线；
上述第二分区通过一第二分区充电开关的第一极和第二极电性连接数据线，第二分区充电开关的控制端电性连接第二扫描线；第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，第二分区放电开关的控制端电性连接第二扫描线。
此外，本发明还提出一种显示面板的驱动方法，该显示面板包括多条数据线、多条扫描线以及多个子像素，数据线与扫描线交错配置以形成多个子像素区，子像素配置于子像素区内，且每个子像素的像素电极包括主区、第一分区和第二分区，其中主区与第一分区电性连接，该驱动方法包括二维和/或三维显示驱动步骤；
所述二维显示驱动步骤包括，在正/负极性反转期间内：
于第一时刻，通过数据线传送数据信号至主区，使主区具有主区电压，进而使得第一分区具有与主区电压不同的第一分区电压；
于第二时刻，通过数据线传送数据信号至第二分区，使第二分区具有与主区电压和第一分区电压均不同的第二分区电压；
所述三维显示驱动步骤包括：
使第二分区形成黑色区域并保持暗态；
通过数据线传送数据信号至主区，使得主区具有主区电压，进而使得第一分区具有与主区电压不同的第一分区电压。
根据本发明的实施例，上述第一分区通过与主区串联分压的方式获得第一分区电压。
根据本发明的实施例，上述三维显示驱动步骤中，优选在垂直回扫期间进行插黑，使第二分区形成黑色区域。
与现有技术相比，本发明的一个或多个实施例可以具有如下优点：
1、本发明的显示面板采用1D2G结构(包含一根数据线和两根扫描线)和3区(Main区、Sub1区和Sub2区)12畴的像素结构，既能够在二维显示模式下，通过三区互不相同的电压实现二维显示的低色偏效果，又能够在三维显示模式下，在使Sub2区形成三维显示所需的较宽的遮光区后，利用Main区和Sub1区的电位差异来实现三维显示的低色偏效果。这样，在保证二维显示穿透率的前提下，实现了二维显示和三维显示的兼容，同时还使得二维显示和三维显示都具有良好的低色偏效果，提高了图像显示品质。
2、本发明的像素结构中主区和第一分区电性连接，第一分区优选以串联分压的方式获得与主区电压不同的第一分区电压。这种像素结构更加简单，降低了制作工艺的复杂度。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1是本发明实施例一的显示面板的结构示意图；
图2是本发明实施例一的子像素的像素电极的结构示意图；
图3是图2所示的子像素的等效电路图；
图4是图2所示的子像素的像素电极在三维显示模式下的工作状态示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，以下结合具体实施例和附图对本发明作进一步地详细说明。
图1是根据本发明实施例一绘制的显示面板的结构示意图。该显示面板包括影像显示区100、扫描驱动电路200和数据驱动电路300。影像显示区100包括由多条扫描线GL1～GLM和多条数据线DL1～DLN交错配置形成的阵列，以及作为阵列元素的多个像素结构110。其中，扫描驱动电路200通过与其耦接的多条扫描线GL1～GLM将所提供的扫描信号传给影像显示区100中的像素结构110。数据驱动电路200通过与其耦接的多条数据线DL1～DLN将所提供的数据信号传给影像显示区100中的像素结构110。
一般而言，彩色显示面板的一个像素结构110包含有红色子像素、绿色子像素和蓝色子像素。在本实施例中，所有子像素都采用一种1D2G结构。即，对于一个子像素，由纵向的数据线与横向的第一扫描线和第二扫描线一起共同界定子像素区，也即共同界定子像素的像素电极区域。
图2是根据本发明实施例一绘制的子像素的像素电极的结构示意图。该像素电极划分为主区Main、第一分区Sub1和第二分区Sub2三个部分。其中，每一个部分均以优选的方式分成四个畴区(domain)：
主区Main，配置以接收第一扫描线的扫描信号Gn，在扫描信号Gn的作用下接收数据线上的数据信号Data而具有主区电压V_Main；
第一分区Sub1，电性连接主区Main，配置以接收第一扫描线的扫描信号Gn，在扫描信号Gn的作用下接收主区电压V_Main而具有第一分区电压V_Sub1；
第二分区Sub2，配置以接收第二扫描线的扫描信号Gn+1，在扫描信号Gn+1的作用下接收数据线上的数据信号Data而具有第二分区电压V_Sub2；
其中，主区电压V_Main、第一分区电压V_Sub1与第二分区电压V_Sub2应当互不相同，以使液晶显示面板在二维显示模式下，能够实现低色偏效果；此外，当液晶显示面板工作在三维显示模式下时，第二分区Sub2关闭显示功能而作为遮光区使用，同时由于主区电压V_Main与第一分区电压V_Sub1互不相同，因 此也可以实现低色偏效果。
需要说明的是，在本实施例中，第一扫描线Gn与第二扫描线Gn+1互为相邻的两根扫描线，但是实际应用时可以不限于此。
图3是图2所示的子像素的等效电路图。
对于主区Main而言，主区充电开关TFT_A的第一极和第二极电性连接在数据线和主区Main之间，充电开关TFT_A的控制端电性连接第一扫描线，以接收扫描信号Gn。同时，主区Main还电性连接存储电容Cst_Main和液晶电容Clc_Main。在扫描信号Gn的作用下，充电开关TFT_A开启，数据线上的数据信号Data经由开关元件TFT_A传送至存储电容Cst_Main和液晶电容Clc_Main，存储电容Cst_Main和液晶电容Clc_Main则根据数据信号Data充电而存储相应的电位。基于此，主区Main具有相应的主区电压V_Main，使得与主区Main对应的液晶发生相应的偏转，从而显示相应的影像数据。
在具体实施时，主区存储电容Cst_Main可以由主区Main与所在的阵列基板的共同电极A_com构成；主区液晶电容Clc_Main可以由主区Main与彩色滤波片基板的共同电极CF_com构成。
对于第一分区Sub1而言，第一分区充电开关TFT_B的第一极和第二极电性连接在主区Main和第一分区Sub1之间，充电开关TFT_B的控制端电性连接第一扫描线，以接收扫描信号Gn。同时，第一分区Sub1还电性连接存储电容Cst_Sub1和液晶电容Clc_Sub1，存储电容Cst_Sub1或液晶电容Clc_Sub1的两端电性连接放电开关TFT_C的第一极和第二极，放电开关TFT_C的控制端电性连接第一扫描线，以接收扫描信号Gn。在扫描信号Gn的作用下，充电开关TFT_B开启，主区电压V_Main经由开关元件TFT_B传送至存储电容Cst_Sub1和液晶电容Clc_Sub1，存储电容Cst_Sub1和液晶电容Clc_Sub1则根据主区电压V_Main充电而存储相应的电位。同时，由于充电开关TFT_C也开启，因此存储电容Cst_Sub1和液晶电容Clc_Sub1上的电位会经由开关元件TFT_C漏电而下降。基于此，第一分区Sub1具有与主区电压V_Main不同的第一分区电压V_Sub1，使得与第一分区Sub1对应的液晶发生相应的偏转，从而显示相应的影像数据。
在具体实施时，第一分区存储电容Cst_Sub1可以由第一分区Sub1与所在的阵列基板的共同电极A_com构成；第一分区液晶电容Clc_Sub1可以由第一分区Sub1与彩色滤波片基板的共同电极CF_com构成。
对于第二分区Sub2而言，第二分区充电开关TFT_D的第一极和第二极电性连接在数据线和第二分区Sub2之间，充电开关TFT_D的控制端电性连接第一扫描线，以接收扫描信号Gn+1。同时，第二分区Sub2还电性连接存储电容Cst_Sub2和液晶电容Clc_Sub2，存储电容Cst_Sub2或液晶电容Clc_Sub2的两端电性连接放电开关TFT_E的第一极和第二极，放电开关TFT_E的控制端电性连接第一扫描线，以接收扫描信号Gn+1。在扫描信号Gn+1的作用下，充电开关TFT_D开启，数据线上的数据信号Data经由开关元件TFT_D传送至存储电容Cst_Sub2和液晶电容Clc_Sub2，存储电容Cst_Sub2和液晶电容Clc_Sub2则根据数据信号Data充电而存储相应的电位。同时，由于充电开关TFT_E也开启，因此存储电容Cst_Sub2和液晶电容Clc_Sub2上的电位会经由开关元件TFT_E漏电而下降。基于此，第二分区Sub2具有与主区电压V_Main不同的第二分区电压V_Sub2，使得与第二分区Sub2对应的液晶发生相应的偏转，从而显示相应的影像数据。
在具体实施时，第二分区存储电容Cst_Sub2可以由第二分区Sub2与所在的阵列基板的共同电极A_com构成；第二分区液晶电容Clc_Sub2可以由第二分区Sub2与彩色滤波片基板的共同电极CF_com构成。
需要注意的是，上述或下列子像素的像素电极的电位V_Main、V_Sub1和V_Sub2均可以指像素电极本身的电位，也可以指像素电极相对于阵列基板的共同电极A_com或者相对于彩色滤波片基板的共同电极CF_com的电压差，此为本领域的公知常识。因此，本发明中像素电极的电位含义不限于本发明实施例中的定义。
上述各充电开关和放电开关优选薄膜晶体管制作而成，其第一极和第二极通常为漏极和源极，控制端为栅极。
下面具体说明在二维显示模式下和三维显示模式下，像素电极各区电路的工作情况以及像素电极各区电压的变化情况。
在二维显示模式下的正极性反转期间内，数据信号的电压高于共同电极(在本实施例中，指代彩色滤波片基板的共同电极CF_com和/或阵列基板的共同电极A_com)的电压。
1)当第一扫描线上的扫描信号Gn为高电平，第二扫描线上的扫描信号Gn+1为低电平时：
主区的充电开关TFT_A开启，使得数据线上的数据信号Data经由充电开关 TFT_A传送至主区的液晶电容Clc_Main和存储电容Cst_Main，主区的液晶电容Clc_Main和存储电容Cst_Main根据数据信号Data充电而存储相应的电压，也即主区电压V_Main；
第一分区的充电开关TFT_B和放电开关TFT_C开启，使得主区电压V_Main经由充电开关TFT_B传送至第一分区的液晶电容Clc_Subl和存储电容Cst_Sub1，第一分区的液晶电容Clc_Sub1和存储电容Cst_Sub1根据主区电压V_Main充电而存储相应的电压；同时由于放电开关TFT_C的开启，第一分区的液晶电容Clc_Sub1和存储电容Cst_Sub1的电位会经由放电开关TFT_C漏电而下降至与主区电压V_Main不同的第一分区电压V_Sub1；
第二分区的充电开关TFT_D和放电开关TFT_E关闭，第二分区电压V_Sub2为零。
2)当第一扫描线上的扫描信号Gn为低电平，第二扫描线上的扫描信号Gn+1为高电平时：
主区的充电开关TFT_A关闭，第一分区的充电开关TFT_B和放电开关TFT_C关闭，主区电压V_Main和第一分区电压V_Sub1不变；
第二分区的充电开关TFT_D和放电开关TFT_E开启，使得数据线上的数据信号Data经由充电开关TFT_D传送至第二分区的液晶电容Clc_Sub2和存储电容Cst_Sub2，第二分区的液晶电容Clc_Sub2和存储电容Cst_Sub2根据数据信号Data充电而存储相应的电压；同时由于放电开关TFT_E的开启，第二分区的液晶电容Clc_Sub2和存储电容Cst_Sub2的电位会经由放电开关TFT_E漏电而下降至与主区电压V_Main不同的第二分区电压V_Sub2。
在二维显示模式下的负极性反转期间内，数据信号的电压低于共同电极(在本实施例中，指代彩色滤波片基板的共同电极CF_com和/或阵列基板的共同电极A_com)的电压。
1)当第一扫描线上的扫描信号Gn为高电平，第二扫描线上的扫描信号Gn+1为低电平时：
主区的充电开关TFT_A开启，使得数据线上的数据信号Data经由充电开关TFT_A传送至主区的液晶电容Clc_Main和存储电容Cst_Main，主区的液晶电容Clc_Main和存储电容Cst_Main根据数据信号Data放电而存储相应的电压，也即主区电压V_Main；
第一分区的充电开关TFT_B和放电开关TFT_C开启，使得主区电压V_Main经由充电开关TFT_B传送至第一分区的液晶电容Clc_Sub1和存储电容Cst_Sub1，第一分区的液晶电容Clc_Sub1和存储电容Cst_Sub1根据主区电压V_Main放电而存储相应的电压；同时由于放电开关TFT_C的开启，第一分区的液晶电容Clc_Sub1和存储电容Cst_Sub1的电位会经由放电开关TFT_C漏电而上升至与主区电压V_Main不同的第一分区电压V_Sub1；
第二分区的充电开关TFT_D和放电开关TFT_E关闭，第二分区电压V_Sub2为零。
2)当第一扫描线上的扫描信号Gn为低电平，第二扫描线上的扫描信号Gn+1为高电平时：
主区的充电开关TFT_A关闭，第一分区的充电开关TFT_B和放电开关TFT_C关闭，主区电压V_Main和第一分区电压V_Sub1不变；
第二分区的充电开关TFT_D和放电开关TFT_E开启，使得数据线上的数据信号Data经由充电开关TFT_D传送至第二分区的液晶电容Clc_Sub2和存储电容Cst_Sub2，第二分区的液晶电容Clc_Sub2和存储电容Cst_Sub2根据数据信号Data放电而存储相应的电压；同时由于放电开关TFT_E的开启，第二分区的液晶电容Clc_Sub2和存储电容Cst_Sub2的电位会经由放电开关TFT_E漏电而上升至与主区电压V_Main不同的第二分区电压V_Sub2。
在上述实施例中，主区Main与第一分区Sub1之间实质是通过主区充电开关TFT_A、第一分区的充电开关TFT_B和放电开关TFT_C串联连接。因此，对于表征数据信号Data的电压V_Data而言，主区电压V_Main＝V_Data×(RA+RB)/(RA+RB+RC)，第一分区电压V_Sub1＝V_Data×RC/(RA+RB+RC)。其中，RA、RB和RC分别是主区充电开关TFT_A、第一分区的充电开关TFT_B和放电开关TFT_C的等效电阻。而第二分区则通过第二分区充电开关TFT_D和放电开关TFT_E的控制，获得与主区电压V_Main和第一分区电压V_Sub1均不同的第二分区电压V_sub2。如此一来，无论在正极性反转期间或是在负极性反转期间，像素电极的主区电压、第一分区电压与第二分区电压均互不相同。这使得三个区所显示的影像彼此之间具有较为显著的区别，进而能够在二维显示时实现低色偏显示。
图4是图2所示的子像素的像素电极在三维显示模式下的工作状态示意图。 为了在三维显示模式下实现低色偏显示效果，需要将像素电极的第二分区作为三维显示所需的遮光区域，以确保上下两行像素结构之间具有足够的遮光间距，同时还要使得主区电压和第一分区电压之间具有较为明显的电压差。在本实施例中，优选在垂直回扫期间对第二分区进行插黑，使其形成黑色区域，然后将控制第二分区工作的扫描信号Gn+1关闭，使第二分区电压V_Sub2为零，以使第二分区保持暗态，防止因为漏电而出现漏光现象。然后与二维显示模式类似，在同一时刻通过数据线传送数据信号至主区和第一分区，使主区和第一分区分别具有主区电压和第一分区电压，且所述主区电压与第一分区电压之间具有设定的电压差。由于主区电压和第一分区电压之间存在电压差，主区和第一分区所显示的影像彼此之间有较为显著的区别，因此也能够有效地解决在三维显示时的色偏问题。
以上所述，仅为本发明较佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉该技术的人员在本发明所揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。

Claims (15)

  1. 一种像素结构，其包括多个子像素，每个所述子像素的像素电极包括：
    主区，配置以接收第一扫描线的扫描信号，进而接收数据线上的数据信号而具有主区电压；
    第一分区，电性连接所述主区，配置以接收所述第一扫描线的扫描信号，进而接收所述主区电压而具有第一分区电压；
    第二分区，配置以接收第二扫描线的扫描信号，进而接收所述数据线上的数据信号而具有第二分区电压；
    其中，所述主区电压、第一分区电压与第二分区电压互不相同。
  2. 根据权利要求1所述的像素结构，其中：
    所述主区通过一主区充电开关的第一极和第二极电性连接所述数据线，所述主区充电开关的控制端电性连接所述第一扫描线；所述主区还电性连接一主区液晶电容和一主区存储电容。
  3. 根据权利要求1所述的像素结构，其中：
    所述第一分区通过一第一分区充电开关的第一极和第二极电性连接所述主区，所述第一分区充电开关的控制端电性连接所述第一扫描线；所述第一分区还电性连接一第一分区液晶电容和一第一分区存储电容，所述第一分区液晶电容或第一分区存储电容的两端电性连接一第一分区放电开关的第一极和第二极，所述第一分区放电开关的控制端电性连接所述第一扫描线。
  4. 根据权利要求2所述的像素结构，其中：
    所述第一分区通过一第一分区充电开关的第一极和第二极电性连接所述主区，所述第一分区充电开关的控制端电性连接所述第一扫描线；所述第一分区还电性连接一第一分区液晶电容和一第一分区存储电容，所述第一分区液晶电容或第一分区存储电容的两端电性连接一第一分区放电开关的第一极和第二极，所述第一分区放电开关的控制端电性连接所述第一扫描线。
  5. 根据权利要求1所述的像素结构，其中：
    所述第二分区通过一第二分区充电开关的第一极和第二极电性连接所述数据线，所述第二分区充电开关的控制端电性连接所述第二扫描线；所述第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；所述第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，所述第二分区放电开关的控制端电性连接所述第二扫描线。
  6. 根据权利要求2所述的像素结构，其中：
    所述第二分区通过一第二分区充电开关的第一极和第二极电性连接所述数据线，所述第二分区充电开关的控制端电性连接所述第二扫描线；所述第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；所述第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，所述第二分区放电开关的控制端电性连接所述第二扫描线。
  7. 根据权利要求3所述的像素结构，其中：
    所述第二分区通过一第二分区充电开关的第一极和第二极电性连接所述数据线，所述第二分区充电开关的控制端电性连接所述第二扫描线；所述第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；所述第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，所述第二分区放电开关的控制端电性连接所述第二扫描线。
  8. 根据权利要求4所述的像素结构，其中：
    所述第二分区通过一第二分区充电开关的第一极和第二极电性连接所述数据线，所述第二分区充电开关的控制端电性连接所述第二扫描线；所述第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；所述第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，所述第二分区放电开关的控制端电性连接所述第二扫描线。
  9. 根据权利要求8所述的像素结构，其中：
    所述主区液晶电容、第一分区液晶电容和第二分区液晶电容分别由所述主 区、第一分区和第二分区与彩色滤波片基板的共同电极构成；所述主区存储电容、第一分区存储电容和第二分区存储电容分别由所述主区、第一分区和第二分区与所在阵列基板的共同电极构成。
  10. 一种显示面板，其包括：
    多条数据线；
    多条扫描线，与所述数据线交错配置形成多个子像素区；
    多个子像素，配置于所述子像素区内，每个所述子像素的像素电极包括：
    主区，配置以接收第一扫描线的扫描信号，进而接收数据线上的数据信号而具有主区电压；
    第一分区，电性连接所述主区，配置以接收所述第一扫描线的扫描信号，进而接收所述主区电压而具有第一分区电压；
    第二分区，配置以接收第二扫描线的扫描信号，进而接收所述数据线上的数据信号而具有第二分区电压；
    其中，所述主区电压、第一分区电压与第二分区电压互不相同。
  11. 如权利要求10所述的显示面板，每个所述子像素的像素电极中：
    所述主区通过一主区充电开关的第一极和第二极电性连接所述数据线，所述主区充电开关的控制端电性连接所述第一扫描线；所述主区还电性连接一主区液晶电容和一主区存储电容；
    所述第一分区通过一第一分区充电开关的第一极和第二极电性连接所述主区，所述第一分区充电开关的控制端电性连接所述第一扫描线；所述第一分区还电性连接一第一分区液晶电容和一第一分区存储电容，所述第一分区液晶电容或第一分区存储电容的两端电性连接一第一分区放电开关的第一极和第二极，所述第一分区放电开关的控制端电性连接所述第一扫描线；
    所述第二分区通过一第二分区充电开关的第一极和第二极电性连接所述数据线，所述第二分区充电开关的控制端电性连接所述第二扫描线；所述第二分区还电性连接一第二分区液晶电容和一第二分区存储电容；所述第二分区液晶电容或第二分区存储电容的两端电性连接一第二分区放电开关的第一极和第二极，所述第二分区放电开关的控制端电性连接所述第二扫描线。
  12. 一种显示面板的驱动方法，该显示面板包括多条数据线、多条扫描线以及多个子像素，所述数据线与所述扫描线交错配置以形成多个子像素区，所述子像素配置于所述子像素区内，且每个所述子像素的像素电极包括主区、第一分区和第二分区，其中所述主区与第一分区电性连接，所述驱动方法包括二维和/或三维显示驱动步骤；
    所述二维显示驱动步骤包括，在正/负极性反转期间内：
    于第一时刻，通过数据线传送数据信号至主区，使主区具有主区电压，进而使得第一分区具有与主区电压不同的第一分区电压；
    于第二时刻，通过数据线传送数据信号至第二分区，使第二分区具有与主区电压和第一分区电压均不同的第二分区电压；
    所述三维显示驱动步骤包括：
    使第二分区形成黑色区域并保持暗态；
    通过数据线传送数据信号至主区，使得主区具有主区电压，进而使得第一分区具有与主区电压不同的第一分区电压。
  13. 如权利要求12所述的驱动方法，其中：
    所述第一分区通过与所述主区串联分压的方式获得所述第一分区电压。
  14. 如权利要求12所述的驱动方法，其中：
    在垂直回扫期间进行插黑，使第二分区形成黑色区域。
  15. 如权利要求13所述的驱动方法，其中：
    在垂直回扫期间进行插黑，使第二分区形成黑色区域。
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