WO2016039286A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2016039286A1
WO2016039286A1 PCT/JP2015/075315 JP2015075315W WO2016039286A1 WO 2016039286 A1 WO2016039286 A1 WO 2016039286A1 JP 2015075315 W JP2015075315 W JP 2015075315W WO 2016039286 A1 WO2016039286 A1 WO 2016039286A1
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Prior art keywords
igbt
semiconductor device
circuit
generation circuit
light
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PCT/JP2015/075315
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French (fr)
Japanese (ja)
Inventor
梶山　康一
道伸 水村
吉司 小川
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株式会社ブイ・テクノロジー
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Publication of WO2016039286A1 publication Critical patent/WO2016039286A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/56—Power conversion systems, e.g. maximum power point trackers

Definitions

  • the present invention relates to a semiconductor device including an IGBT and a circuit for reducing the switching loss thereof.
  • IGBTs Insulated Gate Bipolar Transistors / Insulated Gate Bipolar Transistors combine the high withstand voltage and large current characteristics of bipolar power transistors with the high-speed switching characteristics of MOSFETs. High power semiconductor device. This IGBT has the potential to further expand its active areas by improving performance that has been subdivided according to applications by realizing higher voltage resistance and larger capacity and higher frequency.
  • the IGBT When focusing on higher frequency, the IGBT, like the MOSFET, can switch the current flowing between the collector electrode and the emitter electrode at high speed by controlling the voltage of the gate. There is a delay time due to influence, and this delay time is one factor that hinders further increase in frequency.
  • tail current is a current that flows during the time when holes injected into the n base layer spontaneously disappear in the n layer, and the time until the tail current is settled is a relatively long delay time.
  • Patent Document 1 As a proposal for reducing the delay time caused by the tail current at the turn-off time, the conventional technique described in Patent Document 1 below provides an IGBT formation region and a Schottky diode formation region in an active region of a semiconductor device. It has been proposed to reduce the delay time caused by the tail current by discharging the accumulated carriers at turn-off through the Schottky diode.
  • FIG. 1 shows a waveform at the time of turn-off of the IGBT (time change of the collector current I C and the collector voltage V C ).
  • the collector current I C begins to decrease when the IGBT is turned off at time t 0 on the horizontal axis, decreases rapidly before and after time t 1 , then decreases gradually and gradually decreases to time t 2. To go.
  • the current during the period from time t 1 to t 2 is called tail current.
  • the collector current I C at the time of turn-off rapidly decreases from the value I C1 at the time of turn-off to the value I C2 immediately after time t 1, it is provided integrally on the collector side of the IGBT as in the prior art. Even if an attempt is made to release the stored carriers via the Schottky diode, the potential difference between the stored carriers immediately falls below the drive potential of the Schottky diode, and there is a problem that the tail current cannot be discharged effectively.
  • the present invention is an example of a problem to deal with such a problem. That is, it is possible to effectively discharge the accumulated carriers at the time of turn-off even when the potential difference of the accumulated carriers is small, to reduce the delay time due to the tail current, and to reduce the switching loss at the time of turn-off of the IGBT. Is the purpose.
  • a semiconductor device has the following configuration.
  • An IGBT a photovoltaic generation circuit connected between the drift region of the IGBT and an emitter electrode or ground, and discharging accumulated carriers in the drift region; and a light to the photovoltaic generation circuit when the IGBT is turned off.
  • a semiconductor device comprising a light emitting circuit for irradiation.
  • the semiconductor device having such a feature can effectively discharge the accumulated carriers in the drift region of the IGBT by the photovoltaic effect, it is possible to reduce the switching loss when the IGBT is turned off due to the tail current. Thus, further higher frequency and lower power consumption of the IGBT can be realized.
  • FIG. 1 is an explanatory diagram for explaining an operation principle of an accumulated carrier discharge circuit according to an embodiment of the present invention ((a) is a circuit diagram showing the operation principle, and (b) is a graph showing current dependency on a capacitor voltage). It is explanatory drawing explaining operation
  • FIG. 2 is an explanatory diagram showing an electrical equivalent circuit of the semiconductor device according to the embodiment of the present invention.
  • the semiconductor device 1 includes an IGBT (Insulated Gate Bipolar Transistor) 10.
  • the IGBT 10 includes a PNP bipolar transistor 11 and an N-channel MOS transistor 12 as an equivalent circuit.
  • the bipolar transistor 11 has its emitter region 11E connected to the collector electrode terminal 10C of the IGBT 10, and its collector region 11C connected to the emitter electrode 10E of the IGBT 10.
  • the source 12S of the MOS transistor 12 is connected to the emitter electrode 10E of the IGBT 10 or the ground G, and the drain 12D is connected to the base 11B of the bipolar transistor 11.
  • the gate 12G of the MOS transistor 12 becomes the gate electrode terminal 10G of the IGBT 10, and a drive signal from an IGBT drive circuit described later is input to the gate electrode terminal 10G.
  • the charge accumulated in the drift region of the IGBT 10 can be represented as a capacitor 14, and the charge accumulated in the gate can be represented as a capacitor 15.
  • the capacitor 14 stores positive charges on the base 11B side of the bipolar transistor 11 and stores negative charges on the source 12S side of the MOS transistor 12.
  • the capacitor 15 stores positive charges on the gate 12G side of the MOS transistor 12, and stores negative charges on the drain 12D side of the MOS transistor 12.
  • a PN junction diode 13 having an anode connected to the emitter electrode 10E side and a cathode connected to the collector electrode terminal 10C side is connected between the emitter electrode 10E and the collector electrode terminal 10C of the IGBT 10. Yes.
  • Connection terminals 10S1 and 10S2 are provided on the emitter electrode 10E and the collector electrode terminal 10C of the IGBT 10, respectively.
  • the operating voltage V CC1 is input to the collector electrode terminal 10C.
  • the semiconductor device 1 includes a power storage carrier discharge circuit 2, and the power storage carrier discharge circuit 2 includes a photovoltaic power generation circuit 20 for power storage carrier discharge and a light emitting circuit 30 for power storage carrier discharge.
  • the photovoltaic generation circuit 20 includes an NPN phototransistor 21 having a collector region 21C connected to the drift region side of the IGBT 10 and an emitter region 21E connected to the emitter electrode 10E side or the ground G side of the IGBT 10. It has.
  • the photovoltaic power generation circuit 20 includes an NPN-type phototransistor 22 connected in series with the phototransistor 21.
  • the emitter region 22E of the phototransistor 22 is connected to the collector region 21C of the phototransistor 21,
  • the operating voltage input terminal 20S is connected to the collector region 22C of the phototransistor 22, and the operating voltage V CC2 is input to the operating voltage input terminal 20S.
  • the photovoltaic power generation circuit 20 includes a free-wheeling photodiode 23 having an anode connected to the emitter region 21E side of the phototransistor 21 and a cathode connected to the collector region 21C side.
  • a PN junction diode 24 can be connected to the reflux photodiode 23 in series in the same forward direction as necessary.
  • the light-emitting circuit 30 for storing and discharging a carrier includes light-emitting diodes 31 and 32.
  • the light-emitting diodes 31 and 32 irradiate light to the photo-transistors 21 and 22 for discharging the stored-carrier, and the light-emitting diodes are provided.
  • 32 is arranged so that light can be irradiated to the reflux photodiode 23.
  • FIG. 3A a photodiode 101, a phototransistor 102, and a charged capacitor 103 are connected in parallel, and the photodiode 101 and the phototransistor 102 are irradiated with a certain amount of light.
  • the current Ip flows through the photodiode 101 and the current Id flows through the phototransistor 102 in accordance with the voltage of the capacitor 103.
  • FIG. 3B is a graph showing the current dependency on the voltage of the capacitor 103.
  • Id is the relationship between the collector-emitter voltage and collector current of the transistor, and Ip is the same as the reverse bias characteristic of the photodiode. Therefore, it is efficient to discharge the capacitor by the phototransistor 102 when the voltage (accumulated charge amount) of the capacitor 103 is large, and by the photodiode 101 when the voltage is small.
  • the power storage carrier discharge circuit 2 uses the operation principle shown in FIG. 3, and the operation will be described with reference to FIG.
  • the solid line indicates the change in the collector current Ic after the IGBT 10 is turned off when the power storage carrier discharge circuit 2 is provided and the broken line indicates that the power storage carrier discharge circuit 2 is not provided.
  • the accumulated charge is discharged using the photovoltaic effect of the phototransistors 21 and 22, and is returned to the subsequent discharge after the accumulated charge amount is reduced.
  • the photovoltaic effect of the photo diode 23 the storage carrier in the drift region can be discharged efficiently. According to this, the accumulated carriers in the drift region can be quickly lost at the time of turn-off, and the switching loss due to the tail current can be effectively reduced.
  • t 1 and t 2 are the same time, but may be different times.
  • FIG. 5 shows a configuration example of the IGBT drive circuit of the semiconductor device according to the embodiment of the present invention.
  • the output terminal 3S of the IGBT drive circuit 3 is connected to the gate electrode terminal 10G of the IGBT 10, and the drive control of the IGBT 10 is performed by the drive signal output from the IGBT drive circuit 3.
  • the IGBT drive circuit 3 includes a photovoltaic power generation circuit 40 and a light emitting circuit 50.
  • the photovoltaic power generation circuit 40 includes NPN-type phototransistors 41 and 42 and a free-wheeling photodiode 43.
  • the collector region 41C of the phototransistor 41 is connected to the input terminal 40S of the drive voltage V CC3.
  • the collector region 42C of the phototransistor 42 is connected to the emitter region 41E.
  • the ground region G and the anode of the reflux photodiode 43 are connected to the emitter region 42E of the phototransistor 42, and the cathode of the reflux photodiode 43 is connected to the collector region 42C of the phototransistor 42 and the output terminal 3S.
  • the light emitting circuit 50 includes one or a plurality of light emitting diodes 51 and 52.
  • light emitted from the light emitting diode 51 is irradiated to the phototransistor 41 and light emitted from the light emitting diode 52 is emitted.
  • the phototransistor 42 and the refluxing photodiode 43 are irradiated.
  • a driving photovoltaic power generation circuit is configured by the phototransistor 41
  • a driving on-time light emitting circuit is configured by the light emitting diode 51. That is, the light-emitting diode 51 emits light when the IGBT 10 is turned on and irradiates the phototransistor 41 with light, and the phototransistor 41 is driven to be input to the input terminal 40S due to the photovoltaic effect caused by the light emitted when the IGBT 10 is turned on.
  • the voltage V CC3 is input to the gate electrode terminal 10G of the IGBT 10 via the output terminal 3S.
  • the semiconductor device 1 can employ such an optical driving method.
  • a photoelectromotive force generating circuit for gate discharge is constituted by the phototransistor 42 and the refluxing photodiode 43
  • a light emitting circuit for driving is constituted by the light emitting diode 52. That is, the light emitting diode 52 emits light when the IGBT 10 is turned off and irradiates light to the phototransistor 42 and the refluxing photodiode 43.
  • the phototransistor 42 and the refluxing photodiode 43 emit light by the light emitted when the IGBT 10 is turned off. Due to the electromotive force effect, the charges accumulated in the gate electrode terminal 10G connected to the output terminal 3S can be effectively discharged to the ground G. By applying such a gate charge discharge, the switching loss due to the tail current at the time of turn-off can be further effectively reduced.
  • the single light-emitting diode 52 irradiates both the phototransistor 42 and the reflux photodiode 43, but a plurality of light-emitting elements are emitted as in the case of discharging the charge accumulated in the drift region.
  • the phototransistor 42 and the reflux photodiode 43 may be irradiated at individual timings using a diode.
  • the semiconductor device 1 connects the photovoltaic generation circuit 20 including the phototransistors 22 and 21 and the free-wheeling photodiode 23 between the drift region of the IGBT 10 and the emitter electrode 10E.
  • the accumulated carriers in the drift region at the turn-off time can be quickly released to the ground G or the emitter electrode 10E by the photovoltaic effect of the phototransistors 22 and 21 and the reflux photodiode 23. Thereby, the switching loss due to the tail current can be effectively reduced.
  • the gate discharge photovoltaic generation circuit including the phototransistor 42 and the reflux photodiode 43 is connected to the gate electrode terminal 10G of the IGBT 10. Can be quickly discharged to the ground G by the photovoltaic effect of the phototransistor 42 and the reflux photodiode 43. This also makes it possible to further reduce the switching loss due to the tail current.
  • the semiconductor device 1 according to the embodiment of the present invention can effectively reduce the switching loss of the IGBT 10, the operating frequency can be improved. Further, the semiconductor device including the conventional IGBT has increased the power consumption due to the energy loss of the tail current. However, the semiconductor device 1 according to the embodiment of the present invention can reduce the power consumption by reducing the switching loss. It becomes possible. As described above, the semiconductor device according to the embodiment of the present invention can realize higher frequency and lower power consumption of a power semiconductor device including an IGBT.
  • 1 semiconductor device
  • 2 storage carrier discharge circuit
  • 3 IGBT drive circuit
  • 10 IGBT
  • 11 Bipolar transistor
  • 12 MOS transistor
  • 13 PN junction diode
  • 20, 40 photovoltaic power generation circuit
  • 30, 50 light emitting circuit
  • 21, 22, 41, 42 phototransistor
  • 23, 43 photodiode for reflux
  • 31, 32, 51, 52 light emitting diodes
  • G Earth

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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The present invention reduces switching loss when an IGBT is turned off. This semiconductor device 1 is provided with an IGBT 10, a photovoltaic power generation circuit 20 that is connected between the drift region of the IGBT 10 and an emitter electrode 10E or ground G and is for discharging carriers accumulated in the drift region, and a light emission circuit 30 that irradiates light onto the photovoltaic power generation circuit 20 when the IGBT 10 is turned off.

Description

半導体装置Semiconductor device
　本発明は、ＩＧＢＴとそのスイッチング損失を低減する回路とを備える半導体装置に関するものである。 The present invention relates to a semiconductor device including an IGBT and a circuit for reducing the switching loss thereof.
　ＩＧＢＴ（Insulated Gate Bipolar Transistor／絶縁ゲート型バイポーラトランジスタ）は、バイポーラパワートランジスタの高耐圧・大電流特性とＭＯＳＦＥＴの高速スイッチング特性を兼ね備えた、高耐圧・低損失・高速スイッチングを特徴とする汎用性の高いパワー半導体デバイスである。このＩＧＢＴは、更なる高耐圧・大容量化の実現と更なる高周波数化の実現により用途別に細分化された性能向上を図ることで、活躍の領域を更に広げる可能性を持っている。 IGBTs (Insulated Gate Bipolar Transistors / Insulated Gate Bipolar Transistors) combine the high withstand voltage and large current characteristics of bipolar power transistors with the high-speed switching characteristics of MOSFETs. High power semiconductor device. This IGBT has the potential to further expand its active areas by improving performance that has been subdivided according to applications by realizing higher voltage resistance and larger capacity and higher frequency.
　高周波数化に着目した場合、ＩＧＢＴは、ＭＯＳＦＥＴと同様に，ゲートの電圧制御によってコレクタ電極とエミッタ電極間を流れる電流を高速スイッチングすることができるものであるが、ＭＯＳＦＥＴと比較すると、蓄積キャリアの影響による遅れ時間が存在し、この遅れ時間が更なる高周波数化を妨げる一つの要因になっている。 When focusing on higher frequency, the IGBT, like the MOSFET, can switch the current flowing between the collector electrode and the emitter electrode at high speed by controlling the voltage of the gate. There is a delay time due to influence, and this delay time is one factor that hinders further increase in frequency.
　ＩＧＢＴのターンオン時は、ドリフト領域と呼ばれるＰＮＰ型バイポーラトランジスタ部分のｎ層で正孔の注入時間分の遅れ時間が発生するが、ターンオフ時は、オン時より長めの遅れ時間が発生する。ＩＧＢＴをターンオフするとコレクタ電流は先ず急激に減少しその後ある時点から緩やかなカーブを描いて減少する。これをテール電流と呼ぶ。テール電流は、ｎベース層に注入された正孔がｎ層中で自然消滅する時間に流れる電流であり、テール電流が収まるまでの時間が比較的長い遅れ時間になっている。 When the IGBT is turned on, a delay time corresponding to the hole injection time is generated in the n layer of the PNP-type bipolar transistor portion called a drift region, but a longer delay time is generated than when the IGBT is turned on. When the IGBT is turned off, the collector current first decreases rapidly and then decreases gradually after a gentle curve. This is called tail current. The tail current is a current that flows during the time when holes injected into the n base layer spontaneously disappear in the n layer, and the time until the tail current is settled is a relatively long delay time.
　このようなターンオフ時のテール電流で生じる遅れ時間を低減するための提案として、下記特許文献１に記載された従来技術は、半導体装置のアクティブ領域にＩＧＢＴ形成領域とショットキーダイオード形成領域を設け、ショットキーダイオードを介してターンオフ時の蓄積キャリアを放出することで、テール電流で生じる遅れ時間を低減させることを提案している。 As a proposal for reducing the delay time caused by the tail current at the turn-off time, the conventional technique described in Patent Document 1 below provides an IGBT formation region and a Schottky diode formation region in an active region of a semiconductor device. It has been proposed to reduce the delay time caused by the tail current by discharging the accumulated carriers at turn-off through the Schottky diode.
特開２０１４－１４６６２９号公報JP 2014-146629 A
　図１は、ＩＧＢＴのターンオフ時波形（コレクタ電流ＩCとコレクタ電圧ＶCの時間変化）を示している。コレクタ電流ＩCは、横軸の時刻ｔがｔ0においてＩＧＢＴがオフになると減少し始め、時刻ｔ1の前後で急激に減少した後、減少が緩やかになって時刻ｔ2まで徐々に減少していく。この時刻ｔ1からｔ2の期間の電流をテール電流と呼んでいる。 FIG. 1 shows a waveform at the time of turn-off of the IGBT (time change of the collector current I C and the collector voltage V C ). The collector current I C begins to decrease when the IGBT is turned off at time t 0 on the horizontal axis, decreases rapidly before and after time t 1 , then decreases gradually and gradually decreases to time t 2. To go. The current during the period from time t 1 to t 2 is called tail current.
　ここで、ターンオフ時のコレクタ電流ＩCは、オフ時の値ＩC1から時刻ｔ1直後の値ＩC2までは急激に減少するので、従来技術のように、ＩＧＢＴのコレクタ側に一体に設けたショットキーダイオードを介して蓄積キャリアを放出しようとしても、蓄積キャリアの電位差がすぐにショットキーダイオードの駆動電位を下回ってしまい、効果的にテール電流を放出することができない問題が生じる。 Here, since the collector current I C at the time of turn-off rapidly decreases from the value I C1 at the time of turn-off to the value I C2 immediately after time t 1, it is provided integrally on the collector side of the IGBT as in the prior art. Even if an attempt is made to release the stored carriers via the Schottky diode, the potential difference between the stored carriers immediately falls below the drive potential of the Schottky diode, and there is a problem that the tail current cannot be discharged effectively.
　本発明は、このような問題に対処することを課題の一例とするものである。すなわち、ターンオフ時の蓄積キャリアをこの蓄積キャリアの電位差が小さい場合にも効果的に放電させて、テール電流による遅れ時間を減少させ、ＩＧＢＴのターンオフ時のスイッチング損失を低減すること、等が本発明の目的である。 The present invention is an example of a problem to deal with such a problem. That is, it is possible to effectively discharge the accumulated carriers at the time of turn-off even when the potential difference of the accumulated carriers is small, to reduce the delay time due to the tail current, and to reduce the switching loss at the time of turn-off of the IGBT. Is the purpose.
　このような目的を達成するために、本発明による半導体装置は、以下の構成を具備するものである。
　ＩＧＢＴと、前記ＩＧＢＴのドリフト領域とエミッタ電極又はアースとの間に接続され、前記ドリフト領域の蓄積キャリアを放電する光起電力発生回路と、前記ＩＧＢＴのターンオフ時に前記光起電力発生回路に光を照射する発光回路を備えることを特徴とする半導体装置。 In order to achieve such an object, a semiconductor device according to the present invention has the following configuration.
An IGBT, a photovoltaic generation circuit connected between the drift region of the IGBT and an emitter electrode or ground, and discharging accumulated carriers in the drift region; and a light to the photovoltaic generation circuit when the IGBT is turned off. A semiconductor device comprising a light emitting circuit for irradiation.
　このような特徴を備える半導体装置は、ＩＧＢＴのドリフト領域の蓄積キャリアを光起電力効果によって効果的に放電することができるので、テール電流によるＩＧＢＴのターンオフ時におけるスイッチング損失を低減することが可能になり、ＩＧＢＴの更なる高周波数化と低消費電力化を実現することができる。 Since the semiconductor device having such a feature can effectively discharge the accumulated carriers in the drift region of the IGBT by the photovoltaic effect, it is possible to reduce the switching loss when the IGBT is turned off due to the tail current. Thus, further higher frequency and lower power consumption of the IGBT can be realized.
ＩＧＢＴのターンオフ時波形（コレクタ電流ＩCとコレクタ電圧ＶCの時間変化）を示した説明図である。It is an explanatory view showing the IGBT turn-off time of the waveform (time variation of the collector current I C and the collector voltage V C). 本発明の実施形態に係る半導体装置の電気的等価回路を示す説明図である。It is explanatory drawing which shows the electrical equivalent circuit of the semiconductor device which concerns on embodiment of this invention. 本発明実施形態に係る蓄積キャリア放電回路の動作原理を説明する説明図（（ａ）が動作原理を示した回路図、（ｂ）がコンデンサの電圧に対する電流依存性を示すグラフ）である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an explanatory diagram for explaining an operation principle of an accumulated carrier discharge circuit according to an embodiment of the present invention ((a) is a circuit diagram showing the operation principle, and (b) is a graph showing current dependency on a capacitor voltage). 本発明実施形態に係る蓄積キャリア放電回路の動作を説明する説明図である。It is explanatory drawing explaining operation | movement of the accumulation | storage carrier discharge circuit which concerns on this invention embodiment. 本発明の実施形態に係る半導体装置が備えるＩＧＢＴ駆動回路の構成例を示した説明図である。It is explanatory drawing which showed the structural example of the IGBT drive circuit with which the semiconductor device which concerns on embodiment of this invention is provided.
　以下、図面を参照して本発明の実施形態を説明する。図２は、本発明の実施形態に係る半導体装置の電気的等価回路を示す説明図である。半導体装置１は、ＩＧＢＴ（絶縁ゲート型バイポーラトランジスタ）１０を備える。ＩＧＢＴ１０は、等価回路としては、ＰＮＰ型のバイポーラトランジスタ１１とＮチャネルのＭＯＳトランジスタ１２によって構成される。バイポーラトランジスタ１１は、そのエミッタ領域１１ＥがＩＧＢＴ１０のコレクタ電極端子１０Ｃに接続されており、そのコレクタ領域１１ＣがＩＧＢＴ１０のエミッタ電極１０Ｅに接続されている。ＭＯＳトランジスタ１２は、そのソース１２ＳがＩＧＢＴ１０のエミッタ電極１０Ｅ又はアースＧに接続されており、そのドレイン１２Ｄがバイポーラトランジスタ１１のベース１１Ｂに接続されている。そして、ＭＯＳトランジスタ１２のゲート１２ＧはＩＧＢＴ１０のゲート電極端子１０Ｇになり、このゲート電極端子１０Ｇに後述するＩＧＢＴ駆動回路からの駆動信号が入力する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 2 is an explanatory diagram showing an electrical equivalent circuit of the semiconductor device according to the embodiment of the present invention. The semiconductor device 1 includes an IGBT (Insulated Gate Bipolar Transistor) 10. The IGBT 10 includes a PNP bipolar transistor 11 and an N-channel MOS transistor 12 as an equivalent circuit. The bipolar transistor 11 has its emitter region 11E connected to the collector electrode terminal 10C of the IGBT 10, and its collector region 11C connected to the emitter electrode 10E of the IGBT 10. The source 12S of the MOS transistor 12 is connected to the emitter electrode 10E of the IGBT 10 or the ground G, and the drain 12D is connected to the base 11B of the bipolar transistor 11. The gate 12G of the MOS transistor 12 becomes the gate electrode terminal 10G of the IGBT 10, and a drive signal from an IGBT drive circuit described later is input to the gate electrode terminal 10G.
　等価回路において、ＩＧＢＴ１０のドリフト領域に蓄積された電荷はコンデンサ１４として、ゲートに蓄積された電荷はコンデンサ１５で表すことができる。コンデンサ１４はバイポーラトランジスタ１１のベース１１Ｂの側に正電荷が蓄積され、ＭＯＳトランジスタ１２のソース１２Ｓ側に負電荷が蓄積されている。コンデンサ１５はＭＯＳトランジスタ１２のゲート１２Ｇ側に正電荷が蓄積され、ＭＯＳトランジスタ１２のドレイン１２Ｄ側に負電荷が蓄積されている。 In the equivalent circuit, the charge accumulated in the drift region of the IGBT 10 can be represented as a capacitor 14, and the charge accumulated in the gate can be represented as a capacitor 15. The capacitor 14 stores positive charges on the base 11B side of the bipolar transistor 11 and stores negative charges on the source 12S side of the MOS transistor 12. The capacitor 15 stores positive charges on the gate 12G side of the MOS transistor 12, and stores negative charges on the drain 12D side of the MOS transistor 12.
　また、図示の例では、ＩＧＢＴ１０のエミッタ電極１０Ｅとコレクタ電極端子１０Ｃとの間に、エミッタ電極１０Ｅ側にアノードが接続されコレクタ電極端子１０Ｃ側にカソードが接続されるＰＮ接合ダイオード１３が接続されている。ＩＧＢＴ１０のエミッタ電極１０Ｅとコレクタ電極端子１０Ｃにはそれぞれ接続端子１０Ｓ１，１０Ｓ２が設けられている。コレクタ電極端子１０Ｃには作動電圧ＶCC1が入力されている。 In the illustrated example, a PN junction diode 13 having an anode connected to the emitter electrode 10E side and a cathode connected to the collector electrode terminal 10C side is connected between the emitter electrode 10E and the collector electrode terminal 10C of the IGBT 10. Yes. Connection terminals 10S1 and 10S2 are provided on the emitter electrode 10E and the collector electrode terminal 10C of the IGBT 10, respectively. The operating voltage V CC1 is input to the collector electrode terminal 10C.
　半導体装置１は蓄電キャリア放電回路２を備えており、この蓄電キャリア放電回路２は、蓄電キャリア放電用の光起電力発生回路２０と蓄電キャリア放電用の発光回路３０を備えている。図示の例では、光起電力発生回路２０は、ＩＧＢＴ１０のドリフト領域側にコレクタ領域２１Ｃが接続され、ＩＧＢＴ１０のエミッタ電極１０Ｅ側又はアースＧ側にエミッタ領域２１Ｅが接続されるＮＰＮ型のフォトトランジスタ２１を備えている。また、光起電力発生回路２０は、フォトトランジスタ２１と直列に接続されたＮＰＮ型のフォトトランジスタ２２を備えており、このフォトトランジスタ２２のエミッタ領域２２Ｅがフォトトランジスタ２１のコレクタ領域２１Ｃに接続され、フォトトランジスタ２２のコレクタ領域２２Ｃには作動電圧入力端子２０Ｓが接続され、作動電圧入力端子２０Ｓには作動電圧ＶCC2が入力されている。 The semiconductor device 1 includes a power storage carrier discharge circuit 2, and the power storage carrier discharge circuit 2 includes a photovoltaic power generation circuit 20 for power storage carrier discharge and a light emitting circuit 30 for power storage carrier discharge. In the illustrated example, the photovoltaic generation circuit 20 includes an NPN phototransistor 21 having a collector region 21C connected to the drift region side of the IGBT 10 and an emitter region 21E connected to the emitter electrode 10E side or the ground G side of the IGBT 10. It has. The photovoltaic power generation circuit 20 includes an NPN-type phototransistor 22 connected in series with the phototransistor 21. The emitter region 22E of the phototransistor 22 is connected to the collector region 21C of the phototransistor 21, The operating voltage input terminal 20S is connected to the collector region 22C of the phototransistor 22, and the operating voltage V CC2 is input to the operating voltage input terminal 20S.
　また、光起電力発生回路２０は、フォトトランジスタ２１のエミッタ領域２１Ｅ側にアノードが接続されコレクタ領域２１Ｃ側にカソードが接続される還流用フォトダイオード２３を備えている。この還流用フォトダイオード２３には、必要に応じてＰＮ接合ダイオード２４を同じ順方向で直列接続することができる。 The photovoltaic power generation circuit 20 includes a free-wheeling photodiode 23 having an anode connected to the emitter region 21E side of the phototransistor 21 and a cathode connected to the collector region 21C side. A PN junction diode 24 can be connected to the reflux photodiode 23 in series in the same forward direction as necessary.
　蓄電キャリア放電用の発光回路３０は、発光ダイオード３１，３２を備えており、単数又は複数の発光ダイオード３１で蓄電キャリア放電用のフォトトランジスタ２１，２２に光を照射し、単数又は複数の発光ダイオード３２で還流用フォトダイオード２３に光を照射することができるように配備されている。 The light-emitting circuit 30 for storing and discharging a carrier includes light-emitting diodes 31 and 32. The light- emitting diodes 31 and 32 irradiate light to the photo-transistors 21 and 22 for discharging the stored-carrier, and the light-emitting diodes are provided. 32 is arranged so that light can be irradiated to the reflux photodiode 23.
　このような蓄積キャリア放電回路２の動作原理を図３によって説明する。図３（ａ）に示した回路では、フォトダイオード１０１、フォトトランジスタ１０２と充電されたコンデンサ１０３が並列接続され、フォトダイオード１０１とフォトトランジスタ１０２には一定量の光が照射されている。このような回路では、コンデンサ１０３の電圧に応じてフォトダイオード１０１には電流Ｉｐ、フォトトランジスタ１０２には電流Ｉｄが流れることになる。図３（ｂ）はコンデンサ１０３の電圧に対する電流依存性を示すグラフである。Ｉｄはトランジスタのコレクタ－エミッタ電圧とコレクタ電流の関係となり、Ｉｐはフォトダイオードの逆バイアス特性と同様になる。したがって、コンデンサ１０３の電圧（蓄積された電荷量）が大きいときにはフォトトランジスタ１０２によって、小さいときにはフォトダイオード１０１によってコンデンサの放電を行うことが効率的である。 The operation principle of such a stored carrier discharge circuit 2 will be described with reference to FIG. In the circuit shown in FIG. 3A, a photodiode 101, a phototransistor 102, and a charged capacitor 103 are connected in parallel, and the photodiode 101 and the phototransistor 102 are irradiated with a certain amount of light. In such a circuit, the current Ip flows through the photodiode 101 and the current Id flows through the phototransistor 102 in accordance with the voltage of the capacitor 103. FIG. 3B is a graph showing the current dependency on the voltage of the capacitor 103. Id is the relationship between the collector-emitter voltage and collector current of the transistor, and Ip is the same as the reverse bias characteristic of the photodiode. Therefore, it is efficient to discharge the capacitor by the phototransistor 102 when the voltage (accumulated charge amount) of the capacitor 103 is large, and by the photodiode 101 when the voltage is small.
　本発明の実施形態に係る蓄電キャリア放電回路２は、図３に示す動作原理を利用しており、その動作を図４を用いて説明する。図４において、実線は、蓄電キャリア放電回路２がある場合、破線は蓄電キャリア放電回路２を設けていない場合のＩＧＢＴ１０のターンオフ後のコレクタ電流Ｉｃの変化を示している。 The power storage carrier discharge circuit 2 according to the embodiment of the present invention uses the operation principle shown in FIG. 3, and the operation will be described with reference to FIG. In FIG. 4, the solid line indicates the change in the collector current Ic after the IGBT 10 is turned off when the power storage carrier discharge circuit 2 is provided and the broken line indicates that the power storage carrier discharge circuit 2 is not provided.
　ＩＧＢＴ１０のターンオフ後の時刻ｔ0からｔ1まで、発光回路３０の発光ダイオード３１を発光させて、光起電力発生回路２０のフォトトランジスタ２１，２２に光を照射することで、フォトトランジスタ２１，２２の光起電力効果によってＩＧＢＴ１０のコンデンサ１４に蓄積された電荷（ドリフト領域における蓄積キャリア）をアースＧ又はエミッタ電極１０Ｅ側に逃がす。次に、時刻ｔ2からｔ3まで、発光ダイオード３２を発光させて、還流用フォトダイオード２３の光起電力効果によってＩＧＢＴ１０のコンデンサ１４に蓄積された電荷をアースＧ又はエミッタ電極１０Ｅ側に逃がす。このように蓄積された電荷量が大きいターンオフ後の初期にはフォトトランジスタ２１，２２の光起電力効果を利用して蓄積電荷を放電させ、蓄積された電荷量が小さくなったその後の放電に還流用フォトダイオード２３の光起電力効果を利用することで効率的にドリフト領域の蓄電キャリアを放電させることができる。これによると、ターンオフ時にドリフト領域の蓄積キャリアを速やかに消失させることができ、テール電流によるスイッチング損失を効果的に低減することができる。なお、本発明の実施形態において、ｔ1とｔ2は同時刻であるが、異なる時刻であっても構わない。 From the time t 0 after the turn-off of the IGBT10 to t 1, while the light emitting diode 31 of the light emitting circuit 30, by irradiating light to the phototransistor 21, 22 of the photovoltaic generation circuit 20, the phototransistor 21 and 22 The charge (accumulated carriers in the drift region) accumulated in the capacitor 14 of the IGBT 10 is released to the ground G or the emitter electrode 10E side by the photovoltaic effect. Next, from time t 2 to t 3 , the light emitting diode 32 emits light, and the electric charge accumulated in the capacitor 14 of the IGBT 10 is released to the ground G or the emitter electrode 10E side by the photovoltaic effect of the reflux photodiode 23. In the initial stage after the turn-off in which the accumulated charge amount is large in this way, the accumulated charge is discharged using the photovoltaic effect of the phototransistors 21 and 22, and is returned to the subsequent discharge after the accumulated charge amount is reduced. By using the photovoltaic effect of the photo diode 23, the storage carrier in the drift region can be discharged efficiently. According to this, the accumulated carriers in the drift region can be quickly lost at the time of turn-off, and the switching loss due to the tail current can be effectively reduced. In the embodiment of the present invention, t 1 and t 2 are the same time, but may be different times.
　図５は、本発明の実施形態に係る半導体装置のＩＧＢＴ駆動回路の構成例を示している。ＩＧＢＴ駆動回路３の出力端子３ＳはＩＧＢＴ１０のゲート電極端子１０Ｇに接続され、ＩＧＢＴ駆動回路３が出力する駆動信号によってＩＧＢＴ１０の駆動制御がなされる。 FIG. 5 shows a configuration example of the IGBT drive circuit of the semiconductor device according to the embodiment of the present invention. The output terminal 3S of the IGBT drive circuit 3 is connected to the gate electrode terminal 10G of the IGBT 10, and the drive control of the IGBT 10 is performed by the drive signal output from the IGBT drive circuit 3.
　ＩＧＢＴ駆動回路３は、光起電力発生回路４０と発光回路５０を備えている。光起電力発生回路４０は、ＮＰＮ型のフォトトランジスタ４１，４２と還流用フォトダイオード４３を備えており、駆動電圧ＶCC3の入力端子４０Ｓにフォトトランジスタ４１のコレクタ領域４１Ｃが接続され、フォトトランジスタ４１のエミッタ領域４１Ｅにフォトトランジスタ４２のコレクタ領域４２Ｃが接続されている。フォトトランジスタ４２のエミッタ領域４２Ｅには、アースＧ及び還流用フォトダイオード４３のアノードが接続され、還流用フォトダイオード４３のカソードはフォトトランジスタ４２のコレクタ領域４２Ｃ及び出力端子３Ｓに接続されている。 The IGBT drive circuit 3 includes a photovoltaic power generation circuit 40 and a light emitting circuit 50. The photovoltaic power generation circuit 40 includes NPN- type phototransistors 41 and 42 and a free-wheeling photodiode 43. The collector region 41C of the phototransistor 41 is connected to the input terminal 40S of the drive voltage V CC3. The collector region 42C of the phototransistor 42 is connected to the emitter region 41E. The ground region G and the anode of the reflux photodiode 43 are connected to the emitter region 42E of the phototransistor 42, and the cathode of the reflux photodiode 43 is connected to the collector region 42C of the phototransistor 42 and the output terminal 3S.
　これに対して、発光回路５０は、単数又は複数の発光ダイオード５１，５２を備えており、例えば、発光ダイオード５１にて発光した光がフォトトランジスタ４１に照射され、発光ダイオード５２にて発光した光がフォトトランジスタ４２及び還流用フォトダイオード４３に照射されるように、発光ダイオード５１，５２が配置されている。 On the other hand, the light emitting circuit 50 includes one or a plurality of light emitting diodes 51 and 52. For example, light emitted from the light emitting diode 51 is irradiated to the phototransistor 41 and light emitted from the light emitting diode 52 is emitted. Are arranged so that the phototransistor 42 and the refluxing photodiode 43 are irradiated.
　このようなＩＧＢＴ駆動回路３は、フォトトランジスタ４１によって駆動用光起電力発生回路が構成されており、発光ダイオード５１によって駆動用オン時発光回路が構成されている。すなわち、発光ダイオード５１は、ＩＧＢＴ１０のターンオン時に発光してフォトトランジスタ４１に光を照射し、フォトトランジスタ４１は、ＩＧＢＴ１０のターンオン時に照射された光による光起電力効果で入力端子４０Ｓに入力される駆動電圧ＶCC3を出力端子３Ｓを介してＩＧＢＴ１０のゲート電極端子１０Ｇに入力する。半導体装置１は、このような光駆動方式を採用することができる。 In such an IGBT driving circuit 3, a driving photovoltaic power generation circuit is configured by the phototransistor 41, and a driving on-time light emitting circuit is configured by the light emitting diode 51. That is, the light-emitting diode 51 emits light when the IGBT 10 is turned on and irradiates the phototransistor 41 with light, and the phototransistor 41 is driven to be input to the input terminal 40S due to the photovoltaic effect caused by the light emitted when the IGBT 10 is turned on. The voltage V CC3 is input to the gate electrode terminal 10G of the IGBT 10 via the output terminal 3S. The semiconductor device 1 can employ such an optical driving method.
　また、ＩＧＢＴ駆動回路３は、フォトトランジスタ４２及び還流用フォトダイオード４３によってゲート放電用の光起電力発生回路が構成されており、発光ダイオード５２によって駆動用オフ時発光回路が構成されている。すなわち、発光ダイオード５２は、ＩＧＢＴ１０のターンオフ時に発光してフォトトランジスタ４２及び還流用フォトダイオード４３に光を照射し、フォトトランジスタ４２及び還流用フォトダイオード４３は、ＩＧＢＴ１０のターンオフ時に照射された光による光起電力効果によって、出力端子３Ｓに接続されるゲート電極端子１０Ｇに溜まった電荷を効果的にアースＧに放電させることができる。このようなゲート電荷の放電を加えることでターンオフ時のテール電流によるスイッチング損失を更に効果的に低減することができる。 Further, in the IGBT driving circuit 3, a photoelectromotive force generating circuit for gate discharge is constituted by the phototransistor 42 and the refluxing photodiode 43, and a light emitting circuit for driving is constituted by the light emitting diode 52. That is, the light emitting diode 52 emits light when the IGBT 10 is turned off and irradiates light to the phototransistor 42 and the refluxing photodiode 43. The phototransistor 42 and the refluxing photodiode 43 emit light by the light emitted when the IGBT 10 is turned off. Due to the electromotive force effect, the charges accumulated in the gate electrode terminal 10G connected to the output terminal 3S can be effectively discharged to the ground G. By applying such a gate charge discharge, the switching loss due to the tail current at the time of turn-off can be further effectively reduced.
　なお、本発明の実施形態では単一の発光ダイオード５２でフォトトランジスタ４２と還流用フォトダイオード４３の両方を照射しているが、ドリフト領域に溜まった電荷を放電する場合と同様に、複数の発光ダイオードを用いてフォトトランジスタ４２と還流用フォトダイオード４３を個別のタイミングで照射してもよい。 In the embodiment of the present invention, the single light-emitting diode 52 irradiates both the phototransistor 42 and the reflux photodiode 43, but a plurality of light-emitting elements are emitted as in the case of discharging the charge accumulated in the drift region. The phototransistor 42 and the reflux photodiode 43 may be irradiated at individual timings using a diode.
　このように、本発明の実施形態に係る半導体装置１は、ＩＧＢＴ１０のドリフト領域とエミッタ電極１０Ｅ間にフォトトランジスタ２２，２１と還流用フォトダイオード２３を備える光起電力発生回路２０を接続することで、ターンオフ時のドリフト領域における蓄積キャリアをフォトトランジスタ２２，２１と還流用フォトダイオード２３の光起電力効果によって速やかにアースＧ又はエミッタ電極１０Ｅに逃がすことができる。これによって、テール電流によるスイッチング損失を効果的に低減することができる。 As described above, the semiconductor device 1 according to the embodiment of the present invention connects the photovoltaic generation circuit 20 including the phototransistors 22 and 21 and the free-wheeling photodiode 23 between the drift region of the IGBT 10 and the emitter electrode 10E. The accumulated carriers in the drift region at the turn-off time can be quickly released to the ground G or the emitter electrode 10E by the photovoltaic effect of the phototransistors 22 and 21 and the reflux photodiode 23. Thereby, the switching loss due to the tail current can be effectively reduced.
　また、本発明の実施形態に係る半導体装置１は、ＩＧＢＴ１０のゲート電極端子１０Ｇにフォトトランジスタ４２と還流用フォトダイオード４３を備えるゲート放電用の光起電力発生回路を接続しているので、ターンオフ時のゲート電荷をフォトトランジスタ４２と還流用フォトダイオード４３の光起電力効果によって速やかにアースＧに放電することができる。これによっても、テール電流によるスイッチング損失を更に低減することができる。 In the semiconductor device 1 according to the embodiment of the present invention, the gate discharge photovoltaic generation circuit including the phototransistor 42 and the reflux photodiode 43 is connected to the gate electrode terminal 10G of the IGBT 10. Can be quickly discharged to the ground G by the photovoltaic effect of the phototransistor 42 and the reflux photodiode 43. This also makes it possible to further reduce the switching loss due to the tail current.
　以上説明したように、本発明の実施形態に係る半導体装置１は、ＩＧＢＴ１０のスイッチング損失を効果的に低減することができるので、動作周波数の向上が可能になる。また、従来のＩＧＢＴを含む半導体装置は、テール電流がエネルギーロスになって消費電力を増大させていたが、本発明の実施形態に係る半導体装置１は、スイッチング損失の低減によって消費電力の削減が可能になる。このように、本発明の実施形態に係る半導体装置は、ＩＧＢＴを含むパワー半導体デバイスの高周波数化と低消費電力化を実現することができる。 As described above, since the semiconductor device 1 according to the embodiment of the present invention can effectively reduce the switching loss of the IGBT 10, the operating frequency can be improved. Further, the semiconductor device including the conventional IGBT has increased the power consumption due to the energy loss of the tail current. However, the semiconductor device 1 according to the embodiment of the present invention can reduce the power consumption by reducing the switching loss. It becomes possible. As described above, the semiconductor device according to the embodiment of the present invention can realize higher frequency and lower power consumption of a power semiconductor device including an IGBT.
１：半導体装置，２：蓄積キャリア放電回路，３：ＩＧＢＴ駆動回路，
１０：ＩＧＢＴ，
１１：バイポーラトランジスタ，１２：ＭＯＳトランジスタ，
１３，２４：ＰＮ接合ダイオード，
２０，４０：光起電力発生回路，３０，５０：発光回路，
２１，２２，４１，４２：フォトトランジスタ，
２３，４３：還流用フォトダイオード，
３１，３２，５１，５２：発光ダイオード，
Ｇ：アース 1: semiconductor device, 2: storage carrier discharge circuit, 3: IGBT drive circuit,
10: IGBT,
11: Bipolar transistor, 12: MOS transistor,
13, 24: PN junction diode,
20, 40: photovoltaic power generation circuit, 30, 50: light emitting circuit,
21, 22, 41, 42: phototransistor,
23, 43: photodiode for reflux,
31, 32, 51, 52: light emitting diodes,
G: Earth

Claims (6)

  1. 　ＩＧＢＴと、
    　前記ＩＧＢＴのドリフト領域とエミッタ電極又はアースとの間に接続され、前記ドリフト領域の蓄積キャリアを放電する光起電力発生回路と、
    　前記ＩＧＢＴのターンオフ時に前記光起電力発生回路に光を照射する発光回路を備えることを特徴とする半導体装置。     IGBT,
    A photovoltaic generation circuit connected between the drift region of the IGBT and an emitter electrode or ground, and discharging accumulated carriers in the drift region;
    A semiconductor device comprising: a light emitting circuit for irradiating light to the photovoltaic power generation circuit when the IGBT is turned off.
  2. 　前記光起電力発生回路は、前記ＩＧＢＴのドリフト領域側にコレクタ領域が接続され前記ＩＧＢＴのエミッタ電極側又はアース側にエミッタ領域が接続されるＮＰＮ型フォトトランジスタを備えることを特徴とする請求項１記載の半導体装置。 2. The photovoltaic generation circuit includes an NPN phototransistor having a collector region connected to a drift region side of the IGBT and an emitter region connected to an emitter electrode side or a ground side of the IGBT. The semiconductor device described.
  3. 　前記光起電力発生回路は、前記ＮＰＮ型フォトトランジスタのエミッタ領域側にアノードが接続されコレクタ領域側にカソードが接続される還流用フォトダイオードを備えることを特徴とする請求項２記載の半導体装置。 3. The semiconductor device according to claim 2, wherein the photovoltaic power generation circuit includes a reflux photodiode in which an anode is connected to an emitter region side of the NPN phototransistor and a cathode is connected to a collector region side.
  4. 　前記発光回路は、前記ＩＧＢＴのターンオフ後初期に前記ＮＰＮ型フォトトランジスタに光を照射し、その後前記環流用フォトダイオードに光を照射することを特徴とする請求項３記載の半導体装置。 4. The semiconductor device according to claim 3, wherein the light emitting circuit irradiates the NPN phototransistor with light at an early stage after the IGBT is turned off, and thereafter irradiates the circulating photodiode with light.
  5. 　前記ＩＧＢＴのゲート電極に接続されるＩＧＢＴ駆動回路を備え、
    　前記ＩＧＢＴ駆動回路は、駆動用光起電力発生回路と前記ＩＧＢＴのターンオン時に前記駆動用光起電力発生回路に光を照射する駆動用オン時発光回路を備えることを特徴とする請求項１～４のいずれかに記載された半導体装置。     An IGBT drive circuit connected to the gate electrode of the IGBT;
    The IGBT driving circuit includes a driving photovoltaic power generation circuit and a driving on-time light emitting circuit that irradiates light to the driving photovoltaic power generation circuit when the IGBT is turned on. A semiconductor device according to any one of the above.
  6. 　前記ＩＧＢＴ駆動回路は、前記ＩＧＢＴのゲート電極とアース間に接続されるゲート放電用光起電力発生回路と、前記ＩＧＢＴのターンオフ時に前記ゲート放電用光起電力発生回路に光を照射する駆動用オフ時発光回路とを備えることを特徴とする請求項５記載の半導体装置。 The IGBT drive circuit includes a gate discharge photovoltaic generation circuit connected between the gate electrode of the IGBT and the ground, and a drive-off for irradiating the gate discharge photovoltaic generation circuit with light when the IGBT is turned off. 6. The semiconductor device according to claim 5, further comprising a time light emitting circuit.
PCT/JP2015/075315 2014-09-12 2015-09-07 Semiconductor device WO2016039286A1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000299634A (en) * 1999-02-14 2000-10-24 Yazaki Corp Switch device for ac
JP2014146629A (en) * 2013-01-28 2014-08-14 Hitachi Power Semiconductor Device Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000299634A (en) * 1999-02-14 2000-10-24 Yazaki Corp Switch device for ac
JP2014146629A (en) * 2013-01-28 2014-08-14 Hitachi Power Semiconductor Device Ltd Semiconductor device

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