WO2016036156A1 - Diode - Google Patents

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Publication number
WO2016036156A1
WO2016036156A1 PCT/KR2015/009284 KR2015009284W WO2016036156A1 WO 2016036156 A1 WO2016036156 A1 WO 2016036156A1 KR 2015009284 W KR2015009284 W KR 2015009284W WO 2016036156 A1 WO2016036156 A1 WO 2016036156A1
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WIPO (PCT)
Prior art keywords
doped
layer
conductor layer
diode
undoped
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PCT/KR2015/009284
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French (fr)
Korean (ko)
Inventor
김연상
이응규
임건희
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서울대학교산학협력단
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Priority claimed from KR1020140118800A external-priority patent/KR20160029930A/en
Priority claimed from KR1020150018620A external-priority patent/KR101685063B1/en
Priority claimed from KR1020150124055A external-priority patent/KR20170027904A/en
Application filed by 서울대학교산학협력단 filed Critical 서울대학교산학협력단
Publication of WO2016036156A1 publication Critical patent/WO2016036156A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes

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  • the present invention relates to a diode, and more particularly, to reduce the manufacturing cost compared to other diodes, such as a PN junction diode, a transistor back-to-back diode (transistor-back-to-back diode), process stability, durability, electrical
  • the present invention relates to a diode having a novel structure, which has excellent characteristics and is easily manufactured by a thin film process widely used in the industry.
  • the representative fields of the future flat panel display market are flexible displays and transparent displays.
  • the flexible display is a light, thin and small, unbreakable shape-based display based on a plastic substrate in a heavy, hard and fragile display centered on a conventional glass substrate.
  • the transparent display is a display that shows the background of the screen, and was conventionally implemented by projecting on a transparent screen.
  • the development is now being conducted in order to construct a transparent screen directly, and it is mainly implemented as an AMOLED showing rapid technological development in recent years. It is becoming.
  • Transparent displays share the characteristics that the screen is visible because the screen has transparency, and the technology to implement is also very diverse.
  • a diode used as an antistatic circuit in the transparent display also needs to be transparent.
  • Korean Patent No. 1183111 discloses a monopolar vertical diode in which a substrate, a lower electrode, a ZnO thin film, a ZnMgO thin film, and an upper electrode are sequentially stacked.
  • the lower electrode is formed of Al, Ga, ITO (Indium Tin Oxide) or ZnO. It is a conductive oxide containing In or Ir as an impurity, and the ZnMgO thin film is a g-ZnMgO thin film made of a gradient of concentration of Mg, and relates to a monopolar vertical diode, which is applied to a flat panel display device or a mobile electronic device. It is disclosed that it can be applied in the transparent electronic engineering technology.
  • the present inventors have a structure different from that of the prior art described above, and the manufacturing process is easier and the manufacturing cost can be reduced compared to a PN junction diode and a transistor back-to-back diode.
  • intensive research has been conducted, and as a result, the present invention has been completed.
  • an object of the present invention is to reduce the manufacturing cost, and to improve the process stability, durability, electrical properties, and the new structure is easy to manufacture a thin film process widely used in the industry compared to the conventional diode To provide a diode.
  • the present invention provides a diode in which the following layers are sequentially formed between both substrates, and a Zn-doped conductor layer, an insulator layer formed in contact with the Zn-doped conductor layer, and a Zn formed in contact with the insulator layer.
  • a diode comprising this doped or undoped conductor layer.
  • a Zn-doped or undoped conductor layer or a semiconductor layer may be further formed in one layer or repeatedly.
  • a Zn doped or undoped conductor layer or a semiconductor layer may be further formed in a single layer or repeatedly. have.
  • the present invention is a diode in which the following layers are sequentially formed between the two substrates, Zn-doped or undoped conductor layer, Zn-doped conductor layer or semiconductor formed in contact with the Zn-doped or undoped conductor layer It provides a diode comprising a layer, an insulator layer formed in contact with the Zn-doped conductor layer or a semiconductor layer, and a Zn-doped or undoped conductor layer formed in contact with the insulator layer.
  • the Zn-doped or undoped conductor layer or semiconductor layer is one layer or repeatedly between the Zn-doped or undoped conductor layer and the Zn-doped conductor layer or semiconductor layer. It may be further formed in multiple layers.
  • a Zn-doped or undoped conductor layer or a semiconductor layer may be further formed in one layer or repeatedly, between the insulator layer and the Zn-doped or undoped conductor layer.
  • the diode according to the present invention can be manufactured in an easy process compared to the manufacturing process of the PN junction diode and the transistor back-to-back diode to reduce the manufacturing cost, excellent in process stability, durability, electrical properties, and manufactured in a thin film process widely used in the industry This is possible.
  • 1 to 6 schematically show the structure of a diode according to different aspects of the present invention.
  • Embodiments described herein are preferred embodiments of the present invention, and do not represent all of the technical idea of the present invention, and thus, there may be various equivalents and modifications that may replace them at the time of the present application.
  • FIG. 1 is a schematic diagram showing the simplest structure of a diode according to the invention.
  • a diode according to the present invention is a diode in which the following layers are sequentially formed between two substrates (not shown), and the insulator formed by contacting the Zn-doped conductor layer 10 and the Zn-doped conductor layer.
  • the Zn-doped conductor layer 10 and Zn-doped or undoped conductor layer 40 formed in contact with the substrate serve as electrodes.
  • Zn is an interface dipole formed by chemical action between the insulator layer 30 formed in contact with the conductor layer 10 so that the Zn-doped conductor layer 10 is formed. ) And a band shift to enable diode action, thus realizing a diode having a simple structure as described above.
  • the diode according to the present invention is characterized by generating diode action using various insulator layers and various kinds of conductor layers doped with Zn.
  • a Zn-doped or undoped conductor layer or a semiconductor layer is formed in one layer or repeatedly to further form a multilayer. Can be.
  • Zn-doped or undoped conductor layer or semiconductor layer 11 and Zn-doped semiconductor are formed between Zn-doped or undoped conductor layer 1 and insulator layer 30.
  • Layer 20 may be further formed.
  • one layer of Zn-doped or undoped conductor layer or semiconductor layer (not shown) is formed between the insulator layer 30 and the conductor layer 40 doped or undoped Zn. Or may be repeatedly formed in multiple layers.
  • a Zn-doped or undoped semiconductor layer 31 may be further formed as a single layer between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. Can be.
  • a Zn-doped conductor layer or semiconductor layer and a Zn-doped conductor layer or semiconductor layer are repeatedly between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. It can be formed in multiple layers.
  • FIG. 4 shows a schematic structure of a diode according to a second aspect according to the invention.
  • a diode according to the present invention is a diode in which the following layers are sequentially formed between two substrates (not shown), and a conductive layer (1) doped or undoped with Zn and Zn doped or undoped Zn-doped conductor layer or semiconductor layer 20 formed in contact with conductor layer 1, insulator layer 30 formed in contact with Zn-doped conductor layer or semiconductor layer 20, and the insulator layer 30 Zn formed in contact with each other includes a doped or undoped conductor layer 40.
  • the Zn-doped or undoped conductor layer 1 and Zn-doped or undoped conductor layer 40 formed in contact with the substrate serve as electrodes.
  • a Zn doped or undoped conductor layer or semiconductor layer is formed between the Zn doped or undoped conductor layer 1 and the Zn doped conductor layer or semiconductor layer 20. It may be further formed in one layer or multiple layers repeatedly.
  • the Zn-doped or undoped conductor layer or semiconductor layer 11 is formed between the Zn-doped or undoped conductor layer 1 and the Zn-doped conductor layer or semiconductor layer 20. ) May be further formed.
  • Zn-doped conductor layers or semiconductor layers Zn-doped conductor layers or semiconductors are formed between a Zn-doped or undoped conductor layer and a Zn-doped conductor layer or semiconductor layer.
  • the layer and the Zn-doped conductor layer or semiconductor layer may be formed sequentially and repeatedly, and such a structure change will be apparent to those skilled in the art.
  • the Zn-doped or undoped conductor layer or semiconductor layer is one or a plurality of layers between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. It may be further formed as.
  • Conductor layer or semiconductor layer 11 may be further formed.
  • the conductive layer doped with Zn is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr , Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb Zn-doped opaque conductor, Zn x O x , In x Zn x O x , in which one or two or more compounds selected from the group consisting of Bi, and a conductive polymer (eg, PEDOT: PSS, PANI) In x Ga x Zn x O x , Ga x Zn x O x , Ga x Zn x O x , Sn x Zn x O x , In x Sn x Zn x O x or
  • the Zn-doped conductor layer is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi and a compound containing one or more selected from the group consisting of conductive polymers (for example, PEDOT: PSS, PANI), for example, Al, Cu, Ag, Au, Ti, etc. are used as a single layer Or a mixture of two layers (eg Cu / Ti, Al / Ti, etc.) and Zn, which will be apparent to those skilled in the art, may be formed of an undoped conductor material.
  • conductive polymers for example, PEDOT: PSS, PANI
  • the semiconductor layer doped with Zn is ZnO, In x Zn x O x , In x Ga x Zn x O x , Ga x Zn x O x , Sn x Zn x O x , In x Sn x Zn x O It may be formed of a compound selected from the group consisting of x , Sn x Ga x Zn x O x , ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe and ZnTe, but is not necessarily limited thereto.
  • the Zn-doped semiconductor layer is Si, B-doped Si, P-doped Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS, CdSe, CdTe, PbTe, PbS, PbSe, ⁇ -Sexythiophene, CuPc, aw-DH6T, Bis (benzodithiophene), Bis (dithienothiophene), Dihexyl anthrathiothiophene, FTTF pentacene, FTTF, BP2T, polythiophene, polyacetylene, P3AT, PTV, P3HT, TCNQ, C 60 , TCNNQ, NTCDA, PTCDA, F 16 -CuPc, aw-DFH-6T, NTCDI-C8F,
  • the insulator layer is Al x O x , Si x O x , Si x N x , Hf x O x , Y x O x , Mg x O x , Ca x O x , Sr x O x , Ta x O It may be formed of one or two or more compounds selected from the group consisting of x , Ba x O x , La x O x and Ti x O x , PVP, PMMA, PI, P4VP, PVA or SAIT.
  • ITO Indium Tin Oxide
  • a conductor layer doped with Zn having a thickness of 100 nm and heat-treated on a hot plate at 300 ° C. for 1 hour.
  • an insulator layer having a thickness of 30 nm was formed of Al 2 O 3 using ALD (atomic layer deposition).
  • a 100 nm thick Zn-doped conductor layer (a circular shape of a radius of 750 micrometers) was formed of ZnInSnO using a sputter, and a hot plate was heat treated at 300 ° C. for 1 hour to manufacture a diode having the structure shown in FIG. 1. .
  • the diode according to this embodiment it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that the current passes when the positive voltage is applied to the ITO electrode and the negative voltage is applied to the ZnInSnO electrode, and the current does not pass in the opposite case. From this, the current rectification is performed at about -30V to 30V. That is, the diode characteristics were confirmed.
  • ZnInSnO was sputtered to form a conductor layer doped with Zn on a glass substrate with a thickness of 50 nm and heat-treated at 300 ° C. for 1 hour. Thereafter, an insulator layer having a thickness of 100 nm was formed of polyvinyl pirrolidone (PVP) using a solution process, and heat-treated at 200 ° C. for 1 hour. Subsequently, a ZnO-doped ZnO-doped semiconductor layer was formed of ZnO using a sputter, followed by heat treatment at 200 ° C.
  • PVP polyvinyl pirrolidone
  • the diode according to this embodiment it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that the current passes when the positive voltage is applied to the ZnInSnO electrode and the negative voltage is applied to the ZnInO electrode, and the current does not pass in the opposite case, from which the current rectification is performed at about -20 V to 20 V. That is, the diode characteristics were confirmed.
  • InZnO was sputtered to form a conductor layer doped with Zn on a glass substrate with a thickness of 50 nm and heat-treated at 300 ° C. Thereafter, a ZnO-doped Zn-doped semiconductor layer was formed of ZnO using a sputter, and then heat-treated at 200 ° C. Subsequently, an insulator layer having a thickness of 100 nm was formed of SiN x using CVD (chemical vapor deposition) and heat-treated at 300 ° C. Subsequently, a 50 nm-thick Zn-doped conductor layer was formed of InZnO using a sputter, and then heat-treated at 100 ° C. Then, using a thermal evaporator to form a conductor layer (circular shape of a radius of 750 micrometers) undoped Zn of 50 nm thick in Al to prepare a diode of the structure shown in FIG.
  • the diode according to this embodiment it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to InZnO and a negative voltage was applied to the Al electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectification action was performed at about -80V to 80V. That is, the diode characteristics were confirmed.
  • a conductor layer undoped with Zn on Cu was formed to a thickness of 50 nm on a glass substrate. Thereafter, an insulator layer having a thickness of 100 nm was formed of SiO x using CVD. Thereafter, a ZnO-doped semiconductor layer having a thickness of 20 nm was formed of ZnO using a sputter, followed by heat treatment at 150 ° C. Then, using a thermal evaporator to form a conductive layer (circular shape of a radius of 750 micrometers) undoped Zn with Au to a thickness of 30 nm to prepare a diode of the structure shown in FIG.
  • the diode according to this embodiment it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to Cu and a negative voltage was applied to the Au electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectifying action was performed at about -80 V to 80 V, That is, the diode characteristics were confirmed.
  • a conductor layer undoped with Zn on Al was formed to a thickness of 20 nm on the glass substrate. Then, using a thermal evaporator to form a conductor layer undoped Zn with Ti to a thickness of 30 nm. SnZnO was sputtered to form a Zn-doped semiconductor layer with a thickness of 30 nm and heat-treated at 150 ° C. Thereafter, an insulator layer having a thickness of 100 nm was formed of HfO using ALD, and then heat-treated at 150 ° C.
  • a 50 nm thick Zn-doped semiconductor layer was formed of ZnO using a sputter, and then heat-treated at 100 ° C.
  • a conductor layer doped with InnZZO-doped Zn with a thickness of 30 nm was formed using a sputter, followed by heat treatment at 100 ° C.
  • the diode according to this embodiment it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to Al and a negative voltage was applied to the Cu electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectifying action was performed at about -50 V to 50 V, That is, the diode characteristics were confirmed.
  • a conductor layer undoped with Zn on Al was formed to a thickness of 50 nm on the glass substrate. Thereafter, an insulator layer was formed to a thickness of 30 nm by using AlO as a sputter. Subsequently, a ZnO-doped semiconductor layer having a thickness of 5 nm was formed of ZnO using a sputter, and then heat-treated at 200 ° C. for 5 minutes. Then, using a sputter to form a conductor layer doped with Zn-doped 10 nm thick ZnSnO and heat-treated at 200 °C for 5 minutes.
  • a 5 nm thick Zn-doped semiconductor layer formed of ZnO and a 10 nm thick Zn-doped conductor layer formed of InZnSnO were repeatedly formed as described above.
  • a 10 nm thick Zn-doped conductor layer (a circular shape having a radius of 750 micrometers) was formed of InZnSnO using a sputter, and then heat-treated at 200 ° C. for 5 minutes to manufacture a diode having the structure shown in FIG. 6.
  • the diode according to this embodiment it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to Al and a negative voltage was applied to the InZnSnO electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectifying action was performed at about -20 V to 20 V, That is, the diode characteristics were confirmed.

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Abstract

The present invention relates to a diode of a novel structure, capable of reducing manufacturing costs when compared with other diodes such as a PN-junction diode and a transistor-back-to-back diode, having excellent process stability, durability and electrical characteristics, and having simple manufacturing by using a thin-film process widely used in the industry.

Description

다이오드diode
본 발명은 다이오드에 관한 것으로, 보다 상세하게는, PN 접합 다이오드, 트랜지스터 백투백 다이오드(transistor-back-to-back diode) 등의 다른 다이오드에 비해 제조 비용을 절감할 수 있고, 공정안정성, 내구성, 전기적 특성이 우수하며, 산업에서 널리 쓰이는 박막 공정으로 제작이 용이한 신규한 구조의 다이오드에 관한 것이다.The present invention relates to a diode, and more particularly, to reduce the manufacturing cost compared to other diodes, such as a PN junction diode, a transistor back-to-back diode (transistor-back-to-back diode), process stability, durability, electrical The present invention relates to a diode having a novel structure, which has excellent characteristics and is easily manufactured by a thin film process widely used in the industry.
미래의 평판 디스플레이 시장으로 꼽히고 있는 대표적인 분야는 플렉시블 디스플레이와 투명디스플레이 분야이다. 플렉시블 디스플레이는 기존의 유리 기판 중심의 무겁고 딱딱하고 깨지기 쉬운 디스플레이에서 플라스틱 기판을 기반으로 하는 경박/단소형의 깨지지 않고 형태의 변형이 가능한 디스플레이다. 투명디스플레이는 화면의 뒷배경이 비춰보이는 디스플레이로서 기존에는 주로 투명한 스크린에 투사하여 구현하였으나, 지금은 직접 투명한 화면을 구성하는 방향으로 개발이 진행되고 있으며, 최근 급속한 기술적 발전을 보이고 있는 AMOLED로서 주로 구현되고 있다.The representative fields of the future flat panel display market are flexible displays and transparent displays. The flexible display is a light, thin and small, unbreakable shape-based display based on a plastic substrate in a heavy, hard and fragile display centered on a conventional glass substrate. The transparent display is a display that shows the background of the screen, and was conventionally implemented by projecting on a transparent screen. However, the development is now being conducted in order to construct a transparent screen directly, and it is mainly implemented as an AMOLED showing rapid technological development in recent years. It is becoming.
투명디스플레이는 화면이 투과도를 가지고 있어서 화면 뒷면이 보인다는 특징을 공유하고 있으며, 구현하는 기술 또한 매우 다양하다.Transparent displays share the characteristics that the screen is visible because the screen has transparency, and the technology to implement is also very diverse.
이러한 투명디스플레이를 구현하기 위해서는 투명디스플레이에서 정전기 방지회로로 사용되는 다이오드 또한 투명할 것이 요구된다.In order to implement such a transparent display, a diode used as an antistatic circuit in the transparent display also needs to be transparent.
이러한 다이오드에 관한 종래기술은 하기와 같다.The prior art of such a diode is as follows.
한국등록특허 제1183111호는 기판, 하부 전극, ZnO 박막, ZnMgO 박막 및 상부 전극이 순차적으로 적층된 단극성 수직형 다이오드에 있어서, 상기 하부전극은 ITO(Indium Tin Oxide) 또는 ZnO에 Al, Ga, In 또는 Ir를 불순물로 첨가한 전도성 산화물이고, 상기 ZnMgO 박막은 Mg의 농도 기울기를 만든 g-ZnMgO 박막인 것을 특징으로 하는 단극성 수직형 다이오드에 관한 것으로, 이는 평판 디스플레이 장치나 모바일 전자기기에 적용되는 투명전자 공학 기술에서의 응용될 수 있음을 개시하고 있다.Korean Patent No. 1183111 discloses a monopolar vertical diode in which a substrate, a lower electrode, a ZnO thin film, a ZnMgO thin film, and an upper electrode are sequentially stacked. The lower electrode is formed of Al, Ga, ITO (Indium Tin Oxide) or ZnO. It is a conductive oxide containing In or Ir as an impurity, and the ZnMgO thin film is a g-ZnMgO thin film made of a gradient of concentration of Mg, and relates to a monopolar vertical diode, which is applied to a flat panel display device or a mobile electronic device. It is disclosed that it can be applied in the transparent electronic engineering technology.
본 발명자들은 상술한 종래기술과 다른 구조를 가지며, PN 접합 다이오드 및 트랜지스터 백투백 다이오드(transistor-back-to-back diode)에 비하여 제조 공정이 용이하며 제조비용을 절감시킬 수 있으며, 투명 다이오드로도 적용가능한 신규한 구조의 다이오드를 제조하기 위해 예의 연구를 거듭하였고 그 결과 본 발명을 완성하기에 이르렀다.The present inventors have a structure different from that of the prior art described above, and the manufacturing process is easier and the manufacturing cost can be reduced compared to a PN junction diode and a transistor back-to-back diode. In order to manufacture diodes of the novel structure as possible, intensive research has been conducted, and as a result, the present invention has been completed.
따라서, 본 발명의 목적은 종래의 다이오드에 비해 제조 공정이 용이하여 제조비용을 감소시킬 수 있고, 공정안정성, 내구성, 전기적 특성이 우수하며, 산업에서 널리 쓰이는 박막 공정으로 제작이 용이한 신규한 구조의 다이오드를 제공하는데 있다.Accordingly, an object of the present invention is to reduce the manufacturing cost, and to improve the process stability, durability, electrical properties, and the new structure is easy to manufacture a thin film process widely used in the industry compared to the conventional diode To provide a diode.
상기 목적을 달성하기 위하여, 본 발명은 양 기판 사이에 하기 층들이 순차적으로 형성된 다이오드로서, Zn이 도핑된 도체층, 상기 Zn이 도핑된 도체층과 접하여 형성된 절연체층 및 상기 절연체층과 접하여 형성된 Zn이 도핑되거나 비도핑된 도체층을 포함하는 다이오드를 제공한다.In order to achieve the above object, the present invention provides a diode in which the following layers are sequentially formed between both substrates, and a Zn-doped conductor layer, an insulator layer formed in contact with the Zn-doped conductor layer, and a Zn formed in contact with the insulator layer. Provided is a diode comprising this doped or undoped conductor layer.
본 발명의 일 실시형태에 있어서, 상기 Zn이 도핑된 도체층과 절연체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, between the Zn-doped conductor layer and the insulator layer, a Zn-doped or undoped conductor layer or a semiconductor layer may be further formed in one layer or repeatedly.
본 발명의 일 실시형태에 있어서, 상기 절연체층과 상기 Zn이 도핑되거나 비도핑된 도체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, between the insulator layer and the Zn doped or undoped conductor layer, a Zn doped or undoped conductor layer or a semiconductor layer may be further formed in a single layer or repeatedly. have.
또한, 본 발명은 양 기판 사이에 하기의 층들이 순차적으로 형성된 다이오드로서, Zn이 도핑되거나 비도핑된 도체층, 상기 Zn이 도핑되거나 비도핑된 도체층과 접하여 형성된 Zn이 도핑된 도체층 또는 반도체층, 상기 Zn이 도핑된 도체층 또는 반도체층과 접하여 형성된 절연체층 및 상기 절연체층과 접하여 형성된 Zn이 도핑되거나 비도핑된 도체층을 포함하는 다이오드를 제공한다.In addition, the present invention is a diode in which the following layers are sequentially formed between the two substrates, Zn-doped or undoped conductor layer, Zn-doped conductor layer or semiconductor formed in contact with the Zn-doped or undoped conductor layer It provides a diode comprising a layer, an insulator layer formed in contact with the Zn-doped conductor layer or a semiconductor layer, and a Zn-doped or undoped conductor layer formed in contact with the insulator layer.
본 발명의 일 실시형태에 있어서, 상기 Zn이 도핑되거나 비도핑된 도체층과 상기 Zn이 도핑된 도체층 또는 반도체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, the Zn-doped or undoped conductor layer or semiconductor layer is one layer or repeatedly between the Zn-doped or undoped conductor layer and the Zn-doped conductor layer or semiconductor layer. It may be further formed in multiple layers.
본 발명의 일 실시형태에 있어서, 상기 절연체층과 Zn이 도핑되거나 비도핑된 도체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, a Zn-doped or undoped conductor layer or a semiconductor layer may be further formed in one layer or repeatedly, between the insulator layer and the Zn-doped or undoped conductor layer. .
본 발명에 따른 다이오드는 PN 접합 다이오드 및 트랜지스터 백투백 다이오드의 제조 공정에 비해 손쉬운 공정으로 제조하여 제조 비용을 절감할 수 있고, 공정안정성, 내구성, 전기적 특성이 우수하며, 산업에서 널리 쓰이는 박막 공정으로 제작이 가능하다.The diode according to the present invention can be manufactured in an easy process compared to the manufacturing process of the PN junction diode and the transistor back-to-back diode to reduce the manufacturing cost, excellent in process stability, durability, electrical properties, and manufactured in a thin film process widely used in the industry This is possible.
도 1 내지 6은 본 발명의 각기 다른 양태에 따른 다이오드의 구조를 개략적으로 나타낸 도면이다.1 to 6 schematically show the structure of a diode according to different aspects of the present invention.
본 명세서 및 특허청구범위에 사용된 용어나 단어는 통상적이거나 사전적 의미로 한정되어 해석되지 아니하며, 본 발명의 기술적 사항에 부합하는 의미와 개념으로 해석되어야 한다.The terms or words used in the specification and claims are not to be construed as being limited to conventional or dictionary meanings, but should be construed as meanings and concepts corresponding to the technical matters of the present invention.
본 명세서에 기재된 실시예는 본 발명의 바람직한 실시예이며, 본 발명의 기술적 사상을 모두 대변하는 것이 아니므로, 본 출원 시점에서 이들을 대체할 수 있는 다양한 균등물과 변형예들이 있을 수 있다.Embodiments described herein are preferred embodiments of the present invention, and do not represent all of the technical idea of the present invention, and thus, there may be various equivalents and modifications that may replace them at the time of the present application.
이하 본 발명을 도면을 참조하여 상세하게 설명한다.Hereinafter, the present invention will be described in detail with reference to the drawings.
도 1은 본 발명에 따른 다이오드의 가장 간단한 구조를 나타내는 개략도이다.1 is a schematic diagram showing the simplest structure of a diode according to the invention.
도 1을 참조하면, 본 발명에 따른 다이오드는 양 기판(미도시) 사이에 하기 층들이 순차적으로 형성된 다이오드로서, Zn이 도핑된 도체층(10), 상기 Zn이 도핑된 도체층과 접하여 형성된 절연체층(30), 및 상기 절연체층과 접하여 형성된 Zn이 도핑되거나 비도핑된 도체층(40)을 포함한다.Referring to FIG. 1, a diode according to the present invention is a diode in which the following layers are sequentially formed between two substrates (not shown), and the insulator formed by contacting the Zn-doped conductor layer 10 and the Zn-doped conductor layer. Layer 30 and a conductor layer 40 doped or undoped with Zn formed in contact with the insulator layer.
기판과 접하여 형성되는 Zn이 도핑된 도체층(10)과 Zn이 도핑되거나 비도핑된 도체층(40)은 각각 전극으로서 역할을 한다.The Zn-doped conductor layer 10 and Zn-doped or undoped conductor layer 40 formed in contact with the substrate serve as electrodes.
상기 Zn이 도핑된 도체층(10)에서의 Zn은 상기 도체층(10)과 접하여 형성된 절연체층(30) 사이에서 화학 작용에 의해 계면 쌍극자(dipole)가 형성되어 Zn이 도핑된 도체층(10)과 밴드 시프트를 일으켜 다이오드 작용이 가능하여 상기와 같이 간단한 구조의 다이오드 구현이 가능하다.In the Zn-doped conductor layer 10, Zn is an interface dipole formed by chemical action between the insulator layer 30 formed in contact with the conductor layer 10 so that the Zn-doped conductor layer 10 is formed. ) And a band shift to enable diode action, thus realizing a diode having a simple structure as described above.
따라서, 본 발명에 따른 다이오드는 다양한 절연체층과 Zn이 도핑된 다양한 종류의 도체층을 사용하여 다이오드 작용을 발생시키는 것을 특징으로 한다.Accordingly, the diode according to the present invention is characterized by generating diode action using various insulator layers and various kinds of conductor layers doped with Zn.
본 발명의 일 실시형태에 있어서, 상기 Zn이 도핑된 도체층(10)과 절연체층(30) 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, between the Zn-doped conductor layer 10 and the insulator layer 30, a Zn-doped or undoped conductor layer or a semiconductor layer is formed in one layer or repeatedly to further form a multilayer. Can be.
예시적으로, 도 2에서와 같이 Zn이 도핑되거나 비도핑된 도체층(1)과 절연체층(30) 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층(11) 및 Zn이 도핑된 반도체층(20)이 추가로 형성될 수 있다.For example, as illustrated in FIG. 2, Zn-doped or undoped conductor layer or semiconductor layer 11 and Zn-doped semiconductor are formed between Zn-doped or undoped conductor layer 1 and insulator layer 30. Layer 20 may be further formed.
본 발명의 일 실시형태에 있어서, 상기 절연체층(30)과 상기 Zn이 도핑되거나 비도핑된 도체층(40) 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층(미도시)이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, one layer of Zn-doped or undoped conductor layer or semiconductor layer (not shown) is formed between the insulator layer 30 and the conductor layer 40 doped or undoped Zn. Or may be repeatedly formed in multiple layers.
예시적으로, 도 3에서와 같이 상기 절연체층(30)과 상기 Zn이 도핑되거나 비도핑된 도체층(40) 사이에 Zn이 도핑되거나 비도핑된 반도체층(31)이 단층으로 추가로 형성될 수 있다.For example, as illustrated in FIG. 3, a Zn-doped or undoped semiconductor layer 31 may be further formed as a single layer between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. Can be.
또한 예시적으로, 상기 절연체층(30)과 상기 Zn이 도핑되거나 비도핑된 도체층(40) 사이에 Zn이 도핑된 도체층 또는 반도체층 및 Zn이 도핑되지 않은 도체층 또는 반도체층이 반복하여 다층으로 형성될 수 있다.Also illustratively, a Zn-doped conductor layer or semiconductor layer and a Zn-doped conductor layer or semiconductor layer are repeatedly between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. It can be formed in multiple layers.
도 4는 본 발명에 따른 제 2 양태에 따른 다이오드의 개략적인 구조를 나타낸다.4 shows a schematic structure of a diode according to a second aspect according to the invention.
도 4를 참조하면 본 발명에 따른 다이오드는 양 기판(미도시) 사이에 하기의 층들이 순차적으로 형성된 다이오드로서, Zn이 도핑되거나 비도핑된 도체층(1), 상기 Zn이 도핑되거나 비도핑된 도체층(1)과 접하여 형성된 Zn이 도핑된 도체층 또는 반도체층(20), 상기 Zn이 도핑된 도체층 또는 반도체층(20)과 접하여 형성된 절연체층(30) 및 상기 절연체층(30)과 접하여 형성된 Zn이 도핑되거나 비도핑된 도체층(40)을 포함한다.Referring to FIG. 4, a diode according to the present invention is a diode in which the following layers are sequentially formed between two substrates (not shown), and a conductive layer (1) doped or undoped with Zn and Zn doped or undoped Zn-doped conductor layer or semiconductor layer 20 formed in contact with conductor layer 1, insulator layer 30 formed in contact with Zn-doped conductor layer or semiconductor layer 20, and the insulator layer 30 Zn formed in contact with each other includes a doped or undoped conductor layer 40.
본 발명에 따른 제 2 양태에 따른 다이오드에서도 기판과 접하여 형성되는 Zn이 도핑되거나 비도핑된 도체층(1)과 Zn이 도핑되거나 비도핑된 도체층(40)은 각각 전극으로서 역할을 한다.In the diode according to the second aspect of the present invention, the Zn-doped or undoped conductor layer 1 and Zn-doped or undoped conductor layer 40 formed in contact with the substrate serve as electrodes.
본 발명의 일 실시형태에 있어서, 상기 Zn이 도핑되거나 비도핑된 도체층(1)과 Zn이 도핑된 도체층 또는 반도체층(20) 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, a Zn doped or undoped conductor layer or semiconductor layer is formed between the Zn doped or undoped conductor layer 1 and the Zn doped conductor layer or semiconductor layer 20. It may be further formed in one layer or multiple layers repeatedly.
예시적으로, 도 5에서와 같이 Zn이 도핑되거나 비도핑된 도체층(1)과 Zn이 도핑된 도체층 또는 반도체층(20) 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층(11)이 추가로 형성될 수 있다.For example, as illustrated in FIG. 5, the Zn-doped or undoped conductor layer or semiconductor layer 11 is formed between the Zn-doped or undoped conductor layer 1 and the Zn-doped conductor layer or semiconductor layer 20. ) May be further formed.
또한 예시적으로, 도 6에서와 같이 Zn이 도핑되거나 비도핑된 도체층과 Zn이 도핑된 도체층 또는 반도체층 사이에 Zn이 비도핑된 도체층 또는 반도체층, Zn이 도핑된 도체층 또는 반도체층 및 Zn이 비도핑된 도체층 또는 반도체층이 순차적으로 반복하여 형성될 수 있으며 이러한 구조의 변경은 당업자에게 자명한 것이다.Also, as illustrated in FIG. 6, Zn-doped conductor layers or semiconductor layers, Zn-doped conductor layers or semiconductors are formed between a Zn-doped or undoped conductor layer and a Zn-doped conductor layer or semiconductor layer. The layer and the Zn-doped conductor layer or semiconductor layer may be formed sequentially and repeatedly, and such a structure change will be apparent to those skilled in the art.
본 발명의 일 실시형태에 있어서, 상기 절연체층(30)과 상기 Zn이 도핑되거나 비도핑된 도체층(40) 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성될 수 있다.In one embodiment of the present invention, the Zn-doped or undoped conductor layer or semiconductor layer is one or a plurality of layers between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. It may be further formed as.
예시적으로, 도 5에서와 같이 상기 절연체층(30)과 상기 Zn이 도핑되거나 비도핑된 도체층(40) 사이에 Zn이 도핑된 도체층 또는 반도체층(21) 및 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층(11)이 추가로 형성될 수 있다.For example, as illustrated in FIG. 5, the Zn-doped conductor layer or semiconductor layer 21 and Zn doped or undoped between the insulator layer 30 and the Zn-doped or undoped conductor layer 40. Conductor layer or semiconductor layer 11 may be further formed.
본 발명에서 상기 Zn이 도핑된 도체층은 Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi 및 전도성 폴리머(예를 들어 PEDOT:PSS, PANI)로 이루어진 군에서 선택된 1 종 또는 2종 이상이 포함된 화합물에 Zn이 도핑된 불투명 도체, ZnxOx, InxZnxOx, InxGaxZnxOx, GaxZnxOx, SnxZnxOx, InxSnxZnxOx 또는 SnxGaxZnxOx로 형성되거나, 이들 화합물에 다른 원소가 들어간 화합물, 예를 들어 InxSnxZnxOx에 Ca가 10% 들어간 화합물, AlZn(Al 95% + Zn 5%), TiZn(Ti 90% + Zn 10%), CuZn(Cu 99%+ Zn 1%), AgZn(Ag 50% + Zn 50%), AlCuZn(Al 50% + Cu 40% + Zn 10%) 등 당업자에게 자명한 Zn이 도핑된 도체 물질로 형성될 수 있다.In the present invention, the conductive layer doped with Zn is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr , Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb Zn-doped opaque conductor, Zn x O x , In x Zn x O x , in which one or two or more compounds selected from the group consisting of Bi, and a conductive polymer (eg, PEDOT: PSS, PANI) In x Ga x Zn x O x , Ga x Zn x O x , Sn x Zn x O x , In x Sn x Zn x O x or Sn x Ga x Zn x O x , or other elements in these compounds Compound containing, for example, compound containing 10% Ca in In x Sn x Zn x O x , AlZn (Al 95% + Zn 5%), TiZn (Ti 90% + Zn 10%), CuZn (Cu 99% + Zn 1%), AgZn (Ag 50% + Zn 50%), AlCuZn (Al 50% + Cu 40% + Zn 10%), such as Zn-doped conductor material that is obvious to those skilled in the art.
본 발명에서 상기 Zn이 비도핑된 도체층은 Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi 및 전도성 폴리머(예를 들어 PEDOT:PSS, PANI)로 이루어진 군에서 선택된 1 종 또는 2종 이상이 포함된 화합물, 예를 들어 Al, Cu, Ag, Au, Ti 등이 단일층으로 사용되거나 이중층(예: Cu/Ti, Al/Ti 등)으로 혼합하여 사용될 수 있고 당업자에게 자명한 Zn이 비도핑된 도체 물질로 형성될 수 있다.In the present invention, the Zn-doped conductor layer is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi and a compound containing one or more selected from the group consisting of conductive polymers (for example, PEDOT: PSS, PANI), for example, Al, Cu, Ag, Au, Ti, etc. are used as a single layer Or a mixture of two layers (eg Cu / Ti, Al / Ti, etc.) and Zn, which will be apparent to those skilled in the art, may be formed of an undoped conductor material.
본 발명에서 상기 Zn이 도핑된 반도체층은 ZnO, InxZnxOx, InxGaxZnxOx, GaxZnxOx, SnxZnxOx, InxSnxZnxOx, SnxGaxZnxOx, ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe 및 ZnTe로 이루어진 군에서 선택된 화합물로 형성될 수 있으나 반드시 이에 제한되는 것은 아니다.In the present invention, the semiconductor layer doped with Zn is ZnO, In x Zn x O x , In x Ga x Zn x O x , Ga x Zn x O x , Sn x Zn x O x , In x Sn x Zn x O It may be formed of a compound selected from the group consisting of x , Sn x Ga x Zn x O x , ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe and ZnTe, but is not necessarily limited thereto.
본 발명에서 상기 Zn이 비도핑된 반도체층은 Si, B-도핑된 Si, P-도핑된 Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS, CdSe, CdTe, PbTe, PbS, PbSe, α-섹시티오펜(Sexithiophene), CuPc, a-w-DH6T, 비스(벤조디티오펜), 비스(디티에노티오펜), 디헥실안트라디티오펜, FTTF 펜타센, FTTF, BP2T, 폴리티오펜, 폴리아세틸렌, P3AT, PTV, P3HT, TCNQ, C60, TCNNQ, NTCDA, PTCDA, F16-CuPc, a-w-DFH-6T, NTCDI-C8F, NTCDI-C8F, NTCDI-C8F, NTCDI-C8H 및 PTCDI-C8H로 이루어진 군에서 선택된 화합물로 형성될 수 있으나 반드시 이에 제한되는 것은 아니다.In the present invention, the Zn-doped semiconductor layer is Si, B-doped Si, P-doped Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS, CdSe, CdTe, PbTe, PbS, PbSe, α-Sexythiophene, CuPc, aw-DH6T, Bis (benzodithiophene), Bis (dithienothiophene), Dihexyl anthrathiothiophene, FTTF pentacene, FTTF, BP2T, polythiophene, polyacetylene, P3AT, PTV, P3HT, TCNQ, C 60 , TCNNQ, NTCDA, PTCDA, F 16 -CuPc, aw-DFH-6T, NTCDI-C8F, NTCDI-C It may be formed of a compound selected from the group consisting of 8 F, NTCDI-C 8 F, NTCDI-C 8 H and PTCDI-C 8 H, but is not necessarily limited thereto.
본 발명에서 상기 절연체층은 AlxOx, SixOx, SixNx, HfxOx, YxOx, MgxOx, CaxOx, SrxOx, TaxOx, BaxOx, LaxOx 및 TixOx로 이루어진 군에서 선택되는 1종 또는 2종 이상의 화합물, PVP, PMMA, PI, P4VP, PVA 또는 SAIT로 형성될 수 있다.In the present invention, the insulator layer is Al x O x , Si x O x , Si x N x , Hf x O x , Y x O x , Mg x O x , Ca x O x , Sr x O x , Ta x O It may be formed of one or two or more compounds selected from the group consisting of x , Ba x O x , La x O x and Ti x O x , PVP, PMMA, PI, P4VP, PVA or SAIT.
이하, 본 발명의 이해를 돕기 위하여 바람직한 실시예를 제시하나, 하기 실시예는 본 발명을 예시하는 것일 뿐 본 발명의 범주 및 기술사상 범위 내에서 다양한 변경 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속하는 것도 당연한 것이다.Hereinafter, preferred examples are provided to aid the understanding of the present invention, but the following examples are merely for exemplifying the present invention, and it will be apparent to those skilled in the art that various changes and modifications can be made within the scope and spirit of the present invention. It is natural that such variations and modifications fall within the scope of the appended claims.
실시예 1: 다이오드의 제조Example 1 Fabrication of Diodes
ITO(Indium Tin Oxide)를 스퍼터를 이용하여 유리기판 위에 형성하여 100 nm 두께의 Zn이 비도핑된 도체층을 형성하고 300 ℃에서 1 시간 동안 핫플레이트 위에서 열처리를 하였다. 이후, ALD(atomic layer deposition)를 이용하여 Al2O3로 30 nm 두께의 절연체층을 형성하였다. 최종적으로 스퍼터를 이용하여 ZnInSnO로 100 nm 두께의 Zn이 도핑된 도체층(반지름 750 micrometer 의 원형모양)을 형성하고 300 ℃에서 1 시간 동안 핫플레이트 열처리하여 도 1에 도시된 구조의 다이오드를 제조하였다.Indium Tin Oxide (ITO) was formed on a glass substrate by using a sputter to form a conductor layer doped with Zn having a thickness of 100 nm and heat-treated on a hot plate at 300 ° C. for 1 hour. Thereafter, an insulator layer having a thickness of 30 nm was formed of Al 2 O 3 using ALD (atomic layer deposition). Finally, a 100 nm thick Zn-doped conductor layer (a circular shape of a radius of 750 micrometers) was formed of ZnInSnO using a sputter, and a hot plate was heat treated at 300 ° C. for 1 hour to manufacture a diode having the structure shown in FIG. 1. .
본 실시예에 따른 다이오드에 대하여 IV 측정장비 (Agilent 4155B)를 이용하여 전류 통과 여부를 확인하였다. 그 결과, ITO 전극에 양의 전압, ZnInSnO 전극에 음의 전압이 작용될 경우에 전류를 통과시키고, 반대의 경우는 전류를 통과시키지 않는 것이 확인되었고, 이로부터 약 -30V~ 30V에서 전류 정류작용, 즉 다이오드 특성을 확인하였다.For the diode according to this embodiment, it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that the current passes when the positive voltage is applied to the ITO electrode and the negative voltage is applied to the ZnInSnO electrode, and the current does not pass in the opposite case. From this, the current rectification is performed at about -30V to 30V. That is, the diode characteristics were confirmed.
실시예 2: 다이오드의 제조Example 2: Fabrication of Diode
ZnInSnO를 스퍼터를 이용하여 유리기판 위에 Zn이 도핑된 도체층을 50 nm 두께로 형성하고 300 ℃에서 1 시간 동안 열처리를 하였다. 이후, 용액공정을 이용하여 PVP(Poly Vinyl Pirrolidone)로 100 nm 두께의 절연체층을 형성하고 200 ℃에서 1 시간 동안 열처리를 하였다. 이후, 스퍼터를 이용하여 ZnO로 20 nm 두께의 Zn이 도핑된 반도체층을 형성하고 200 ℃에서 열처리를 하였다. 이후, ALD를 이용하여 InZnO로 30 nm 두께의 Zn이 도핑된 도체층을 형성하고 100 ℃에서 열처리를 하였다. 이후, 스퍼터를 이용하여 ZnInO로 50 nm 두께의 Zn이 도핑된 도체층(반지름 750 micrometer 의 원형모양)을 형성하고 200 ℃에서 열처리하여 도 2에 도시된 구조의 다이오드를 제조하였다.ZnInSnO was sputtered to form a conductor layer doped with Zn on a glass substrate with a thickness of 50 nm and heat-treated at 300 ° C. for 1 hour. Thereafter, an insulator layer having a thickness of 100 nm was formed of polyvinyl pirrolidone (PVP) using a solution process, and heat-treated at 200 ° C. for 1 hour. Subsequently, a ZnO-doped ZnO-doped semiconductor layer was formed of ZnO using a sputter, followed by heat treatment at 200 ° C. Then, using ALD to form a conductor layer doped with Zn-doped 30 nm thick ZnO and heat-treated at 100 ℃. Thereafter, a 50 nm-thick Zn-doped conductor layer (a circular shape of a radius of 750 micrometers) was formed by ZnInO using a sputter, and a heat treatment was performed at 200 ° C. to manufacture a diode having the structure shown in FIG. 2.
본 실시예에 따른 다이오드에 대하여 IV 측정장비 (Agilent 4155B)를 이용하여 전류 통과 여부를 확인하였다. 그 결과, ZnInSnO 전극에 양의 전압 및 ZnInO 전극에 음의 전압이 작용될 경우에 전류를 통과시키고, 반대의 경우는 전류를 통과시키지 않는 것이 확인되었고, 이로부터 약 -20V~ 20V에서 전류 정류작용, 즉 다이오드 특성을 확인하였다.For the diode according to this embodiment, it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that the current passes when the positive voltage is applied to the ZnInSnO electrode and the negative voltage is applied to the ZnInO electrode, and the current does not pass in the opposite case, from which the current rectification is performed at about -20 V to 20 V. That is, the diode characteristics were confirmed.
실시예 3: 다이오드의 제조Example 3: Fabrication of Diodes
InZnO를 스퍼터를 이용하여 유리기판 위에 Zn이 도핑된 도체층을 50 nm 두께로 형성하고 300 ℃에서 열처리를 하였다. 이후, 스퍼터를 이용하여 ZnO로 30 nm 두께의 Zn이 도핑된 반도체층을 형성하고 200 ℃에서 열처리를 하였다. 이후, CVD(chemical vapor deposition)를 이용하여 SiNx로 100 nm 두께의 절연체층을 형성하고 300 ℃에서 열처리를 하였다. 이후, 스퍼터를 이용하여 InZnO로 50 nm 두께의 Zn이 도핑된 도체층을 형성하고 100 ℃에서 열처리를 하였다. 이후, 열증착기를 이용하여 Al로 50 nm 두께의 Zn이 비도핑된 도체층(반지름 750 micrometer 의 원형모양)을 형성하여 도 3에 도시된 구조의 다이오드를 제조하였다.InZnO was sputtered to form a conductor layer doped with Zn on a glass substrate with a thickness of 50 nm and heat-treated at 300 ° C. Thereafter, a ZnO-doped Zn-doped semiconductor layer was formed of ZnO using a sputter, and then heat-treated at 200 ° C. Subsequently, an insulator layer having a thickness of 100 nm was formed of SiN x using CVD (chemical vapor deposition) and heat-treated at 300 ° C. Subsequently, a 50 nm-thick Zn-doped conductor layer was formed of InZnO using a sputter, and then heat-treated at 100 ° C. Then, using a thermal evaporator to form a conductor layer (circular shape of a radius of 750 micrometers) undoped Zn of 50 nm thick in Al to prepare a diode of the structure shown in FIG.
본 실시예에 따른 다이오드에 대하여 IV 측정장비 (Agilent 4155B)를 이용하여 전류 통과 여부를 확인하였다. 그 결과, InZnO 에 양의 전압 및 Al 전극에 음의 전압이 작용될 경우에 전류를 통과시키고, 반대의 경우는 전류를 통과시키지 않는 것이 확인되었고, 이로부터 약 -80V~ 80V에서 전류 정류작용, 즉 다이오드 특성을 확인하였다.For the diode according to this embodiment, it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to InZnO and a negative voltage was applied to the Al electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectification action was performed at about -80V to 80V. That is, the diode characteristics were confirmed.
실시예 4: 다이오드의 제조Example 4: Fabrication of Diodes
열증착기를 이용하여 유리기판 위에 Cu로 Zn이 비도핑된 도체층을 50 nm 두께로 형성하였다. 이후, CVD를 이용하여 SiOx로 100 nm 두께의 절연체층을 형성하였다. 이후, 스퍼터를 이용하여 ZnO로 20 nm 두께의 Zn이 도핑된 반도체층을 형성하고 150 ℃에서 열처리를 하였다. 이후, 열증착기를 이용하여 Au로 Zn이 비도핑된 도체층(반지름 750 micrometer 의 원형모양)을 30 nm 두께로 형성하여 도 4에 도시된 구조의 다이오드를 제조하였다.Using a thermal evaporator, a conductor layer undoped with Zn on Cu was formed to a thickness of 50 nm on a glass substrate. Thereafter, an insulator layer having a thickness of 100 nm was formed of SiO x using CVD. Thereafter, a ZnO-doped semiconductor layer having a thickness of 20 nm was formed of ZnO using a sputter, followed by heat treatment at 150 ° C. Then, using a thermal evaporator to form a conductive layer (circular shape of a radius of 750 micrometers) undoped Zn with Au to a thickness of 30 nm to prepare a diode of the structure shown in FIG.
본 실시예에 따른 다이오드에 대하여 IV 측정장비 (Agilent 4155B)를 이용하여 전류 통과 여부를 확인하였다. 그 결과, Cu에 양의 전압 및 Au 전극에 음의 전압이 작용될 경우에 전류를 통과시키고, 반대의 경우는 전류를 통과시키지 않는 것이 확인되었고, 이로부터 약 -80V~ 80V에서 전류 정류작용, 즉 다이오드 특성을 확인하였다.For the diode according to this embodiment, it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to Cu and a negative voltage was applied to the Au electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectifying action was performed at about -80 V to 80 V, That is, the diode characteristics were confirmed.
실시예 5 : 다이오드의 제조Example 5 Fabrication of Diodes
열증착기를 이용하여 유리기판 위에 Al으로 Zn이 비도핑된 도체층을 20 nm 두께로 형성하였다. 이후, 열증착기를 이용하여 Ti으로 Zn이 비도핑된 도체층을 30 nm 두께로 형성하였다. SnZnO를 스퍼터를 이용하여 Zn이 도핑된 반도체층을 30 nm 두께로 형성하고 150 ℃에서 열처리를 하였다. 이후, ALD를 이용하여 HfO로 100 nm 두께의 절연체층을 형성하고 150 ℃에서 열처리를 하였다. 이후, 스퍼터를 이용하여 ZnO로 50 nm 두께의 Zn이 도핑된 반도체층을 형성하고 100 ℃에서 열처리를 하였다. 이후, 스퍼터를 이용하여 InGaZnO로 30 nm 두께의 Zn이 도핑된 도체층을 형성하고 100 ℃에서 열처리를 하였다. 이후, 열증착기를 이용하여 Cu로 50 nm 두께의 Zn이 비도핑된 도체층(반지름 750 micrometer 의 원형모양)을 형성하여 도 5에 도시된 구조의 다이오드를 제조하였다.Using a thermal evaporator, a conductor layer undoped with Zn on Al was formed to a thickness of 20 nm on the glass substrate. Then, using a thermal evaporator to form a conductor layer undoped Zn with Ti to a thickness of 30 nm. SnZnO was sputtered to form a Zn-doped semiconductor layer with a thickness of 30 nm and heat-treated at 150 ° C. Thereafter, an insulator layer having a thickness of 100 nm was formed of HfO using ALD, and then heat-treated at 150 ° C. Subsequently, a 50 nm thick Zn-doped semiconductor layer was formed of ZnO using a sputter, and then heat-treated at 100 ° C. Subsequently, a conductor layer doped with InnZZO-doped Zn with a thickness of 30 nm was formed using a sputter, followed by heat treatment at 100 ° C. Then, using a thermal evaporator to form a conductor layer (circular shape of 750 micrometers radius) Zn-doped Zn of 50 nm thickness in Cu to prepare a diode of the structure shown in FIG.
본 실시예에 따른 다이오드에 대하여 IV 측정장비 (Agilent 4155B)를 이용하여 전류 통과 여부를 확인하였다. 그 결과, Al에 양의 전압 및 Cu 전극에 음의 전압이 작용될 경우에 전류를 통과시키고, 반대의 경우는 전류를 통과시키지 않는 것이 확인되었고, 이로부터 약 -50V~ 50V에서 전류 정류작용, 즉 다이오드 특성을 확인하였다.For the diode according to this embodiment, it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to Al and a negative voltage was applied to the Cu electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectifying action was performed at about -50 V to 50 V, That is, the diode characteristics were confirmed.
실시예 6 : 다이오드의 제조Example 6 Fabrication of Diode
열증착기를 이용하여 유리기판 위에 Al으로 Zn이 비도핑된 도체층을 50 nm 두께로 형성하였다. 이후, AlO를 스퍼터를 이용하여 절연체층을 30 nm 두께로 형성하였다. 이후, 스퍼터를 이용하여 ZnO로 5 nm 두께의 Zn이 도핑된 반도체층을 형성하고 200 ℃에서 5 분 동안 열처리를 하였다. 이후, 스퍼터를 이용하여 InZnSnO로 10 nm 두께의 Zn이 도핑된 도체층을 형성하고 200 ℃에서 5 분 동안 열처리를 하였다. 이후, 상기와 동일하게 ZnO로 형성된 5 nm 두께의 Zn이 도핑된 반도체층 및 InZnSnO로 형성된 10 nm 두께의 Zn이 도핑된 도체층을 8회 반복하여 형성하였다. 이후, 스퍼터를 이용하여 InZnSnO로 10 nm 두께의 Zn이 도핑된 도체층(반지름 750 micrometer 의 원형모양)을 형성하고 200 ℃에서 5 분 동안 열처리하여 도 6에 도시된 구조의 다이오드를 제조하였다.Using a thermal evaporator, a conductor layer undoped with Zn on Al was formed to a thickness of 50 nm on the glass substrate. Thereafter, an insulator layer was formed to a thickness of 30 nm by using AlO as a sputter. Subsequently, a ZnO-doped semiconductor layer having a thickness of 5 nm was formed of ZnO using a sputter, and then heat-treated at 200 ° C. for 5 minutes. Then, using a sputter to form a conductor layer doped with Zn-doped 10 nm thick ZnSnO and heat-treated at 200 ℃ for 5 minutes. Thereafter, a 5 nm thick Zn-doped semiconductor layer formed of ZnO and a 10 nm thick Zn-doped conductor layer formed of InZnSnO were repeatedly formed as described above. Thereafter, a 10 nm thick Zn-doped conductor layer (a circular shape having a radius of 750 micrometers) was formed of InZnSnO using a sputter, and then heat-treated at 200 ° C. for 5 minutes to manufacture a diode having the structure shown in FIG. 6.
본 실시예에 따른 다이오드에 대하여 IV 측정장비 (Agilent 4155B)를 이용하여 전류 통과 여부를 확인하였다. 그 결과, Al 에 양의 전압 및 InZnSnO 전극에 음의 전압이 작용될 경우에 전류를 통과시키고, 반대의 경우는 전류를 통과시키지 않는 것이 확인되었고, 이로부터 약 -20V~ 20V에서 전류 정류작용, 즉 다이오드 특성을 확인하였다.For the diode according to this embodiment, it was checked whether the current passed through the IV measuring equipment (Agilent 4155B). As a result, it was confirmed that when a positive voltage was applied to Al and a negative voltage was applied to the InZnSnO electrode, a current was passed, and in the opposite case, a current was not passed. From this, a current rectifying action was performed at about -20 V to 20 V, That is, the diode characteristics were confirmed.

Claims (18)

  1. 양 기판 사이에 하기 층들이 순차적으로 형성된 다이오드로서,A diode in which the following layers are sequentially formed between both substrates,
    Zn이 도핑된 도체층,A conductor layer doped with Zn,
    상기 Zn이 도핑된 도체층과 접하여 형성된 절연체층, 및An insulator layer formed in contact with the Zn-doped conductor layer, and
    상기 절연체층과 접하여 형성된 Zn이 도핑되거나 비도핑된 도체층,A conductor layer doped or undoped with Zn formed in contact with the insulator layer,
    을 포함하는 다이오드.Diode comprising a.
  2. 제 1 항에 있어서,The method of claim 1,
    상기 기판은 유리 기판, 플라스틱 기판, Si 기판 및 탄소로 구성된 기판으로 이루어진 군에서 선택되는 것을 특징으로 하는 다이오드.The substrate is selected from the group consisting of a glass substrate, a plastic substrate, a Si substrate and a substrate consisting of carbon.
  3. 제 1 항에 있어서,The method of claim 1,
    상기 Zn이 도핑된 도체층과 절연체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성되는 것을 특징으로 하는 다이오드. And a Zn doped or undoped conductor layer or a semiconductor layer is formed in one layer or repeatedly, between the Zn-doped conductor layer and the insulator layer.
  4. 제 1 항에 있어서,The method of claim 1,
    상기 절연체층과 상기 Zn이 도핑되거나 비도핑된 도체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성되는 것을 특징으로 하는 다이오드. And a Zn-doped or undoped conductor layer or a semiconductor layer between the insulator layer and the Zn-doped or undoped conductor layer is formed in one layer or repeatedly in multiple layers.
  5. 제 1 항에 있어서,The method of claim 1,
    상기 Zn이 도핑된 도체층은 Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi 및 전도성 폴리머로 이루어진 군에서 선택된 1 종 또는 2종 이상이 포함된 화합물에 Zn이 도핑된 불투명 도체, ZnxOx, InxZnxOx, InxGaxZnxOx, GaxZnxOx, SnxZnxOx, InxSnxZnxOx 또는 SnxGaxZnxOx 로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped conductor layer is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi and Zn-doped opaque conductors containing at least one compound selected from the group consisting of conductive polymers, Zn x O x , In x Zn x O x , In x Ga x Zn x O x , Ga x Zn x Diode formed by O x , Sn x Zn x O x , In x Sn x Zn x O x or Sn x Ga x Zn x O x .
  6. 제 1 항에 있어서,The method of claim 1,
    상기 절연체층은 AlxOx, SixOx, SixNx, HfxOx, YxOx, MgxOx, CaxOx, SrxOx, TaxOx, BaxOx, LaxOx 및 TixOx로 이루어진 군에서 선택되는 1종 또는 2종 이상의 화합물, PVP, PMMA, PI, P4VP, PVA 또는 SAIT로 형성되는 것을 특징으로 하는 다이오드. The insulator layer is Al x O x , Si x O x , Si x N x , Hf x O x , Y x O x , Mg x O x , Ca x O x , Sr x O x , Ta x O x , Ba Diode formed by one or two or more compounds selected from the group consisting of x O x , La x O x and Ti x O x , PVP, PMMA, PI, P4VP, PVA or SAIT.
  7. 제 4 항에 있어서,The method of claim 4, wherein
    상기 Zn이 비도핑된 도체층은 Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi 및 전도성 폴리머로 이루어진 군에서 선택된 1 종 또는 2종 이상이 포함된 화합물로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped conductor layer is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y , Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi And a compound containing one or two or more selected from the group consisting of conductive polymers.
  8. 제 4 항에 있어서,The method of claim 4, wherein
    상기 Zn이 도핑된 반도체층은 ZnO, InxZnxOx, InxGaxZnxOx, GaxZnxOx, SnxZnxOx, InxSnxZnxOx, SnxGaxZnxOx, ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe 및 ZnTe로 이루어진 군에서 선택된 화합물로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped semiconductor layer is ZnO, In x Zn x O x , In x Ga x Zn x O x , Ga x Zn x O x , Sn x Zn x O x , In x Sn x Zn x O x , Sn A diode, which is formed of a compound selected from the group consisting of: x Ga x Zn x O x , ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe and ZnTe.
  9. 제 4 항에 있어서,The method of claim 4, wherein
    상기 Zn이 비도핑된 반도체층은 Si, B-도핑된 Si, P-도핑된 Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS, CdSe, CdTe, PbTe, PbS, PbSe, α-섹시티오펜(Sexithiophene), CuPc, a-w-DH6T, 비스(벤조디티오펜), 비스(디티에노티오펜), 디헥실안트라디티오펜, FTTF 펜타센, FTTF, BP2T, 폴리티오펜, 폴리아세틸렌, P3AT, PTV, P3HT, TCNQ, C60, TCNNQ, NTCDA, PTCDA, F16-CuPc, a-w-DFH-6T, NTCDI-C8F, NTCDI-C8F, NTCDI-C8F, NTCDI-C8H 및 PTCDI-C8H로 이루어진 군에서 선택된 화합물로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped semiconductor layer is Si, B-doped Si, P-doped Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS , CdSe, CdTe, PbTe, PbS, PbSe, α-Sexythiophene, CuPc, aw-DH6T, Bis (benzodithiophene), Bis (dithienothiophene), Dihexylantradiothiophene, FTTF pentacene , FTTF, BP2T, Polythiophene, Polyacetylene, P3AT, PTV, P3HT, TCNQ, C 60 , TCNNQ, NTCDA, PTCDA, F 16 -CuPc, aw-DFH-6T, NTCDI-C8F, NTCDI-C 8 F, A diode, characterized in that formed of a compound selected from the group consisting of NTCDI-C 8 F, NTCDI-C 8 H and PTCDI-C 8 H.
  10. 양 기판 사이에 하기의 층들이 순차적으로 형성된 다이오드로서,A diode in which the following layers are sequentially formed between both substrates,
    Zn이 도핑되거나 비도핑된 도체층,A conductor layer doped or undoped with Zn,
    상기 Zn이 도핑되거나 비도핑된 도체층과 접하여 형성된 Zn이 도핑된 도체층 또는 반도체층,A Zn-doped conductor layer or semiconductor layer formed in contact with the Zn-doped or undoped conductor layer,
    상기 Zn이 도핑된 도체층 또는 반도체층과 접하여 형성된 절연체층, 및An insulator layer formed in contact with the conductor layer or semiconductor layer doped with Zn, and
    상기 절연체층과 접하여 형성된 Zn이 도핑되거나 비도핑된 도체층,A conductor layer doped or undoped with Zn formed in contact with the insulator layer,
    을 포함하는 다이오드.Diode comprising a.
  11. 제 10 항에 있어서,The method of claim 10,
    상기 기판은 유리 기판, 플라스틱 기판, Si 기판 및 탄소로 구성된 기판으로 이루어진 군에서 선택되는 것을 특징으로 하는 다이오드.The substrate is selected from the group consisting of a glass substrate, a plastic substrate, a Si substrate and a substrate consisting of carbon.
  12. 제 10 항에 있어서,The method of claim 10,
    상기 Zn이 도핑되거나 비도핑된 도체층과 상기 Zn이 도핑된 도체층 또는 반도체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성되는 것을 특징으로 하는 다이오드.Between the Zn-doped or undoped conductor layer and the Zn-doped conductor layer or semiconductor layer, a Zn-doped or undoped conductor layer or semiconductor layer is formed in one layer or repeatedly to further form a multilayer. Diode.
  13. 제 1 항에 있어서,The method of claim 1,
    상기 절연체층과 Zn이 도핑되거나 비도핑된 도체층 사이에 Zn이 도핑되거나 비도핑된 도체층 또는 반도체층이 1층 또는 반복하여 다층으로 추가로 형성되는 것을 특징으로 하는 다이오드.And a Zn-doped or undoped conductor layer or a semiconductor layer is formed in one layer or repeatedly, between the insulator layer and the Zn-doped or undoped conductor layer.
  14. 제 10 항에 있어서,The method of claim 10,
    상기 Zn이 도핑된 도체층은 Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi 및 전도성 폴리머로 이루어진 군에서 선택된 1 종 또는 2종 이상이 포함된 화합물에 Zn이 도핑된 불투명 도체, ZnxOx, InxZnxOx, InxGaxZnxOx, GaxZnxOx, SnxZnxOx, InxSnxZnxOx 또는 SnxGaxZnxOx 로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped conductor layer is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi and Zn-doped opaque conductors containing at least one compound selected from the group consisting of conductive polymers, Zn x O x , In x Zn x O x , In x Ga x Zn x O x , Ga x Zn x Diode formed by O x , Sn x Zn x O x , In x Sn x Zn x O x or Sn x Ga x Zn x O x .
  15. 제 10 항에 있어서,The method of claim 10,
    상기 절연체층은 AlxOx, SixOx, SixNx, HfxOx, YxOx, MgxOx, CaxOx, SrxOx, TaxOx, BaxOx, LaxOx 및 TixOx로 이루어진 군에서 선택되는 1종 또는 2종 이상의 화합물, PVP, PMMA, PI, P4VP, PVA 또는 SAIT로 형성되는 것을 특징으로 하는 다이오드. The insulator layer is Al x O x , Si x O x , Si x N x , Hf x O x , Y x O x , Mg x O x , Ca x O x , Sr x O x , Ta x O x , Ba Diode formed by one or two or more compounds selected from the group consisting of x O x , La x O x and Ti x O x , PVP, PMMA, PI, P4VP, PVA or SAIT.
  16. 제 10 항에 있어서,The method of claim 10,
    상기 Zn이 비도핑된 도체층은 Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi 및 전도성 폴리머로 이루어진 군에서 선택된 1 종 또는 2종 이상이 포함된 화합물로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped conductor layer is Li, Be, Na, Mg, Al, Si, K, Ca, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Se, Rb, Sr, Y , Zr, Nb, Mo, Ru, Rh, Pd, Ag, Cd, In, Sn, Sb, Cs, Ba, Hf, Ta, W, RE, Os, Ir, Pt, Au, Hg, Tl, Pb, Bi And a compound containing at least one compound selected from the group consisting of conductive polymers.
  17. 제 10 항에 있어서,The method of claim 10,
    상기 Zn이 도핑된 반도체층은 ZnO, InxZnxOx, InxGaxZnxOx, GaxZnxOx, SnxZnxOx, InxSnxZnxOx, SnxGaxZnxOx, ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe 및 ZnTe로 이루어진 군에서 선택된 화합물로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped semiconductor layer is ZnO, In x Zn x O x , In x Ga x Zn x O x , Ga x Zn x O x , Sn x Zn x O x , In x Sn x Zn x O x , Sn A diode, which is formed of a compound selected from the group consisting of: x Ga x Zn x O x , ZnN, ZnS, ZnF, ZnI, ZnCl, ZnSe and ZnTe.
  18. 제 10 항에 있어서,The method of claim 10,
    상기 Zn이 비도핑된 반도체층은 Si, B-도핑된 Si, P-도핑된 Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS, CdSe, CdTe, PbTe, PbS, PbSe, α-섹시티오펜(Sexithiophene), CuPc, a-w-DH6T, 비스(벤조디티오펜), 비스(디티에노티오펜), 디헥실안트라디티오펜, FTTF 펜타센, FTTF, BP2T, 폴리티오펜, 폴리아세틸렌, P3AT, PTV, P3HT, TCNQ, C60, TCNNQ, NTCDA, PTCDA, F16-CuPc, a-w-DFH-6T, NTCDI-C8F, NTCDI-C8F, NTCDI-C8F, NTCDI-C8H 및 PTCDI-C8H로 이루어진 군에서 선택된 화합물로 형성되는 것을 특징으로 하는 다이오드.The Zn-doped semiconductor layer is Si, B-doped Si, P-doped Si, GaAs, Ge, SiC, AlP, AlAs, AlSb, GaP, GaAs, GaN, GaSb, InP, InAs, InSb, CdS , CdSe, CdTe, PbTe, PbS, PbSe, α-Sexythiophene, CuPc, aw-DH6T, Bis (benzodithiophene), Bis (dithienothiophene), dihexylanthradiotethiophene, FTTF pentacene , FTTF, BP2T, Polythiophene, Polyacetylene, P3AT, PTV, P3HT, TCNQ, C 60 , TCNNQ, NTCDA, PTCDA, F 16 -CuPc, aw-DFH-6T, NTCDI-C8F, NTCDI-C 8 F, A diode, characterized in that formed of a compound selected from the group consisting of NTCDI-C 8 F, NTCDI-C 8 H and PTCDI-C 8 H.
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