WO2016019753A1 - 一种显示设备的刷新控制方法及装置 - Google Patents

一种显示设备的刷新控制方法及装置 Download PDF

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Publication number
WO2016019753A1
WO2016019753A1 PCT/CN2015/081077 CN2015081077W WO2016019753A1 WO 2016019753 A1 WO2016019753 A1 WO 2016019753A1 CN 2015081077 W CN2015081077 W CN 2015081077W WO 2016019753 A1 WO2016019753 A1 WO 2016019753A1
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Prior art keywords
display
image frame
refresh
frame
controller
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PCT/CN2015/081077
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English (en)
French (fr)
Inventor
黄永兵
陈明宇
崔泽汉
肖世海
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华为技术有限公司
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Priority claimed from CN201410810699.8A external-priority patent/CN105788542B/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2016019753A1 publication Critical patent/WO2016019753A1/zh
Priority to US15/426,356 priority Critical patent/US20170148422A1/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems

Definitions

  • the present invention relates to the field of computer technologies, and in particular, to a refresh control method and apparatus for a display device.
  • Computer systems typically include some form of display device.
  • a smart phone is integrated with an LCD (Liquid Crystal Display) or an OLED (Organic Light Emitting Diode) display system.
  • This type of display system mainly consists of three parts: an application processor, a storage device (including a frame buffer area), and a display device (including a display controller and a display panel).
  • the application processor is responsible for drawing and generating an image frame, and storing the generated image frame into a frame buffer area in the storage device, the frame buffer area is used for storing data of each pixel of the display screen, and the display controller is mainly responsible for the frame buffer from the frame.
  • the data of the pixel is read in the area, and sequentially written into the logic circuit corresponding to each pixel on the display panel.
  • the application processor continuously generates a new image frame and sends the image frame into the frame buffer area, which requires the display controller to read the image frame from the frame buffer area. Outputting an image frame to the display is referred to as refreshing the image frame.
  • the application mainly includes an application processor, a frame buffer area in physical memory, an LCD controller, and an LCD panel.
  • the frame buffer area stores data of each pixel on the screen.
  • the memory controller acts as a medium for interaction between the application processor and the LCD controller.
  • the application or service running in the application processor is responsible for drawing the image frame and storing the completed image frame into the frame buffer.
  • the DMA (Direct Memory Access) controller in the LCD controller sequentially sends a request to access the frame buffer to the memory controller, and the memory controller reads the frame in the memory system.
  • the data of each pixel in the buffer area is returned to the DMA controller. After receiving the data returned by the memory controller, the DMA controller sends it to the LCD panel for display.
  • DMA Direct Memory Access
  • the refresh operation of the image frame is generated by the refresh controller of the LCD display device.
  • the refresh controller periodically generates a refresh signal in accordance with the timing logic.
  • the period in which the refresh controller generates the refresh signal is specified by the operating system or the user.
  • the main purpose of the display device to perform refresh is twofold: one is to keep the pixels on the screen undistorted, and the other is to display the modified image frame in time. Since the distortion period of the pixel is long, a lower refresh period can ensure that the pixel is not distorted.
  • the update frequency of the image is different, and the frequency of the screen refresh is different.
  • the update frequency of the text application is about 10 Hz
  • the update frequency of the video application is generally above 30 Hz.
  • the traditional LCD controller uses a higher refresh rate, such as 60Hz.
  • Embodiments of the present invention provide a refresh control method and apparatus for a display device, which are used to reduce unnecessary refresh operations and reduce system resource consumption and memory consumption.
  • An embodiment of the present invention provides a refresh control method for a display device, where the display device includes a display controller and a display panel, including:
  • the display controller periodically generates a first refresh signal, and outputs an image frame for displaying in the frame buffer area to the display panel; the period of generating the first refresh signal is shorter than that of the display panel The length of time that a pixel is distorted due to leakage;
  • the display controller determines that the image frame for displaying in the frame buffer area is changed, and generates a second refresh signal, including: The display controller detects that the image frame in the frame buffer area is switched, and generates a second refresh signal;
  • the outputting the image frame for display stored in the frame buffer area to the display panel comprises: outputting an entire image frame for display stored in the frame buffer area to the display panel.
  • the display controller determines that the image frame for displaying in the frame buffer area is changed, and generating the second refresh signal includes:
  • the image frame state parameter is acquired, and the second refresh signal is generated according to the image frame state parameter;
  • the image frame state parameter identifier is An address corresponding to the image data for which the displayed image frame changes;
  • the outputting the image frame for display stored in the frame buffer area to the display panel includes:
  • the image frame state parameter identifies an address corresponding to the image data that is changed for the displayed image frame, and includes:
  • the image frame state parameter is used to identify a row, or a column, or an address of a pixel corresponding to the image data for which the image frame for display changes;
  • Outputting image data corresponding to the address in the frame to the display panel includes:
  • the row, or column, or pixel that changes in an image frame for display stored in the frame buffer area Outputting image data corresponding to the address of the point to the display panel includes:
  • the second embodiment of the present invention provides a refresh control device for a display device, which is characterized in that:
  • a refresh controller for periodically generating a first refresh signal and transmitting the signal to the direct memory access controller; generating a period of the first refresh signal that is shorter than a duration of distortion of a pixel of the display panel due to leakage; and When it is determined that the image frame for display stored in the frame buffer area is changed, a second refresh signal is generated and sent to the direct memory access controller;
  • a direct memory access controller configured to: when receiving the first refresh signal sent by the refresh controller, output an image frame for displaying in a frame buffer area to a display panel; and for receiving the received image
  • the second refresh signal sent by the refresh controller outputs an image frame for display stored in the frame buffer area to the display panel.
  • the refresh controller is configured to generate a second refresh signal when the image frame for displaying is switched, and send the Direct memory access controller;
  • the direct memory access controller is configured to output the entire image frame for display stored in the frame buffer area to the display panel after receiving the second refresh signal.
  • the refresh controller is configured to: when detecting that the image frame for display is switched, acquire an image frame state parameter, and according to the image The frame state parameter generates a second refresh signal, and sends the second refresh signal to the direct memory access controller; the image frame state parameter identifies the image data corresponding to the changed image frame for display address;
  • the direct memory access controller is configured to: after receiving the second refresh signal, correspond to an address that changes in an image frame for display stored in the frame buffer area according to the second refresh signal The image data is output to the display panel.
  • the refresh controller is configured to acquire the image frame state parameter, where the image frame state parameter is used to identify An address of a row, a column, or a pixel corresponding to the image data that is changed in the displayed image frame;
  • the direct memory access controller is configured to, after receiving the second refresh signal, the row, or column, in the image frame for display stored in the frame buffer according to the second refresh signal, Or image data corresponding to the address of the pixel is output to the display panel.
  • the direct memory access controller is configured to determine the frame according to the image frame state parameter included in the second refresh signal An address of a row, or a column, or a pixel point in the image frame for display that is stored in the buffer area, and a data read request is sent to the memory controller, the data read request being used to read the Image data corresponding to the address of the changed row, column or pixel in the displayed image frame; receiving the image data returned by the memory controller, and outputting the received image data to the display panel.
  • the embodiment of the present invention has the following advantages: the pixel of the display panel can be prevented from being distorted due to leakage by periodically generating the first refresh signal, and the frequency of generating the second refresh signal is to prevent the display panel.
  • the pixel is set by the distortion of the leakage, so it is much smaller than the frequency required to ensure the timely display of the image frame; in addition, it is stored in the frame buffer area.
  • the image frame changes, it can be determined that the image frame needs to be refreshed to the display panel.
  • the embodiment of the present invention can reduce the The necessary refresh operations reduce system resource consumption and memory consumption.
  • FIG. 1 is a schematic structural diagram of a system of an application environment according to an embodiment of the present invention.
  • FIG. 2 is a schematic flowchart of a method according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a system according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a system according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a system according to an embodiment of the present invention.
  • FIG. 6 is a schematic flowchart of a method according to an embodiment of the present invention.
  • FIG. 7 is a schematic flowchart of a method according to an embodiment of the present invention.
  • FIG. 8 is a schematic flowchart of a method according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a refresh logic structure of a row driving logic according to an embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of an apparatus according to an embodiment of the present invention.
  • FIG. 1 is an example of an application environment according to an embodiment of the present invention.
  • FIG. 1 is a structural block diagram of a display system, which mainly includes: an application processor, a memory subsystem, and a liquid crystal display. System display subsystem.
  • the application processor is responsible for writing the data of the image frame into the frame buffer area in the memory chip.
  • the memory chip is a DRAM (Dynamic Random Access Memory).
  • the memory subsystem consists of two parts: a memory controller and a memory chip.
  • the frame buffer area is a part of the memory chip and is only used to store image frame data.
  • the display device may generally include multiple frame buffer areas, one frame buffer area for storing data of an image frame currently required to be displayed, and other frame buffer areas for preparing image frame data in the background.
  • the liquid crystal display subsystem mainly includes two parts: a display controller and a display panel.
  • the display panel includes: display logic and a display panel.
  • An embodiment of the present invention provides a refresh control method for a display device, as shown in FIG. 2, including:
  • the display controller periodically generates a first refresh signal, and outputs an image frame for displaying in the frame buffer area to the display panel; generating a period of the first refresh signal, which is shorter than a pixel of the display panel due to leakage The length of the distortion;
  • the embodiment of the present invention adopts the event triggering method for refreshing, in some scenarios, there may be a case where the refreshing frequency is extremely low. If the refreshing frequency is too low, the pixel of the display panel of the display may be distorted due to leakage. In the case of image distortion, in order to avoid this, this step is used to ensure the minimum refresh frequency and prevent the pixel of the display panel from being distorted due to leakage.
  • the length of time when the pixel of the display panel is distorted due to leakage is the length of the period from the end of charging to the occurrence of distortion of the leakage of the pixel of the display panel.
  • the scheme for ensuring the minimum refresh frequency may also adopt, for example, monitoring the refresh waiting duration (that is, the waiting time for outputting the image frame to the display panel). If the refresh wait time and display panel leakage appear If the difference in the duration of the distortion is less than the set threshold, a first refresh signal is generated, and the image frame for display stored in the frame buffer is output to the display panel. This scheme does not require periodic refreshes, which can further reduce unnecessary refresh operations.
  • the above step 201 and the subsequent step 202 are performed synchronously, and there is no order.
  • the display controller determines that when the image frame for display displayed in the frame buffer area is changed, generating a second refresh signal, and outputting the image frame for display stored in the frame buffer area to the display panel.
  • the image frame is stored in the frame buffer area, and there may be multiple frame buffer areas.
  • the frame buffer area for storing the image frame that needs to be displayed to the display panel is required to be monitored.
  • the manner of determining whether the image frame for display is changed in the frame buffer area may be monitored by the memory controller and the monitored information may be transmitted to the display controller.
  • Whether the memory controller monitors the image frame used for display changes usually can be whether the data of the monitoring frame buffer area has changed.
  • the monitoring mode varies according to the specific memory subsystem structure, as long as the image frame change can be determined in time. This embodiment of the present invention is not limited to this.
  • the pixel of the display panel is prevented from being distorted due to leakage by periodically generating the first refresh signal.
  • the frequency of the second refresh signal is set to prevent the pixel of the display panel from being distorted due to leakage. It will be much smaller than the frequency required to ensure that the image frame is displayed in time; in addition, when the image frame stored in the frame buffer area is changed, it can be determined that the image frame needs to be refreshed to the display panel.
  • the embodiment of the present invention can reduce the The necessary refresh operations reduce system resource consumption and memory consumption.
  • the event triggering manner may be to refresh the entire image frame for display (ie, overall refresh), or refresh the portion of the image frame used for display (ie, partial refresh);
  • the embodiment of the present invention further provides an implementation scheme for specifically determining how to change an image frame.
  • the manner of overall refreshing may be as follows:
  • the display controller determines that the image frame for display in the frame buffer area is changed, and generates a second refresh signal, including: the display controller detects that the image frame in the frame buffer area is switched, and generates a second Refresh signal
  • the outputting the image frame for display stored in the frame buffer area to the display panel includes outputting the entire image frame for display stored in the frame buffer area to the display panel.
  • an optional implementation scheme for determining whether an image frame for display is changed in a frame buffer area is determined, and a partial refreshing scheme is performed according to the method, as follows:
  • the image frame for display displayed in the frame buffer area is changed, and generating the second refresh signal includes:
  • the display controller detects that the image frame in the frame buffer area is switched, acquiring an image frame state parameter, and generating the second refresh signal according to the image frame state parameter; the image frame state parameter identifying the image frame used for display The address corresponding to the changed image data;
  • the outputting the image frame for display stored in the frame buffer area to the display panel includes: corresponding to the address of the image frame for display stored in the frame buffer area according to the second refresh signal;
  • the image data is output to the above display panel.
  • the image frame state parameter may be stored in the frame buffer state module, and the image frame state parameter stored in the frame buffer state module is monitored by the memory controller to determine that the image frame for display stored in the frame buffer is generated.
  • the frame buffer status module may be a new module in the memory subsystem, and the display controller reads the image frame status parameter from the frame buffer status module.
  • the event of updating the image frame may be divided into granularities, so that only the image frame data of those pixels or rows or columns in the image frame are refreshed. Therefore, it is not necessary to refresh all the image frame data, thereby further reducing the amount of refresh data and reducing the occupation of the memory, as follows: the image frame state parameter identifies the address of the image frame for display change, including: The image frame state parameter is used to identify the row, column, or pixel point of the image frame used for display described above. address;
  • the embodiment of the present invention only the portion of the image frame for display that is stored in the frame buffer can be refreshed. In the embodiment of the present invention, it is required to obtain an image frame for display in the frame buffer area.
  • the data of the changed part the embodiment further provides a specific implementation manner of how to obtain the data, as follows: the above-mentioned frame, or column, or pixel point, which changes in the image frame for display stored in the frame buffer area.
  • Outputting the image data corresponding to the address to the display panel includes: determining, according to the image frame state parameter, an address of a row, a column, or a pixel that is changed in the image frame for display stored in the frame buffer;
  • the structural block diagram of the display system shown in FIG. 3 mainly includes: an application processor, a memory subsystem, and a liquid crystal display subsystem.
  • the application processor is responsible for writing the image frame data into the frame buffer area in the memory chip.
  • the memory chip is a DRAM (Dynamic Random Access Memory).
  • the memory subsystem consists of three parts: a memory controller, a memory chip, and a Frame Buffer Status module.
  • the frame buffer area is a part of the memory chip and is only used to store image frame data. Display devices can generally contain multiple frame buffers The storage area, one frame buffer area is used to store image frame data that needs to be displayed currently, and the other frame buffer area is used to prepare image frame data in the background.
  • the frame buffer status module is a new module in the embodiment of the present invention, and is mainly used to store state information related to a frame buffer.
  • the liquid crystal display subsystem mainly includes two parts: a display controller (inside the dotted line frame) and a display panel.
  • the display panel includes: display logic and a display panel.
  • the display controller can be subdivided into three parts: the Refresh Controller, the DMA Controller, and the Frame Buffer Regs.
  • the refresh controller may be implemented by a timing-driven logic circuit to periodically trigger a frame refresh signal (first refresh signal); in addition, the frame refresh signal (second refresh signal) may also be driven by an event.
  • the timing-driven refresh logic periodically generates a refresh signal by the timing logic according to a specified refresh frequency. For display devices such as LCDs that use capacitors to store pixel point data, capacitive leakage can cause pixel distortion.
  • the timing-driven refresh logic can be refreshed with a lower frequency, and the capacitance of the pixel is periodically charged as long as the pixel point is not distorted.
  • the event-driven refresh logic can generate a frame refresh signal based on information associated with the frame buffer, with the primary purpose of displaying the changed image frame in time.
  • the function of the DMA controller is to generate a series of DMA access requests according to the address of the frame buffer area, and read image frame data in the frame buffer area.
  • the frame buffer register is mainly used to record the address information of the frame buffer currently used for display in a display device having a plurality of frame buffers, which is similar to the refresh controller.
  • the operating system when a new image frame is ready to be completed, the operating system generates a frame switching operation, and sets the value of the frame buffer register to a frame buffer containing the latest image frame data. the address of. That is to say, the value of the frame buffer register is modified, which means that the frame buffer area has been switched, which means that a new image frame is drawn and needs to be displayed on the screen in time.
  • Embodiments of the present invention may add additional control logic to pass information that changes the value of the frame buffer register to the refresh controller.
  • the frame buffer information collected by the memory controller needs to be passed to the display controller for controlling the pixels that need to be refreshed.
  • the embodiment of the present invention will be between the memory controller and the display controller. Establish an interactive channel.
  • the frame buffer area status module and the frame buffer area register monitoring logic added to the block diagram of the structure of the display system of the embodiment of the present invention may exist at the same time or may exist separately.
  • the frame buffer status module, the refresh controller, the DMA controller, and the frame buffer register as shown in FIG. 4 may exist in the memory subsystem at the same time (the memory subsystem and the liquid crystal display subsystem respectively exist in FIG. 3).
  • the memory controller and the display controller are all integrated in the same chip, and integration of the display system refresh controller and the DMA controller into the memory controller is also possible.
  • S1 the display controller executes timing driving logic, and periodically triggers a frame refresh operation (first refresh signal) according to a lower refresh period;
  • the lower refresh rate is relative to the very high refresh rate set to ensure timely updates.
  • the lower refresh frequency here can ensure that the capacitance of the display does not cause pixel distortion due to leakage. Therefore, the refresh frequency here is related to the leakage current of the capacitor and the leakage current corresponding to the pixel distortion.
  • the refresh rate corresponding to the different displays can be calculated by the person skilled in the art according to the method, and the specific value of the refresh frequency is not given in the embodiment of the present invention. limited.
  • the frequency of the periodic refresh is closer to the lowest frequency required to prevent the capacitance of the display from being caused by pixel distortion of the leakage, and the unnecessary refresh can be reduced.
  • S2 display controller and the memory controller monitor status information of the frame buffer area
  • the status information of the frame buffer area monitored by the controller mainly refers to the switching operation of the frame buffer area (that is, whether the image frame of the frame buffer area has changed), and the switching operation of the frame buffer area can pass the value of the frame buffer area register. Change to judge.
  • the frame buffer status information monitored by the memory controller mainly refers to the modified state of the image frame data.
  • the frame buffer area status module is configured to store image frame data for modifying state information, the module It is generally composed of SRAM (Static Random Access Memory).
  • SRAM Static Random Access Memory
  • the modified state of the image frame data may correspond to a plurality of granularities, such as an entire frame buffer, a line, and a pixel. The finer the granularity, the greater the storage overhead.
  • the monitoring function of the modified state of the image frame data can be realized by the memory controller by monitoring the write queue of the memory controller.
  • the memory controller's write queue contains all write requests to the in-memory data. All modifications to the frame data are made by a write request.
  • a flowchart for specifically obtaining the modification state of the frame data is as shown in FIG. 7:
  • the memory controller acquires information in the frame buffer area when the system is started.
  • the information obtained by the memory controller in the frame buffer area may include: a memory area corresponding to the information, a size of a single frame buffer area, a number of rows and columns of each frame, and a number of bytes occupied by each pixel.
  • step S23 Determine, according to the frame buffer area information acquired by the memory controller in step S21, whether the address to be modified by the request belongs to a frame buffer area. If yes, go to step S24; otherwise, go to step S26.
  • S24 Extract, according to the monitoring granularity of the state of the frame buffer area, address information corresponding to the monitoring granularity, such as an entire frame buffer area, a frame data line, or each pixel point.
  • S25 Update the status of the corresponding buffer area, row or pixel to "modified" in the frame buffer status module.
  • the status can be identified by a bitmap, with "0" indicating that the data has not been modified and "1" indicating "modified.”
  • the frame buffer status module can send the modified address and the corresponding value to the frame buffer register to modify the value in the frame buffer register.
  • the display controller detects a change of the state information of the frame buffer area, and determines whether a frame refresh operation needs to be triggered.
  • step S34 Determine whether the value of the recorded frame buffer register is equal to the value of the newly written register. If yes, go to step S36; otherwise, go to step S35.
  • S35 Notifying the refresh controller to trigger the event-driven frame refresh logic to generate a frame refresh signal (second refresh signal).
  • the value of the current frame buffer register is updated and recorded for the next comparison.
  • the frame refresh controller reads status information of the frame buffer area, and analyzes an area in the frame buffer area that needs to be refreshed;
  • the status information in this step mainly refers to the information recorded by the frame buffer status module in the memory controller, that is, the status indicating whether the data is modified. If the frame data is modified, the data needs to be read and displayed on the display panel; otherwise, the data does not need to be read.
  • the information recorded by the refresh frame buffer status module may be the entire frame buffer area, the frame buffer line, or a single pixel point for monitoring granularity. Therefore, under different monitoring granularities, the area of the frame buffer area that needs to be refreshed may also be A difference has occurred.
  • the DMA controller starts a DMA operation, and sends a DMA request for reading data in the frame buffer area to the memory controller, and acquires data of the changed image frame in the frame buffer area;
  • the DMA controller generates a DMA request to read the data according to the modified data information acquired in step S4.
  • S6 Display logic of the display panel, according to the refresh granularity (corresponding to the monitoring granularity) and the panel control logic corresponding to the refresh granularity, the data is written into each pixel of the display panel.
  • step S6 After executing S6, the process returns to step S3, and step S3 is repeatedly executed.
  • the display logic of the display panel only outputs the changed portion of the highlighted frame to the panel for display.
  • the embodiment of the present invention further provides a specific structure of the display logic. Take the granularity of monitoring and the granularity of refreshing. For example, as shown in Figure 9,
  • the refresh of the display panel is generally performed from top to bottom, left to right, and progressive scan. Therefore, the refresh logic of the display panel can be composed of row drive and column drive logic. This hair In the execution of the event-driven refresh process, not all pixel points on the panel need to be refreshed, but only the modified image frame data indicated in step S4 is refreshed.
  • the granularity of the refresh may be a single row or a single pixel, which is the same as the monitoring granularity of the frame buffer status module.
  • the control logic of the display panel adjusts the refresh logic according to the refresh granularity.
  • a refresh logic structure diagram of a row drive logic with a cache line as a refresh granularity is used.
  • the shift register (Shift Registers) is used to store the entire image frame, and controls the current line to be refreshed, which is generally generated in a shifted manner;
  • Level Shifters and Output Buffers are used to generate a line for driving the current line, and output the line that needs to be refreshed to the corresponding area of the panel (Line0, Line1, Line2 or Other lines);
  • the above is a progressive refresh structure for the entire image frame. Compared with the progressive refresh logic of the entire image frame, the embodiment of the present invention also adds Row Access Registers, corresponding signal lines, and additional logic. Door circuit.
  • the row access register is used to store information about whether each line of the image frame for display is modified in the entire frame buffer. This state may be information recorded in the frame buffer status module. When the row buffer register shows that the frame buffer line has not been modified, the row access register has a value of 0.
  • OE Output Enable
  • the row access register When the row buffer register shows that the frame buffer line has not been modified, the row access register has a value of 0. At this time, all the pixels of the corresponding row are not allowed to be written by the OE signal and the function of the AND circuit. Conversely, when the frame buffer line is modified, the pixel corresponding to the line allows data to be written, and the image frame data of the modified line needs to be written into the pixel. Thus, the image frame data of the modified frame buffer line is updated, and the image frame data of the frame buffer line that has not been modified remains unchanged. From the purpose of achieving partial refresh.
  • the embodiment of the present invention further provides a refresh control device for a display device, as shown in FIG. 10, including:
  • the refresh controller 1001 is configured to periodically generate a first refresh signal and send the signal to the direct memory access controller; the period of generating the first refresh signal is shorter than the length of time when the pixel of the display panel is distorted due to leakage; And determining, when the image frame for display displayed in the frame buffer area is changed, generating a second refresh signal, and transmitting the second refresh signal to the direct memory access controller;
  • the direct memory access controller 1002 is configured to store the frame buffer area of the memory after receiving the first refresh signal sent by the refresh controller 1001 or receiving the second refresh signal sent by the refresh controller 1001.
  • the image frame for display is output to the display panel.
  • the embodiment of the present invention adopts the event triggering method for refreshing, in some scenarios, there may be a case where the refreshing frequency is extremely low. If the refreshing frequency is too low, the pixel of the display panel of the display may be distorted due to leakage. In the case of image distortion, in order to avoid this, this step is used to ensure the minimum refresh frequency and prevent the pixel of the display panel from being distorted due to leakage.
  • the scheme for ensuring the minimum refresh frequency may also adopt, for example, monitoring the refresh waiting duration (that is, the waiting time for outputting the image frame to the display panel). If the difference between the refresh wait time and the duration of the distortion of the display panel leakage is less than the set threshold, a first refresh signal is generated, and the image frame for display stored in the frame buffer is output to the display panel. This scheme does not require periodic refreshes, which can further reduce unnecessary refresh operations.
  • the image frame is stored in the frame buffer area, and there may be multiple frame buffer areas.
  • the frame buffer area for storing the image frame that needs to be displayed to the display panel is required to be monitored.
  • the manner of determining whether the image frame for display is changed in the frame buffer area may be monitored by the memory controller, and the monitored information is transmitted to the refresh control device of the display device.
  • the memory controller monitors whether the image frame used for display changes. It can usually be the monitor frame buffer.
  • the data of the area is changed, and the manner of monitoring is different according to the structure of the specific memory subsystem. As long as the image frame change can be determined in time, the embodiment of the present invention does not uniquely limit this.
  • the pixel of the display panel is prevented from being distorted due to leakage by periodically generating the first refresh signal.
  • the frequency of the second refresh signal is set to prevent the pixel of the display panel from being distorted due to leakage. It will be much smaller than the frequency required to ensure that the image frame is displayed in time; in addition, when the image frame stored in the frame buffer area is changed, it can be determined that the image frame needs to be refreshed to the display panel.
  • the embodiment of the present invention can reduce the The necessary refresh operations reduce system resource consumption and memory consumption.
  • the event triggering manner may be to refresh the entire image frame for display (ie, overall refresh), or refresh the portion of the image frame used for display (ie, partial refresh);
  • the embodiment of the present invention further provides an implementation scheme for determining how to change an image frame.
  • the implementation scheme of the overall refresh may be as follows:
  • the refresh controller 1001 is configured to generate a second refresh signal when the image frame for display is switched, and send the second refresh signal to the direct memory access controller 1002;
  • the direct memory access controller 1002 is configured to output the entire image frame for display stored in the frame buffer area to the display panel after receiving the second refresh signal.
  • an optional implementation scheme for determining whether an image frame for display is changed in a frame buffer area is determined, and a partial refreshing scheme is performed according to the following, as follows:
  • the refresh controller 1001 is configured to: when detecting that the image frame for display is switched, acquire an image frame state parameter, and generate a second refresh signal, and send the signal to the direct memory access controller 1002; the image frame state The parameter identifies an address corresponding to the image data for which the image frame for display is changed;
  • the direct memory access controller 1002 is configured to: after receiving the second refresh signal, change an image frame for display stored in the frame buffer area according to the second refresh signal.
  • the image data corresponding to the address is output to the above display panel.
  • the image frame state parameter may be stored in the frame buffer state module, and the image frame state parameter stored in the frame buffer state module is monitored by the memory controller to determine that the image frame for display stored in the frame buffer is generated.
  • the frame buffer status module may be a new module in the memory subsystem, and the display controller reads the image frame status parameter from the frame buffer status module.
  • the event of updating the image frame may be divided into granularities, so that only the image frame data of those pixels or rows or columns in the image frame are refreshed. It is not necessary to refresh all the image frame data, thereby further reducing the amount of refresh data and reducing the occupation of memory, as follows:
  • the refresh controller 1001 is configured to acquire the image frame state parameter, where the image frame state parameter is used to identify an address of a row, a column, or a pixel that changes in the image frame for display;
  • the direct memory access controller 1002 is configured to: after receiving the second refresh signal, corresponding to a row, a column, or an address of a pixel that changes in an image frame for display stored in the frame buffer area.
  • the image data is output to the above display panel.
  • the embodiment of the present invention only the portion of the image frame for display that is stored in the frame buffer can be refreshed. In the embodiment of the present invention, it is required to obtain an image frame for display in the frame buffer area.
  • the data of the changed part the embodiment further provides a specific implementation manner of how to obtain the data, as follows: the direct memory access controller 1002 is configured to determine, according to the image frame state parameter, the display for storing in the frame buffer area.
  • the storage medium may be a read only memory, a magnetic disk or an optical disk or the like.

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Abstract

公开了一种显示设备的刷新控制方法及装置，其中，方法包括：（201）显示控制器周期性产生第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到显示面板；产生所述第一刷新信号的周期，短于所述显示面板的像素点因漏电出现失真的时长；（202）所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变时，则产生第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板。上述第二刷新信号的产生频率会远小于用于保证图像帧及时显示所需要的频率；另外，通过事件来触发图像帧的刷新操作可以保证图像帧被及时显示，可以减少不必要的刷新操作，从而降低系统资源消耗以及内存消耗。

Description

一种显示设备的刷新控制方法及装置
本申请要求于2014年8月8日提交中国专利局、申请号为201410390119.4、发明名称为“一种显示设备的刷新控制方法及装置”的中国专利申请以及于2014年12月22日提交中国专利局、申请号为201410810699.8、发明名称为“一种显示设备的刷新控制方法及装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及计算机技术领域，特别涉及一种显示设备的刷新控制方法及装置。
背景技术
计算机系统一般都包含有某种形式的显示设备。以移动设备为例，智能手机大部分集成了LCD(Liquid Crystal Display，液晶显示屏)或OLED(Organic Light Emitting Diode，有机发光二极管)显示系统。这类显示系统主要包含三部分：应用处理器、存储设备(包含帧缓存区)、以及显示设备(包含显示控制器和显示面板)。其中，应用处理器负责绘制并生成图像帧，并将生成的图像帧存放到存储设备中的帧缓存区，帧缓存区用于存储显示屏各像素点的数据，显示控制器主要负责从帧缓存区中读取像素点的数据，并依次写入到显示面板上各像素点对应的逻辑电路中。
显示系统在进行图像显示的过程中，应用处理器会不断地生成新的图像帧，并将该图像帧送入帧缓存区中，这就需要显示控制器从帧缓存区中读取图像帧并将图像帧输出到显示器，这一过程被称为图像帧的刷新。
以LCD显示设备为例，主要包括：应用处理器、物理内存中的帧缓存区，LCD控制器以及LCD面板。帧缓存区存储了屏幕上各像素点的数据，内 存控制器作为应用处理器和LCD控制器之间交互的媒介。应用处理器里运行的应用或服务负责绘制图像帧，并将完成绘制的图像帧存放到帧缓存区。当帧刷新操作发生时，LCD控制器里面的DMA(Direct Memory Access，直接内存存取)控制器会依序产生访问帧缓存区的请求发送给内存控制器，内存控制器读取内存系统里帧缓存区中各像素点的数据并返回给DMA控制器。DMA控制器接收到内存控制器返回的数据后，送到LCD面板上进行显示。
图像帧的刷新操作由LCD显示设备的刷新控制器负责产生。刷新控制器依据时序逻辑定期地产生刷新信号。刷新控制器产生刷新信号的周期由操作系统或用户来指定。显示设备执行刷新的主要目的有两个：一是保持屏幕上的像素点不失真，二是及时显示修改过的图像帧。由于像素点的失真时间段较长，因而一个较低的刷新周期就能保证像素点不失真。对于不同的应用程序来说，图像的更新频率不一样，屏幕刷新的频率要求也不一样，如文本类应用的更新频率在10Hz左右，而视频类应用的更新频率一般在30Hz以上。为了保证所有应用程序的图像都能及时显示在屏幕上，传统的LCD控制器采用较高的刷新频率，如60Hz。
采用以上方案，为了保证及时的将图像显示到屏幕，设置了过高的刷新频率，导致出现过多的不必要的刷新操作，以及相应的帧内存缓存区的访问操作，浪费系统资源并且内存消耗较大。
发明内容
本发明实施例提供了一种显示设备的刷新控制方法及装置，用于减少不必要的刷新操作，降低系统资源消耗以及内存消耗。
本发明实施例一方面提供了一种显示设备的刷新控制方法，所述显示设备包括显示控制器和显示面板，包括：
显示控制器周期性产生第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到显示面板；产生所述第一刷新信号的周期，短于所述显示面板的 像素点因漏电出现失真的时长；
所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板。
结合一方面的实现方式，在第一种可能的实现方式中，所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号，包括：所述显示控制器检测到所述帧缓存区中的图像帧发生切换，则产生第二刷新信号；
所述将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板包括：将所述帧缓存区内存储的用于显示的整个图像帧输出到所述显示面板。
结合一方面的实现方式，在第二种可能的实现方式中，所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号包括：
所述显示控制器检测到所述帧缓存区中的图像帧发生切换时，获取图像帧状态参数，并根据所述图像帧状态参数产生所述第二刷新信号；所述图像帧状态参数标识所述用于显示的图像帧发生变化的图像数据对应的地址；
所述将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板包括：
根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中地址对应的图像数据输出到所述显示面板。
结合一方面的第二种可能的实现方式，在第三种可能的实现方式中，所述图像帧状态参数标识所述用于显示的图像帧发生变化的图像数据对应的地址，包括：
所述图像帧状态参数用于标识所述用于显示的图像帧发生变化的图像数据对应的行、或列、或者像素点的地址；
所述根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像 帧中所述地址对应的图像数据输出到显示面板包括：
根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址对应的图像数据输出到所述显示面板。
结合一方面的第三种可能的实现方式，在第四种可能的实现方式中，所述将所述帧缓存区内存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址对应的图像数据输出到所述显示面板包括：
向内存控制器发送数据读取请求，用于请求读取所述用于显示的图像帧中行、或列、或者像素点的地址对应的图像数据；
接收所述内存控制器返回的图像数据，并将接收到的图像数据输出到所述显示面板。
本发明实施例二方面提供了一种显示设备的刷新控制装置，其特征在于，包括：
刷新控制器，用于周期性产生第一刷新信号，并发送给直接内存存取控制器；产生所述第一刷新信号的周期，短于显示面板的像素点因漏电出现失真的时长；以及，用于确定帧缓存区存储的用于显示的图像帧发生改变时，则产生第二刷新信号，并发送给所述直接内存存取控制器；
直接内存存取控制器，用于在接收到所述刷新控制器发送的所述第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到显示面板；以及用于在接收到所述刷新控制器发送的所述第二刷新信号，将所述帧缓存区存储的用于显示的图像帧输出到所述显示面板。
结合二方面的实现方式，在第二种可能的实现方式中，所述刷新控制器，用于检测到所述用于显示的图像帧发生切换时，产生第二刷新信号，并发送给所述直接内存存取控制器；
所述直接内存存取控制器，用于接收到所述第二刷新信号后，将所述帧缓存区内存储的用于显示的整个图像帧输出到所述显示面板。
结合二方面的实现方式，在第二种可能的实现方式中，所述刷新控制器，用于检测到所述用于显示的图像帧发生切换时，获取图像帧状态参数，并根据所述图像帧状态参数产生第二刷新信号，并将所述第二刷新信号发送给所述直接内存存取控制器；所述图像帧状态参数标识所述用于显示的图像帧发生变化的图像数据对应的地址；
所述直接内存存取控制器，用于接收到所述第二刷新信号后，根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中发生变化的地址对应的图像数据输出到所述显示面板。
结合二方面的第二种可能的实现方式，在第三种可能的实现方式中，所述刷新控制器，用于获取所述图像帧状态参数，其中，所述图像帧状态参数用于标识所述用于显示的图像帧中发生变化的图像数据对应的行、列或者像素点的地址；
所述直接内存存取控制器，用于在接收到第二刷新信号后，根据所述第二刷新信号，将所述帧缓存区存储的用于显示的图像帧中所述行、或列、或者像素点的地址对应的图像数据输出到所述显示面板。
结合二方面的第三种可能的实现方式，在第四种可能的实现方式中，所述直接内存存取控制器，用于依据第二刷新信号包含的所述图像帧状态参数确定所述帧缓存区存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址，向所述内存控制器发送数据读取请求，所述数据读取请求用于读取所述用于显示的图像帧中发生变化的行、列或者像素点的地址对应的图像数据；接收所述内存控制器返回的图像数据，并将接收到的图像数据输出到所述显示面板。
从以上技术方案可以看出，本发明实施例具有以下优点：通过周期性产生第一刷新信号可以防止显示面板的像素点因漏电出现失真，上述第二刷新信号的产生频率是为了防止显示器面板的像素点因漏电出现失真设定的，因此会远小于用于保证图像帧及时显示所需要的频率；另外，在帧缓存区存储 的图像帧发生改变的时候，可以确定图像帧需要被刷新到显示面板。通过监控图像帧的变化这一事件来触发图像帧的刷新操作可以保证图像帧被及时显示，而不再需要使用过高的刷新频率来保证图像帧被及时显示；因此本发明实施例可以减少不必要的刷新操作，从而降低系统资源消耗以及内存消耗。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例应用环境的系统结构示意图；
图2为本发明实施例方法流程示意图；
图3为本发明实施例系统结构示意图；
图4为本发明实施例系统结构示意图；
图5为本发明实施例系统结构示意图；
图6为本发明实施例方法流程示意图；
图7为本发明实施例方法流程示意图；
图8为本发明实施例方法流程示意图；
图9为本发明实施例行驱动逻辑的刷新逻辑结构示意图；
图10为本发明实施例装置结构示意图。
具体实施方式
为了使本发明的目的、技术方案和优点更加清楚，下面将结合附图对本发明作进一步地详细描述，显然，所描述的实施例仅仅是本发明一部份实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的 范围。
如图1所示，为本发明实施例一个应用环境的举例，图1所示为显示系统的结构框图，主要包括：应用处理器(Application processors)、内存子系统(memory subsystem)和液晶显示子系统(LCD display subsystem)。
其中，应用处理器负责将图像帧的数据写入到内存芯片中的帧缓存区中。在图1中，内存芯片是DRAM(Dynamic Random Access Memory，动态随机存取存储器)。
内存子系统包括两个部分：内存控制器(memory controller)、内存芯片。其中，帧缓存区是内存芯片的一部分区域，只用于存储图像帧数据。显示设备一般可以包含有多个帧缓存区，一个帧缓存区用于存放当前需要显示的图像帧的数据，其他的帧缓存区用于在后台准备图像帧数据。
液晶显示子系统主要包括两个部分：显示控制器和显示面板。其中，显示面板包含：显示逻辑(Display logic)和面板(display panel)。
本发明实施例提供了一种显示设备的刷新控制方法，如图2所示，包括：
201：显示控制器周期性产生第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到显示面板；产生上述第一刷新信号的周期，短于上述显示面板的像素点因漏电出现失真的时长；
由于本发明实施例采用了事件触发的方式进行刷新，因此在某些场景下会存在刷新频率极低的情况，如果刷新频率过低则可能出现显示器的显示面板的像素点因漏电出现失真，这时会出现图像失真的情况；为了避免这种情况的发生，本步骤用于保证最低刷新频率，防止显示器面板的像素点因漏电出现失真。上述显示面板的像素点因漏电出现失真的时长，指的是显示面板的像素点从充电结束到漏电出现失真的时间段的长度。
另外，在本发明实施例中，保证最低刷新频率的方案除了以上周期性产生第一刷新信号的方案以外，还可以采用例如：监控刷新等待时长(即没有向显示面板输出图像帧的等待时长)，如果刷新等待时长与显示面板漏电出现 失真的时长的差小于设定阈值，则产生第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到显示面板。这种方案不需要周期性的刷新，可以进一步的降低不必要的刷新操作。
以上步骤201与后续步骤202是同步执行的，并无先后次序之分。
202：上述显示控制器确定上述帧缓存区存储的用于显示的图像帧发生改变时，则产生第二刷新信号，将上述帧缓存区内存储的用于显示的图像帧输出到上述显示面板。
在本发明实施例中，图像帧存储在帧缓存区，帧缓存区可能有多个，在本发明实施例中需要监控的是用于存放需要显示到显示面板的图像帧的帧缓存区。上述帧缓存区存储的用于显示的图像帧是否发生改变的确定方式，可以由内存控制器执行监控，并将监控到的信息传递给显示控制器。内存控制器监控用于显示的图像帧是否发生改变通常可以是监控帧缓存区的数据是否发生了改变，监控的方式依具体的内存子系统结构的不同而不同，只要能及时确定图像帧改变就可以，本发明实施例对此不做唯一性限定。
本发明实施例，通过周期性产生第一刷新信号可以防止显示面板的像素点因漏电出现失真，上述第二刷新信号的产生频率是为了防止显示器面板的像素点因漏电出现失真设定的，因此会远小于用于保证图像帧及时显示所需要的频率；另外，在帧缓存区存储的图像帧发生改变的时候，可以确定图像帧需要被刷新到显示面板。通过监控图像帧的变化这一事件来触发图像帧的刷新操作可以保证图像帧被及时显示，而不再需要使用过高的刷新频率来保证图像帧被及时显示；因此本发明实施例可以减少不必要的刷新操作，从而降低系统资源消耗以及内存消耗。
在本发明实施例中，事件触发的方式，可以是刷新整个用于显示的图像帧(即整体刷新)，也可以是刷新用于显示的图像帧中发生改变的部分(即部分刷新)；另外，本发明实施例还提供了具体如何确定图像帧发生改变的实现方案，其中整体刷新的方式可以如下：
上述显示控制器确定上述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号，包括：上述显示控制器检测到上述帧缓存区中的图像帧发生切换，则产生第二刷新信号；
上述将上述帧缓存区内存储的用于显示的图像帧输出到上述显示面板包括：将上述帧缓存区内存储的用于显示的整个图像帧输出到上述显示面板。
在本发明实施例中，还提供了如何确定帧缓存区存储的用于显示的图像帧是否发生改变的可选实现方案，并据此进行部分刷新的方案，具体如下：上述显示控制器确定上述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号包括：
上述显示控制器检测上述帧缓存区中的图像帧发生切换时，获取图像帧状态参数，并根据上述图像帧状态参数产生上述第二刷新信号；上述图像帧状态参数标识上述用于显示的图像帧发生变化的图像数据对应的地址；
上述将上述帧缓存区内存储的用于显示的图像帧输出到上述显示面板包括：根据上述第二刷新信号，将上述帧缓存区内存储的用于显示的图像帧中发生变化的地址对应的图像数据输出到上述显示面板。
在本实施例中，图像帧状态参数可以存储在帧缓存区状态模块，帧缓存区状态模块存储的图像帧状态参数由内存控制器监控在确定上述帧缓存区存储的用于显示的图像帧发生改变后存入；上述帧缓存区状态模块可以是内存子系统内的一个新增模块，显示控制器从上述帧缓存区状态模块内读取上述图像帧状态参数。
由于本发明实施例采用了事件触发的方式进行刷新，那么图像帧的更新这一事件可以进行粒度的划分，从而实现仅对图像帧中那些发生改变的像素或者行或者列的图像帧数据进行刷新，而不必对所有的图像帧数据进行刷新，从而进一步的减少刷新数据量，减少对内存的占用，具体如下：上述图像帧状态参数标识上述用于显示的图像帧发生变化的地址，包括：上述图像帧状态参数用于标识上述用于显示的图像帧发生变化的行、或列、或者像素点的 地址；
上述根据上述第二刷新信号，将上述帧缓存区内存储的用于显示的图像帧输出到显示面板包括：将上述帧缓存区内存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址对应的图像数据输出到上述显示面板。
在本发明实施例可以仅对帧缓存区内存储的用于显示的图像帧中发生变化的部分进行刷新，那么本发明实施例中需要获得帧缓存区内存储的用于显示的图像帧中发生变化的部分的数据，本实施例还提供了如何获得这些数据的具体实现方式，如下：上述将上述帧缓存区内存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址对应的图像数据输出到上述显示面板包括：依据上述图像帧状态参数确定上述帧缓存区存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址；
向上述内存控制器发送数据读取请求，用于请求读取上述用于显示的图像帧中发生变化的行、或列、或者像素点的地址对应的图像数据；
接收上述内存控制器返回的图像数据，并将接收到的图像数据输出到上述显示面板。
以下实施例将结合显示系统可能的结构示意图，对本发明实施例的具体实现流程进行举例说明。
如图3所示的显示系统的结构框图，主要包括：应用处理器(Application processors)、内存子系统(memory subsystem)和液晶显示子系统(LCD display subsystem)。
其中，应用处理器负责将图像帧数据写入到内存芯片中的帧缓存区中。在图3中，内存芯片是DRAM(Dynamic Random Access Memory，动态随机存取存储器)。
内存子系统包括三个部分：内存控制器(memory controller)、内存芯片以及帧缓存区状态(Frame Buffer Status)模块。其中，帧缓存区是内存芯片的一部分区域，只用于存储图像帧数据。显示设备一般可以包含有多个帧缓 存区，一个帧缓存区用于存放当前需要显示的图像帧数据，其他的帧缓存区用于在后台准备图像帧数据。帧缓存区状态模块是本发明实施例新增的模块，主要用于存储与帧缓存区相关的状态信息。
液晶显示子系统主要包括两个部分：显示控制器(虚线框内部分)和显示面板。其中，显示面板包含：显示逻辑(Display logic)和面板(display panel)。显示控制器可以细分为三个部分：刷新控制器(Refresh Controller)、DMA控制器(DMA Controller)以及帧缓存区寄存器(Frame Buffer Regs)。
本发明实施例中，刷新控制器可以由时序驱动的逻辑电路来实现，定期地触发帧刷新信号(第一刷新信号)；另外，还可以由事件驱动帧刷新信号(第二刷新信号)。其中，时序驱动的刷新逻辑，由时序逻辑按照指定的刷新频率定期产生刷新信号。对于采用电容来存储像素点数据的显示设备如LCD来说，电容漏电会导致像素点失真。在发明实施例中，时序驱动的刷新逻辑可以采用较低的频率进行刷新，定期地对像素点的电容充电，只要能够保证像素点不失真就可以。事件驱动的刷新逻辑可以根据与帧缓存区相关的信息来产生帧刷新信号，主要目的在于及时地显示发生变化的图像帧。
DMA控制器的功能是根据帧缓存区的地址，产生一系列的DMA访问请求，读取帧缓存区中的图像帧数据。帧缓存区寄存器主要是在存在多个帧缓存区的显示设备中，记录当前用于显示的帧缓存区的地址信息，这与刷新控制器类似。在存在多个帧缓存区的显示设备中，当有新的图像帧准备完成时，操作系统会产生帧切换操作，将帧缓存区寄存器的值设置为包含有最新的图像帧数据的帧缓存区的地址。也就是说，帧缓存器寄存器的值发生修改，代表着帧缓存区发生了切换，也意味着有新的图像帧绘制完成，需要及时地显示在屏幕上。本发明实施例可以增加额外的控制逻辑，将帧缓存区寄存器的值发生修改的信息传递给刷新控制器。
此外，内存控制器搜集的帧缓存区信息需要传递给显示控制器，用于控制需要刷新的像素点。因而，本发明实施例在内存控制器和显示控制器间会 建立一个交互通道。本发明实施例的显示系统的结构的框图中增加的帧缓存区状态模块以及帧缓存区寄存器的监控逻辑既可以同时存在，也可以单独存在。
另外，如图4中所示的帧缓存区状态模块、刷新控制器、DMA控制器及帧缓存区寄存器可以同时存在于内存子系统中(图3中分别存在于内存子系统和液晶显示子系统中)，如另外，如5所示，将内存控制器和显示控制器都集成在同一芯片中，将显示系统的刷新控制器及DMA控制器等部件集成到内存控制器也是可以实现的。
以下对本发明实施例的具体实现流程进行详细说明，具体如下，图6所示：
S1：显示控制器执行时序驱动逻辑，按照较低的刷新周期定期地触发帧刷新操作(第一刷新信号)；
在本步骤中，较低的刷新频率是相对于为保证及时更新所设置的很高的刷新频率而言的。在电容屏的显示器中，这里的较低的刷新频率只要能保证显示器的电容不因为漏电发生像素点失真就可以。因此这里的刷新频率和电容漏电速度以及像素失真所对应的漏电量相关，本领域技术人员可以据此计算出对应各种不同显示器的刷新频率，本发明实施例对于刷新频率的具体取值不予限定。另外，本领域技术人员可知的是，在本发实施例中，周期性刷新的频率与防止显示器的电容因为漏电发生像素点失真所需要的最低频率越接近，则越可以减少不必要的刷新。
S2：显示控制器以及内存控制器监控帧缓存区的状态信息；
显示控制器监控的帧缓存区的状态信息，主要是指帧缓存区的切换操作(即帧缓存区的图像帧是否发生了改变)，帧缓存区的切换操作可以通过帧缓存区寄存器中值的变化来判断。
内存控制器监控的帧缓存区状态信息，主要是指图像帧数据的修改状态。其中，帧缓存区状态模块用于存储图像帧数据的是否修改状态信息，该模块 一般是由SRAM(Static Random Access Memory，静态随机存储器)组成。图像帧数据的修改状态可以对应多种粒度，例如：整个帧缓存区、行以及像素点等。粒度越细，存储的开销越大。
图像帧数据的修改状态的监控功能，可以由内存控制器通过监控内存控制器的写队列来实现。内存控制器的写队列会包含所有对内存数据的写请求。所有对帧数据的修改都是通过写请求来实现的。在本发明实施例中，具体获取帧数据修改状态的流程图如下图7所示：
S21：在系统启动时，内存控制器获取帧缓存区中的信息。内存控制器获取帧缓存区中的信息可以有：信息对应的内存区域、单个帧缓存区大小、每个帧的行数和列数，以及每个像素点占据的字节数等。
S22：当检测到内存控制器接收到新的写请求，并加入到写请求队列后，启动下述步骤。
S23：根据S21步骤中内存控制器获取的帧缓存区信息，判断该请求要修改的地址是否属于帧缓存区。如果是，执行步骤S24；否则，跳转到步骤S26。
S24：根据帧缓存区状态的监控粒度，抽取出对应监控粒度的地址信息，如整个帧缓存区、帧数据行或是每个像素点。
S25：在帧缓存区状态模块中将对应缓存区、行或是像素点的状态更新为“被修改”。一般而言，该状态可以通过位图来标识，“0”表示数据未被修改，“1”表示“被修改”。帧缓存区状态模块可以将被修改的地址以及对应的值发送给帧缓存寄存器，使帧缓存寄存器中的值修改。
S26：处理完成。
S3：显示控制器检测帧缓存区状态信息的改变，判断是否需要触发帧刷新操作；
判断是否需要触发帧刷新操作的具体流程，请参阅图8所示，如下：
S31：系统启动，显示控制器记录当前帧缓存寄存器中的值。
S32：当显示控制器检测到帧缓存区寄存器的值被修改时，执行下述步骤：
S33：读取帧缓存区寄存器的值。
S34：判断记录的帧缓存区寄存器的值，与新写入寄存器的值是否相等。如果是，跳转到步骤S36；否则，执行步骤S35。
S35：通知刷新控制器，触发事件驱动的帧刷新逻辑，产生帧刷新信号(第二刷新信号)。此外，更新并记录当前帧缓存区寄存器的值，用于下次比较。
S36：处理完成。
S4：帧刷新控制器读取帧缓存区的状态信息，分析需要刷新的帧缓存区中的区域；
本步骤中的状态信息，主要是指内存控制器中帧缓存区状态模块记录的信息，也就是标识数据是否被修改的状态。如果帧数据发生修改，该数据需要被读取并显示到显示面板上去；否则，不需要读取该数据。刷新帧缓存区状态模块记录的信息可以是整个帧缓存区、帧缓存的行或是单个的像素点为监控粒度的，因此，在不同的监控粒度下，需要刷新的帧缓存区的区域也会发生差异。
S5：DMA控制器启动DMA操作，向内存控制器发送读取帧缓存区中数据的DMA请求，获取帧缓存区内发生改变的图像帧的数据；
在本步骤中，DMA控制器根据S4步骤中获取的被修改的数据信息，产生DMA请求来读取这些数据。
S6：显示面板的显示逻辑，根据刷新粒度(与监控粒度是对应的)以及对应刷新粒度的面板控制逻辑，将数据写入到显示面板的各像素点中。
在执行S6之后，回到步骤S3，重复执行步骤S3。
在步骤S6中，显示面板的显示逻辑仅会将凸显帧中发送变化的部分，输出给面板进行显示，本发明实施例还提供了显示逻辑的具体结构。以监控粒度和刷新的粒度为行，举例说明，如图9所示如下：
显示面板的刷新，一般是以从上到下、从左到右、逐行扫描的方式来进行的。因此，显示面板的刷新逻辑，可以由行驱动和列驱动逻辑组成。本发 明实施例在执行事件驱动的刷新过程中，并非面板上所有的像素点都需要刷新，而是仅刷新步骤S4中指示的修改过的图像帧数据。本发明实施例中，刷新的粒度可以是单个的行或是单个像素点，与帧缓存区状态模块的监控粒度相同。显示面板的控制逻辑则根据刷新粒度来调整刷新逻辑。
在图9所示结构中，以缓存行作为刷新粒度的行驱动逻辑的刷新逻辑结构示意图。
其中，移位寄存器(Shift Registers)，用于存储整个图像帧，控制当前要刷新的行，一般是以移位的方式顺序产生；
电平位移器(Level Shifters)和输出缓冲区(Output Buffer)，用于产生用于驱动当前行的信号(Line)，将当前需要刷新的行输出到面板的对应区域(Line0、Line1、Line2或者其他行)；
以上是针对整个图像帧的逐行刷新结构，相比于整个图像帧的逐行的刷新逻辑，本发明实施例还增加了行访问寄存器(Row Access Registers)、相应的信号线、以及额外的逻辑门电路。
行访问寄存器，用于存储整个帧缓存区用于显示的图像帧的各行是否被修改的信息，这个状态可以是帧缓存区状态模块中记录的信息。当行访问寄存器中显示帧缓存行未被修改时，行访问寄存器对应的值为0。
输出使能信号(Output Enable，OE)，是允许打开或关闭行输出信号。如果行输出信号关闭，数据不能被写入到该行的所有像素点。因此，通过关闭行输出信号，就能达到不刷新当前行数据的目的。VCLK是时钟信号源，VSync是启动和驱动逐行扫描的信号源。
当行访问寄存器中显示帧缓存行未被修改时，行访问寄存器对应的值为0。此时通过OE信号和与门电路的作用，对应行的所有像素点都不允许被写入数据。相反，当帧缓存行发生修改时，该行对应的像素点允许写入数据，需要将修改的行的图像帧数据写入到像素点中。这样，发生修改的帧缓存行的图像帧数据都会被更新，而未发生修改的帧缓存行的图像帧数据维持不变。 从实现了部分刷新的目的。
本发明实施例还提供了一种显示设备的刷新控制装置，如图10所示，包括：
刷新控制器1001，用于周期性产生第一刷新信号，并发送给直接内存存取控制器；产生上述第一刷新信号的周期，短于上述显示面板的像素点因漏电出现失真的时长；以及，用于确定上述帧缓存区存储的用于显示的图像帧发生改变时，则产生第二刷新信号，并发送给上述直接内存存取控制器；
直接内存存取控制器1002，用于在接收到上述刷新控制器1001发送的上述第一刷新信号，或者接收到上述刷新控制器1001发送的上述第二刷新信号后，将存储器的帧缓存区存储的用于显示的图像帧输出到显示面板。
由于本发明实施例采用了事件触发的方式进行刷新，因此在某些场景下会存在刷新频率极低的情况，如果刷新频率过低则可能出现显示器的显示面板的像素点因漏电出现失真，这时会出现图像失真的情况；为了避免这种情况的发生，本步骤用于保证最低刷新频率，防止显示器面板的像素点因漏电出现失真。
另外，在本发明实施例中，保证最低刷新频率的方案除了以上周期性产生第一刷新信号的方案以外，还可以采用例如：监控刷新等待时长(即没有向显示面板输出图像帧的等待时长)，如果刷新等待时长与显示面板漏电出现失真的时长的差小于设定阈值，则产生第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到显示面板。这种方案不需要周期性的刷新，可以进一步的降低不必要的刷新操作。
在本发明实施例中，图像帧存储在帧缓存区，帧缓存区可能有多个，在本发明实施例中需要监控的是用于存放需要显示到显示面板的图像帧的帧缓存区。上述帧缓存区存储的用于显示的图像帧是否发生改变的确定方式，可以由内存控制器执行监控，并将监控到的信息传递给显示设备的刷新控制装置。内存控制器监控用于显示的图像帧是否发生改变通常可以是监控帧缓存 区的数据是否发生了改变，监控的方式依具体的内存子系统结构的不同而不同，只要能及时确定图像帧改变就可以，本发明实施例对此不做唯一性限定。
本发明实施例，通过周期性产生第一刷新信号可以防止显示面板的像素点因漏电出现失真，上述第二刷新信号的产生频率是为了防止显示器面板的像素点因漏电出现失真设定的，因此会远小于用于保证图像帧及时显示所需要的频率；另外，在帧缓存区存储的图像帧发生改变的时候，可以确定图像帧需要被刷新到显示面板。通过监控图像帧的变化这一事件来触发图像帧的刷新操作可以保证图像帧被及时显示，而不再需要使用过高的刷新频率来保证图像帧被及时显示；因此本发明实施例可以减少不必要的刷新操作，从而降低系统资源消耗以及内存消耗。
在本发明实施例中，事件触发的方式，可以是刷新整个用于显示的图像帧(即整体刷新)，也可以是刷新用于显示的图像帧中发生改变的部分(即部分刷新)；另外，本发明实施例还提供了具体如何确定图像帧发生改变的实现方案，其中整体刷新的实现方案可以如下：
上述刷新控制器1001，用于检测到上述用于显示的图像帧发生切换时，产生第二刷新信号，并发送给上述直接内存存取控制器1002；
上述直接内存存取控制器1002，用于接收到上述第二刷新信号后，将上述帧缓存区内存储的用于显示的整个图像帧输出到上述显示面板。
在本发明实施例中，还提供了如何确定帧缓存区存储的用于显示的图像帧是否发生改变的可选实现方案，并据此进行部分刷新的方案，具体如下：
上述刷新控制器1001，用于检测到上述用于显示的图像帧发生切换时，获取图像帧状态参数，并产生第二刷新信号，并发送给上述直接内存存取控制器1002；上述图像帧状态参数标识上述用于显示的图像帧发生变化的图像数据对应的地址；
上述直接内存存取控制器1002，用于接收到上述第二刷新信号后，根据上述第二刷新信号，将上述帧缓存区内存储的用于显示的图像帧中发生变化 的地址对应的图像数据输出到上述显示面板。
在本实施例中，图像帧状态参数可以存储在帧缓存区状态模块，帧缓存区状态模块存储的图像帧状态参数由内存控制器监控在确定上述帧缓存区存储的用于显示的图像帧发生改变后存入；上述帧缓存区状态模块可以是内存子系统内的一个新增模块，显示控制器从上述帧缓存区状态模块内读取上述图像帧状态参数。
由于本发明实施例采用了事件触发的方式进行刷新，那么图像帧的更新这一事件可以进行粒度的划分，从而实现仅对图像帧中那些发生改变的像素或者行或者列的图像帧数据进行刷新，而不必对所有的图像帧数据进行刷新，从而进一步的减少刷新数据量，减少对内存的占用，具体如下：
上述刷新控制器1001，用于获取上述图像帧状态参数，其中，上述图像帧状态参数用于标识上述用于显示的图像帧中发生变化的行、列或者像素点的地址；
上述直接内存存取控制器1002，用于在接收到第二刷新信号后，将上述帧缓存区内存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址对应的图像数据输出到上述显示面板。
在本发明实施例可以仅对帧缓存区内存储的用于显示的图像帧中发生变化的部分进行刷新，那么本发明实施例中需要获得帧缓存区内存储的用于显示的图像帧中发生变化的部分的数据，本实施例还提供了如何获得这些数据的具体实现方式，如下：上述直接内存存取控制器1002，用于依据上述图像帧状态参数确定上述帧缓存区存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址，向上述内存控制器发送数据读取请求，上述数据读取请求用于读取上述用于显示的图像帧中发生变化的行、列或者像素点的地址对应的图像数据；接收上述内存控制器返回的图像数据，并将接收到的图像数据输出到上述显示面板。
值得注意的是，上述装置和系统实施例中，所包括的各个单元只是按照 功能逻辑进行划分的，但并不局限于上述的划分，只要能够实现相应的功能即可；另外，各功能单元的具体名称也只是为了便于相互区分，并不用于限制本发明的保护范围。
另外，本领域普通技术人员可以理解实现上述各方法实施例中的全部或部分步骤是可以通过程序来指令相关的硬件完成，相应的程序可以存储于一种计算机可读存储介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。
以上仅为本发明较佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明实施例揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。

Claims (10)

  1. 一种显示设备的刷新控制方法，所述显示设备包括显示控制器和显示面板，其特征在于，包括：
    所述显示控制器周期性产生第一刷新信号，将帧缓存区存储的用于显示的图像帧输出到所述显示面板；产生所述第一刷新信号的周期，短于所述显示面板的像素点因漏电出现失真的时长；
    所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板。
  2. 根据权利要求1所述方法，其特征在于，
    所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号，包括：所述显示控制器检测到所述帧缓存区中的图像帧发生切换，则产生所述第二刷新信号；
    所述将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板包括：将所述帧缓存区内存储的用于显示的整个图像帧输出到所述显示面板。
  3. 根据权利要求1所述方法，其特征在于，
    所述显示控制器确定所述帧缓存区存储的用于显示的图像帧发生改变，则产生第二刷新信号，包括：
    所述显示控制器检测到所述帧缓存区中的图像帧发生切换时，获取图像帧状态参数，并根据所述图像帧状态参数产生所述第二刷新信号；所述图像帧状态参数标识所述用于显示的图像帧发生变化的图像数据对应的地址；
    所述将所述帧缓存区内存储的用于显示的图像帧输出到所述显示面板包括：
    根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中所述地址对应的图像数据输出到所述显示面板。
  4. 根据权利要求3所述方法，其特征在于，所述图像帧状态参数标识所述用于显示的图像帧发生变化的图像数据对应的地址，包括：
    所述图像帧状态参数用于标识所述用于显示的图像帧发生变化的图像数据对应的行、或列、或者像素点的地址；
    所述根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中所述地址对应的图像数据输出到显示面板包括：
    根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中所述行、或列、或者像素点的地址对应的图像数据输出到所述显示面板。
  5. 根据权利要求4所述方法，其特征在于，所述将所述帧缓存区存储的用于显示的图像帧中所述行、或列、或者像素点的地址对应的图像数据输出到所述显示面板包括：
    向内存控制器发送数据读取请求，用于请求读取所述用于显示的图像帧中所述行、或列、或者像素点的地址对应的图像数据；
    接收所述内存控制器返回的图像数据，并将接收到的图像数据输出到所述显示面板。
  6. 一种刷新控制装置，其特征在于，包括：
    刷新控制器，用于周期性产生第一刷新信号，并发送给直接内存存取控制器；产生所述第一刷新信号的周期，短于显示面板的像素点因漏电出现失真的时长；以及，用于确定帧缓存区存储的用于显示的图像帧发生改变时，则产生第二刷新信号，并发送给所述直接内存存取控制器；
    所述直接内存存取控制器，用于在接收到所述刷新控制器发送的所述第一刷新信号，将所述帧缓存区存储的用于显示的图像帧输出到显示面板；以及用于在接收到所述刷新控制器发送的所述第二刷新信号，将所述帧缓存区存储的用于显示的图像帧输出到所述显示面板。
  7. 根据权利要求6所述装置，其特征在于，
    所述刷新控制器，用于检测到所述用于显示的图像帧发生切换时，产生所述第二刷新信号，并发送给所述直接内存存取控制器；
    所述直接内存存取控制器，用于接收到所述第二刷新信号后，将所述帧缓存区内存储的用于显示的整个图像帧输出到所述显示面板。
  8. 根据权利要求6所述装置，其特征在于，
    所述刷新控制器，用于检测到所述用于显示的图像帧发生切换时，获取图像帧状态参数，并根据所述图像帧状态参数产生所述第二刷新信号，并将所述第二刷新信号发送给所述直接内存存取控制器；所述图像帧状态参数标识所述用于显示的图像帧发生变化的图像数据对应的地址；
    所述直接内存存取控制器，用于接收到所述第二刷新信号后，根据所述第二刷新信号，将所述帧缓存区内存储的用于显示的图像帧中所述地址对应的图像数据输出到所述显示面板。
  9. 根据权利要求8所述装置，其特征在于，
    所述刷新控制器，用于获取所述图像帧状态参数，其中，所述图像帧状态参数用于标识所述用于显示的图像帧中发生变化的图像数据对应的行、列或者像素点的地址；
    所述直接内存存取控制器，用于在接收到第二刷新信号后，根据所述第二刷新信号，将所述帧缓存区存储的用于显示的图像帧中所述行、或列、或者像素点的地址对应的图像数据输出到所述显示面板。
  10. 根据权利要求9所述装置，其特征在于，
    所述直接内存存取控制器，用于依据所述第二刷新信号包含的所述图像帧状态参数确定所述帧缓存区存储的用于显示的图像帧中发生变化的行、或列、或者像素点的地址，向内存控制器发送数据读取请求，所述数据读取请求用于读取所述用于显示的图像帧中所述行、列或者像素点的地址对应的图像数据；接收所述内存控制器返回的图像数据，并将接收到的图像数据输出到所述显示面板。
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106057156A (zh) * 2016-07-29 2016-10-26 北京小米移动软件有限公司 液晶显示屏的控制方法及装置
CN111913989A (zh) * 2020-06-15 2020-11-10 东风日产数据服务有限公司 分布式应用缓存刷新系统、方法、电子设备及存储介质
CN112004089A (zh) * 2020-09-04 2020-11-27 白华 一种支持任意显示区域局部刷新的方法
CN112055875A (zh) * 2018-05-02 2020-12-08 苹果公司 电子显示器部分图像帧更新系统和方法
CN115482798A (zh) * 2021-06-15 2022-12-16 信利半导体有限公司 一种解决显示刷新滞后的低频驱动方法及装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1852401A (zh) * 2006-04-30 2006-10-25 北京中星微电子有限公司 显示屏控制器和显示屏刷新的控制方法
CN101059943A (zh) * 2007-04-12 2007-10-24 深圳安凯微电子技术有限公司 一种帧刷新速率的匹配方法及系统
CN101115202A (zh) * 2006-07-28 2008-01-30 三星电子株式会社 图像处理装置、显示装置和图像处理方法
CN102402409A (zh) * 2010-09-07 2012-04-04 无锡中星微电子有限公司 一种刷屏方法和装置
WO2013112335A2 (en) * 2012-01-27 2013-08-01 Qualcomm Mems Technologies, Inc. System and method for choosing display modes

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1852401A (zh) * 2006-04-30 2006-10-25 北京中星微电子有限公司 显示屏控制器和显示屏刷新的控制方法
CN101115202A (zh) * 2006-07-28 2008-01-30 三星电子株式会社 图像处理装置、显示装置和图像处理方法
CN101059943A (zh) * 2007-04-12 2007-10-24 深圳安凯微电子技术有限公司 一种帧刷新速率的匹配方法及系统
CN102402409A (zh) * 2010-09-07 2012-04-04 无锡中星微电子有限公司 一种刷屏方法和装置
WO2013112335A2 (en) * 2012-01-27 2013-08-01 Qualcomm Mems Technologies, Inc. System and method for choosing display modes

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106057156A (zh) * 2016-07-29 2016-10-26 北京小米移动软件有限公司 液晶显示屏的控制方法及装置
CN112055875A (zh) * 2018-05-02 2020-12-08 苹果公司 电子显示器部分图像帧更新系统和方法
CN112055875B (zh) * 2018-05-02 2022-05-24 苹果公司 电子显示器部分图像帧更新系统和方法
CN111913989A (zh) * 2020-06-15 2020-11-10 东风日产数据服务有限公司 分布式应用缓存刷新系统、方法、电子设备及存储介质
CN112004089A (zh) * 2020-09-04 2020-11-27 白华 一种支持任意显示区域局部刷新的方法
CN115482798A (zh) * 2021-06-15 2022-12-16 信利半导体有限公司 一种解决显示刷新滞后的低频驱动方法及装置

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