WO2016004719A1 - 阵列基板及制备方法、触控显示装置 - Google Patents

阵列基板及制备方法、触控显示装置 Download PDF

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Publication number
WO2016004719A1
WO2016004719A1 PCT/CN2014/091903 CN2014091903W WO2016004719A1 WO 2016004719 A1 WO2016004719 A1 WO 2016004719A1 CN 2014091903 W CN2014091903 W CN 2014091903W WO 2016004719 A1 WO2016004719 A1 WO 2016004719A1
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Prior art keywords
sub
electrode
insulating layer
transparent
transparent insulating
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PCT/CN2014/091903
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English (en)
French (fr)
Inventor
郑丹
朱海波
路林林
段建民
金景鲜
宫洪友
翟雨雷
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP14863072.6A priority Critical patent/EP3168875B1/en
Priority to US14/647,574 priority patent/US9652099B2/en
Publication of WO2016004719A1 publication Critical patent/WO2016004719A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04111—Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04112—Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • At least one embodiment of the present invention relates to an array substrate, a method of fabricating the same, and a touch display device.
  • the touch screen includes an add-on touch panel (Add On Touch Panel) and an in-cell touch panel (In Cell Touch Panel).
  • the structure of the external touch screen is to stick the touch panel and the display panel together.
  • This technology has the disadvantages of high production cost, low light transmittance, and thick module. Therefore, with the development of technology
  • the embedded touch screen has gradually become a new favorite of research and development.
  • the touch sensing method of the in-cell touch screen is mainly a mutual capacitance type.
  • the mutual capacitance in-cell touch screen includes a relatively disposed color film substrate and an array substrate, a touch driving electrode and a touch sensing electrode. It can be placed on the array substrate.
  • the touch control principle is: when the touch driving signal is loaded on the touch driving electrode, detecting the induced voltage signal that the touch sensing electrode is coupled through the mutual capacitance, in the process, when the human body touches the touch screen, the human body electric field It will act on the mutual capacitance, so that the capacitance value of the mutual capacitance changes, thereby changing the induced voltage signal that the touch sensing electrode is coupled through the mutual capacitance, and then determining the contact position according to the change of the induced voltage signal.
  • At least one embodiment of the present invention provides an array substrate, a method of fabricating the same, and a touch display device to avoid problems such as noise, visual artifacts, and touch insensitivity caused by the display device due to charge imbalance.
  • At least one embodiment of the present invention provides an array substrate including a display region and a peripheral region, the display region including a plurality of thin film transistors disposed on a substrate, and a drain of the thin film transistor a first transparent electrode, a second transparent electrode, and a transparent insulating layer in contact with the second transparent electrode.
  • the transparent insulating layer is a conductor when a voltage applied to the transparent insulating layer is greater than a predetermined voltage, and a voltage applied to the transparent insulating layer is less than In the case of a preset voltage, it is an insulator.
  • the second transparent electrode includes a first sub-electrode arranged in a plurality of rows along a first direction, and a second sub-electrode arranged in a plurality of rows along a second direction; the first sub-electrodes of the different rows are insulated from each other, different The second sub-electrodes are insulated from each other, and the first sub-electrode and the second sub-electrode are insulated from each other; the first direction and the second direction intersect.
  • At least one embodiment of the present invention provides a method of fabricating an array substrate including a display region and a peripheral region, the method comprising: forming a plurality of thin film transistors on a substrate substrate in the display region a first transparent electrode electrically connected to a drain of the thin film transistor, a second transparent electrode, and a transparent insulating layer in contact with the second transparent electrode; a voltage of the transparent insulating layer acting on the transparent insulating layer a conductor that is larger than the preset voltage, and is an insulator when a voltage applied to the transparent insulating layer is less than the predetermined voltage; and the second transparent electrode includes a first row arranged in a plurality of rows along the first direction a sub-electrode, and a second sub-electrode arranged in a plurality of rows along the second direction; the first sub-electrodes of the different rows are insulated from each other, and the second sub-electrodes of the different rows are insulated from each other, and the first
  • At least one embodiment of the present invention provides a touch display device including the above array substrate.
  • FIG. 1 is a schematic top plan view of a display area of an array substrate according to an embodiment of the present invention
  • Figure 2 is a cross-sectional view taken along line AA' of Figure 1;
  • FIG. 3 is a schematic structural view 1 of a second transparent electrode according to an embodiment of the present invention.
  • Figure 4 is a cross-sectional view taken along line AA' of Figure 3;
  • FIG. 5 is a schematic structural diagram 2 of a second transparent electrode according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of a transparent insulating layer and a grounded metal line according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of an array substrate in which a transparent insulating layer is connected to a grounded metal line according to an embodiment of the present invention.
  • a certain touch driving electrode or a touch sensing electrode generates electric charge accumulation due to electrostatic discharge or other reasons, and accumulates in a certain
  • the charge on the segment touch driving electrode or the touch sensing electrode may cause an imbalance of charge between the touch driving electrode or the touch sensing electrode, and generate noise, visual artifacts, and insensitive touch.
  • At least one embodiment of the present invention provides an array substrate including a display area and a peripheral area, as shown in FIGS. 1 and 2, the display area 01 including a plurality of thin films disposed on the base substrate 10.
  • the array substrate further includes: a transparent insulating layer 16 in contact with the second transparent electrode 13; In a case where the voltage applied to the transparent insulating layer 16 is greater than a predetermined voltage, the transparent insulating layer 16 is a conductor, and in a case where a voltage applied to the transparent insulating layer 16 is less than the predetermined voltage,
  • the transparent insulating layer 16 is an insulator.
  • the second transparent electrode 13 includes a first sub-electrode 131 arranged in a plurality of rows along the first direction, and a second sub-electrode 132 arranged in a plurality of rows along the second direction;
  • One sub-electrodes 131 are insulated from each other, and different rows of the second sub-electrodes 132 are insulated from each other, and the first sub-electrode 131 and the second sub-electrode 132 are insulated from each other; the first direction and the The second direction intersects.
  • the thin film transistor 11 includes a gate, a gate insulating layer, a semiconductor active layer, a source and a drain;
  • the array substrate further includes a gate line 14 connected to the gate and a data line 15 connected to the source.
  • the material of the transparent insulating layer 16 can comprise a composite material.
  • the transparent insulating layer 16 may also be made of other materials as long as the transparent insulating layer 16 can be made to be a conductor when the voltage applied thereto is greater than a preset voltage. If the voltage is less than the preset voltage, it is an insulator.
  • the array substrate has a display and a touch function.
  • the first sub-electrode 131 and the second sub-electrode 132 of the second transparent electrode 13 are simultaneously loaded with a common electrode signal to cooperate with the first transparent electrode 12 to drive the liquid crystal to realize the display function.
  • the sub-electrode 131 and the second sub-electrode 132 are both used as a common electrode; in the touch period, the driving signal and the sensing signal are applied to the first sub-electrode 131 and the second sub-electrode 132 to implement the touch function.
  • the first transparent electrode 12 does not work, and the first sub-electrode 131 and the second sub-electrode 132 are touch driving electrodes and touch sensing electrodes.
  • the composite material is composed of two or more materials of different nature, and the materials having new properties are formed macroscopically by physical or chemical methods.
  • Various materials complement each other in performance and produce synergistic effects, so that the overall performance of the composite material is superior to the original constituent materials to meet different requirements.
  • the composite material is a conductive high-resistance composite material, that is, it is required to simultaneously consider high resistance, light transmittance and electrical conductivity.
  • Its high resistance is manifested in that when a relatively small voltage such as several volts acts on the transparent insulating layer 16 formed of the composite material, it exhibits insulation; its conductivity is reflected when a relatively large, for example, tens
  • the voltage of volts acts on the transparent insulating layer 16 formed of the composite material, it exhibits electrical conductivity; its light transmittance is reflected in that the composite material needs to satisfy a certain light transmittance.
  • the transparent insulating layer 16 is a conductor and the transparent insulating layer 16 is in contact with the second transparent electrode 13 in the case where the voltage applied to the transparent insulating layer 16 is greater than a predetermined voltage, the transparent insulating layer 16 is in contact with the second transparent electrode 13.
  • the material of the pattern layer under or above the transparent insulating layer 16 is a conductive material, and the second transparent electrode 13 is not electrically connected to the pattern layer, then the conductive pattern layer and A completely insulating layer of, for example, silicon dioxide and/or silicon nitride material is disposed between the transparent insulating layers 16.
  • the second transparent electrode 13 includes a plurality of rows of first sub-electrodes 131 arranged in a first direction, that is, the second transparent electrodes 13 include rows Cheng Duo a plurality of first sub-electrodes 131 of the row; taking the second direction as a vertical direction as an example, the second transparent electrode 13 includes a second sub-electrode 132 arranged in a plurality of rows along the second direction, that is, the The second transparent electrode 13 includes a plurality of second sub-electrodes 132 arranged in a plurality of columns.
  • the second sub-electrode 132 of each column is also All of the second sub-electrodes 132 extend from one side of the array substrate to the other side parallel to the side, wherein the four sides define the display area of the array substrate, and the first sub-electrode 131 and the second sub-131
  • the electrodes 132 are located in the same layer, so that the first sub-electrode 131 and the second sub-electrode 132 have intersecting regions.
  • the first row of each row is required.
  • the sub-electrodes 131 and/or the second sub-electrodes 132 of each column are arranged as a plurality of sub-electrode segments, ie at the intersection of the rows and columns, at least one of the sub-electrodes is broken, and each row and/or column The breaks need to be connected to the sub-electrode segments of the row or column by connecting lines set in other layers.
  • the fourth point is only explained by taking the first direction as the horizontal direction and the second direction as the vertical direction.
  • the embodiment of the present invention is not limited thereto, and the first one is guaranteed according to the actual situation.
  • the direction intersects with the second direction.
  • the positional relationship of the first transparent electrode 12 and the second transparent electrode 13 with respect to the base substrate 10 is not limited.
  • the second transparent electrode 13 is located between the base substrate 10 and the first transparent electrode 12.
  • An embodiment of the present invention provides an array substrate including a display area 01 and a peripheral area.
  • the display area 01 includes a plurality of thin film transistors 11 disposed on the base substrate 10 and electrically connected to the drain of the thin film transistor. a first transparent electrode 12 and a second transparent electrode 13; the array substrate further includes: a transparent insulating layer 16 in contact with the second transparent electrode 13; a voltage applied to the transparent insulating layer 16 is greater than a preset voltage In the case of the transparent insulating layer 16, the transparent insulating layer 16 is a conductor. When the voltage applied to the transparent insulating layer 16 is less than the predetermined voltage, the transparent insulating layer 16 is an insulator.
  • the second transparent electrode 13 includes a first sub-electrode 131 arranged in a plurality of rows along a first direction, and a second sub-electrode 132 arranged in a plurality of rows along a second direction; between the different rows of the first sub-electrodes 131
  • the second sub-electrodes 132 are insulated from each other, and the first sub-electrodes 131 and the second sub-electrodes 132 are insulated from each other; the first direction and the second direction intersect.
  • the pole 132 simultaneously loads the common electrode signal, and loads the driving signal and the sensing signal to the first sub-electrode 131 and the second sub-electrode 132 during the touch period to make the array substrate have display and touch functions; Since the transparent insulating layer 16 is in contact with the second transparent electrode 13 on the side of the second transparent electrode 13, the transparent insulating layer 16 has high resistance and conductivity, that is, when a relatively small portion When the voltage of volts acts on the transparent insulating layer 16, it exhibits an insulating property, and when a relatively large voltage such as several tens of volts acts on the transparent insulating layer 16, it exhibits electrical conductivity, and thus, when in the second When a large amount of electric charge is accumulated on one of the first sub-electrode 131 or the second sub-electrode 132 of the transparent electrode 13, when a voltage generated by a large amount of electric charges
  • the first sub-electrode 131 located in each row in the first direction includes a plurality of first sub-electrode segments 131a insulated from each other; in this case, each is located in the second direction.
  • the second sub-electrodes 132 of the row may be a unit of direct electrical connection, that is, the second sub-electrodes 132 located in each row in the second direction extend from one side of the array substrate to the other side parallel to the side, and in the first direction Any two adjacent first sub-electrode segments 131a located in each row are separated by a row of the second sub-electrodes 132 in the second direction.
  • the array substrate further includes a second metal line 18 for connecting the first sub-electrode segments 131a of each row.
  • FIG. 4 is a cross-sectional view showing the area of any two first sub-electrode segments 131a corresponding to one row in FIG. 3 and the second sub-electrode 132 between the two first sub-electrode segments 131a.
  • the second metal line 18 bypassing the second sub-electrode 132 and the second sub-electrode 132 intersect each other to form a touch sensing bridge to form a mutual capacitance.
  • the electric field of the human body acts on the mutual capacitance, so that the capacitance of the mutual capacitance changes, thereby changing the touch sensing electrode (where the touch sensing electrode is the first sub-electrode 131 or the second sub-portion)
  • the electrode 132) couples the voltage signal to determine the position of the contact based on the change in the induced voltage signal.
  • one first sub-electrode segment 131a may correspond to 10-20 sub-pixels.
  • one first sub-electrode segment 131a may also correspond to other numbers of sub-pixels.
  • FIG. 4 can partially illustrate the hierarchical structure of the touch sensing bridge, which is not embodied in other structures.
  • the second sub-electrode 131 can be a touch-sensing electrode or a touch-sensing electrode.
  • the second sub-electrode 132 can be a touch driving electrode or a touch sensing electrode.
  • the second transparent electrode 13 when the second transparent electrode 13 is formed, it is only necessary to form the first sub-electrode 131 in the first direction into a plurality of mutually insulated first sub-electrode segments 131a, thereby preparing the second transparent
  • the process of the electrode 13 is relatively simple.
  • the first direction and the second direction are perpendicular.
  • the second metal line 18 is disposed in the same layer as the gate line 14;
  • the first direction is in the same direction as the data line 15;
  • the second metal line 18 is disposed in the same layer as the data line 14. In this way, the second metal line 18 can be formed without increasing the patterning process to save cost.
  • the transparent insulating layer 16 extends to the peripheral region 02; the transparent insulating layer 16 located at the peripheral region 02 is grounded The first metal line 17 is in contact.
  • the electric charge accumulated on the second transparent electrode 13 can also flow to the first metal wire 17 through the transparent insulating layer 16, thereby being grounded.
  • the peripheral region may be designed such that the first metal line 17 is grounded, and details are not described herein again.
  • FIG. 6 shows a case where the transparent insulating layer 16 is disposed in the same layer as the first metal line 17
  • FIG. 7 shows a case where the transparent insulating layer 16 and the first metal line are disposed in different layers.
  • the embodiment of the present invention does not define which layer the first metal line 17 is specifically located.
  • the composite material is a composite material comprising carbon nanotubes or a composite material comprising graphene.
  • the resistivity of the transparent insulating layer 16 formed of the composite material can be adjusted, thereby The value of the voltage applied to the transparent insulating layer 16 when it is in the form of a conductor characteristic is controlled.
  • the transparent insulating layer 16 may have a resistivity of greater than or equal to 10 3 ohmm and less than or equal to 10 6 ohmm.
  • the array substrate provided by the embodiment of the present invention may further include a structure such as a passivation layer disposed on the first transparent electrode 12. I will not repeat them here.
  • At least one embodiment of the present invention provides a method of fabricating an array substrate, the array substrate The display area 01 and the peripheral area 02 are included.
  • the method includes: forming a plurality of thin film transistors 11 on the base substrate 10 and a drain 111 of the thin film transistor 11 in the display area 01.
  • the first transparent electrode 12 and the second transparent electrode 13 are electrically connected; and a transparent insulating layer 16 is formed in contact with the second transparent electrode 13.
  • the transparent insulating layer 16 is a conductor, and in a case where the voltage applied to the transparent insulating layer 16 is less than the predetermined voltage, The transparent insulating layer 16 is an insulator.
  • the second transparent electrode 13 includes a first sub-electrode 131 arranged in a plurality of rows along the first direction, and a second sub-electrode 132 arranged in a plurality of rows along the second direction;
  • the first sub-electrodes 131 are insulated from each other, and the second sub-electrodes 132 are insulated from each other, and the first sub-electrodes 131 and the second sub-electrodes 132 are insulated from each other; the first direction and the The second direction intersects.
  • the material of the transparent insulating layer 16 can comprise a composite material.
  • the transparent insulating layer 16 may also be made of other materials as long as the transparent insulating layer 16 can be made to be a conductor when the voltage applied thereto is greater than a preset voltage. If the voltage is less than the preset voltage, it is an insulator.
  • first transparent electrode 12 and the second transparent electrode 13 are not limited.
  • the second transparent electrode 13 may be formed first, and then the first transparent electrode 12 may be formed.
  • the transparent insulating layer 16 is a conductor and the transparent insulating layer 16 is in contact with the second transparent electrode 13 in a case where a voltage applied to the transparent insulating layer 16 is greater than a predetermined voltage
  • the present invention It should be understood by those skilled in the art that when the material of the pattern layer, such as the source/drain metal layer, above or below the transparent insulating layer 16 is a conductive material, and the second transparent electrode 13 is not electrically connected to the pattern layer, A fully insulating layer of, for example, silicon dioxide and/or silicon nitride material is formed between the conductive pattern layer and the transparent insulating layer 16.
  • the common electrode signal is simultaneously loaded to the first sub-electrode 131 and the second sub-electrode 132 of the second transparent electrode 13 during the display period, and the first sub-electrode 131 and the first sub-electrode 131 and the The two sub-electrodes 132 are loaded with a driving signal and an inductive signal to enable the array substrate to have a display and touch function.
  • a transparent contact with the second transparent electrode 13 is formed.
  • the insulating layer 16 has high resistance and electrical conductivity, that is, when a relatively small voltage such as several volts acts on the transparent insulating layer 16, Insulating, when a relatively large voltage such as several tens of volts acts on the transparent insulating layer 16, it exhibits electrical conductivity, and thus, when a certain first sub-electrode 131 or second of the second transparent electrode 13 When a large amount of electric charge is accumulated on the sub-electrode 132, when a large amount of electric charge is applied to the transparent insulating layer 16, the transparent insulating layer 16 is made conductive, so that the entire second transparent electrode 13 is turned on, and The above-mentioned large amount of electric charges are dispersed to other portions of the second transparent electrode 13, thereby avoiding problems such as noise generation due to charge imbalance, visual artifacts, and insensitive touch.
  • the transparent insulating layer 16 is formed in both the display area 01 and the peripheral area 02; in this case, the method further includes: The region 02 forms a first metal line 17 in contact with the transparent insulating layer 16, and the first metal line 17 is grounded.
  • the electric charge accumulated on the second transparent electrode 13 can also flow to the first metal wire 17 through the transparent insulating layer 16, thereby being grounded.
  • the peripheral region may be designed such that the first metal line 17 is grounded, and details are not described herein again. Further, it is not limited to which layer the first metal wire 17 is specifically formed.
  • forming the second transparent electrode 13 may include forming a plurality of rows of first sub-electrodes 131 in a first direction, and the first sub-electrodes 131 of each row include a plurality of mutually insulated first sub-electrode segments 131a; a plurality of rows of second sub-electrodes 132 are formed along the second direction, the second sub-electrodes 132 of each row being a unit of direct electrical connection; any row in each row along the first direction Two adjacent first sub-electrode segments 131a are separated by a row of the second sub-electrodes 132 in the second direction.
  • the method further includes forming a second metal line 18 for connecting the first sub-electrode segments 131a of each row.
  • the first direction and the second direction are perpendicular.
  • the first direction is in the same direction as the gate line 14, for example, the second metal line 18 and the gate line 14 are formed by the same patterning process;
  • the first direction is in the same direction as the data line 15, for example, the second metal line 18 and the data line 14 are formed by the same patterning process.
  • the composite material is a composite material comprising carbon nanotubes or a composite material comprising graphene.
  • the resistivity of the transparent insulating layer 16 formed of the composite material can be adjusted, thereby Controlling the electricity applied to the transparent insulating layer 16 when it has a conductor characteristic Pressure value.
  • the transparent insulating layer 16 may have a resistivity of greater than or equal to 10 3 ohmm and less than or equal to 10 6 ohmm.
  • the method for fabricating the array substrate may further include the steps of forming a passivation layer on the first transparent electrode, and the details are not described herein.
  • At least one embodiment of the present invention also provides a touch display device including the above array substrate.
  • the common electrode signal is simultaneously loaded to the first sub-electrode 131 and the second sub-electrode 132 of the second transparent electrode 13 of the array substrate during the display period to be transparent with the first
  • the electrode 12 cooperates with the driving liquid crystal to realize the display function; during the touch time period, the driving function and the sensing signal are loaded to the first sub-electrode 131 and the second sub-electrode 132 to implement the touch function.
  • the display device may be any product or component having a display function such as a liquid crystal display, a television, a digital camera, a mobile phone, a tablet computer, or the like.

Abstract

一种阵列基板及制备方法、触控显示装置，该阵列基板的显示区域包括多个薄膜晶体管（11）、第一透明电极（12）、第二透明电极（13）以及与第二透明电极（13）接触的透明绝缘层（16）；透明绝缘层（16）在作用于其上的电压大于预设电压时为导体，在作用于其上的电压小于预设电压时为绝缘体；第二透明电极（13）包括沿第一方向排成多排的相互绝缘的第一子电极（131）、沿第二方向排成多排的相互绝缘的第二子电极（132），第一方向和第二方向相交。本公开可避免由于电荷不平衡而使显示装置产生噪声、视觉伪像和触控不灵敏等问题。

Description

阵列基板及制备方法、触控显示装置 技术领域
本发明的至少一个实施例涉及一种阵列基板及制备方法、触控显示装置。
背景技术
随着显示技术的飞速发展，触控屏(Touch Panel，简称TP)的诞生使人们的生活更加便捷。
触控屏包括外挂式触控屏(Add On Touch Panel)和内嵌式触控屏(In Cell Touch Panel)。外挂式触控屏的结构为将触控面板和显示面板贴合在一起，这种技术存在制作成本较高、光透过率较低、模组较厚等缺点，因而，随着科技的发展，内嵌式触控屏逐渐成为研发新宠。
目前，内嵌式触控屏的触控感测方式主要是互电容式，例如，互电容内嵌式触控屏包括相对设置的彩膜基板和阵列基板，触控驱动电极和触控感应电极可以设置于阵列基板上。其触控原理为：在对触控驱动电极加载触控驱动信号时，检测触控感应电极通过互电容耦合出的感应电压信号，在此过程中，有人体接触该触控屏时，人体电场就会作用在互电容上，使互电容的电容值发生变化，从而改变触控感应电极通过互电容耦合出的感应电压信号，进而根据该感应电压信号的变化，确定触点位置。
发明内容
本发明的至少一个实施例提供一种阵列基板及制备方法、触控显示装置，以避免由于电荷不平衡而使显示装置产生噪声、视觉伪像和触控不灵敏等问题。
一方面，本发明的至少一个实施例提供一种阵列基板，其包括显示区域和周边区域，所述显示区域包括设置在衬底基板上的多个薄膜晶体管、与所述薄膜晶体管的漏极电连接的第一透明电极、第二透明电极，以及与所述第二透明电极接触的透明绝缘层。所述透明绝缘层在作用于所述透明绝缘层的电压大于预设电压的情况下为导体，在作用于所述透明绝缘层的电压小于所 述预设电压的情况下为绝缘体。所述第二透明电极包括沿第一方向排成多排的第一子电极、以及沿第二方向排成多排的第二子电极；不同排所述第一子电极之间相互绝缘，不同排所述第二子电极之间相互绝缘，且所述第一子电极和所述第二子电极相互绝缘；所述第一方向和所述第二方向相交。
另一方面，本发明的至少一个实施例提供一种阵列基板的制备方法，所述阵列基板包括显示区域和周边区域，所述方法包括：在显示区域形成位于衬底基板上的多个薄膜晶体管、与所述薄膜晶体管的漏极电连接的第一透明电极、第二透明电极以及与所述第二透明电极接触的透明绝缘层；所述透明绝缘层在作用于所述透明绝缘层的电压大于预设电压的情况下为导体，在作用于所述透明绝缘层的电压小于所述预设电压的情况下为绝缘体；所述第二透明电极包括沿第一方向排成多排的第一子电极、以及沿第二方向排成多排的第二子电极；不同排所述第一子电极之间相互绝缘，不同排所述第二子电极之间相互绝缘，且所述第一子电极和所述第二子电极相互绝缘；所述第一方向和所述第二方向相交。
再一方面，本发明的至少一个实施例提供一种触控显示装置，其包括上述的阵列基板。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。
图1为本发明实施例提供的一种阵列基板的显示区域的俯视结构示意图；
图2为图1中AA’向剖视示意图；
图3为本发明实施例提供的一种第二透明电极的结构示意图一；
图4为图3中AA’向剖视示意图；
图5为本发明实施例提供的一种第二透明电极的结构示意图二；
图6为本发明实施例提供的透明绝缘层与接地的金属线连接的示意图；
图7为本发明实施例提供的一种透明绝缘层与接地的金属线连接的阵列基板的结构示意图。
附图标记：
01-显示区域；02-周边区域；10-衬底基板；11-薄膜晶体管；111-薄膜晶体管的漏极；12-第一透明电极；13-第二透明电极；131-第一子电极；131a-第一子电极片段；132-第二子电极；14-栅线；15-数据线；16-透明绝缘层；17-第一金属线；18-第二金属线。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
本申请的发明人注意到，在内嵌式触控屏的制造过程或用户操纵设备过程中，由于静电放电或其他原因使某段触控驱动电极或触控感应电极产生电荷累积，累积在某段触控驱动电极或触控感应电极上的电荷可导致触控驱动电极或触控感应电极各部分之间电荷不平衡，产生噪声、视觉伪像和触控不灵敏等问题。
本发明的至少一个实施例提供了一种阵列基板，该阵列基板包括显示区域和周边区域，如图1和图2所示，所述显示区域01包括设置在衬底基板10上的多个薄膜晶体管11、与所述薄膜晶体管的漏极111电连接的第一透明电极12、第二透明电极13；所述阵列基板还包括：与所述第二透明电极13接触的透明绝缘层16；在作用于所述透明绝缘层16的电压大于预设电压的情况下，所述透明绝缘层16为导体，在作用于所述透明绝缘层16的电压小于所述预设电压的情况下，所述透明绝缘层16为绝缘体。
在上述实施例中，所述第二透明电极13包括沿第一方向排成多排的第一子电极131、以及沿第二方向排成多排的第二子电极132；不同排所述第一子电极131之间相互绝缘，不同排所述第二子电极132之间相互绝缘，且所述第一子电极131和所述第二子电极132相互绝缘；所述第一方向和所述第二方向相交。
所述薄膜晶体管11包括栅极、栅绝缘层、半导体有源层、源极和漏极； 所述阵列基板还包括与所述栅极连接的栅线14以及与所述源极连接的数据线15。
在至少一个实施例中，所述透明绝缘层16的材料可以包括复合材料。当然，本发明实施例不做限定，透明绝缘层16还可以采用其他材料，只要能够使透明绝缘层16实现在作用于其上的电压大于预设电压的情况下为导体，在作用于其上的电压小于预设电压的情况下为绝缘体即可。
需要说明的是，第一，本发明实施例中，所述阵列基板具有显示和触控功能。在显示时间段内，向第二透明电极13的第一子电极131和第二子电极132同时加载公共电极信号，以与所述第一透明电极12配合驱动液晶实现显示功能，此时第一子电极131和第二子电极132均用作公共电极；在触控时间段内，向第一子电极131和第二子电极132加载驱动信号和感应信号，以实现触控功能，此时，第一透明电极12不工作，第一子电极131和第二子电极132互为触控驱动电极和触控感应电极。
第二，复合材料是由两种或两种以上不同性质的材料，通过物理或化学的方法，在宏观上组成具有新性能的材料。各种材料在性能上互相取长补短，产生协同效应，使复合材料的综合性能优于原组成材料而满足不同的要求。
本发明实施例中，所述复合材料为导电高阻复合材料，即：需要同时兼顾高阻性、透光性和导电性。其高阻性体现在，当一个相对较小例如几伏特的电压作用于由该复合材料形成的透明绝缘层16时，其呈现绝缘性；其导电性体现在，当一个相对较大例如几十伏特的电压作用于由该复合材料形成的透明绝缘层16时，其呈现导电性；其透光性体现在，该复合材料需满足一定的透光率。
第三，由于在作用于所述透明绝缘层16的电压大于预设电压的情况下，所述透明绝缘层16为导体，而该透明绝缘层16与所述第二透明电极13接触，因此，本领域技术人员应该知道，当位于所述透明绝缘层16下方或上方的图案层的材料为导电材料，且第二透明电极13不与该图案层电连接时，则需在该导电图案层和所述透明绝缘层16之间设置例如二氧化硅和/或氮化硅材料的完全绝缘层。
第四，以所述第一方向为水平方向为例，所述第二透明电极13包括沿第一方向排成多排的第一子电极131，即为，所述第二透明电极13包括排成多 行的多个第一子电极131；以所述第二方向为垂直方向为例，所述第二透明电极13包括沿第二方向排成多排的第二子电极132，即为，所述第二透明电极13包括排成多列的多个第二子电极132。
在此基础上，若每行的第一子电极131均为一个整体，即该第一子电极131从阵列基板的一边延伸到与该边平行的另一边，每列的第二子电极132也均为一个整体，即该第二子电极132从阵列基板的一边延伸到与该边平行的另一边，其中该四个边限定了阵列基板的显示区域，而第一子电极131和第二子电极132位于同层，导致第一子电极131和第二子电极132由于具有相交区域，因此，若要使第一子电极131和第二子电极132相互绝缘，则需将每行的第一子电极131和/或每列的第二子电极132设置为多个子电极片段，即：在行和列的相交处，至少使其中的一种子电极断开，而每行和/或每列的断开处需通过设置在其他层的连接线将该行或列的子电极片段连接起来。
第五，上述第四点仅以所述第一方向为水平方向、第二方向为垂直方向为例进行解释说明，但本发明实施例并不限于此，根据实际情况，只要保证所述第一方向和所述第二方向相交即可。
第六，不对所述第一透明电极12和第二透明电极13的相对于衬底基板10的位置关系进行限定，优选第二透明电极13位于衬底基板10和第一透明电极12之间。
本发明实施例提供了一种阵列基板，其包括显示区域01和周边区域，所述显示区域01包括设置在衬底基板10上的多个薄膜晶体管11、与所述薄膜晶体管的漏极电连接的第一透明电极12、第二透明电极13；所述阵列基板还包括：与所述第二透明电极13接触的透明绝缘层16；在作用于所述透明绝缘层16的电压大于预设电压的情况下，所述透明绝缘层16为导体，在作用于所述透明绝缘层16的电压小于所述预设电压的情况下，所述透明绝缘层16为绝缘体。所述第二透明电极13包括沿第一方向排成多排的第一子电极131、以及沿第二方向排成多排的第二子电极132；不同排所述第一子电极131之间相互绝缘，不同排所述第二子电极132之间相互绝缘，且所述第一子电极131和所述第二子电极132相互绝缘；所述第一方向和所述第二方向相交。
通过在显示时间段内，向第二透明电极13的第一子电极131和第二子电 极132同时加载公共电极信号，在触控时间段内，向第一子电极131和第二子电极132加载驱动信号和感应信号，来使该阵列基板具有显示和触控功能；在此基础上，由于在第二透明电极13一侧设置有与所述第二透明电极13接触的透明绝缘层16，而所述透明绝缘层16具有高阻性和导电性，即当一个相对较小例如几伏特的电压作用于所述透明绝缘层16时，其呈现绝缘性，当一个相对较大例如几十伏特的电压作用于所述透明绝缘层16时，其呈现导电性，因而，当在第二透明电极13的某条第一子电极131或第二子电极132上累积了大量电荷时，大量电荷产生的电压作用于所述透明绝缘层16时，会使所述透明绝缘层16呈导电性，从而使整个第二透明电极13导通，并将上述大量电荷散布到第二透明电极13的其他部分，进而可以避免因电荷不平衡而产生噪声、视觉伪像和触控不灵敏等问题。
例如，如图3-图5所示，沿第一方向位于每排的所述第一子电极131包括多个相互绝缘的第一子电极片段131a；在此情况下，沿第二方向位于每排的第二子电极132可以为一个直接电连接的整体，即沿第二方向位于每排的第二子电极132从阵列基板的一边延伸到与该边平行的另一边，且沿第一方向位于每排的任意相邻两个所述第一子电极片段131a被沿第二方向的一排所述第二子电极132隔开。在此基础上，所述阵列基板还包括用于连接每排的所述第一子电极片段131a的第二金属线18。
图4为图3中对应一排的任意两个第一子电极片段131a和位于该两个第一子电极片段131a之间的第二子电极132区域的剖视示意图。在图4中，绕过第二子电极132的第二金属线18与所述第二子电极132异面相交形成触控感应桥，形成互电容。这样，当人体接触触摸屏时，人体电场就会作用在互电容上，使互电容的容值发生变化，从而改变触控感应电极(这里触控感应电极即为第一子电极131或第二子电极132)耦合出的电压信号，从而根据该感应电压信号的变化，确定触点位置。
这里，当第二透明电极13位于衬底基板10和第一透明电极12之间时，一个第一子电极片段131a可以对应10-20个子像素。当然，根据不同的分辨率，一个第一子电极片段131a也可以对应其他数量的子像素。
需要说明的是，第一，图4中仅简略的绘示出部分能体现上述触控感应桥的层级结构，对于其他结构没有体现。
第二，所述第一子电极131可以是触控感应电极，也可以是触控驱动电极，在此情况下，第二子电极132可以是触控驱动电极，也可以是触控感应电极。
这样，在形成所述第二透明电极13时，仅需使第一方向上的第一子电极131形成为多个互相绝缘的第一子电极片段131a即可，从而使得制备所述第二透明电极13的工艺相对简单。
在至少一个实施例中，所述第一方向和第二方向垂直。在此情况下，参考图3所示，在所述第一方向与栅线14同方向的情况下，例如所述第二金属线18与所述栅线14同层设置；参考图5所示，在所述第一方向与数据线15同方向的情况下，例如所述第二金属线18与所述数据线14同层设置。这样，可以在不增加构图工艺的情况下，形成所述第二金属线18，以节省成本。
基于上述实施例，在一个实施例中，如图6和图7所示，所述透明绝缘层16延伸到所述周边区域02；位于所述周边区域02的所述透明绝缘层16与接地的第一金属线17接触。这样，累积在第二透明电极13上的电荷还可以通过所述透明绝缘层16流向所述第一金属线17，进而接地。
这里，可以设计周边区域，使所述第一金属线17接地，在此不再赘述。例如，图6示出了透明绝缘层16与第一金属线17同层设置的情形；图7示出了透明绝缘层16与第一金属线设置于不同层的情形。但本发明实施例不对第一金属线17具体位于哪层进行限定。
在至少一个实施例中，所述复合材料为包括碳纳米管的复合材料或包括石墨烯的复合材料。
由于碳纳米管和石墨烯均具有良好的导电性能，因此通过调节所述碳纳米管或所述石墨烯的掺杂量，可以调节由该复合材料形成的透明绝缘层16的电阻率，从而可以控制在所述透明绝缘层16呈导体特性时作用于其上的电压值。
本发明的至少一个实施例中，所述透明绝缘层16的电阻率可以为大于或等于103ohmm，小于或等于106ohmm。
当然，本发明实施例提供的阵列基板还可以包括设置于第一透明电极12上的钝化层等结构。此处不做赘述。
本发明的至少一个实施例提供一种阵列基板的制备方法，所述阵列基板 包括显示区域01和周边区域02，参考图1和图2所示，该方法包括：在显示区域01形成位于衬底基板10上的多个薄膜晶体管11、与所述薄膜晶体管11的漏极111电连接的第一透明电极12、第二透明电极13；以及形成与所述第二透明电极13接触的透明绝缘层16。在作用于所述透明绝缘层16的电压大于预设电压的情况下，所述透明绝缘层16为导体，在作用于所述透明绝缘层16的电压小于所述预设电压的情况下，所述透明绝缘层16为绝缘体。
在本发明实施例中，所述第二透明电极13包括沿第一方向排成多排的第一子电极131、以及沿第二方向排成多排的第二子电极132；不同排所述第一子电极131之间相互绝缘，不同排所述第二子电极132之间相互绝缘，且所述第一子电极131和所述第二子电极132相互绝缘；所述第一方向和所述第二方向相交。
在至少一个实施例中，所述透明绝缘层16的材料可以包括复合材料。当然，本发明实施例不做限定，透明绝缘层16还可以采用其他材料，只要能够使透明绝缘层16实现在作用于其上的电压大于预设电压的情况下为导体，在作用于其上的电压小于预设电压的情况下为绝缘体即可。
需要说明的是，不对所述第一透明电极12和第二透明电极13形成的先后顺序进行限定，例如，可以先形成所述第二透明电极13，后形成所述第一透明电极12。
此外，由于在作用于所述透明绝缘层16的电压大于预设电压的情况下，所述透明绝缘层16为导体，而该透明绝缘层16与所述第二透明电极13接触，因此，本领域技术人员应该知道，当位于所述透明绝缘层16上方或下方的图案层例如源漏金属层的材料为导电材料，且第二透明电极13不与该图案层电连接时，则需在该导电图案层和所述透明绝缘层16之间形成例如二氧化硅和/或氮化硅材料的完全绝缘层。
本发明实施例通过在显示时间段内，向第二透明电极13的第一子电极131和第二子电极132同时加载公共电极信号，在触控时间段内，向第一子电极131和第二子电极132加载驱动信号和感应信号，来使该阵列基板具有显示和触控功能；在此基础上，由于在第二透明电极13一侧形成有与所述第二透明电极13接触的透明绝缘层16，而所述透明绝缘层16具有高阻性和导电性，即当一个相对较小例如几伏特的电压作用于所述透明绝缘层16时，其 呈现绝缘性，当一个相对较大例如几十伏特的电压作用于所述透明绝缘层16时，其呈现导电性，因而，当在第二透明电极13的某条第一子电极131或第二子电极132上累积了大量电荷时，大量电荷产生的电压作用于所述透明绝缘层16时，会使所述透明绝缘层16呈导电性，从而使整个第二透明电极13导通，并将上述大量电荷散布到第二透明电极13的其他部分，进而可以避免因电荷不平衡而产生噪声、视觉伪像和触控不灵敏等问题。
在一个实施例中，参考图6和图7所示，在所述显示区域01和所述周边区域02均形成有所述透明绝缘层16；在此情况下，所述方法还包括：在周边区域02形成与所述透明绝缘层16接触的第一金属线17，所述第一金属线17接地。这样，累积在第二透明电极13上的电荷还可以通过所述透明绝缘层16流向所述第一金属线17，进而接地。
这里，可以设计周边区域，使所述第一金属线17接地，在此不再赘述。此外，不对第一金属线17具体形成于哪层进行限定。
在一个实施例中，参考图3-图5所示，形成所述第二透明电极13可以包括：沿第一方向形成多排第一子电极131，每排的所述第一子电极131包括多个相互绝缘的第一子电极片段131a；沿第二方向形成多排第二子电极132，每排的第二子电极132为一个直接电连接的整体；沿第一方向位于每排的任意相邻两个所述第一子电极片段131a被沿第二方向的一排所述第二子电极132隔开。在此基础上，所述方法还包括形成用于连接每排的所述第一子电极片段131a的第二金属线18。
在至少一个实施例中，所述第一方向和第二方向垂直。在此情况下，参考图3所示，在所述第一方向与栅线14同方向的情况下，例如所述第二金属线18与所述栅线14通过同一次构图工艺形成；参考图5所示，在所述第一方向与数据线15同方向的情况下，例如所述第二金属线18与所述数据线14通过同一次构图工艺形成。
基于上述实施例，在至少一个实施例中，所述复合材料为包括碳纳米管的复合材料或包括石墨烯的复合材料。
由于碳纳米管和石墨烯均具有良好的导电性能，因此通过调节所述碳纳米管或所述石墨烯的掺杂量，可以调节由该复合材料形成的透明绝缘层16的电阻率，从而可以控制在所述透明绝缘层16呈导体特性时作用于其上的电 压值。
本发明的至少一个实施例中，所述透明绝缘层16的电阻率可以为大于或等于103ohmm，小于或等于106ohmm。
当然，本发明实施例提供的阵列基板的制备方法还可以包括在第一透明电极上形成钝化层等步骤，此处不做赘述。
本发明的至少一个实施例还提供一种触控显示装置，其包括上述的阵列基板。
在本发明实施例中，在显示时间段内，通过向所述阵列基板的第二透明电极13的第一子电极131和第二子电极132同时加载公共电极信号，以与所述第一透明电极12配合驱动液晶实现显示功能；在触控时间段内，通过向第一子电极131和第二子电极132加载驱动信号和感应信号，以实现触控功能。
所述显示装置可以为液晶显示器、电视、数码相机、手机、平板电脑等任何具有显示功能的产品或者部件。
以上所述仅是本发明的示范性实施方式，而非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。
本申请要求于2014年7月8日递交的中国专利申请第201410323275.9号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (12)

  1. 一种阵列基板，包括显示区域和周边区域，其中，
    所述显示区域包括设置在衬底基板上的多个薄膜晶体管、与所述薄膜晶体管的漏极电连接的第一透明电极、第二透明电极，以及与所述第二透明电极接触的透明绝缘层；
    所述透明绝缘层在作用于所述透明绝缘层的电压大于预设电压的情况下为导体，在作用于所述透明绝缘层的电压小于所述预设电压的情况下为绝缘体；
    所述第二透明电极包括沿第一方向排成多排的第一子电极、以及沿第二方向排成多排的第二子电极；
    不同排所述第一子电极之间相互绝缘，不同排所述第二子电极之间相互绝缘，且所述第一子电极和所述第二子电极相互绝缘；
    所述第一方向和所述第二方向相交。
  2. 根据权利要求1所述的阵列基板，其中，所述透明绝缘层延伸到所述周边区域；
    位于所述周边区域的所述透明绝缘层与接地的第一金属线接触。
  3. 根据权利要求1或2所述的阵列基板，其中，所述透明绝缘层的材料包括复合材料。
  4. 根据权利要求3所述的阵列基板，其中，所述复合材料为包括碳纳米管的复合材料或包括石墨烯的复合材料。
  5. 根据权利要求1-4任一所述的阵列基板，其中，
    沿第一方向位于每排的所述第一子电极包括多个相互绝缘的第一子电极片段，沿第二方向位于每排的所述第二子电极为一个直接电连接的整体；位于每排的任意相邻的两个所述第一子电极片段被一排所述第二子电极隔开；
    所述阵列基板还包括用于连接每排的所述第一子电极片段的第二金属线。
  6. 根据权利要求1-5任一所述的阵列基板，其中，所述第一方向和第二方向垂直。
  7. 根据权利要求6所述的阵列基板，其中，在所述第一方向与栅线同方 向的情况下，所述第二金属线与所述栅线同层设置；
    在所述第一方向与数据线同方向的情况下，所述第二金属线与所述数据线同层设置。
  8. 一种阵列基板的制备方法，其中，所述阵列基板包括显示区域和周边区域，所述方法包括：
    在显示区域形成位于衬底基板上的多个薄膜晶体管、与所述薄膜晶体管的漏极电连接的第一透明电极、第二透明电极，以及与所述第二透明电极接触的透明绝缘层；其中，
    所述透明绝缘层在作用于所述透明绝缘层的电压大于预设电压的情况下为导体，在作用于所述透明绝缘层的电压小于所述预设电压的情况下为绝缘体；
    所述第二透明电极包括沿第一方向排成多排的第一子电极、以及沿第二方向排成多排的第二子电极；
    不同排所述第一子电极之间相互绝缘，不同排所述第二子电极之间相互绝缘，且所述第一子电极和所述第二子电极相互绝缘；
    所述第一方向和所述第二方向相交。
  9. 根据权利要求8所述的方法，其中，形成所述透明绝缘层包括：在所述显示区域和所述周边区域均形成所述透明绝缘层；
    所述方法还包括：在周边区域形成与所述透明绝缘层接触的第一金属线；其中，所述第一金属线接地。
  10. 根据权利要求8或9所述的方法，其中，所述透明绝缘层的材料包括复合材料。
  11. 根据权利要求10所述的方法，其中，所述复合材料为包括碳纳米管的复合材料或包括石墨烯的复合材料。
  12. 一种触控显示装置，包括权利要求1-7任一项所述的阵列基板。
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US20130306361A1 (en) * 2012-05-15 2013-11-21 Samsung Electro-Mechanics Co., Ltd. Transparent electrode and electronic material comprising the same
CN104103647A (zh) * 2014-07-08 2014-10-15 京东方科技集团股份有限公司 一种阵列基板及制备方法、触控显示装置

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