WO2015180345A1 - 一种阵列基板及其制备方法、电容式内嵌触摸屏 - Google Patents

一种阵列基板及其制备方法、电容式内嵌触摸屏 Download PDF

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WO2015180345A1
WO2015180345A1 PCT/CN2014/087791 CN2014087791W WO2015180345A1 WO 2015180345 A1 WO2015180345 A1 WO 2015180345A1 CN 2014087791 W CN2014087791 W CN 2014087791W WO 2015180345 A1 WO2015180345 A1 WO 2015180345A1
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line
touch
parallel
layer
disposed
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PCT/CN2014/087791
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English (en)
French (fr)
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龙跃
高永益
黄炜赟
王杨
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Publication of WO2015180345A1 publication Critical patent/WO2015180345A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an array substrate and a method for fabricating the same, and a capacitive in-cell touch panel.
  • the capacitive touch screen has become the mainstream touch screen because of its thinner, higher transmittance, more stable stability, and support for multi-touch.
  • the in-cell mode can make the capacitive touch screen thinner and the light transmittance higher.
  • the touch portion and the display portion of the capacitive touch screen often require time-division driving, signal loading becomes an important factor that restricts touch and display performance.
  • the capacitive in-cell touch panel includes a touch driving electrode layer and a touch sensing electrode layer.
  • the touch driving electrode layer includes a plurality of touch driving electrodes Tx
  • the touch sensing electrode layer includes a plurality of touch sensing electrodes.
  • the touch sensing electrode Rx and the touch driving electrode Tx are arranged in a cross.
  • the touch sensing electrode Rx and the touch driving electrode Tx are both made of indium tin oxide (ITO). Since the resistance of the ITO itself is large and the ITO layer is thin during the actual deposition, the touch sensing electrode Rx and the touch driving electrode Tx made of ITO generally have a large impedance, and the touch portion and the display portion are time-divided. When driving, it is easy to cause signal delay and affect technical problems such as the performance of the touch screen.
  • the present disclosure provides an array substrate and a method for fabricating the same, and a capacitive in-cell touch panel, which can reduce the production cost and the yield risk in the production process while improving the touch performance.
  • an embodiment of the present disclosure provides an array substrate including a signal line layer and a touch electrode layer, wherein the signal line layer includes a plurality of signal lines arranged in parallel, and the touch electrode The layer includes a plurality of touch electrodes disposed in parallel; wherein the array substrate further includes:
  • a conductive line disposed in the same material layer as the signal line, wherein all or part of the plurality of touch electrodes are connected in parallel with the conductive line.
  • the conductive line is connected in parallel with the corresponding touch electrode through at least two via holes.
  • the touch electrode layer is a touch driving electrode layer or a touch sensing electrode layer.
  • the touch electrode layer is a cross-insulating touch driving electrode layer and a touch sensing electrode layer.
  • the signal line layer is at least one of the following: a gate line layer and a data line layer.
  • the conductive line includes at least one of the following: a first conductive line disposed in the same layer as the gate line and parallel to the gate line, and the same material as the gate line is disposed in the same material and the gate line a second second conductive line, a third conductive line disposed in the same material as the data line and parallel to the data line, and a fourth conductive line disposed in the same material as the data line and perpendicular to the data line.
  • the signal line layer is a transparent conductive electrode layer
  • the transparent conductive electrode layer is a common electrode layer or a pixel electrode layer.
  • the present disclosure further provides a method for fabricating an array substrate, comprising the steps of forming a touch electrode layer, the touch electrode layer comprising a plurality of touch electrodes disposed in parallel, the method further comprising:
  • a step of forming a conductive line wherein the conductive line is formed of the same material as the signal line on the signal line layer of the array substrate, and all or part of the plurality of touch electrodes are electrically conductive Lines are connected in parallel.
  • the method further includes:
  • the conductive line includes at least one of the following: a first conductive line disposed in the same layer as the gate line and parallel to the gate line, and the same material as the gate line is disposed in the same material and the gate line a second second conductive line, a third conductive line disposed in the same material as the data line and parallel to the data line, and a fourth conductive line disposed in the same material as the data line and perpendicular to the data line.
  • the present disclosure also provides a capacitive in-cell touch screen comprising the above array substrate.
  • a conductive line connected in parallel with the touch electrode is disposed on the array substrate, thereby avoiding the touch electrode
  • the signal delay improves the touch performance, and the conductive lines are disposed in the same layer as the signal lines of the array substrate, which can minimize the production cost and the yield risk in the production process.
  • FIG. 1 is a schematic structural view of an array substrate according to Embodiment 1 of the present disclosure.
  • FIG. 2 is a schematic structural view of an array substrate according to Embodiment 2 of the present disclosure.
  • FIG. 3 is a schematic structural diagram of an array substrate according to Embodiment 3 of the present disclosure.
  • FIG. 4 is a schematic structural view of an array substrate according to Embodiment 4 of the present disclosure.
  • FIG. 5 is a schematic structural diagram of an array substrate according to Embodiment 5 of the present disclosure.
  • An embodiment of the present disclosure provides an array substrate, including: a signal line layer and a touch electrode layer, wherein the signal line layer includes a plurality of signal lines arranged in parallel, and the touch electrode layer includes a plurality of touches arranged in parallel Control electrode.
  • the touch electrode is usually made of a material having a large resistance such as ITO, and thus is likely to cause signal delay and affect touch performance.
  • the array substrate further includes: a conductive line disposed in the same material as the signal line, wherein all or part of the plurality of touch electrodes and the conductive line in parallel.
  • the touch electrodes are connected in parallel with the conductive lines, the overall impedance is reduced, thereby avoiding signal delay of the touch electrodes and improving touch performance, and the conductive lines are the same as the signal lines of the array substrate. Material settings minimize production costs and yield risks during production.
  • the signal line layer may be at least one of a gate line layer and a data line layer, the gate line layer includes a plurality of parallelly arranged gate lines, and the data line layer includes a plurality of data lines arranged in parallel,
  • the gate line is disposed to intersect with the data line, and the conductive line may be disposed in the same material as the gate line or the data line.
  • the signal line layer may also be a transparent conductive electrode layer (common electrode layer or pixel electrode layer), the transparent conductive electrode layer includes a plurality of transparent conductive electrodes disposed in parallel, and the conductive lines may be disposed in the same material as the transparent conductive electrodes.
  • the transparent conductive electrode is usually made of ITO material.
  • the conductive line may include at least one of the following: a first conductive line disposed in the same material as the gate line and parallel to the gate line, and a second material disposed in the same layer as the gate line and perpendicular to the gate line Conductive wire, a third conductive line disposed in the same layer as the data line and parallel to the data line, and a fourth conductive line disposed in the same material as the data line and perpendicular to the data line.
  • the conductive lines connected in parallel with the touch electrodes may be disposed, wherein one or more conductive lines connected in parallel with one touch electrode may be disposed.
  • the conductive line is also made of an opaque metal.
  • the number of the conductive lines may be appropriately reduced. That is, for the plurality of touch electrodes on the touch electrode layer, the conductive lines connected in parallel with the touch electrodes may be disposed, and the remaining portions are touched. The electrodes are not configured.
  • one or more conductive lines connected in parallel with the touch electrode may be disposed.
  • only one of the touch electrodes may be provided with a parallel conductive line.
  • the aperture ratio of the display panel can be increased by reducing the line width of the conductive line, but at the same time, it is necessary to ensure that the impedance of the touch electrode in parallel with the conductive line can be minimized.
  • the conductive line may be connected in parallel with the corresponding touch electrode through at least two via holes.
  • the touch-control electrode layer may be the touch-control electrode layer or the touch-sensing electrode layer.
  • the array substrate in the embodiment of the present disclosure may also include two insulatively disposed touch electrode layers, wherein one of the touch electrode layers is a touch driving electrode layer, and the other of the touch electrode layers is a touch Control the sensing electrode layer.
  • the touch driving electrode layer includes a plurality of touch driving electrodes (Tx) arranged in parallel, and the touch sensing electrode layer includes a plurality of parallel sensing touch electrodes (Rx), wherein the touch driving electrodes and the touch sensing electrodes Cross settings.
  • the working principle of the touch driving electrode and the touch sensing electrode is as follows: when the touch scan signal is loaded on the touch driving electrode, the touch sensing signal coupled by the sensing capacitor is detected, and in the process, the human body is When the touch screen is touched, the human body electric field acts on the sensing capacitor, so that the capacitance value of the sensing capacitor changes, thereby changing the touch sensing signal coupled by the touch sensing electrode, and the contact can be determined according to the change of the touch sensing signal. position.
  • FIG. 1 is a schematic structural diagram of an array substrate according to Embodiment 1 of the present disclosure.
  • the array substrate includes: a gate line layer including a plurality of gate lines 101 disposed in parallel, a data line layer including a plurality of data lines 102 disposed in parallel, and a touch driving electrode layer including a plurality of touch driving electrodes 103 disposed in parallel.
  • the gate line 101 and the data line 102 are perpendicularly disposed, and the touch driving electrode 103 is parallel to the gate line 101.
  • the array substrate further includes: a first conductive line 104 disposed in the same material as the gate line 101, and the first conductive line 104 is disposed in parallel with the gate line 101. That is, it is also disposed in parallel with the touch driving electrode 103.
  • a first conductive line 104 is formed on the side of each gate line 101, and one touch drive electrode 103 is connected in parallel with the two first conductive lines 104.
  • all of the touch driving electrodes 103 are disposed with the first conductive lines 104 connected in parallel.
  • FIG. 2 is a schematic structural diagram of an array substrate according to Embodiment 2 of the present disclosure.
  • the second embodiment is different from the first embodiment in that a touch driving electrode 103 is disposed with a first conductive line 104 connected in parallel therewith.
  • FIG. 3 is a schematic structural diagram of an array substrate according to Embodiment 3 of the present disclosure.
  • the array substrate includes: a gate line layer including a plurality of gate lines 101 disposed in parallel, a data line layer including a plurality of data lines 102 disposed in parallel, and a touch driving electrode layer including a plurality of touch driving electrodes 103 disposed in parallel .
  • the gate line 101 and the data line 102 are perpendicularly disposed, the touch driving electrode 103 is parallel to the gate line 101, and the touch driving electrode 103 is perpendicular to the data line 102.
  • the array substrate further includes: a third conductive line 106 disposed in the same material as the data line 102, the third conductive line 106 being disposed in parallel with the data line 102, That is, the third conductive line 106 is disposed perpendicular to the touch driving electrode 103.
  • the third conductive lines 106 between the different touch driving electrodes 103 on the same data line 102 side are not connected. Ben In the embodiment, all of the touch driving electrodes 103 are disposed with a plurality of third conductive lines 106 connected in parallel therewith.
  • FIG. 4 is a schematic structural diagram of an array substrate according to Embodiment 4 of the present disclosure.
  • the array substrate includes: a gate line layer including a plurality of gate lines 101 disposed in parallel, a data line layer including a plurality of data lines 102 disposed in parallel, and a touch driving electrode layer including a plurality of touch driving electrodes 103 disposed in parallel .
  • the gate line 101 and the data line 102 are perpendicularly disposed, the touch driving electrode 103 is parallel to the gate line 101, and the touch driving electrode 103 is perpendicular to the data line 102.
  • the array substrate further includes:
  • a first conductive line 104 which is disposed in the same material as the gate line 101 and parallel to the gate line 101, and a third conductive line 106 which is disposed in the same material as the data line 102 and is parallel to the data line 102.
  • the first conductive line 104 is disposed in parallel with the gate line 101, that is, the first conductive line 104 is also disposed in parallel with the touch driving electrode 103.
  • the third conductive line 106 is disposed in parallel with the data line 102, that is, the third conductive line 106 is disposed perpendicular to the touch driving electrode 103.
  • the touch driving electrode 103 is disposed in parallel with the gate line 101 and perpendicular to the data line 102.
  • the touch driving electrode 103 can also be disposed in parallel with the data line 102, which will be described below by way of example.
  • FIG. 5 is a schematic structural diagram of an array substrate according to Embodiment 5 of the present disclosure.
  • the array substrate includes: a gate line layer including a plurality of gate lines 101 disposed in parallel, a data line layer including a plurality of data lines 102 disposed in parallel, and a touch driving electrode layer including a plurality of touch driving electrodes 103 disposed in parallel.
  • the gate line 101 and the data line 102 are perpendicularly disposed, and the touch driving electrode 103 is parallel to the data line 102.
  • the array substrate further includes: a third conductive line 106 disposed in the same material as the data line 102, the third conductive line 106 being disposed in parallel with the data line 102, That is, it is also disposed in parallel with the touch driving electrode 103.
  • a third conductive line 106 is formed on the side of each data line 102.
  • a touch driving electrode 103 is connected in parallel with the three third conductive lines 106.
  • all of the touch driving electrodes 103 are disposed with the third conductive lines 106 connected in parallel.
  • the array substrate may further include: a first conductive line disposed in the same layer as the gate line 101 and disposed in parallel with the gate line 101, or a second material disposed in the same layer as the gate line 101 and perpendicular to the gate line 101. Conductive lines are not described in detail here.
  • the touch driving electrodes 103 and the conductive lines are connected in parallel through the vias 105.
  • the touch driving electrodes 103 are disposed on the array substrate, and the touch sensing electrodes may be disposed on the array substrate or on the color filter substrate.
  • the touch driving electrodes 103 are disposed with conductive lines connected in parallel.
  • the touch sensing electrodes when the touch sensing electrodes are disposed on the array substrate, the touch sensing electrodes may be disposed in parallel with the conductive lines. In this case, the touch driving electrodes may be disposed on the array substrate. It can also be disposed on a color film substrate.
  • parallel conductive lines may be disposed for the touch driving electrode and the touch sensing electrode at the same time.
  • a conductive line disposed in the same material as the gate line is disposed on the gate line layer, and is connected in parallel with the touch driving electrode, and a conductive line disposed on the same data layer as the data line is disposed on the data line layer, and the touch sensing electrode is disposed on the data line layer. in parallel.
  • the conductive lines of the gate line layer are disposed in parallel with the gate lines, and the conductive lines of the data line layer are disposed in parallel with the data lines.
  • the conductive lines on the gate line layer or the data line layer may also be disposed perpendicular to the signal lines of the layer (not connected to the signal lines), that is, the array substrate may further include: a second conductive line disposed in the same layer as the gate line and perpendicular to the gate line and/or a fourth conductive line disposed in the same material as the data line and perpendicular to the data line.
  • the signal lines in the same layer as the conductive lines are illustrated by taking a gate line or a data line as an example.
  • the signal line in the same layer as the conductive line may also be a transparent conductive electrode.
  • the embodiment of the present disclosure further provides a capacitive in-cell touch panel, including the array substrate described in any of the above embodiments.
  • a capacitive in-cell touch panel including the array substrate described in any of the above embodiments.
  • the structure and working principle of the array substrate included in the capacitive in-cell touch panel refer to the foregoing embodiment, and details are not described herein again.
  • the structure of other parts of the capacitive in-cell touch screen can refer to the prior art, which will not be described in detail herein.
  • the capacitive in-cell touch screen can be used for any touch-enabled product or component such as home appliances, communication devices, engineering equipment, electronic entertainment products, and the like.
  • the embodiment of the present disclosure further provides a method for preparing an array substrate, include:
  • Step 1 forming a touch electrode layer, the touch electrode layer includes a plurality of touch electrodes disposed in parallel;
  • Step 2 forming a conductive line, wherein the conductive line is formed of the same material as the signal line on the signal line layer of the array substrate, and all or part of the plurality of touch electrodes are The conductive lines are connected in parallel.
  • the signal line layer may be at least one of a gate line layer and a data line layer, the gate line layer includes a plurality of parallelly arranged gate lines, and the data line layer includes a plurality of data lines arranged in parallel,
  • the gate line is disposed to intersect with the data line, and the conductive line may be disposed in the same material as the gate line or the data line.
  • the conductive line may include at least one of the following: a first conductive line disposed in the same material as the gate line and parallel to the gate line, and a second material disposed in the same layer as the gate line and perpendicular to the gate line a conductive line, a third conductive line disposed in the same layer as the data line and parallel to the data line, and a fourth conductive line disposed in the same material as the data line and perpendicular to the data line.
  • the signal line layer may also be a transparent conductive electrode layer (a common electrode layer or a pixel electrode layer).
  • the transparent conductive electrode layer includes a plurality of transparent conductive electrodes disposed in parallel.
  • the conductive lines may be disposed in the same layer and transparent material as the transparent conductive electrodes.
  • the conductive electrode is usually made of ITO material.
  • the method further includes the step of forming a via for connecting the conductive line and the touch electrode connected in parallel therewith.

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Abstract

一种阵列基板及其制备方法、电容式内嵌触摸屏,该阵列基板包括:信号线层及触控电极层,所述信号线层包括多条平行设置的信号线(101,102),所述触控电极层包括多条平行设置的触控电极(103);所述阵列基板还包括:与所述信号线同层同材料设置的导电线(104,106),其中,所述多条触控电极中的全部或部分触控电极(103)与所述导电线(104,106)并联。

Description

一种阵列基板及其制备方法、电容式内嵌触摸屏
相关申请的交叉参考
本申请主张在2014年05月30日在中国提交的中国专利申请号201410240451.2的优先权,其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域,尤其涉及一种阵列基板及其制备方法、电容式内嵌触摸屏。
背景技术
电容式触摸屏以其更薄、透光率更高、稳定性更强、支持多点触控等优点,成为当下主流的触摸屏。其中,内嵌(In-cell)模式可以让电容式触摸屏更薄,透光率更高。但是由于电容式触摸屏的触控部分和显示部分往往需要分时驱动,因此信号延迟(loading)成为制约触控和显示性能的重要因素。
电容式内嵌触摸屏包括通常包含绝缘设置的触控驱动电极层和触控感应电极层,其中,触控驱动电极层包括多条触控驱动电极Tx,触控感应电极层包括多条触控感应电极Rx。触控感应电极Rx和触控驱动电极Tx交叉设置,通常情况下,触控感应电极Rx和触控驱动电极Tx都是由铟锡金属氧化物(ITO,Indium Tin Oxides)所构成。由于ITO本身的电阻较大,加上实际沉积时ITO层较薄,所以用ITO制成的触控感应电极Rx和触控驱动电极Tx通常阻抗都较大,在触控部分与显示部分分时驱动时,容易造成信号延迟,并且影响触摸屏的性能等技术问题。
发明内容
有鉴于此,本公开提供一种阵列基板及其制备方法、电容式内嵌触摸屏,使得能够在提高触控性能同时,降低生产成本以及生产过程中的良率风险。
为解决上述技术问题,本公开的实施例提供一种阵列基板,包括信号线层及触控电极层,所述信号线层包括多条平行设置的信号线,所述触控电极 层包括多条平行设置的触控电极;其中,所述阵列基板还包括:
与所述信号线同层同材料设置的导电线,所述多条触控电极中的全部或部分触控电极与所述导电线并联。
可选地,所述导电线通过至少两个过孔与对应的所述触控电极并联。
可选地,所述触控电极层为触控驱动电极层或触控感应电极层。
可选地,所述触控电极层为交叉绝缘设置的触控驱动电极层和触控感应电极层。
可选地,所述信号线层为下述至少一层:栅线层、数据线层。
可选地,所述导电线包括下述至少之一:与栅线同层同材料设置且与所述栅线平行的第一导电线、与栅线同层同材料设置且与所述栅线垂直的第二导电线、与数据线同层同材料设置且与所述数据线平行的第三导电线以及与数据线同层同材料设置且与所述数据线垂直的第四导电线。
可选地,所述信号线层为透明导电电极层,所述透明导电电极层为公共电极层或像素电极层。
本公开还提供一种阵列基板的制备方法,包括形成触控电极层的步骤,所述触控电极层包括多条平行设置的触控电极,所述方法还包括:
形成导电线的步骤,其中,所述导电线与所述阵列基板的信号线层上的信号线同层同材料形成,所述多条触控电极中的全部或部分触控电极与所述导电线并联。
可选地,所述方法还包括:
形成至少两个过孔的步骤,所述至少两个过孔用于连接所述导电线和与其并联的所述触控电极。
可选地,所述导电线包括下述至少之一:与栅线同层同材料设置且与所述栅线平行的第一导电线、与栅线同层同材料设置且与所述栅线垂直的第二导电线、与数据线同层同材料设置且与所述数据线平行的第三导电线以及与数据线同层同材料设置且与所述数据线垂直的第四导电线。
本公开还提供一种电容式内嵌触摸屏,包括上述阵列基板。
本公开的上述技术方案的有益效果如下:
在阵列基板上设置与触控电极并联的导电线,从而能够避免触控电极的 信号延迟,提高触控性能,并且导电线与阵列基板的信号线同层同材料设置,能够尽量降低生产成本及生产过程中的良率风险。
附图说明
图1为本公开实施例一的阵列基板的结构示意图;
图2为本公开实施例二的阵列基板的结构示意图;
图3为本公开实施例三的阵列基板的结构示意图;
图4为本公开实施例四的阵列基板的结构示意图;
图5为本公开实施例五的阵列基板的结构示意图。
具体实施方式
本公开实施例提供一种阵列基板,包括:信号线层以及触控电极层,其中,所述信号线层包括多条平行设置的信号线,所述触控电极层包括多条平行设置的触控电极。其中,所述触控电极通常由ITO等电阻较大的材料制成,因而容易造成信号延迟,影响触控性能。
为了避免信号延迟,提高触控性能,所述阵列基板还包括:与所述信号线同层同材料设置的导电线,其中,所述多条触控电极中的全部或部分与所述导电线并联。
可以理解的是,触控电极与所述导电线并联后,整体的阻抗会减小,从而能够避免触控电极的信号延迟,提高触控性能,并且导电线与阵列基板的信号线同层同材料设置,能够尽量降低生产成本及生产过程中的良率风险。
所述信号线层可以为栅线层和数据线层中的至少一层,所述栅线层包括多条平行设置的栅线,所述数据线层包括多条平行设置的数据线,所述栅线与所述数据线交叉设置,导电线可以与栅线或数据线同层同材料设置。
所述信号线层还可以为透明导电电极层(公共电极层或像素电极层),所述透明导电电极层包括多条平行设置的透明导电电极,导电线可以与透明导电电极同层同材料设置,所述透明导电电极通常由ITO材质制成。
此时,所述导电线可以包括下述至少之一:与栅线同层同材料设置且与栅线平行的第一导电线、与栅线同层同材料设置且与栅线垂直的第二导电线、 与数据线同层同材料设置且与数据线平行的第三导电线以及与数据线同层同材料设置且与数据线垂直的第四导电线。
本公开实施例中,对于触控电极层上的多条触控电极,可以为全部触控电极配置与其并联的导电线,其中,可以为一条触控电极配置一条或多条与其并联的导电线。
当信号线为由不透明金属制成的栅线或数据线时,导电线也是由不透明金属制成。为了不影响显示面板的开口率,可以适当减少导电线的条数,即对触控电极层上的多条触控电极,可以为部分触控电极配置与其并联的导电线,而其余部分触控电极不配置。其中,对于需要配置导电线的触控电极,可以为一条触控电极配置一条或多条与其并联的导电线。当然,为了进一步提高显示面板的开口率,可以仅为一条触控电极配置一条其并联的导电线。
此外,还可以通过减小导电线的线宽的方式,提高显示面板的开口率,但是同时需保证能够尽量降低触控电极与导电线并联后的阻抗。
可选的,所述导电线可以通过至少两个过孔与对应的所述触控电极并联。
本公开实施例中的阵列基板上可以仅包括所述触控电极层,其中所述触控电极层可以为触控驱动电极层或触控感应电极层。
本公开实施例中的阵列基板上也可以包括两个绝缘设置的所述触控电极层,其中,一个所述触控电极层为触控驱动电极层,另一个所述触控电极层为触控感应电极层。
其中,触控驱动电极层包括多条平行设置的触控驱动电极(Tx),触控感应电极层包括多条平行设置的触控感应电极(Rx),其中触控驱动电极与触控感应电极交叉设置。
触控驱动电极及触控感应电极的工作原理如下:在对触控驱动电极加载触控扫描信号时,检测触控感应电极通过感应电容耦合出的触控感应信号,在此过程中,有人体接触触摸屏时,人体电场就会作用在感应电容上,使感应电容的电容值发生变化,进而改变触控感应电极耦合出的触控感应信号,根据触控感应信号的变化,就可以确定触点位置。
为使本公开要解决的技术问题、技术方案和优点更加清楚,下面将结合附图及具体实施例进行详细描述。
实施例一
请参考图1,图1为本公开实施例一的阵列基板的结构示意图。
该阵列基板包括:包括多条平行设置的栅线101的栅线层,包括多条平行设置的数据线102的数据线层以及包括多条平行设置的触控驱动电极103的触控驱动电极层,其中,栅线101与数据线102垂直交叉设置,触控驱动电极103与栅线101平行。
为了避免所述触控驱动电极103的信号延迟,所述阵列基板还包括:与栅线101同层同材料设置的第一导电线104,所述第一导电线104与栅线101平行设置,即也与触控驱动电极103平行设置。
从图1中可以看出,每一栅线101的旁侧均形成有第一导电线104,一条触控驱动电极103与两条第一导电线104并联。本实施例中,全部触控驱动电极103均配置有并联的第一导电线104。
实施例二
当栅线101由不透明金属制成时,第一导电线104也是由不透明金属制成。为了不影响显示面板的开口率,可以适当减少第一导电线104的条数。请参考图2,图2为本公开实施例二的阵列基板的结构示意图。该实施例二与实施例一相比,不同之处在于,一触控驱动电极103配置一条与其并联的第一导电线104。
实施例三
请参考图3,图3为本公开实施例三的阵列基板的结构示意图。
该阵列基板包括:包括多条平行设置的栅线101的栅线层,包括多条平行设置的数据线102的数据线层以及包括多条平行设置的触控驱动电极103的触控驱动电极层。其中,栅线101与数据线102垂直交叉设置,触控驱动电极103与栅线101平行,触控驱动电极103与数据线102垂直。
为了避免所述触控驱动电极103的信号延迟,所述阵列基板还包括:与数据线102同层同材料设置的第三导电线106,所述第三导电线106与数据线102平行设置,即第三导电线106与触控驱动电极103垂直设置。
从图3中可以看出,为了避免不同的触控驱动电极103连接,位于同一数据线102一侧的不同触控驱动电极103之间的第三导电线106不连接。本 实施例中,全部触控驱动电极103均配置有多条与其并联的第三导电线106。
实施例四
请参考图4,图4为本公开实施例四的阵列基板的结构示意图。
该阵列基板包括:包括多条平行设置的栅线101的栅线层,包括多条平行设置的数据线102的数据线层以及包括多条平行设置的触控驱动电极103的触控驱动电极层。其中,栅线101与数据线102垂直交叉设置,触控驱动电极103与栅线101平行,触控驱动电极103与数据线102垂直。
为了避免所述触控驱动电极103的信号延迟,所述阵列基板还包括:
与栅线101同层同材料设置且与栅线101平行的第一导电线104,以及与数据线102同层同材料设置且与数据线102平行的第三导电线106。
其中,所述第一导电线104与栅线101平行设置,即所述第一导电线104也与触控驱动电极103平行设置。所述第三导电线106与数据线102平行设置,即所述第三导电线106与触控驱动电极103垂直设置。
上述各实施例中,触控驱动电极103与栅线101平行设置,与数据线102垂直设置。当然,触控驱动电极103也可以与数据线102平行设置,下面举例进行说明。
实施例五
请参考图5,图5为本公开实施例五的阵列基板的结构示意图。
该阵列基板包括:包括多条平行设置的栅线101的栅线层,包括多条平行设置的数据线102的数据线层以及包括多条平行设置的触控驱动电极103的触控驱动电极层,其中,栅线101与数据线102垂直交叉设置,触控驱动电极103与数据线102平行。
为了避免所述触控驱动电极103的信号延迟,所述阵列基板还包括:与数据线102同层同材料设置的第三导电线106,所述第三导电线106与数据线102平行设置,即也与触控驱动电极103平行设置。
从图中可以看出,每一数据线102的旁侧均形成有第三导电线106。本实施例中,一触控驱动电极103与三条第三导电线106并联。本实施例中,全部触控驱动电极103均配置有并联的第三导电线106。
此外,当触控驱动电极103与数据线102平行设置时,本公开实施例的 阵列基板还可以包括:与栅线101同层同材料设置的且与栅线101平行设置的第一导电线,或与栅线101同层同材料设置的且与栅线101垂直设置的第二导电线,在此不再详细描述。
上述各实施例中,触控驱动电极103与导电线均是通过过孔105并联。
上述实施例一至实施例五中,触控驱动电极103设置于阵列基板上,触控感应电极可以设置于阵列基板上,也可以设置于彩膜基板上。
上述实施例一至实施例五中,均是为触控驱动电极103配置与其并联的导电线。而在本公开的其他实施例中,当触控感应电极设置于阵列基板上时,也可以为触控感应电极配置与其并联的导电线,此时,触控驱动电极可以设置于阵列基板上,也可以设置于彩膜基板上。
另外,当触控驱动电极和触控感应电极均设置于阵列基板上时,也可以同时为触控驱动电极和触控感应电极配置并联的导电线。例如,在栅线层上配置与栅线同层同材料设置的导电线,与触控驱动电极并联,在数据线层上配置与数据线同层同材料设置的导电线,与触控感应电极并联。
上述实施例一至实施例五中,在栅线层的导电线均与栅线平行设置,在数据线层的导电线与数据线平行设置。当然,在本公开的其他实施例中,在栅线层或数据线层的导电线也可以与该层的信号线垂直设置(不要与信号线连接即可),即,阵列基板还可以包括:与栅线同层同材料设置且与栅线垂直的第二导电线和/或与数据线同层同材料设置且与数据线垂直的第四导电线。
上述实施例一至实施例五中,与导电线同层的信号线均以栅线或数据线为例进行说明。当然,在本公开的其他实施例中,与导电线同层的信号线也可以为透明导电电极。
本公开实施例还提供一种电容式内嵌触摸屏,包括上述任一实施例中所述的阵列基板。其中,所述电容式内嵌触摸屏所包括的阵列基板的结构以及工作原理请参见上述实施例,在此不再赘述。另外,电容式内嵌触摸屏的其他部分的结构可以参考现有技术,对此本文不再详细描述。该电容式内嵌触摸屏可以用于家用电器、通信设备、工程设备、电子娱乐产品等任何具有触摸功能的产品或部件。
对应于上述阵列基板,本公开实施例还提供一种阵列基板的制备方法, 包括:
步骤一:形成触控电极层的步骤,所述触控电极层包括多条平行设置的触控电极;
步骤二:形成导电线的步骤,其中,所述导电线与所述阵列基板的信号线层上的信号线同层同材料形成,所述多条触控电极中的全部或部分触控电极与所述导电线并联。
所述信号线层可以为栅线层和数据线层中的至少一层,所述栅线层包括多条平行设置的栅线,所述数据线层包括多条平行设置的数据线,所述栅线与所述数据线交叉设置,导电线可以与栅线或数据线同层同材料设置。
此时,所述导电线可以包括下述至少之一:与栅线同层同材料设置且与栅线平行的第一导电线、与栅线同层同材料设置且与栅线垂直的第二导电线、与数据线同层同材料设置且与数据线平行的第三导电线以及与数据线同层同材料设置且与数据线垂直的第四导电线。
所述信号线层还可以为透明导电电极层(公共电极层或像素电极层),透明导电电极层包括多条平行设置的透明导电电极,导电线可以与透明导电电极同层同材料设置,透明导电电极通常由ITO材质制成。
可选的,所述方法还包括:形成过孔的步骤,所述过孔用于连接所述导电线和与其并联的所述触控电极。
以上所述是本公开的可选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本公开所述原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本公开的保护范围。

Claims (11)

  1. 一种阵列基板,包括信号线层及触控电极层,所述信号线层包括多条平行设置的信号线,所述触控电极层包括多条平行设置的触控电极;其中,所述阵列基板还包括:
    与所述信号线同层同材料设置的导电线,所述多条触控电极中的全部或部分触控电极与所述导电线并联。
  2. 根据权利要求1所述的阵列基板,其中,所述导电线通过至少两个过孔与对应的所述触控电极并联。
  3. 根据权利要求1所述的阵列基板,其中,所述触控电极层为触控驱动电极层或触控感应电极层。
  4. 根据权利要求1所述的阵列基板,其中,所述触控电极层为交叉绝缘设置的触控驱动电极层和触控感应电极层。
  5. 根据权利要求1至4中任一项所述的阵列基板,其中,所述信号线层为下述至少一层:栅线层、数据线层。
  6. 根据权利要求1所述的阵列基板,其中,所述导电线包括下述至少之一:与栅线同层同材料设置且与所述栅线平行的第一导电线、与栅线同层同材料设置且与所述栅线垂直的第二导电线、与数据线同层同材料设置且与所述数据线平行的第三导电线以及与数据线同层同材料设置且与所述数据线垂直的第四导电线。
  7. 根据权利要求1至4中任一项所述的阵列基板,其中,所述信号线层为透明导电电极层,所述透明导电电极层为公共电极层或像素电极层。
  8. 一种阵列基板的制备方法,包括形成触控电极层的步骤,其中所述触控电极层包括多条平行设置的触控电极,
    其中,所述方法还包括:
    形成导电线的步骤,其中,所述导电线与所述阵列基板的信号线层上的信号线同层同材料形成,所述多条触控电极中的全部或部分触控电极与所述导电线并联。
  9. 根据权利要求8所述的阵列基板的制备方法,其中,还包括:
    形成至少两个过孔的步骤,所述至少两个过孔用于连接所述导电线和与其并联的所述触控电极。
  10. 根据权利要求8所述的阵列基板的制备方法,其中,所述导电线包括下述至少之一:与栅线同层同材料设置且与所述栅线平行的第一导电线、与栅线同层同材料设置且与所述栅线垂直的第二导电线、与数据线同层同材料设置且与所述数据线平行的第三导电线以及与数据线同层同材料设置且与所述数据线垂直的第四导电线。
  11. 一种电容式内嵌触摸屏,其中,包括如权利要求1至7中任一项所述的阵列基板。
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