WO2015155906A1 - メモリの温度上昇を抑制するための装置およびプログラム - Google Patents
メモリの温度上昇を抑制するための装置およびプログラム Download PDFInfo
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/16—Protection against loss of memory contents
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
Definitions
- the present invention relates to a technique for suppressing a temperature rise of a memory that generates heat as data is read and written.
- Patent Document 1 As a technique for suppressing thermal runaway of a semiconductor memory, for example, in Patent Document 1, when a temperature measured in a semiconductor device reaches a threshold in a semiconductor device having a static memory cell, it is applied to a memory module. A technique has been proposed in which the semiconductor device is prevented from becoming too hot by reducing the voltage.
- a highly integrated memory can be realized by stacking a plurality of memory modules. As described above, when a plurality of memory modules are stacked, heat dissipation from the heat generated by each memory module when reading and writing data is hindered by adjacent objects, and therefore, the temperature tends to be locally high.
- an object of the present invention is to prevent a memory including a plurality of stacked memory modules from becoming high temperature as data is read and written.
- the present invention provides a request acquisition unit for acquiring a data write request and a plurality of memory modules stacked in response to the write request within a predetermined time.
- a selection unit that selects a write destination memory module so that two or more memory modules that write data are not adjacent to each other, and in response to the write request, instructs to write data to the memory module selected by the selection unit
- a device including a writing instruction unit is proposed as a first embodiment.
- the selection unit includes a memory module that is a write destination so that two or more memory modules that simultaneously write data are not adjacent to each other from the plurality of memory modules.
- the configuration of selecting is proposed as the second embodiment.
- the selection unit selects a first memory module to which data is to be written at a first write timing from the plurality of memory modules.
- a memory module that is not adjacent to the first memory module is selected as a second memory module to which data is to be written at a second write timing that is a write timing next to the first write timing.
- the configuration of selecting is proposed as a third embodiment.
- a plurality of pieces of data for identifying one or more memory modules selected from the plurality of memory modules are arranged in time series.
- a configuration is proposed as a fourth embodiment in which a selection data acquisition unit that acquires selection data is provided, and the selection unit selects the memory module of the writing destination according to the selection data.
- the present invention provides an identification data acquisition unit for acquiring identification data for identifying a usable memory module among the plurality of memory modules, and an identification data output for outputting the identification data.
- the selection data acquisition unit proposes a configuration in which the selection data input as a response to the output of the identification data is acquired as a fifth embodiment.
- the present invention further includes a temperature data acquisition unit that acquires temperature data indicating temperatures measured at representative points of the plurality of memory modules, and the selection
- the section proposes, as a sixth embodiment, a configuration in which the number of two or more memory modules to which data is written within the predetermined time is changed according to the temperature indicated by the temperature data.
- the present invention proposes, as a seventh embodiment, a configuration in which any one of the first to sixth embodiments includes the plurality of memory modules.
- the process of selecting one or more memory modules that simultaneously write data from a plurality of stacked memory modules and the process of writing data to the selected one or more memory modules are repeatedly executed.
- a temperature estimation unit that calculates an estimated value of each of the plurality of memory modules, and one or more memory modules that simultaneously write data based on the estimated temperature value calculated by the temperature estimation unit.
- a memory module is selected such that a representative value of the estimated temperatures of the plurality of memory modules is lower than when a memory module is selected at random, and the selected one or more memory modules are identified.
- Select data that is arranged in time series in the order of selection. It proposes a device and a selection data generator for a eighth embodiment.
- the present invention further includes an identification data acquisition unit that acquires identification data for identifying a usable memory module among the plurality of memory modules, and the selection data generation unit includes: A configuration of generating selection data for identifying a memory module selected from among usable memory modules identified by the identification data is proposed as a ninth embodiment.
- an identification data acquisition unit for acquiring identification data for identifying a usable memory module among a plurality of stacked memory modules, and a usable memory module for identifying the identification data.
- the estimated value of the temperature of each of the usable memory modules when the process of selecting one or more memory modules to which data is simultaneously written and the process of writing data to the selected one or more memory modules is repeatedly executed.
- a program for selecting a memory module and functioning as a selection data generation unit that generates a plurality of pieces of data for identifying the selected one or more memory modules, and selection data that is data arranged in time series according to the selection order This is proposed as a tenth embodiment.
- the probability that data is read / written from / to two memory modules adjacent to each other at the same time or close to each other decreases, local high-temperature spots are unlikely to occur in the memory.
- FIG. 1 is an external view of a data storage system according to an embodiment.
- storage device concerning one Embodiment is provided.
- storage device concerning one Embodiment is provided.
- the figure which illustrated arrangement of a memory module selected as a data writing place in a storage device concerning one embodiment The figure which illustrated the composition of selection data which the storage concerning a modification is used.
- storage device concerning one modification is provided.
- FIG. 1 is a diagram showing the appearance of the data storage system 1.
- the data storage system 1 includes a data processing device 11 serving as a host such as a CPU provided in a computer, and a storage device 12 that reads and writes data in response to a request from the data processing device 11.
- FIG. 2 is a diagram showing a physical configuration of the storage device 12.
- the storage device 12 includes three memory boards, a memory board 121, a memory board 122, and a memory board 123, an interface 124 that exchanges data between the three memory boards and the data processing device 11, and these A housing 125 that accommodates the three memory boards and the interface 124.
- power required for the operation of the storage device 12 is supplied from a power supply device (not shown) via the interface 124.
- the number of memory boards included in the storage device 12 is not limited to three, and may be any number as long as the storage device 12 includes a plurality of memory modules 1201 stacked.
- Each of the memory board 121, the memory board 122, and the memory board 123 performs control such as reading / writing of data with respect to the plurality of memory modules 1201 and the memory modules 1201 included in each memory board, and identification of the defective memory module 1201 2.
- Data processing devices 1202 are provided.
- the memory module 1201 is a flash memory, for example.
- the memory module 1201 may be any type of memory as long as the memory module 1201 generates heat as data is read and written.
- the data processing device 1202 is configured by, for example, a CPLD.
- the data processing device 1202 may be any type of data processing device as long as it is a data processing device that controls the memory module 1201 provided in the same memory board.
- the two data processing devices 1202 included in each of the memory board 121, the memory board 122, and the memory board 123 include a memory module 1201 disposed on one surface of these memory boards and a memory module 1201 on the other surface. Each of the memory modules 1201 disposed in the memory is controlled. Note that the number of data processing devices 1202 provided in one memory board is not limited to two. For example, one data processing device 1202 controls all the memory modules 1201 arranged on either side of the memory board. Also good.
- the memory board 122 includes a data processing device 1203 that controls reading and writing of data with respect to the plurality of memory modules 1201 included in the memory board 121, the memory board 122, and the memory board 123, and a memory that stores data used by the data processing device 1203. 1204.
- the data processing device 1203 instructs the data processing device 1202 of the memory board 121, the memory board 122, or the memory board 123 to read / write data. Any one of the data processing devices 1202 reads and writes data in accordance with an instruction from the data processing device 1203.
- the data processing device 1203 is configured by, for example, an FPGA. However, the data processing device 1203 may be any type of data processing device as long as it is a data processing device that instructs reading / writing of data to / from the plurality of memory modules 1201 provided in the plurality of memory boards.
- the memory 1204 is an EPROM. However, the memory 1204 may be any type of memory as long as it stores data used by the data processing device 1203.
- FIG. 3 is a diagram showing an arrangement of the memory module 1201 and the data processing device 1202 provided in each of the memory board 121, the memory board 122, and the memory board 123, and the data processing device 1203 provided in the memory board 122.
- the memory board 121, the memory board 122, and the memory board 123 an upper surface in FIG.
- the upper three indicate the A side of the memory board 121, the A side of the memory board 122, and the A side of the memory board 123 from the left.
- the lower three indicate the B surface of the memory board 121, the B surface of the memory board 122, and the B surface of the memory board 123 from the left.
- the number of memory modules 1201 shown in FIG. 3 is an example, and other numbers may be adopted. Further, the arrangement of the memory module 1201, the data processing device 1202, and the data processing device 1203 illustrated in FIG. 3 is an example, and other arrangements may be adopted. In FIG. 3, the number assigned to each of the memory modules 1201 is a number for identifying each of the plurality of memory modules 1201 on the A side or the B side of each memory board.
- FIG. 4 is a view showing a cross section of the storage device 12 in a state where the memory board 121, the memory board 122, the memory board 123, and the interface 124 are accommodated in the housing 125.
- a gap of 0.5 mm is left.
- a gap of, for example, 0.5 mm is provided between the memory module 1201 on the B surface of the memory board 122 and the memory module 1201 on the A surface of the memory board 123.
- the size of these gaps is not limited to 0.5 mm.
- a heat transfer cushion material serving both as a role of promoting heat conduction to the housing 125 and as a cushioning material may be disposed.
- a heat transfer cushion material (not shown) that serves as both a role for promoting heat and a role as a cushioning material is disposed.
- FIG. 5 is a diagram illustrating a connection state between the components included in the storage device 12.
- the interface 124 is connected to the data processing device 11.
- the interface 124 receives a data read / write request from the data processing device 11, and receives the requested data from the data processing device 1203 when it receives a data read request, and delivers it to the data processing device 11.
- the data processing device 1203 is connected to each of the interface 124, the memory 1204, and the data processing device 1202.
- the data processing device 1203 selects the data write destination memory module 1201 according to the request and selects the selected write destination memory.
- the data processor 1202 that controls the module 1201 is instructed to write data.
- the data processing device 1203 receives a data read request from the data processing device 11 via the interface 124, the data processing device 1203 identifies the memory module 1201 in which data corresponding to the request is written, and identifies the identified memory module 1201.
- the data processor 1202 to be controlled is instructed to read data.
- the data processing device 1203 outputs data delivered from the data processing device 1202 to the data processing device 11 via the interface 124.
- the memory 1204 stores various data used by the data processing device 1203.
- the various data used by the data processing device 1203 include, for example, selection data (to be described later) indicating rules for selecting a memory module 1201 to which data is written, and an available memory module 1201 among the memory modules 1201 Identification data (to be described later).
- the storage device 12 includes a total of six data processing devices 1202 arranged on the A and B surfaces of the memory board 121, the memory board 122, and the memory board 123, respectively. Each of these six data processing devices 1202 is connected to a memory module 1201 arranged on the same surface of the same memory board, and controls these memory modules 1201.
- the data processing device 1202 and the memory module 1201 controlled by the data processing device 1202 are collectively referred to as a “memory unit”. Accordingly, the storage device 12 includes six memory units. However, the number of memory units included in the storage device 12 is not limited to six.
- FIG. 6 is a diagram illustrating a functional configuration of the data processing device 1203.
- the data processing device 1203 includes a selection data acquisition unit 20 that reads and acquires selection data stored in the memory 1204.
- FIG. 7 is a diagram showing a configuration example of selection data used by the storage device 12.
- the selection data is a list having a sequence number column and a write destination memory module identifier column.
- the selection data is stored in the write destination memory module identifier column in the order corresponding to the sequence number stored in the sequence number column. Indicates that data should be written to the memory module 1201 identified by each of the destination memory module identifiers.
- a format such as “1A-2” is adopted as the format of the write destination memory module identifier.
- the first digit of the write destination memory module identifier indicates the last digit of the codes of the memory board 121, the memory board 122, and the memory board 123, and indicates which memory board is the memory module 1201 arranged on the memory board. Identify.
- the second digit alphabetic character of the write destination memory module identifier identifies whether the memory module 1201 is located on the A side or B side of the memory board.
- the number following the “ ⁇ ” in the write destination memory module identifier indicates the identifier of the memory module 1201 in each memory unit (the number assigned to each memory module 1201 in FIG. 3).
- the format of the selection data is not limited to the format illustrated in FIG. 7, and any format may be adopted as long as the memory module 1201 can be identified.
- the selection data is simultaneously transmitted to the plurality of memory modules 1201 identified by these write destination memory module identifiers. Indicates that writing should be done.
- the data processing device 1203 further includes a write request acquisition unit 21 (an example of a request acquisition unit) that acquires a data write request from the data processing device 11, and a plurality of memories according to the selection data acquired by the selection data acquisition unit 20.
- a memory module selection unit 22 (an example of a selection unit) that selects a data write destination according to a write request acquired by the write request acquisition unit 21 from among the modules 1201 and the memory module selection unit 22
- a write instruction unit 23 that instructs the data processor 1202 that controls the memory module 1201 to write data is provided.
- the data processing device 1202 writes data to the designated memory module 1201 in accordance with an instruction from the write instruction unit 23.
- the write instruction unit 23 causes the memory 1204 to store mapping data in which the identifier of the data is associated with the identifier of the memory module 1201 to which the data is written for each piece of data for which the write instruction has been issued.
- the data processing device 1203 responds to the read request acquisition unit 24 that acquires a data read request from the data processing device 11 and the read request acquired by the read request acquisition unit 24 according to the mapping data stored in the memory 1204.
- a read instruction unit 25 that instructs the data processing device 1202 that controls the memory module 1201 in which data is written to read data, and the data processing device 1202 reads from the memory module 1201 in response to an instruction from the read instruction unit 25
- a read data acquisition unit 26 that acquires data and a read data output unit 27 that outputs the data acquired by the read data acquisition unit 26 to the data processing device 11 as a response to the read request acquired by the read request acquisition unit 24 are provided.
- the data processing device 1203 acquires usable memory module identification data for identifying usable memory modules 1201 among the memory modules 1201 controlled by the data processing device 1202 from each of the data processing devices 1202.
- Module identification data acquisition unit 28 an example of an identification data acquisition unit
- an available memory module identification data output unit that outputs usable memory module identification data acquired by the usable memory module identification data acquisition unit 28 to the data processing device 11 29 (an example of an identification data output unit).
- the format of the usable memory module identification data is not limited as long as it is data that identifies which of the plurality of memory modules 1201 included in the storage device 12 is usable. That is, the usable memory module identification data is not limited to directly identifying the usable memory module 1201.
- the usable memory module 1201 can be identified by identifying the unusable memory module 1201. It may be data.
- the data processing device 11 outputs the updated selection data to the storage device 12 as a response to the usable memory module identification data output from the usable memory module identification data output unit 29.
- the selection data output from the data processing device 11 is acquired by the selection data acquisition unit 20 and stored in the memory 1204. Thereafter, the selection data acquisition unit 20 reads and acquires the updated selection data from the memory 1204.
- the data processing device 11 is a device that generates selection data by performing processing according to a program stored in a data storage device (not shown in FIG. 1) such as an SSD (hereinafter referred to as “selection data generation device”). Function as.
- FIG. 8 is a diagram illustrating a functional configuration of the data processing device 11 that functions as a selection data generation device.
- the data processing device 11 includes a usable memory module identification data acquisition unit 111 that acquires usable memory module identification data output from the usable memory module identification data output unit 29 of the data processing device 1203, and usable memory module identification data.
- a temperature estimation unit that calculates an estimated value of each temperature (for example, a convergence value) of the memory module 1201 when data is continuously written to the memory module 1201 identified by the usable memory module identification data acquired by the acquisition unit 111.
- a selection data generating unit 113 for generating selection data indicating, a selection data output section 114 for outputting selection data is selection data generating unit 113 has generated for the data processing apparatus 1203.
- the temperature estimation unit 112 includes, for example, a casing 125 that constitutes the storage device 12, a substrate of each memory board, a memory module 1201 disposed on each memory board, a data processing device 1202, a data processing device 1203, a memory 1204, an interface 124, heat transfer cushion material, air inside casing 125, air outside casing 125, etc., thermal conductivity, heat capacity, contact area with other components in contact, direction of heat conduction
- the parameters such as the amount of heat generated by the memory module 1201, the data processing device 1202, the data processing device 1203, etc. in accordance with the writing of one unit amount of data are obtained, and various writing sequences (for the usable memory modules 1201) are obtained. Select the memory module 1201 as the write destination from among them, and arrange them in time series The heat distribution in the storage device 12 when the writing had data has been repeated, estimated by simulation or the like using a known thermal conduction equations.
- the selection data generation unit 113 Based on the thermal distribution of the storage device 12 estimated by the temperature estimation unit 112 for each of various writing sequences, the selection data generation unit 113 has, for example, the lowest estimated temperature value of each of the memory modules 1201 being the lowest.
- the selection data indicating the write sequence is generated as selection data desirable from the viewpoint of reducing the temperature rise.
- As the selection data generated by the selection data generation unit 113 at least a memory module 1201 as a writing destination is randomly selected from the usable memory modules 1201, and sequentially compared with a writing sequence arranged in time series. A write sequence in which a representative value (for example, maximum value) of the estimated temperature of the memory module 1201 is lowered is shown.
- FIG. 9 is a diagram exemplifying the memory module 1201 to which data is written according to the selection data generated by the data processing device 11 as described above.
- the upper two stages of FIG. 9 show the memory module 1201 identified by the write destination memory module identifier corresponding to the sequence number “1” of the selection data (FIG. 7). That is, the memory module 1201 shown in the upper two stages of FIG. 9 receives data (each of a plurality of data blocks obtained by dividing the target of the write request) at the first write timing corresponding to the sequence number “1”. A memory module 1201 to be written is shown.
- the lower two rows in FIG. 9 show the memory module 1201 identified by the write destination memory module identifier corresponding to the sequence number “2” of the selected data. That is, in the memory module 1201 shown in the lower two stages of FIG. 9, data is written at the second write timing (write timing next to the first write timing) corresponding to the sequence number “2”. A memory module 1201 is shown.
- the memory modules 1201 to be written to be selected according to the selected data are selected so that the memory modules 1201 to which data are simultaneously written are not adjacent to each other.
- the memory module 1201 that is selected according to the selected data is the memory module 1201 to which data is written at the subsequent write timing, and the memory module 1201 to which data is written at the preceding write timing. Selected not to be adjacent. This is because the selected data indicates a write sequence that reduces local high temperature in the storage device 12.
- the memory modules 1201 As described above, according to the data storage system 1, as a result of sequentially writing data to the memory modules 1201 appropriately selected from the plurality of stacked memory modules 1201 included in the storage device 12, the memory modules The high temperature of 1201 is reduced. Further, since data is read in the order in which a series of data is written, according to the data storage system 1, the increase in the temperature of the memory module 1201 due to the heat generated when the data is read is also reduced.
- the memory module 1201 to be written is selected from the usable memory modules 1201. Selection data is generated and used for subsequent processing. Therefore, even when some of the memory modules 1201 become unusable due to the deterioration of the storage device 12 over time, the temperature of the memory modules 1201 is unlikely to increase.
- the storage device 12 is provided with a temperature sensor that measures the temperature at the representative point of the plurality of memory modules 1201, and selection data indicating a different writing sequence is selectively used according to the temperature measured by the temperature sensor. May be adopted.
- first modified example a plurality of selection data as shown in FIG. 10 is stored in the memory 1204.
- first selection data the number of memory modules 1201 to which data is simultaneously written is six
- second selection data the number of memory modules 1201 to which data is simultaneously written is three.
- the first selection data is used while the temperature measured by the temperature sensor is equal to or lower than the threshold value
- the second selection data is used while the temperature measured by the temperature sensor exceeds the threshold value.
- FIG. 11 is a diagram illustrating a functional configuration of the data processing device 1203 according to the first modification.
- the data processing device 1203 according to the first modification includes a temperature data acquisition unit 30 that acquires temperature data indicating the temperature measured by the temperature sensor 126 (the temperature of the representative point of the memory module 1201).
- the selection data acquisition unit 20 reads the first selection data from the memory 1204 while the temperature indicated by the temperature data acquired by the temperature data acquisition unit 30 is equal to or lower than a predetermined threshold, and the temperature data is While the indicated temperature exceeds a predetermined threshold, the second selection data is read from the memory 1204.
- the memory module selection unit 22 sequentially selects the write destination memory modules 1201 in accordance with the selection data read by the selection data acquisition unit 20. As a result, the number of memory modules 1201 to which data is written within a predetermined time is changed according to the temperature indicated by the temperature data.
- the number of selection data used selectively is not limited to two, but three or more selection data (the number of write destination memory modules 1201 to which data is simultaneously written is different) is used. May be.
- FIG. 12 illustrates a memory board in which an arrangement different from the arrangement of the memory module 1201 and the like illustrated in FIG. 3 is employed.
- the stacked memory modules 1201 face each other at positions shifted in the direction along the substrate.
- heat generated when data is read from or written to a certain memory module 1201 is conducted to more adjacent memory modules 1201 than in the case of the arrangement shown in FIG.
- the amount of heat received by each memory module 1201 is smaller than in the case of the arrangement shown in FIG.
- the heat distribution in the storage device 12 may be different between the arrangement shown in FIG. 3 and the arrangement shown in FIG.
- the selection data is generated based on the heat distribution in the memory module 1201 estimated by simulation. Instead, selection data generated based on the actually measured heat distribution may be used.
- the selection data is generated by the data processing apparatus 11 that is a request source for reading and writing data.
- the storage device 12 includes a data processing device such as a CPU and the data processing device generates selection data may be employed.
- the data processing device 1203 may have the function of the data processing device 1202. Further, the data processing device 11 may have the function of the data processing device 1203.
- the memory module selection unit 22 of the data processing device 1203 selects the write destination memory module 1201 according to the selection data.
- the method by which the data processing device 1203 realizes selection of the write destination memory module 1201 is not limited to this.
- the memory module is constructed by constructing a logic circuit or the like included in the data processing device 1203 to calculate a logic circuit that calculates the sequence of the memory module 1201 as the write destination according to a predetermined algorithm.
- the selection unit 22 may be realized.
- the selected data is read from the memory 1204 to the block RAM in the FPGA when the FPGA is started, and the FPGA configuration (logic operation of the logic cell according to the program stored in the memory 1204 is performed).
- the memory module selection unit 22 realized by the logic cell group selects the memory module 1201 with reference to the selection data stored in the block RAM.
- the memory module selection unit 22 may select the write destination memory module 1201 according to a predetermined algorithm in the FPGA configuration without using selection data (an example of the above-described embodiment).
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Abstract
Description
以下に本発明の一実施形態にかかるデータ記憶システム1を説明する。図1は、データ記憶システム1の外観を示した図である。データ記憶システム1は、例えばコンピュータが備えるCPU等のホストとなるデータ処理装置11と、データ処理装置11からの要求に応じて、データの読み書きを行う記憶装置12を備える。
上述した実施形態は本発明の技術的思想の範囲内において様々に変形可能である。以下にそれらの変形の例を示す。なお、上述した実施形態および以下に示す変形例のうちの2以上が適宜組み合わせられてもよい。
Claims (10)
- データの書込要求を取得する要求取得部と、
前記書込要求に応じて、積層された複数のメモリモジュールの中から、所定の時間内にデータを書き込む2以上のメモリモジュールが互いに隣接しないように書込先のメモリモジュールを選択する選択部と、
前記書込要求に応じて、前記選択部により選択されたメモリモジュールに対するデータの書き込みを指示する書込指示部と
を備える装置。 - 前記選択部は、前記複数のメモリモジュールの中から、同時にデータを書き込む2以上のメモリモジュールが互いに隣接しないように書込先のメモリモジュールを選択する
請求項1に記載の装置。 - 前記選択部は、前記複数のメモリモジュールの中から、第1の書込タイミングでデータが書き込まれるべき第1のメモリモジュールを選択した場合、前記第1の書込タイミングの次の書込タイミングである第2の書込タイミングでデータが書き込まれるべき第2のメモリモジュールとして、前記第1のメモリモジュールに隣接しないメモリモジュールを選択する
請求項1または2に記載の装置。 - 前記複数のメモリモジュールの中から選択された1以上のメモリモジュールを識別するデータを複数、時系列に並べたデータである選択データを取得する選択データ取得部を備え、
前記選択部は前記選択データに従い、前記書込先のメモリモジュールの選択を行う
請求項1乃至3のいずれか1項に記載の装置。 - 前記複数のメモリモジュールのうち使用可能なメモリモジュールを識別する識別データを取得する識別データ取得部と、
前記識別データを出力する識別データ出力部と
を備え、
前記選択データ取得部は、前記識別データの出力に対する応答として入力される前記選択データを取得する
請求項4に記載の装置。 - 前記複数のメモリモジュールの代表点において計測された温度を示す温度データを取得する温度データ取得部を備え、
前記選択部は、前記温度データが示す温度に応じて、前記所定の時間内にデータを書き込む2以上のメモリモジュールの数を変更する
請求項1乃至5のいずれか1項に記載の装置。 - 前記複数のメモリモジュールを備える
請求項1乃至6のいずれか1項に記載の装置。 - 積層された複数のメモリモジュールの中から同時にデータを書き込む1以上のメモリモジュールを選択する処理と、当該選択した1以上のメモリモジュールにデータを書き込む処理とを繰り返し実行した場合の、前記複数のメモリモジュールの各々の温度の推定値を算出する温度推定部と、
前記温度推定部により算出される温度の推定値に基づき、前記同時にデータを書き込む1以上のメモリモジュールを選択する処理において、ランダムにメモリモジュールを選択する場合と比較し、前記複数のメモリモジュールの推定された温度の代表値が低くなるようなメモリモジュールの選択を行い、当該選択した1以上のメモリモジュールを識別するデータを複数、選択の順序に従い時系列に並べたデータである選択データを生成する選択データ生成部と
を備える装置。 - 前記複数のメモリモジュールのうち使用可能なメモリモジュールを識別する識別データを取得する識別データ取得部を備え、
前記選択データ生成部は、前記識別データが識別する使用可能なメモリモジュールの中から選択されたメモリモジュールを識別する選択データを生成する
請求項8に記載の装置。 - コンピュータを、
積層された複数のメモリモジュールのうち使用可能なメモリモジュールを識別する識別データを取得する識別データ取得部と、
前記識別データが識別する使用可能なメモリモジュールの中から同時にデータを書き込む1以上のメモリモジュールを選択する処理と、当該選択した1以上のメモリモジュールにデータを書き込む処理とを繰り返し実行した場合の、前記使用可能なメモリモジュールの各々の温度の推定値を算出する温度推定部と、
前記温度推定部により推定される温度に基づき、前記同時にデータを書き込む1以上のメモリモジュールを選択する処理において、ランダムにメモリモジュールを選択する場合と比較し、前記使用可能なメモリモジュールの推定された温度の代表値が低くなるようなメモリモジュールの選択を行い、当該選択した1以上のメモリモジュールを識別するデータを複数、選択の順序に従い時系列に並べたデータである選択データを生成する選択データ生成部
として機能させるためのプログラム。
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JP2005141829A (ja) * | 2003-11-06 | 2005-06-02 | Elpida Memory Inc | 積層メモリ、メモリモジュール及びメモリシステム |
WO2013048518A1 (en) * | 2011-09-30 | 2013-04-04 | Intel Corporation | Dynamic operations for 3d stacked memory using thermal data |
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JP2005141829A (ja) * | 2003-11-06 | 2005-06-02 | Elpida Memory Inc | 積層メモリ、メモリモジュール及びメモリシステム |
WO2013048518A1 (en) * | 2011-09-30 | 2013-04-04 | Intel Corporation | Dynamic operations for 3d stacked memory using thermal data |
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