WO2015137543A1 - 소프트웨어 기반의 초음파 이미징 시스템 - Google Patents
소프트웨어 기반의 초음파 이미징 시스템 Download PDFInfo
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- WO2015137543A1 WO2015137543A1 PCT/KR2014/002198 KR2014002198W WO2015137543A1 WO 2015137543 A1 WO2015137543 A1 WO 2015137543A1 KR 2014002198 W KR2014002198 W KR 2014002198W WO 2015137543 A1 WO2015137543 A1 WO 2015137543A1
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/56—Details of data transmission or power supply
- A61B8/565—Details of data transmission or power supply involving data transmission via a network
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/44—Constructional features of the ultrasonic, sonic or infrasonic diagnostic device
- A61B8/4483—Constructional features of the ultrasonic, sonic or infrasonic diagnostic device characterised by features of the ultrasound transducer
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/52—Devices using data or image processing specially adapted for diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/5207—Devices using data or image processing specially adapted for diagnosis using ultrasonic, sonic or infrasonic waves involving processing of raw data to produce diagnostic data, e.g. for generating an image
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/52—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00
- G01S7/52017—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00 particularly adapted to short-range imaging
- G01S7/52079—Constructional features
- G01S7/52082—Constructional features involving a modular construction, e.g. a computer with short range imaging equipment
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1673—Details of memory controller using buffers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/46—Ultrasonic, sonic or infrasonic diagnostic devices with special arrangements for interfacing with the operator or the patient
- A61B8/461—Displaying means of special interest
Definitions
- This embodiment relates to an ultrasonic imaging system. More specifically, it relates to a software-based ultrasound imaging system that improves data transfer, memory access, and the like.
- the ultrasound imaging system is widely used in the medical field for obtaining information inside the object by using a reflection signal inside the object on which the ultrasound is projected.
- Ultrasound imaging systems are complex electronic systems that require multichannel ultrasound signal acquisition and real-time processing.
- digital beamforming is the most computationally intensive functional block in ultrasonic imaging systems, and has been traditionally designed with hard-wired structures (eg, ASICs, FPGAs).
- parallel-core processors such as General-Purpose GPU (GPGPU), and Many Integrated Core (MIC) attempts have been made to implement these functions as software. have.
- This software-based ultrasound imaging system processes ultrasound data obtained in real time using a host device based on an operating system that operates in essentially non-real time. Design is important.
- the present embodiment has a main object to provide a software-based ultrasound imaging system and a method for generating an ultrasound image using the same, which improves data transmission, a memory approach, and the like.
- the bus data when transferring channel data from the front end unit to the host PC, is transferred to the system memory of the host PC without additional memory through bus mastering of the data bus. Send directly.
- the destination address of the data for each channel is controlled so that the channel data is stored in the system memory in the order of the transducer elements.
- the host PC pages-locks some area of the system memory and transfers channel data directly to the area where the front end unit is page-locked.
- the address information of the page-locked area is linked to the front end unit and the parallel core processor, thereby allowing simultaneous access of the front end unit and the GPU.
- the host PC can page-lock some other area of system memory and use it to store the output of any one of the image generation processes for the channel data.
- the host PC can use the page-locked areas of system memory as cine memory.
- the host PC uses the multi-threaded processing scheme of the parallel core processor in performing at least one subprocess of the processes for forming the ultrasound image.
- the parallel core processor in order to increase the processing speed of the parallel core processor, when copying the data between the system memory and the local memory of the parallel core processor, the data is divided and copied by asynchronous transmission, but the data copying and data processing are overlapped. use.
- an ultrasonic diagnostic apparatus including a front end unit electrically connected to a transducer and a host PC processing channel data received from the front end unit via a data bus, wherein the host PC Includes a system memory, one or more parallel core processors, and a central processing unit (CPU) to page-lock a region (hereinafter referred to as a 'first region') in the system memory;
- the front end unit transmits the channel data to the first region in a direct memory access (DMA) manner, and the parallel core processor accesses the first region in a DMA manner to generate an ultrasound image.
- DMA direct memory access
- an A / D converter for converting the RF signal transmitted in real time from the transducer into a digital signal, and the output of the A / D converter Buffer data buffered for each channel and data per channel buffered in the buffer memory in a round-robin manner to generate a data packet with a maximum payload size of a data bus, Regardless, a front end unit including a processing circuit for transmitting to a page-locked area on the system memory of the host PC is provided.
- the host PC of the ultrasonic diagnostic apparatus including a front end unit electrically connected to the transducer, and a host PC for processing channel data received from the front end unit via a data bus. And a main memory (Central Processing Unit) for page-locking a system memory, at least one parallel core processor, and a predetermined area (hereinafter referred to as a 'first area') in the system memory.
- the front end unit transmits the channel data to the first region in a direct memory access (DMA) manner, and the parallel core processor accesses the first region in a DMA manner to generate an ultrasound image.
- DMA direct memory access
- an ultrasound diagnostic apparatus including a front end unit electrically connected to a transducer and a host PC for processing channel data received from the front end unit via a data bus generates an ultrasound image.
- the host PC page-locks a certain area of the system memory (hereinafter referred to as 'first area'), and the front end unit acquires the channel data using the transducer.
- Direct Memory Access DMA Direct Memory Access
- a computer-readable recording medium storing instructions, when executed in a computer including a system memory, a central processing unit (CPU) and a parallel core processor, causes the computer to execute.
- Page-lock a predetermined area of the system memory (hereinafter referred to as a 'first area'); Performing a process for generating an ultrasound image for channel data transmitted in a direct memory access (DMA) manner to the first region from a front end unit connected via a data bus;
- Computer-readable instructions including instructions for causing the parallel core processor to approach the first region in a DMA manner to perform at least some of the processes for generating an ultrasound image in a multi-thread processing manner; Provides a possible recording medium.
- DMA direct memory access
- the present embodiment provides a method and architecture for efficiently transmitting, processing, and storing channel data in a software-based ultrasound imaging system.
- the front-end unit directly transfers channel data to system memory through bus mastering without involvement of the CPU on the host PC, thereby minimizing time delay due to data transfer.
- the sample values for each channel are stored in a sorted form in the order of the transducer elements, thereby increasing the coalescing of the data and thus the channel at the host PC.
- the data is divided and transmitted by asynchronous transmission, but the data transmission and data processing are overlapped to be performed at the same time, thereby completely hiding the latency of the data copy after the operation of the GPU. .
- the GPU may be more efficiently used in the process of reconstructing the ultrasound image by loading a previously stored data file into the page-locked space of the system memory.
- FIG. 1 is a block diagram schematically illustrating an ultrasonic imaging system according to an embodiment of the present invention.
- FIG. 2 is a block diagram schematically illustrating a configuration of a front end unit according to an embodiment of the present invention.
- FIG. 3 is a diagram illustrating a channel data transmission method of a front end unit according to an embodiment of the present invention.
- FIG. 4 is a diagram illustrating an arrangement of channel data stored on a system memory of a host PC.
- FIG. 5 is a block diagram schematically illustrating a configuration of a host PC according to an embodiment of the present invention.
- FIG. 6 is a diagram illustrating a data copying and processing method of a GPU according to an embodiment of the present invention.
- FIG. 7 is a diagram illustrating an ultrasonic data processing method of a host PC when operating in real time according to an embodiment of the present invention.
- FIG. 8 is a flowchart illustrating a real-time operating method of the ultrasonic imaging system according to an exemplary embodiment of the present invention.
- FIGS. 9A and 9B are diagrams illustrating an ultrasonic data processing method of a host PC when operating in non-real time according to an embodiment of the present invention.
- FIGS. 10A and 10B are flowcharts illustrating an ultrasound data processing method of a host PC when operating in non-real time, according to an embodiment of the present invention.
- FIG. 1 is a block diagram schematically illustrating an ultrasonic imaging system according to an embodiment of the present invention.
- the ultrasound imaging system is electrically connected to the ultrasound transducer 110 and the display device 140.
- the ultrasound imaging system includes a front end unit 120 and a host PC 130.
- the front end unit 120 generates an electrical driving signal to be applied to the ultrasonic transducer based on the control signal transmitted from the host PC 130.
- the ultrasonic transducer 210 is used to transmit an electrical driving signal provided by the front end unit 120 to an object by converting the ultrasonic signal, and receives the reflected signal of the ultrasonic signal transmitted from the object to generate an electrical signal (that is, , RF signal).
- RF' is a term commonly used in the art, which means the frequency of ultrasonic waves (typically 0.5 to 100 Mhz), but the rights of the present invention are not limited by this expression.
- an ultrasonic transducer includes hundreds (eg, 128 and 256) elements.
- the RF signal may be acquired for each scan line or may be obtained on a frame basis using plane waves or divergence waves.
- the RF signal may be used to generate a 2D or 3D image of the ROI in the object.
- the front end unit 120 converts an RF signal, which is an analog signal, into a digital signal, and transmits the converted digital signal to the host PC 130 through bus mastering for a data bus (eg, a PCI Express bus).
- DMA transfers to the system memory.
- RF signals are low-pass filtering, anti-alias filtering, pulse compression, and band-pass filtering before or after they are converted to digital signals. ), IQ demodulation, decimation, etc. may be applied, but even in this case, the minimally processed ultrasound data is stored in the system memory.
- the front end unit 120 may be implemented in the probe or host PC 130 in a variety of ways, or may be configured independently of them.
- the front end unit 120 may be implemented in the probe by a board-to-board (BTB) connection, and may be inserted into a main board of the host PC 130 in a plug-in manner.
- BTB board-to-board
- the front end unit 120 may be located outside the host PC 130 and connected to the host PC 130 through a data bus.
- the host PC 130 controls the front end unit 120 to acquire ultrasound data, and process the acquired ultrasound data to drive software used to generate an ultrasound image.
- the ultrasonic imaging system having the above-mentioned configuration simplifies the front end unit composed of dedicated hardware, while easily modifying the software to easily apply a new mode or a new beamforming method in addition to well-known modes such as B mode and M mode. can do. That is, before and after the development of the ultrasound imaging system, portions of the software can be easily modified to meet the various requirements of the user. As a result, the development of the ultrasonic imaging system is easy, and the function expansion of the ultrasonic imaging system is easier.
- FIG. 2 is a block diagram schematically illustrating a configuration of a front end unit according to an embodiment of the present invention.
- the front end unit 120 includes a transmitter 210, a receiver 220, and a front end processing circuit 230.
- the front end unit 120 may further include other components according to its function, but a description of a configuration that may obscure the gist in describing a data transmission method to a host PC, which is one of the features of the present invention. Will be omitted.
- the transmitter 210 generates an electric driving signal to be applied to the transducer 110 based on the control signal transmitted from the host PC 130 through the front end processing circuit 230.
- the transmitter 210 is illustrated as being included in the front end unit 220, but may be configured independently of the front end unit 220.
- the receiver 220 may include a receiver circuit, N A / D converters, and N buffer memories.
- the reflected signal Echo from the object is converted into an electrical signal (ie, an RF signal) in the transducer 110, and the receiving circuit receives the RF signal from the transducer 110.
- the A / D converter is used to convert an analog RF signal, which is an output of a receiving circuit, into a digital signal.
- the digital signal i.e., the sample value per channel
- the digital signal i.e., the sample value per channel
- the front end processing circuit 230 obtains address information regarding the page-locked area on the system memory from the host PC 130 connected through the data bus.
- the address information may be a physical address of the page-locked region or a virtual address mapped to the physical address, that is, a logical address.
- the front end processing circuit 230 directly transmits channel-specific sample values buffered in the buffer memory 223 to the system memory of the host PC 130 through bus mastering for the data bus. That is, the front end processing circuit 230 uses DMA technology.
- the data bus may use an appropriate high speed bus technology that can guarantee real time transmission.
- the data bus 550 may be implemented as a PCI Express (PCI-E) bus.
- the front end processing circuit 230 includes a DMA controller for DMA transfer of channel-specific sample values buffered in the buffer memory to the system memory of the host PC 130 via the data bus, and to the buffer memory.
- the control unit may control to perform DMA transfer to the DMA controller when the sample values of a predetermined size are buffered.
- the front end unit 120 may include low-pass filtering, anti-alias filtering, and pulse compression before or after converting the RF signal into a digital signal. Pre-processing such as pulse compression, band-pass filtering, IQ demodulation, and decimation may be performed. Accordingly, data transmitted to the system memory of the host PC 130 may have various formats according to a pre-processing method performed by the front end unit 120. For example, when the front end processing circuit 230 is configured to perform IQ demodulation, baseband demodulated IQ data may be transmitted to the system memory.
- 'channel data' data transmitted to the system memory of the host PC will be referred to as 'channel data'.
- FIGS. 3 and 4 is a diagram illustrating a channel data transmission method of a front end unit according to an exemplary embodiment of the present invention
- FIG. 4 is a diagram illustrating an arrangement of channel data stored on a system memory of a host PC.
- the channel-specific sample values which are outputs of the A / D converter, are buffered in the buffer memory for each channel of the receiver 220 in the FIFO method.
- the front end processing circuit 230 generates a data packet in a round-robin manner for each channel buffer and transmits the data packet to the system memory of the host PC 130. That is, data packets are sequentially generated for each channel.
- the front end processing circuit 230 generates a data packet based on Max_Payload_Size determined according to the protocol of the data bus, and transmits the data packet generated to a destination address of each channel in the system memory.
- the front end processing circuit 230 obtains address information regarding the page-locked area on the system memory from the host PC 130 in advance.
- the address information may be a physical address of the page-locked region or a virtual address mapped to the physical address, that is, a logical address.
- the front end processing circuit 230 allocates a destination address where sample values included in each data packet are stored.
- the destination address is assigned such that sample values are stored in a contiguous address space for each channel.
- the destination address for each channel is allocated to be stored in order from the start index of the memory array, and to be returned to the first index part at the last index and stored again from the first area (ie, stored in a circular manner).
- the channel data is stored in the system memory in a sorted form for each channel (or element) upon transmission.
- sample values of respective channels in the longitudinal direction and sample values of the same channel in the transverse direction are sequentially recorded in the address space on the system memory.
- the channel data is stored in a contiguous memory address space for each channel.
- the above transmission method and the channel data storage form in the system memory according to the above increase the coalescing of the data, thereby improving the efficiency of memory access during the operation of the channel data in the host PC 130, for example, the beamforming operation. Let's do it.
- FIG. 5 is a block diagram schematically illustrating a configuration of a host PC according to an embodiment of the present invention.
- the host PC 130 may include a central processing unit (CPU) 510, a graphics processing unit (GPU) 520, and a GPU memory. 525, system memory 530, and bridge chip 540.
- CPU central processing unit
- GPU graphics processing unit
- bridge chip 540 system memory 530
- the host PC 130 may further include other components according to its function, a description of a configuration that may obscure the gist in describing a method of processing channel data, which is one of the features of the present invention, will be described. It will be omitted.
- the following configuration of the host PC 130 is only an exemplary embodiment of the present invention, the configuration of the host PC 130 used in the practice of the present invention is not limited to the illustrated configuration.
- the bridge chip 540 is electrically connected to the front end unit 120 via the data bus 550.
- the bridge chip 540 is electrically connected to the CPU 510, the system memory 530, and the GPU 520.
- the bridge chip 540 may be, for example, a north-bridge chip, and may include various I / O devices (eg, one or more mass storage devices such as hard disk drives, human-machine interface devices, communication adapters such as Ethernet adapters, CDs). -Can support expansion buses for connecting ROMs, DVDs, etc.).
- the data bus may use an appropriate high speed bus technology capable of transmitting channel data in real time.
- the data bus 550 may be implemented as a PCI Express (PCI-E) bus.
- PCI-E PCI Express
- the CPU 510 may be a processor, such as those manufactured by Intel Corporation or other suppliers, which are well known to those skilled in the art.
- System memory 530 may be a number of Dynamic Random Access Memory (DRAM) devices.
- GPU 520 may be disposed on a graphics card, while CPU 510 and system memory 530 may be located on the motherboard of host PC 130.
- the graphics card including the GPU 520 is typically a data printed circuit board (PCB) to which the GPU 520 is attached.
- PCB data printed circuit board
- GPU 520 may be included in a motherboard.
- the illustrated host PC 130 may include a plurality of GPUs. These GPUs may each be located on separate graphics cards, and in some embodiments some GPUs may be located on the motherboard.
- a GPU is largely composed of multiple streaming multi-processors and off-chip memory, and a streaming multiprocessor includes a plurality of stream processors and an on-chip memory. Memory).
- the bridge chip 540 is illustrated as being electrically connected to the CPU 510, the GPU 520, and the system memory 530, but in some embodiments, the host PC 130 may be connected to the host PC 130.
- GPU 520 is electrically connected directly to CPU 510 and memory 530, and GPU 520 is configured to be electrically connected to front end processing circuit 230 directly via data bus 550. Can be.
- the CPU 510 and the GPU 520 of the host PC 130 may be designed in a single die to be configured as a single chip integrated type in which the system memory 530 is shared. Can be. This configuration has advantages in terms of latency, data processing speed, and the like.
- a General Purpose GPU GPU
- MIC Multiple Integrated Core
- the CPU 510 of the host PC 130 controls the front end unit 120 to obtain channel data, and the channel data in real time or non-real time (eg, cine loop) using the GPU.
- the software is then used to process and generate an ultrasound image.
- the CPU 510 controls the operations of the transmitter 210 and the receiver 220 through the front end processing circuit 230 so that the front-end unit 120 uses the transducer 110 to channel data. Control to obtain.
- the CPU 510 controls the GPU 520 to perform a process for forming an image in a multi-threaded manner on the acquired ultrasound scan data in order to generate the ultrasound image data.
- the system memory 530 is configured to page-lock a memory block (first area) 531 of a certain size by the CPU 510 to store channel data received from the front end unit 120. do. That is, paging is prohibited in the first area 531 in which the channel data is stored, and the corresponding memory space always exists only in the system memory. Page-locked memory is sometimes referred to as pinned memory.
- the system memory 530 may be page-locked by another memory block 532 having a predetermined size.
- the second region 532 stores data in which additional processing such as beamforming is performed on the channel data stored in the first region (ie, beamformed data, I / Q data, etc.).
- another memory block of the system memory 530 may store software executed by the CPU 510.
- the CPU 510 may include a first area, which is a page-locked memory block, required for the front-end processing circuit 226 to store channel data in the system memory 530 in a direct mom access (DMA) manner. Address information relating to 531 is provided to the front-end processing circuit 226. In addition, the CPU 510 provides the GPU 520 with address information of the first area 531 necessary for the GPU to acquire channel data stored in the first area 531 of the system memory 530 in a DMA manner. . In addition, the CPU 510 provides the GPU 520 with address information of the second area required to store a result of the GPU performing processing on the channel data.
- DMA direct mom access
- the front-end processing circuit 226 and the GPU 520 based on the address information of the first area 531 obtained from the CPU 510, without the intervention of the CPU 510, the page-locked first area You can access at the same time.
- the address information may be a physical address of the page-locked region or a virtual address mapped to the physical address, that is, a logical address.
- page-locked memory allows for faster memory access than pageable memory. That is, the front end unit 120 and the GPU 520 can DMA access the page-locked memory without CPU intervention, thereby eliminating the need for additional data copying and operation such as data copying to the CPU buffer.
- FIG. 6 is a diagram illustrating a data copying and processing method of a GPU according to an embodiment of the present invention.
- the host PC may selectively process only some of the channel data stored in the first area on the system memory.
- the ultrasound imaging system can use the maximum available pulse repetition frequency (PRF) to obtain sufficient channel data beyond the real-time processing capability of the host PC on the first area of the system memory.
- PRF pulse repetition frequency
- the host PC selectively processes only a part of the host PC instead of processing all the channel data acquired on the first area of the system memory in order to maintain the real time processing.
- channel data beyond the real-time processing capability of the host PC can be effectively utilized in non-real time operation. That is, in a cine loop operation where the host PC has (almost) no real time processing or frame rate restriction, all host data stored on the first area of the system memory, or at least a greater amount of channel data than real time processing, are received. Can be processed.
- GPUs are used to perform digital beamforming, the most computationally intensive function in ultrasonic imaging systems. Since the GPU used to perform the image forming process is a multi-core parallel processing unit, each step of the image forming process can be divided into a plurality of subprocesses, and the subprocesses can be assigned to different cores and processed simultaneously. have.
- the data In order to process data on system memory using the GPU, the data must be copied to the GPU's off-chip memory (Global Memory). Once data is copied from system memory to the global memory of the GPU, multiprocessors within the GPU access the data on the global memory for processing.
- data copy from the system memory to the global memory of the GPU has a high latency, which is due to the limited bandwidth of the data bus. For example, a PCI-E 2.0 ⁇ 16 bus is limited to a maximum bandwidth of 8GB / s. The same high latency is also a problem when transferring the results processed by the GPU to system memory.
- the GPU does not start the operation after copying the entire data (e.g., data constituting a scan line or frame) from system memory to the local memory (global memory) of the GPU. Rather, the entire data is divided into blocks (see (b) of FIG. 6), and the copying and operation of the divided blocks are overlapped. That is, as illustrated in (c) of FIG. 6, the operation starts based on the first received data block and the copy of the second data block starts. Since memory copying typically requires less execution time than GPU operations, the time required to copy data between the system memory and the memory of the graphics card can be completely hidden within the GPU operations.
- the entire data e.g., data constituting a scan line or frame
- the entire data is divided into blocks (see (b) of FIG. 6), and the copying and operation of the divided blocks are overlapped. That is, as illustrated in (c) of FIG. 6, the operation starts based on the first received data block and the copy of the second data block starts. Since memory copying typically requires less execution time than GPU operations, the time
- the global memory of the GPU is operated as a so-called 'ping-pong memory'. That is, the global memory of the GPU may be operated with a plurality of buffers.
- FIG. 6C a simultaneous copy simultaneous execution method using the global memory of the GPU as two buffers is illustrated. GPU operations are performed on data in another buffer while copying the next data into one buffer. Such simultaneous copying can reduce the overhead time required for copying data between memories. Furthermore, if only a minimum ping-pong memory size is secured, it is possible to divide the frame data of a large size, thereby efficiently using a limited amount of GPU memory. This simultaneous copy simultaneous execution method is equally applicable to the case where the result calculated by the GPU is transferred to the system memory (FIG. 6 (d)).
- the entire data (for example, data constituting the scan line or frame) is divided into several blocks for processing (copying and calculating) (see FIG. 6 (b)),
- the division of data needs to be different depending on the acquisition method of channel data stored in the first area of the system memory.
- the channel ultrasound is transmitted to acquire channel data for each scan line.
- the block to be divided is preferably composed of a set of scan lines in one frame.
- the size of each block may be determined according to the scan depth, the number of scan lines, the ensemble, the frame rate, and whether the real-time / non-real-time operation is performed.
- the block to be divided is preferably composed of a set of one or more frames.
- the size of each block may be determined according to the scan depth, the number of scan lines, the ensemble, the frame rate, the number of frames to be synthesized, and whether real-time / non-real-time operation is performed.
- the operation result may be adjusted when outputting to the system memory.
- the memory access speed decreases in the order of On-chip Registers, On-chip Shared Memory, and Off-chip Global Memory. Therefore, it is desirable to limit the use of the slowest global memory to storing input data and output data of the beamforming process.
- a faster shared memory is used for storing intermediate results in the beamforming process, and the fastest registers are preferably allocated to hold temporary results in a lower step of beamforming. Memory allocation in this manner can be applied to other subprocesses of the image forming process in addition to beamforming.
- FIGS. 7 and 8 are diagram illustrating an ultrasonic data processing method of a host PC when operating in real time according to an embodiment of the present invention
- FIG. 8 is a flowchart illustrating a real-time operating method of the ultrasonic imaging system according to an embodiment of the present invention. to be. The method shown in FIGS. 7 and 8 is based on the embodiments of the ultrasonic imaging system described above.
- the CPU 510 page-locks a memory block (first area) of a predetermined size in the system memory 530 and transfers address information of the memory block to the front-end unit and the GPU. do.
- the CPU 510 page-locks another memory block (second area) of a predetermined size in the system memory 530 and transfers address information of the corresponding memory block to the GPU (S810).
- the front end unit and the GPU can simultaneously DMA access the first region, and the GPU can DMA access the second region.
- the address information may be a physical address of the page-locked region or a virtual address mapped to the physical address.
- the transducer array transmits the ultrasonic signal according to the driving signal provided by the transmitter (S820).
- the transmitted ultrasound signal may be in the form of a focused beam, plane wave, or divergence wave for each scan line.
- the transducer array receives the reflected signal of the ultrasonic signal transmitted to the object, and converts it into an electrical signal (ie, an RF signal).
- the RF signal is digitized and temporarily buffered in N buffer memories (S830).
- the RF signal is low-pass filtering, anti-alias filtering, pulse compression, band-pass filtering, and IQ demodulation. Demodulation, decimation, and the like may be applied. Low-pass filtering or anti-alias filtering may be performed.
- the front end processing circuit refers to the physical address of the first region on the system memory transferred from the host PC, and transmits the channel data buffered in the buffer memory to the destination address in the first region via the data bus.
- a round-robin method is applied to the outputs of the N buffer memories to generate a data packet.
- the destination address is allocated such that channel data is stored in a contiguous address space for each channel (S840).
- the CPU controls the GPU to perform at least one sub-process (eg, digital beamforming) among the processes for forming the ultrasound image in a multi-threaded processing manner (S850 to S870).
- the GPU accesses the first area of the system memory 530 in a DMA manner, and copies the channel data stored in the first area to its local memory (S850).
- the GPU performs additional processing such as receive beamforming on the channel data according to the signal processing pipeline (S860).
- the GPU may DMA transfer a result of at least one step in the signal processing pipeline (eg, beamformed data, I / Q data on which IQ demodulation has been performed) to a second area of the system memory ( S870).
- the GPU uses a Concurrent Copy and Execution method when performing processes S850 to S870.
- FIGS. 9A to 10B are diagrams illustrating an ultrasonic data processing method of a host PC when operating in a non-real time operation according to an embodiment of the present invention, and FIGS. 10A and 10B operate in a non real time operation according to an embodiment of the present invention.
- 1 is a flowchart illustrating a method of processing ultrasound data of a city host PC.
- the ultrasound imaging system may play back an ultrasound image including information about an object, which is about a few seconds or several tens of seconds before, according to a user's input signal while generating an ultrasound image in real time. It provides a loop function.
- cine loop memory stores data on which some processing (eg, beamforming, IQ demodulation, etc.) on channel data has been performed or data generated for display.
- some processing eg, beamforming, IQ demodulation, etc.
- the information to be played back is limited by a specific processing method at the time of storage. This is because the processed data stored in the cine loop memory is in a state in which some information is removed from the channel data by the operation mode and the parameters at the time of storage.
- the ultrasonic imaging system can overcome the limitations of the conventional cine loop method by using the system memory of the host PC as the cine loop memory. That is, in this embodiment, the ultrasonic data stored in the first area and / or the second area of the system memory is used as the cine loop data.
- channel data stored in a first area of a system memory is used as cine loop data will be described with reference to FIGS. 9A and 10A.
- the host PC switches to the cine loop operation according to a user's specific input during real-time image generation (S1010).
- the GPU accesses a first area of the system memory 530 in a DMA manner, and selectively copies channel data of sections for reconstructing an image to its local memory (S1020).
- S1020 when copying channel data, it is also possible to selectively copy only the scan line data corresponding to the ROI input from the user, not the entire frame data of the sections to be reconstructed.
- the GPU performs additional processing such as beamforming on the copied channel data according to the signal processing pipeline (S1030).
- the GPU may perform processing by applying different operation modes, processing techniques, and application parameters than when entering the cine loop, and as a result, may overcome the limitations of the conventional cine loop scheme.
- the efficient system memory approach of the GPU applied in the real time operation may be used as it is in the cine loop operation. It has the advantage that it can.
- data stored in the second area of the system memory is used as the cine loop data
- data in which additional processing such as beamforming is performed on the channel data is stored in the second region.
- the host PC switches to the cine loop operation according to a user's specific input during real-time image generation (S1060).
- the GPU accesses a second area in which the additional processing data, such as beamforming of the system memory 530, is stored in a DMA manner to selectively copy data of sections to be reconstructed into its local memory.
- processing after the previously performed processing on the copied data may be performed (S1080).
- FIG. 9A and FIG. 10A is limited in that the information to be played back is limited by a specific processing method at the time when the information to be played back is stored in the second area of the system memory (the limitation of the conventional cine loop method). Unlike this, it has the advantage that the GPU's efficient system memory approach applied in real time operation can be used for cine loop operation.
- each process is described as being sequentially executed, but this is merely illustrative of the technical spirit of the exemplary embodiment of the present invention.
- one of ordinary skill in the art to which an embodiment of the present invention belongs may execute the order described in each embodiment in a manner that does not depart from the essential characteristics of the embodiment of the present invention, or execute one or more processes in parallel.
- the above-described embodiments are not limited to the time-series order because they may be variously modified and modified.
- the ultrasound image generating method described in the above embodiments may be implemented as computer readable codes on a computer readable recording medium.
- the computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored. That is, the computer-readable recording medium may be a magnetic storage medium (for example, ROM, floppy disk, hard disk, etc.), an optical reading medium (for example, CD-ROM, DVD, etc.) and a carrier wave (for example, the Internet Storage medium).
- the computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.
- transducer 120 front end unit
- transmitter 220 receiver
- first region 532 second region
- bridge chip 550 data bus
Abstract
Description
Claims (54)
- 트랜스듀서에 전기적으로 연결되는 프런트 엔드 유닛과, 상기 프런트 엔드 유닛으로부터 데이터 버스를 통해 수신되는 채널 데이터를 처리하는 호스트 PC를 포함하는 초음파 진단 장치에 있어서,상기 호스트 PC는시스템 메모리;하나 이상의 병렬 코어 프로세서; 및상기 시스템 메모리 내의 일정 영역(이하 '제1 영역'이라 칭함)을 페이지-락(page-lock)하는 메인 프로세서(Central Processing Unit: CPU)를 포함하고,상기 프런트 엔드 유닛은 직접 메모리 액세스(Direct Memory Access: DMA) 방식으로 상기 제1 영역에 상기 채널 데이터를 전송하고,상기 병렬 코어 프로세서는 상기 제1 영역에 DMA 방식으로 접근하여, 초음파 이미지를 생성하기 위한 프로세스들 중 적어도 일부를 멀티-스레드 처리(Multi-Thread Processing) 방식으로 수행하는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 프런트 엔드 유닛 및 상기 병렬 코어 프로세서는,상기 제1 영역의 주소 정보를 이용하여, 상기 제1 영역에 동시에 접근가능한 것을 특징으로 하는 초음파 진단 장치.
- 제2항에 있어서,상기 제1 영역의 주소 정보는,상기 제1 영역의 물리적 주소(Physical Address) 또는 상기 물리적 주소와 매핑(Mapping)되는 논리적 주소(Logical Address)인 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 프런트 엔드 유닛은,상기 채널 데이터에 대해 채널별로 데이터 패킷을 생성하고, 채널별 데이터가 상기 제1 영역 내에 연속된 주소공간에 저장되도록 각 데이터 패킷의 목적지 주소를 할당하는 것을 특징으로 하는 초음파 진단 장치.
- 제4항에 있어서,상기 프런트 엔드 유닛은,상기 데이터 버스의 최대 페이로드 크기(Max Payload Size)를 기준으로, 상기 채널 데이터에 채널별로 라운드-로빈(Round-Robin) 방식을 적용하여 데이터 패킷을 생성하는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 병렬 코어 프로세서는,상기 프로세스 수행시, 상기 제1 영역에 저장되는 채널 데이터를 여러 블록으로 분할하고, 분할된 블록들을 동시 복사 동시 수행 (Concurrent Copy and Execution) 방식으로 처리하는 것을 특징으로 하는 초음파 진단 장치.
- 제6항에 있어서,상기 채널 데이터를 분할하는 기준은,상기 채널 데이터의 획득시 사용한 초음파 송신 방식에 따라 달리하는 것을 특징으로 하는 초음파 진단 장치.
- 제6항에 있어서,상기 초음파 송신 방식이 집속 초음파를 이용하는 것인 경우에, 각 블록은 하나 이상의 스캔 라인 데이터의 집합으로 구성되는 것을 특징으로 하는 초음파 진단 장치.
- 제8항에 있어서,상기 블록의 크기는스캔 깊이(Scan Depth), 스캔 라인(Scanline)의 수, 앙상블(Ensenble), 프레임율(Frame Rate) 및 실시간/비실시간 동작 여부 중 적어도 어느 하나에 따라 결정되는 것을 특징으로 하는 초음파 진단 장치.
- 제6항에 있어서,상기 초음파 송신 방식이 평면파를 이용하는 것인 경우에, 각 블록은 복수의 프레임 데이터의 집합으로 구성되는 것을 특징으로 하는 초음파 진단 장치.
- 제10항에 있어서,상기 블록의 크기는스캔 깊이, 스캔 라인의 수, 앙상블, 프레임율, 합성할 프레임의 수 및 실시간/비실시간 동작 여부 중 적어도 어느 하나에 따라 결정되는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 초음파 진단 시스템은,상기 호스트 PC의 실시간 처리능력을 넘어서는 채널 데이터를 획득하는 것을 특징으로 하는 초음파 진단 장치.
- 제12항에 있어서,상기 초음파 진단 장치가 실시간 처리 방식으로 동작하는 경우에,상기 병렬 코어 프로세서는 상기 제1 영역에 저장되는 채널 데이터 중 일부만을 선별적으로 프로세싱하는 것을 특징으로 하는 초음파 진단 장치.
- 제12항에 있어서,상기 초음파 진단 장치가 시네 루프 동작시,상기 병렬 코어 프로세서는 상기 제1 영역에 저장되는 모든 채널 데이터 또는 적어도 실시간 처리 방식으로 동작하는 경우보다 많은 양의 채널 데이터를 프로세싱하는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 병렬 코어 프로세서는,상기 초음파 이미지를 생성하기 위한 프로세스들 중 어느 한 단계의 결과물을 상기 시스템 메모리의 제2 영역에 DMA 전송하는 것을 특징으로 하는 초음파 진단 장치.
- 제15항에 있어서,상기 초음파 진단 장치는,시네 루프 동작 시, 상기 시스템 메모리의 상기 제1 영역 및/또는 상기 제2 영역을 시네 메모리로 사용하는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 병렬 코어 프로세서는,상기 프로세스 수행 시, 입력 데이터 및 출력 데이터를 저장하는 것으로 오프-칩 메모리(Off-chip Memory)의 이용을 제한하는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 병렬 코어 프로세서는,상기 프로세스 수행 시, 온칩 메모리(On-chip Memory)를 중간 결과물의 저장에 이용하는 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 병렬 코어 프로세서는GPU(Grapic Processor Unit), 범용GPU(General-Purpose GPU: GPGPU) 및 다중내장코어(Many Integrated Core: MIC) 중 어느 하나인 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 프런트 엔드 유닛은,FPGA(Field Programmable Gate Array)인 것을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 프런트 엔드 유닛은,주변기기 형태로 상기 호스트 PC에 통합된 것임을 특징으로 하는 초음파 진단 장치.
- 제1항에 있어서,상기 프런트 엔드 유닛은,BTB(Board-to-Board) 접속으로 프로브 내에 통합된 것을 특징으로 하는 초음파 진단 장치.
- 트랜스듀서에 전기적으로 연결되는 프런트 엔드 유닛에 있어서,상기 트랜스듀서로부터 실시간으로 전송되는 RF 신호를 디지털 신호로 변환하는 A/D 컨버터;상기 A/D 컨버터의 출력을 채널별로 버퍼링하는 버퍼 메모리; 및상기 버퍼 메모리에 버퍼링되는 채널별 데이터를 Round-Robin 방식으로 스케줄링하여, 호스트 PC의 데이터 요청과 무관하게, 데이터 버스를 통해 상기 호스트 PC의 시스템 메모리 상의 페이지-락된(Page-locked) 영역에 전송하는 처리회로를 포함하는 프런트 엔드 유닛.
- 제23항에 있어서,상기 처리회로는,상기 호스트 PC로부터 상기 페이지-락된 영역의 주소 정보를 획득하는 것을 특징으로 하는 프런트 엔드 유닛.
- 제23항에 있어서,상기 처리회로는,상기 호스트 PC와 연결된 데이터 버스에 대한 버스 마스터링(Bus Mastering)을 통해, 채널별로 데이터 패킷을 생성하여, 상기 시스템 메모리 상의 페이지-락된 영역 내의 목적지 주소로 전송하는 것을 특징으로 하는, 프런트 엔드 유닛.
- 제25항에 있어서,상기 목적지 주소는,채널별 데이터가 연속된 주소 공간에 저장되도록 할당되는 것을 특징으로 하는 프런트 엔드 유닛.
- 제23항에 있어서,상기 RF 신호는,디지털 신호로 변환되기 전 또는 후에, 저주파 필터링(Low-pass Filtering), 안티-엘리어싱 필터링(Anti-aliaing Filtering), 펄스 압축(Pulse Compression), 대역통과 필터링(Band-pass Filtering), IQ 복조(IQ Demodulation) 및 데시메이션(Decimation) 중 적어도 일부를 포함하는 전처리(Pre-processing)가 적용되는 것을 특징으로 하는 프런트 엔드 유닛.
- 트랜스듀서에 전기적으로 연결되는 프런트 엔드 유닛과, 상기 프런트 엔드 유닛으로부터 데이터 버스를 통해 수신되는 채널 데이터를 처리하는 호스트 PC를 포함하는 초음파 진단 장치의 호스트 PC에 있어서,시스템 메모리;하나 이상의 병렬 코어 프로세서; 및상기 시스템 메모리 내의 일정 영역(이하 '제1 영역'이라 칭함)을 페이지-락(page-lock)하는 메인 프로세서(Central Processing Unit: CPU)를 포함하고,상기 프런트 엔드 유닛은 직접 메모리 액세스(Direct Memory Access: DMA) 방식으로 상기 제1 영역에 상기 채널 데이터를 전송하고,상기 병렬 코어 프로세서는 상기 제1 영역에 DMA 방식으로 접근하여, 초음파 이미지를 생성하기 위한 프로세스들 중 적어도 일부를 멀티-스레드 처리(Multi-Thread Processing) 방식으로 수행하는 것을 특징으로 하는 호스트 PC.
- 제28항에 있어서,상기 채널 데이터는,상기 프런트 엔드 유닛의 전송과 동시에, 채널별로 상기 제1 영역 내의 연속된 주소공간에 저장되는 것을 특징으로 하는 호스트 PC.
- 제28항에 있어서,상기 병렬 코어 프로세서는,상기 프로세스 수행시, 상기 제1 영역에 저장되는 채널 데이터를 여러 블록으로 분할하고, 분할된 블록들을 동시 복사 동시 수행 (Concurrent Copy and Execution) 방식으로 처리하는 것을 특징으로 하는 호스트 PC.
- 제30항에 있어서,상기 채널 데이터를 분할하는 기준은,상기 채널 데이터의 획득시 사용한 초음파 송신 방식에 따라 달리하는 것을 특징으로 하는 호스트 PC.
- 제30항에 있어서,상기 초음파 송신 방식이 집속 초음파를 이용하는 것인 경우에, 각 블록은 하나 이상의 스캔 라인 데이터의 집합으로 구성되는 것을 특징으로 하는 호스트 PC.
- 제30항에 있어서,상기 초음파 송신 방식이 평면파를 이용하는 것인 경우에, 각 블록은 복수의 프레임 데이터의 집합으로 구성되는 것을 특징으로 하는 호스트 PC.
- 제28항에 있어서,상기 초음파 진단 장치가 실시간 처리 방식으로 동작하는 경우에,상기 병렬 코어 프로세서는 상기 제1 영역에 저장되는 채널 데이터 중 일부만을 선별적으로 프로세싱하는 것을 특징으로 하는 호스트 PC.
- 제28항에 있어서,상기 병렬 코어 프로세서는,상기 초음파 이미지를 생성하기 위한 프로세스들 중 어느 한 단계의 결과물을 상기 시스템 메모리의 제2 영역에 DMA 전송하는 것을 특징으로 하는 호스트 PC.
- 제35항에 있어서,상기 초음파 진단 장치는,시네 루프 동작 시, 상기 시스템 메모리의 상기 제1 영역 및/또는 상기 제2 영역을 시네 메모리로 사용하는 것을 특징으로 하는 호스트 PC.
- 트랜스듀서에 전기적으로 연결되는 프런트 엔드 유닛과, 상기 프런트 엔드 유닛으로부터 데이터 버스를 통해 수신되는 채널 데이터를 처리하는 호스트 PC를 포함하는 초음파 진단 장치가 초음파 이미지를 생성하는 방법에 있어서,호스트 PC가 시스템 메모리의 일정 영역(이하 '제1 영역'이라 칭함)을 페이지-락(page-lock)하는 과정;프런트 엔드 유닛이 트랜스듀서를 이용하여 채널 데이터를 획득하는 과정;상기 프런트 엔드 유닛이 상기 제1 영역에 상기 채널 데이터를 전송하는 과정; 및상기 호스트 PC에 포함된 메인 프로세서 및 병렬 코어 프로세서를 이용하여, 상기 채널 데이터에 대해 초음파 이미지를 생성하기 위한 프로세스를 수행하는 과정;을 포함하되,상기 프런트 엔드 유닛 및 병렬 코어 프로세서는 직접 메모리 액세스(Direct Memory Access: DMA) 방식을 통해 상기 제1 영역에 동시에 접근 가능한 것을 특징으로 하는, 초음파 이미지 생성 방법.
- 제37항에 있어서,상기 병렬 코어 프로세서는,상기 초음파 이미지를 생성하기 위한 프로세스들 중 적어도 일부를 멀티-스레드 처리(Multi-Thread Processing) 방식으로 수행하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제37항에 있어서,상기 프런트 엔드 유닛은,상기 채널 데이터에 대해 채널별로 데이터 패킷을 생성하고, 채널별 데이터가 상기 제1 영역 내에 연속된 주소공간에 저장되도록 각 데이터 패킷의 목적지 주소를 할당하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제37항에 있어서,상기 병렬 코어 프로세서는,상기 프로세스 수행시, 상기 제1 영역에 저장되는 채널 데이터를 여러 블록으로 분할하고, 분할된 블록들을 동시 복사 동시 수행 (Concurrent Copy and Execution) 방식으로 처리하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제40항에 있어서,상기 채널 데이터를 분할하는 기준은,상기 채널 데이터의 획득시 사용한 초음파 송신 방식에 따라 달리하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제40항에 있어서,상기 초음파 송신 방식이 집속 초음파를 이용하는 것인 경우에, 각 블록은 하나 이상의 스캔 라인 데이터의 집합으로 구성되는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제40항에 있어서,상기 초음파 송신 방식이 평면파를 이용하는 것인 경우에, 각 블록은 복수의 프레임 데이터의 집합으로 구성되는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제37항에 있어서,상기 초음파 진단 장치가 실시간 처리 방식으로 동작하는 경우에,상기 병렬 코어 프로세서는 상기 제1 영역에 저장되는 채널 데이터 중 일부만을 선별적으로 프로세싱하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제37항에 있어서,상기 병렬 코어 프로세서는,상기 초음파 이미지를 생성하기 위한 프로세스들 중 어느 한 단계의 결과물을 상기 시스템 메모리의 제2 영역에 DMA 전송하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 제45항에 있어서,상기 초음파 진단 장치는,시네 루프 동작 시, 상기 시스템 메모리의 상기 제1 영역 및/또는 상기 제2 영역을 시네 메모리로 사용하는 것을 특징으로 하는 초음파 이미지 생성 방법.
- 명령어들을 저장하는 컴퓨터로 판독 가능한 기록 매체로서, 시스템 메모리와 메인 프로세서(Central Processing Unit: CPU)와 병렬 코어 프로세서를 포함하는 컴퓨터에서 실행되는 경우, 상기 컴퓨터로 하여금,상기 시스템 메모리의 일정 영역(이하 '제1 영역'이라 칭함)을 페이지-락(page-lock)하게 하고;데이터 버스를 통해 연결되는 프런트 엔드 유닛으로부터 상기 제1 영역에 직접 메모리 액세스(Direct Memory Access: DMA) 방식으로 전송되는 채널 데이터에 대해 초음파 이미지를 생성하기 위한 프로세스를 수행하게 하되;상기 병렬 코어 프로세서가 상기 제1 영역에 DMA 방식으로 접근하여, 초음파 이미지를 생성하기 위한 프로세스들 중 적어도 일부를 멀티-스레드 처리(Multi-Thread Processing) 방식으로 수행하도록 하는 명령어를 포함하는 컴퓨터로 판독 가능한 기록 매체.
- 제47항에 있어서,상기 채널 데이터는,상기 제1 영역에 채널별로 연속된 주소공간에 저장된 것임을 특징으로 하는, 컴퓨터로 판독 가능한 기록 매체.
- 제47항에 있어서,상기 병렬 코어 프로세서로 하여금, 상기 프로세스 수행시, 상기 제1 영역에 저장되는 채널 데이터를 여러 블록으로 분할하고, 분할된 블록들을 동시 복사 동시 수행 (Concurrent Copy and Execution) 방식으로 처리하도록 제어하는 명령어를 더 포함하는 컴퓨터로 판독 가능한 기록 매체.
- 제49항에 있어서,상기 초음파 송신 방식이 집속 초음파를 이용하는 것인 경우에, 각 블록은 하나 이상의 스캔 라인 데이터의 집합으로 구성되는 것을 특징으로 하는 컴퓨터로 판독 가능한 기록 매체.
- 제49항에 있어서,상기 초음파 송신 방식이 평면파를 이용하는 것인 경우에, 각 블록은 복수의 프레임 데이터의 집합으로 구성되는 것을 특징으로 하는 컴퓨터로 판독 가능한 기록 매체.
- 제47항에 있어서,실시간 처리 방식으로 동작시, 상기 병렬 코어 프로세서로 하여금, 상기 제1 영역에 저장되는 채널 데이터 중 일부만을 선별적으로 프로세싱하도록 제어하는 명령어를 더 포함하는 것을 특징으로 하는 컴퓨터로 판독 가능한 기록 매체.
- 제47항에 있어서,상기 병렬 코어 프로세서로 하여금, 상기 초음파 이미지를 생성하기 위한 프로세스들 중 어느 한 단계의 결과물을 상기 시스템 메모리의 제2 영역에 DMA 전송하도록 제어하는 명령어를 더 포함하는 것을 특징으로 하는 컴퓨터로 판독 가능한 기록 매체.
- 제53항에 있어서,시네 루프 동작 시, 상기 초음파 진단 장치로 하여금, 상기 시스템 메모리의 상기 제1 영역 및/또는 상기 제2 영역을 시네 메모리로 사용하도록 제어하는 명령어를 더 포함하는 것을 특징으로 하는 컴퓨터로 판독 가능한 기록 매체.
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EP3117774B1 (en) | 2019-01-30 |
US10420536B2 (en) | 2019-09-24 |
US20170000464A1 (en) | 2017-01-05 |
CN106102584B (zh) | 2019-06-21 |
JP2017508582A (ja) | 2017-03-30 |
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