WO2015100810A1 - 液晶显示面板及其像素结构以及驱动方法 - Google Patents

液晶显示面板及其像素结构以及驱动方法 Download PDF

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Publication number
WO2015100810A1
WO2015100810A1 PCT/CN2014/070902 CN2014070902W WO2015100810A1 WO 2015100810 A1 WO2015100810 A1 WO 2015100810A1 CN 2014070902 W CN2014070902 W CN 2014070902W WO 2015100810 A1 WO2015100810 A1 WO 2015100810A1
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Prior art keywords
pixel
lines
display panel
liquid crystal
scan
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PCT/CN2014/070902
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English (en)
French (fr)
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徐向阳
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深圳市华星光电技术有限公司
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Priority to US14/240,383 priority Critical patent/US20150185531A1/en
Publication of WO2015100810A1 publication Critical patent/WO2015100810A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • Liquid crystal display panel Liquid crystal display panel, pixel structure thereof and driving method
  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a liquid crystal display panel and a pixel structure thereof and a driving method thereof. Background technique
  • LCDs liquid crystal displays
  • a feed through voltage in which the display electrode (also referred to as a pixel electrode) is changed by capacitive coupling occurs.
  • the display electrode also referred to as a pixel electrode
  • the pole drive voltage changes, that is, the feedthrough voltage generated via the parasitic capacitance Cgd.
  • Figure 1 is a timing diagram of the voltage waveform of Cs on com and Com using DC drive. This figure shows the case where the display electrode voltage 03 changes due to the influence of the feedthrough voltage 104.
  • 02 indicates the gate driving voltage
  • 101 indicates the source driving voltage
  • 106 indicates the original common voltage
  • 107 indicates the corrected common voltage
  • the common voltage correction amount 105 is the feedthrough voltage 104.
  • the source driver circuit will charge the display electrode to the correct voltage, and the effect will not be too great.
  • the gate drive is turned off, since the source drive circuit is no longer charging the display electrode, the voltage drop when the gate drive is turned off, the feedthrough voltage is applied to the display electrode via the parasitic capacitance Cgd.
  • the display electrode voltage has a voltage drop of the feedthrough voltage, which affects the correctness of the gray scale display.
  • this feedthrough voltage is not affected as it is when the cabinet trace is opened. Since the source drive circuit no longer charges and discharges the display electrode, the voltage of the display electrode is always affected until the next sill. The voltage of the trace is turned on again, so the influence of the feedthrough voltage on the display screen can be clearly felt by the human eye. The same is true for the case of the N-H frame.
  • the feedthrough voltage is mainly a change in the driving voltage of the cabinet when the TFT is turned off, the pixel voltage is passed through the parasitic capacitance Cgd. Pulling low, regardless of whether the pixel type is positive or negative, the feedthrough voltage is negatively pulled to the pixel voltage, so the effect of the feedthrough voltage can be reduced by the method of compensating the common voltage, but since the liquid crystal capacitor Clc is not a The parameters are fixed, so it is not easy to achieve the purpose of improving the image quality by adjusting the common voltage.
  • One of the problems to be solved by the present invention is to provide a driving method of a liquid crystal display panel, which can effectively reduce the influence of the feedthrough voltage on the display quality of the image quality.
  • the pixel structure of the liquid crystal display panel is also provided.
  • the present invention provides a pixel structure, including: a plurality of pixel regions formed by interleaving a plurality of data lines and a plurality of scan lines; a plurality of pixel electrodes respectively disposed on each of the pixel regions; a plurality of common lines are respectively disposed corresponding to the scan lines, and each of the common lines and the pixel electrodes of each of the pixel areas formed by the corresponding scan lines are respectively overlapped and coupled to form a storage capacitor; a plurality of transistors, each of the transistors and each of the transistors The pixel electrode, the scan line and the data line on one pixel region are electrically connected; wherein each common line corresponding to the scan line is separately controlled to eliminate the influence of the feedthrough voltage on the pixel electrode voltage.
  • each transistor includes a gate, a first source/drain, and a second source/drain, wherein the gate is electrically connected to the scan line, and the first source z drain The pixel electrode is connected to the second source/drain electrically connected to the data line.
  • a liquid crystal display panel includes: a plurality of data lines; a plurality of scan lines, and the data lines are alternately arranged to form a plurality of pixel regions; and the plurality of pixel electrodes are respectively disposed in Each of the plurality of transistors is disposed in a one-to-one correspondence with the scan lines, and each of the common lines and the pixel electrodes of each of the pixel regions formed by the corresponding scan lines are overlap-coupled to form a storage capacitor; Each of the transistors is electrically connected to the pixel electrode, the scan line, and the data line on each of the pixel regions: wherein the common lines corresponding to the scan lines are individually controlled to eliminate the influence of the feedthrough voltage on the pixel electrode voltage.
  • each transistor includes a gate, a first source/drain, and a second source/drain, wherein the gate is electrically connected to the scan line, and the first source is drained
  • the pixel electrode is connected to the second source/drain electrically connected to the data line.
  • the liquid crystal display panel is a twisted nematic liquid crystal display panel.
  • the liquid crystal display panel is a vertical alignment type liquid crystal display panel.
  • a driving method of a liquid crystal display panel is further provided, the display panel includes a plurality of data lines, a plurality of scan lines, and are respectively disposed in a staggered configuration by the data lines and the scan lines.
  • a pixel electrode on the pixel area a plurality of common lines respectively corresponding to the scan line-to-one, and each of the common lines and the pixel electrodes of each of the pixel areas formed by the corresponding scan lines are overlap-coupled to form a storage capacitor, and a plurality of transistors respectively electrically connected to the pixel electrodes, the scan lines and the data lines on each of the pixel regions, the method comprising: sequentially applying a second-order driving to each of the scan lines, and sequentially driving the scan lines when the scan signals are sequentially driven And applying a pulse signal having a phase opposite to the scan signal to a common line corresponding to each scan line to pull down or pull up the set voltage value, thereby eliminating the influence of the feedthrough voltage on the pixel electrode voltage.
  • the set voltage value is set according to the following expression:
  • Vg satisfiedhigh and Vgjow are the turn-on voltage and the turn-off voltage of the scan line, respectively, which are set according to the characteristic curve of the transistor in the display panel, Cgd is the parasitic capacitance of the transistor, and Cs is the storage capacitor.
  • one or more embodiments of the present invention may have the following advantages - the present invention applies a scan signal to a common line corresponding to each scan line by sequentially driving each scan line in a second order.
  • the pulse signal with the opposite phase eliminates the influence of the feedthrough feedthrough voltage on the pixel electrode voltage, and effectively improves the display quality of the image quality.
  • FIG. 1 is a timing diagram of voltage fluctuations in a prior art storage capacitor architecture of Cs cm Com and Com voltage using DC driving -
  • FIG. 2 is a schematic structural view of a display panel according to an embodiment of the invention.
  • 3 is a schematic diagram of a pixel hook of a TFT substrate according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram of a pixel structure of a TFT substrate according to another embodiment of the present invention.
  • FIG. 5 is a Com second-order driving timing chart of a liquid crystal display panel driving method according to the present invention.
  • FIG. 6 is a diagram showing the effect of a voltage fluctuation timing of a storage capacitor structure of a liquid crystal display panel driving method according to the present invention as Cs on Com and a Com voltage using a second-order driving.
  • BEST MODE FOR CARRYING OUT THE INVENTION In order to make the objects, technical solutions and advantages of the present invention more comprehensible, the present invention will be further described in detail below with reference to the accompanying drawings.
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the invention.
  • the display panel includes an image display area 100, a source driver 200, and a gate driver 300.
  • the image display area 100 includes a plurality of data lines (also referred to as data lines, N data lines DL1 DLDL as shown) and a plurality of scan lines (also referred to as wide lines, as shown in the figure).
  • the M scanning lines GL1 to GLM) are alternately arranged in an array and a plurality of pixel structures 110.
  • the source driver 200 transmits the supplied data signal to the image display area 100 through a plurality of data lines coupled thereto.
  • the gate driver 300 transmits the supplied scan signal to the image display area 100 through a plurality of scan lines coupled thereto.
  • Figures 3 and 4 are the twisted ⁇ ij Twisted Nematic, TN) and the vertical alignment (Vertical Alignment, respectively).
  • the pixel structure of the VA) type liquid crystal display panel is controlled by a second-order scanning line, and each common line is independently controlled.
  • the specific drive timing is shown in Figure 5.
  • FIG. 3 is a schematic diagram of a pixel structure of a TFT substrate according to an embodiment of the invention.
  • the pixel structure is a Cs on com mode structure.
  • the method includes a plurality of pixel regions, a plurality of pixel electrodes respectively disposed on each of the pixel regions, and a plurality of common lines respectively disposed corresponding to each of the scan lines, and each of the common lines and each of the corresponding scan lines
  • the pixel electrodes of the pixel regions are respectively overlapped and coupled to form a storage capacitor, and a plurality of transistors respectively electrically connected to the pixel electrodes, the scan lines and the data lines on each of the pixel regions.
  • the pixel area is formed by the scanning line 31, the scanning line 33, and the data line 35 and the data line 37 being alternately arranged.
  • a pixel electrode 32 is disposed in the pixel region, and a common line 39 is disposed corresponding to the scan line 31.
  • the scan line 39 is further coupled with the pixel electrode 32 to form a storage capacitor (Cs). 36.
  • the transistor 34 and the pixel The electrode 32, the scanning line 31, and the data line 35 are electrically connected.
  • the transistor 34 is preferably a thin film field effect transistor (TFT), which includes a gate, a drain, and a source.
  • the gate is electrically connected to the scan line.
  • the drain is electrically connected to the pixel electrode 32.
  • the source is electrically connected. Data line 35.
  • TFT thin film field effect transistor
  • FIG. 4 is a schematic diagram of a pixel structure of a TFT substrate according to another embodiment of the present invention. As shown in Figure 4, for the sake of convenience, only two complete pixel regions are drawn. Taking the pixel area on the left as an example, the area surrounded by the dotted line is the area of the pixel.
  • the pixel area is constituted by the scanning line 41, the scanning line 43, and the data line 45 and the data line 47 being alternately arranged.
  • a pixel electrode 42 is disposed in the pixel region, and a common line 49 is disposed corresponding to the scan line 41.
  • the common line 49 is further coupled with the pixel electrode 42 to form a storage capacitor (Cs) 46, the transistor 44 and the pixel electrode 42 and the scan line.
  • Cs storage capacitor
  • the transistor 44 is preferably a thin film field effect transistor ⁇ , which includes a sump, a drain, and a source, wherein the pole is electrically connected to the scan line 41, and the drain is electrically connected to the pixel electrode 32.
  • the source is electrically
  • the data line 45 is connected.
  • Vg-high and Vg_low are respectively set according to the characteristic curve of the TFT
  • Cgd is the parasitic capacitance of the TFT
  • Cs is the storage capacitor.
  • Vcomjow is a common voltage which is set according to the driving voltage of the liquid crystal.
  • Vcom-low :Vcom-high-(Vg-high-Vg-low)*Cgd/Cs depends on the liquid crystal driving common voltage, the TFT driving voltage, the TFT parasitic capacitance, and the pixel storage capacitance.
  • the parasitic capacitance Cgd is generated when the second-order driving of the pixel shown in FIG. 3 or FIG. 4 is performed.
  • the feedthrough voltage through the storage capacitor Cs :: (Vcom - high - Vcom - low) * Cs / (Cgd + Clc ten Cs), Vcomjugh and Vcomjow are the high and low potentials of the common line trace, respectively. If the two need to cancel each other, the feedthrough voltage through the parasitic capacitance Cgd needs to be equal to the feedthrough voltage through the storage capacitor Cs, thus obtaining the above equation.
  • the specific effect diagram is shown in FIG. 6. It can be seen that for the Nth frame and the N+1th frame, under the action of the source driving voltage 601 gate driving voltage 602 and the common voltage 604, the signal is not fed.
  • the display electrode voltage 603 affected by the voltage.
  • the driving method is a new second-order driving method by which the influence of the feedthrough voltage on the display voltage can be eliminated.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
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Abstract

一种液晶显示面板及其像素结构（110）以及驱动方法，该像素结构，包括：由多条数据线（35,37,45,47）和多条扫描线（31,33,41,43）交错配置形成的多个像素区；多个像素电极（32,42），分别配置在每一像素区；多条公共线（39,49），分别与扫描线（31,33,41,43）一一对应设置，且每条公共线（39,49）与由对应扫描线（31,33,41,43）构成的每个像素区的像素电极（32,42）分别重叠耦合构成一存储电容（36,46）；多个晶体管（34,44），每个晶体管（34,44）分别与每一像素区上的像素电极（32,42）、扫描线（31,33,41,43）和数据线（35,37,45,47）电性连接；各条公共线（39，49）对应扫描线（31,33,41,43）被单独控制以消除馈通电压对像素电极电压的影响。通过对各扫描线（31,33,41,43）依序进行二阶驱动时，给对应每条扫描线（31,33,41,43）的公共线（39,49）施加一个与扫描信号相位相反的脉冲信号，进而消除馈通电压对像素电极电压的影响，有效提高影像品质的显示效果。

Description

液晶显示面板及其像素结构以及驱动方法
技术领域
本发明涉及液晶显示技术领域， 尤其涉及一种液晶显示面板及其中像素结构以及驱 动方法。 背景技术
近年来， 随着薄型化的显示趋势， 液晶显示器 （Liquid Crystal Display, 简称 LCD) 已广泛使用在各种电子产品的应用中， 例如手机、 笔记本计算机以及彩色电视机等。 然而， 在对面板进行驱动时， 会产生由电容耦合引起显示电极（也称像素电极）变动 的馈通 （feed through) 电压。 在 LCD面板上主要的电压变化来源有 3个， 分別是栅极驱 动 (gate driver) 电压变化， 源极驱动 (source driver) 电压变化以及公共 (Com) 电压变 化， 而这其中影响最大的是栅极驱动电压变化， 即经由寄生电容 Cgd 所产生的馈通电 压。
图 1为 Cs on com且 Com采用直流驱动的电压波形时序图。 该图就是显示电极电压 因为馈通电压 104影响， 而造成显示电极电压 03变化的情况。 如图 1所示， ：02表示栅 极驱动电压， 101 表示源极驱动电压， 106表示原先的公共电压， 107表示修正的公共电 压， 公共电压的修正量 105为馈通电压 104。 当第 N帧的栅极走线打开时， 会产生一个向 上的馈通电压加到显示电极上， 不过此时由于栅极走线打开的缘故， 源极驱动电路会对 显示电极幵始充电， 因此， 即便一幵始的电压不对（因为馈通电压的影响）， 源极驱动电 路仍会将显示电极充电到正确的电压， 影响便不会太大。 但是如果当栅极走线关闭的时 候， 由于源极驱动电路巳经不再对显示电极充电， 所以栅极驱动关闭时的电压压降， 便 会经由寄生电容 Cgd将馈通电压加到显示电极上， 造成显示电极电压有一个馈通电压的 压降， 而影响到灰阶显示的正确性。 而且这个馈通电压不像櫥极走线打开时那样， 只影 响一下子， 由于此时源极驱动电路已经不再对显示电极充放电， 因此会一直影响显示电 极的电压， 直到下一次棚极走线的电压再次打开， 所以这个馈通电压对于显示画面的影 响， 人眼是可以明确的感觉到它的存在的。 对于第 N- H帧的情况也是如此。
由于馈通电压主要为 TFT关闭时櫥极驱动电压的变化通过寄生电容 Cgd对像素电压 的拉低， 无论像素极型为正负， 馈通电压都是对像素电压负^拉动， 因此通过对公共电 压补偿的方法可以减小馈通电压的影响， 但由于液晶电容 Clc并非是一个圏定的参数， 因 此通过调整公共电压以便改进影像品质目的不易实现。
因此， 如何解决上述问题， 提供一种驱动方案以有效减少馈通电压对影像品质的显 示效果影响， 乃业界所致力的课题之一。 发明内容 本发明所要解决的技术 题之一是需要提供一种液晶显示面板的驱动方法， 该驱动 方法能够有效减少馈通电压对影像品质的显示效果影响。 另外， 还提供了该液晶显示面 板的像素结构。
为了解决上述技术问题， 本发明提供了一种像素结构， 包括： 由多条数据线和多条 扫描线交错配置形成的多个像素区； 多个像素电极， 分别配置在每一像素区上； 多条公 共线， 分别与扫描线 一对应设置， 且每条公共线与由对应扫描线构成的每个像素区的 像素电极分别重叠耦合构成一存储电容； 多个晶体管， 每个晶体管分别与每一像素区上 的像素电极、 扫描线和数据线电性连接； 其中， 各条公共线对应扫描线被单独控制以消 除馈通电压对像素电极电压的影响。
在一个实施例中， 每个晶体管包括一栅极、 一第一源 /漏极以及一第二源 /漏极， 其 中， 该栅极电连接所述扫描线， 该第一源 z漏极电性连接所述像素电极， 该第二源 /漏极 电性连接所述数据线。
根据本发明的另一方面， 还提供了一种液晶显示面板， 包括： 多条数据线； 多条扫 描线， 与所述数据线交错配置形成多个像素区； 多个像素电极， 分别配置在每一像素区 上； 多条公共线， 分别与扫描线一一对应设置， ϋ每条公共线与由对应扫描线构成的每 个像素区的像素电极分别重叠耦合构成一存储电容； 多个晶体管， 每个晶体管分别与每 一像素区上的像素电极、 扫描线和数据线电性连接： 其中， 各条公共线对应扫描线被单 独控制以消除馈通电压对像素电极电压的影响。
在一个实施例中， 每个晶体管包括一栅极、 一第一源 /漏极以及一第二源 /漏极， 其 中， 该栅极电连接所述扫描线， 该第一源 ζ漏极电性连接所述像素电极， 该第二源 /漏极 电性连接所述数据线。 在一个实施^中， 所述液晶显示面板为扭曲向列型液晶显示面板。
在一个实施 ^中， 所述液晶显示面板为垂直配向型液晶显示面板。
根据本发明另一方面， 还提供了一种液晶显示面板的驱动方法， 该显示面板包括多 条数据线、 多条扫描线、 分别配置在由所述数据线与所述扫描线交错配置形成的像素区 上的像素电极， 分别与扫描线-一一对应设置的多条公共线， ϋ每条公共线与由对应扫描 线构成的每个像素区的像素电极分别重叠耦合构成一存储电容， 以及分别与每一像素区 上的像素电极、 扫描线和数据线电性连接的多个晶体管， 该方法包括； 对各个扫描线依 序采用二阶驱动， 在提供扫描信号依序驱动各扫描线时， 给对应每条扫描线的公共线施 加一与所述扫描信号相位相反的脉冲信号以拉降或拉升设定电压值， 进而消除馈通电压 对像素电极电压的影响。
在一个实施^中 , 所述设定电压值根据以下表达式来设定：
V==(Vg__high---Vg__low)*Cgd/Cs?
其中， Vg„ high和 Vgjow分别为扫描线的开启电压和关闭电压， 均根据所述显示面 板中晶体管的特性曲线来设定， Cgd为晶体管的寄生电容， Cs为存储电容。
与现有技术相比， 本发明的一个或多个实施例可以具有如下优点 - 本发明通过对各扫描线依序进行二阶驱动时， 给对应每条扫描线的公共线施加一个 与扫描信号相位相反的脉冲信号， 进而消除馈通馈通电压对像素电极电压的影响， 有效 提高影像品质的显示效果。
本发明的其它特征和优点将在随后的说明书中阐述， 并 ϋ， 部分地从说明书中变得 显而易见， 或者通过实施本发明而了解。 本发明的目的和其他优点可通过在说明书、 权 利要求书以及 ^图中所特别指出的结构来实现和获得。 t图说明
^图用来提供对本发明的进一步理解， 并旦构成说明书的 ·部分， 与本发明的实施 例共同用于解释本发明， 并不构成对本发明的限制。 在附图中- 图 1是现有技术中存储电容架构为 Cs cm Com且 Com电压采用直流驱动的电压波动 时序图- 图 2是根据本发明一实施例的显示面板的结构示意图； 图 3是根据本发明一实施 ^的 TFT基板像素结钩的示意图；
图 4是根据本发明另一实施例的 TFT基板像素结构的示意图；
图 5是根据本发明的液晶显示面板驱动方法的 Com二阶驱动时序图；
图 6是根据本发明的液晶显示面板驱动方法的存储电容架构为 Cs on Com 且 Com电 压采用二阶驱动的电压波动时序效果图。 具体实施方式 为使本发明的目的、 技术方案和优点更加清楚， 以下结合附图对本发明作迸一步地 洋细说明。
请参考图 2， 图 2是根据本发明一实施例的显示面板的结构示意图。 该显示面板包括 影像显示区 100、 源极驱动器 200以及栅极驱动器 300。 影像显示区 100包括由多条数据 线（也可称为资料线， 如图所示的 N条数据线 DL1〜DLN)与多条扫描线（也可称为阔极 线， 如图所示的 M条扫描线 GL1〜GLM)交错配置形成的阵列以及多个像素结构 110。 源 极驱动器 200通过与其耦接的多条数据线将所提供的数据信号传输至影像显示区 100中。 栅极驱动器 300 通过与其耦接的多条扫描线将所提供的扫描信号传输至影像显示区 100 中。
图 3和图 4分别是扭曲向歹 ij Twisted Nematic, TN)和垂直配向（ Vertical Alignment,
VA) 型液晶显示面板的像素结构， 其扫描线采 ^二阶驱动， 每条公共线被独立控制。 具 体驱动时序如图 5所示。
图 3是根据本发明一实施例的 TFT基板像素结构的示意图。 如图 3所示， 该像素结 构为 Cs on com模式结构。 其包括多个像素区、 分别配置在每一像素区上的多个像素电 极、 分别与每条扫描线一一对应设置的多条公共线， 且每条公共线与由对应扫描线构成 的每个像素区的像素电极分别重叠耦合构成一存储电容、 分别与每一像素区上的像素电 极、 扫描线和数据线电性连接的多个晶体管。
为了方便描述， 图 3 中仅绘制出两个完整的像素区。 以左边的像素区为例， 虚线包 围的部分就是像素的面积。 该像素区是由扫描线 31、 扫描线 33以及数据线 35和数据线 37 交错配置形成的。 在该像素区中配置一像素电极 32, 对应扫描线 31 配置一公共线 39, 该扫描线 39还与像素电极 32重叠耦合构成一存储电容 （Cs) 36„ 晶体管 34与像素 电极 32、 扫描线 31以及数据线 35电连接。 该晶体管 34优选为薄膜场效应晶体管 TFT, 其包括一栅极、 一漏极以及一源极， 其中， 该栅极电连接扫描线 该漏极电性连接像 素电极 32, 该源极电性连接数据线 35。
图 4是根据本发明另一实施例的 TFT基板像素结构的示意图。 如图 4所示， 为了方 便描述， 仅绘制出两个完整的像素区。 以左边的像素区为例， 虚线包围的部分就是像素 的面积。 该像素区是由扫描线 41、 扫描线 43 以及数据线 45和数据线 47交错配置构成 的。 在该像素区中配置一像素电极 42, 对应扫描线 41配置一公共线 49, 该公共线 49还 与像素电极 42重叠耦合构成一存储电容 (Cs) 46, 晶体管 44与像素电极 42、 扫描线 4】 以及数据线 45 电连接。 该晶体管 44优选为薄膜场效应晶体管 ΊΤΤ, 其包括 ·棚极、 一 漏极以及 ·源极， 其中， 该極极电连接扫描线 41 , 该漏极电性连接像素电极 32 , 该源极 电性连接数据线 45。 需要注意的是， 上述像素结构中， 各条公共线对应扫描线被单独控制的。 也就是 说， 液晶显示面板上的每条公共线并不是像现有技术那样被统一控制， 仅给出一个统 的电压信号， 而是分别控制分别给出电压信号。 对于图 3中的公共线 39来说， 其与扫描 线 31对应控制。
下面详细说明如何对公共线进行单独控制。
如图 5所示， 采用两个周期相同、 极性相反的时钟序列（Clk A, Clk B )。 可以看出， 公共线 coml、 com2 , com3和 com4分别对应扫描线 Gatel、 Gate2、 Gate3和 Gate4设置， 在提供不同 描信号对各个扫描线依序进行二阶驱动时， 也给对应的公共线提供一与该 扫描信号相位相反的脉冲信号以拉降或拉升设定电压值， 进而彻底消除馈通电压的影 响。
对于所要拉降或拉升的设定电压值， 可以通过以下表达式进行设定：
V= 'com high- Vcom low=(Vg high― Vg——— iow) * Cgd / Cs
其中， Vg— high和 Vg_low分别是根据 TFT的特性曲线来设定， Cgd为 TFT的寄生电 容， Cs为存储电容。 Vcomjow为公共电压， 其是根据液晶的驱动电压来设定的。
而 Vcom— low=:Vcom— high- (Vg— high-Vg— low)*Cgd/Cs , 取决于液晶驱动公共电压、 TFT驱动幵关电压、 TFT寄生电容和像素存储电容。
这是因为， 在对上述图 3或图 4所示的像素进行二阶驱动时， 会产生经寄生电容 Cgd 产生的馈通电压和经存储电容 Cs产生的馈通电压。 且经寄生电容 Cgd产生的馈通电压 ：:: = (Vg_. hi.gh - Vgjow) * Cgd I (Cgd十 Clc + Cs), Vg— high与 Vgjow分别为栅极驱动走线 (扫 描线） 打幵与关闭的电压。 经存储电容 Cs的馈通电压：:: (Vcom— high - Vcom— low) * Cs / (Cgd + Clc十 Cs) , Vcomjugh与 Vcomjow分别为公共线走线的高电位和低电位。 而如 果需要两者互相抵消， 则经寄生电容 Cgd 的馈通电压需要等于经存储电容 Cs 的馈通电 压， 因此得到上式。
具体效果图如图 6所示， 可以看出， 对于第 N帧和第 N+1帧来说， 在源极驱动电压 601 栅极驱动电压 602以及公共电压 604的作用下， 得到不受馈通电压影响的显示电极 电压 603。
该驱动方法是一种新的二阶驱动方法， 通过该方法可以消除馈通电压对显示电压的 影响。
综上所述， 通过对像素的每条公共线单独控制， 即通过将存储电极的公共端采 ^与 扫描线二阶电压相位相反的脉冲驱动， 迸而彻底消除馈通电压的影响， 使得显示的画面 效果很好。
以上所述， 仅为本发明较佳的具体实施方式， 但本发明的保护范围并不局限于此， 任何熟悉该技术的人员在本发明所揭露的技术范围内， 可轻易想到的变化或替换， 都应 涵盖在本发明的保护范围之内。 因此， 本发明的保护范围应该以权利要求的保护范 I为

Claims

权利要求书
1、 一种像素结构， 包括：
由多条数据线和多条扫描线交错配置形成的多个像素区；
多个像素电极， 分别配置在每一像素区上；
多条公共线， 分别与扫描线一一对应设置， ϋ每条公共线与由对应扫描线构成的每个 像素区的像素电极分别重叠耦合构成一存储电容；
多个晶体管，每个晶体管分别与每一像素区上的像素电极、扫描线和数据线电性连接: 其中， 各条公共线对应扫描线被单独控制以消除馈通电压对像素电极电压的影响。
2、 根据权利要求〗所述的像素结构， 其中， 每个晶体管包括一櫥极、 一漏极以及 源极，
其中， 该極极电连接所述扫描线， 该漏极电性连接所述像素电极， 该源极电性连接所 述数 。
Figure imgf000009_0001
多条数据线；
多条扫描线， 与所述数据线交错配置形成多个像素区；
多个像素电极， 分别配置在每一像素区上；
多条公共线，分别与扫描线一一对应设置， ϋ每条公共线与 ώ对应扫描线构成的每个 像素区的像素电极分别重叠耦合构成一存储电容；
多个晶体管,每个晶体管分别与每一像素区上的像素电极、 描线和数据线电性连接; 其中， 各条公共线对应扫描线被单独控制以消除馈通电压对像素电极电压的影响。
4、 根据权利要求 3所述的液晶显示面板， 其中， 每个晶体管包括一櫥极、 一漏极以 及-一源极，
其中， 该棚极电连接所述扫描线， 该漏极电性连接所述像素电极， 该源极电性连接所 述数据线。
5、 根据权利要求 3所述的液晶显示面板， 其中，
所述液晶显示面板为扭曲向列型液晶显示面板。
6、 根据权利要求 4所述的液晶显示面板， 其中，
所述液晶显示面板为扭曲向列型液晶显示面板。
7、 根据权利要求 3所述的液晶显示面板， 其中，
所述液晶显示面板为垂直配向型液晶显示面板。
8、 根据权利要求 4所述的液晶显示面板， 其中， 所述液晶显示面板为垂直配向型液晶显示面板。
9、 一种液晶显示面板的驱动方法， 该显示面板包括多条数据线、 多条扫描线、 分别 配置在由所述数据线与所述扫描线交错配置形成的像素区上的像素电极，分别与扫描线 一对应设置的多条公共线，且每条公共线与由对应扫描线构成的每个像素区的像素电极分 别重叠耩合构成一存储电容， 以及分别与每一像素区上的像素电极、扫描线和数据线电性 连接的多个晶体管， 该方法包括：
对各个扫描线依序釆用二阶驱动，
在提供扫描信号依序驱动各扫描线时,给对应每条扫描线的公共线施加一与所述扫描 信号相位相反的脉冲信号以拉降或拉升设定电压值,进而消除馈通电压对像素电极电压的 影响。
10、根据权利要求 9所述的驱动方法，其中，所述设定电压值根据以下表达式来设定: V=(Vg high-Vg low)*Cgd/Cs,
其中， Vgjiigh和 Vg .low分别为扫描线的开启电压和关闭电压， 均根据所述显示面 板中晶体管的特性曲线来设定， Cgd为晶体管的寄生电容， Cs为存储电容。
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