WO2015081628A1 - 一种ic芯片输入电压范围优化电路及优化方法 - Google Patents
一种ic芯片输入电压范围优化电路及优化方法 Download PDFInfo
- Publication number
- WO2015081628A1 WO2015081628A1 PCT/CN2014/071011 CN2014071011W WO2015081628A1 WO 2015081628 A1 WO2015081628 A1 WO 2015081628A1 CN 2014071011 W CN2014071011 W CN 2014071011W WO 2015081628 A1 WO2015081628 A1 WO 2015081628A1
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- WIPO (PCT)
- Prior art keywords
- unit
- electrically connected
- pull
- zener diode
- voltage
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 19
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 25
- 238000005457 optimization Methods 0.000 claims description 42
- 238000010586 diagram Methods 0.000 description 4
- 230000033228 biological regulation Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
Definitions
- the invention relates to a switching power supply technology, in particular to an IC chip input voltage range optimization circuit and an optimization method. Background technique
- the IC chip enable terminal EN When the IC chip enable terminal EN receives the input power, there is an initialization process inside the IC chip. After the initialization process, the internal trigger level (even if the level) goes high, and the IC chip starts to work normally. During normal operation of the IC chip, if the voltage of the input power supply fluctuates, the level of the enable terminal EN will be pulled low, causing the IC chip to stop working. Summary of the invention
- the present invention provides an IC chip input voltage range optimization circuit and an optimization method to ensure that the IC chip can still operate normally when the input voltage changes within a certain range.
- the invention provides an IC chip input voltage range optimization circuit, which comprises:
- a pull-up unit whose input terminal is electrically connected to an input voltage for pulling up a voltage level of the output terminal according to the input voltage
- a triggering unit electrically connected between the pull-up unit and an enable end of the IC chip, for comparing a voltage level output by the pull-up unit with a given threshold voltage, and outputting a corresponding power according to the comparison result
- the flat enable signal is sent to the enable end of the IC chip to control the start and stop of the IC chip;
- a voltage stabilizing unit configured to output, according to the voltages output by the pull-up unit and the trigger unit, a voltage of a corresponding level to the pull-up unit, so that a voltage level of the pull-up output of the pull-up unit is greater than or equal to the threshold voltage,
- the IC chip is activated to operate, or the voltage level at which the pull-up unit maintains the output is greater than or equal to the threshold voltage, thereby causing the IC chip to operate without being affected by the input voltage variation.
- the pull-up unit includes a P-type switching transistor, a pull-up resistor, and a voltage dividing resistor; a source of the body tube is electrically connected to the first end of the pull-up resistor, as an input end of the pull-up unit, receiving the input voltage; a drain of the P-type switching transistor as the pull-up unit The output end is electrically grounded through the voltage dividing resistor; the gate of the P-type switching transistor is used as a control end of the pull-up unit, and is electrically connected to the second end of the pull-up resistor.
- the trigger unit includes a Schmitt trigger and an inverter connected in series with each other, and an input end of the Schmitt trigger is used as an input end of the trigger unit, and is electrically connected to an output end of the pull-up unit, the reverse
- the output end of the phase device is used as an output end of the trigger unit, and is electrically connected to an enable end of the ic chip.
- the voltage stabilizing unit includes first, second, and third Zener diodes connected in series with each other, and first and second switching transistors; a cathode of the first Zener diode is electrically connected to a control end of the pull-up unit, and a positive electrode Electrically connecting a negative electrode of the second Zener diode, a positive electrode of the second Zener diode is electrically connected to a negative electrode of the third Zener diode, and a positive electrode of the third Zener diode is electrically grounded; the first switching transistor The first pole and the second pole are respectively electrically connected to the two ends of the third Zener diode, and the gate is electrically connected to the output end of the pull-up unit; the first pole and the second pole of the second switching component Connected to the anode of the second Zener diode and the anode of the third Zener diode, respectively, and the gate is electrically connected to the output end of the trigger unit.
- the first and second switching transistors are N-type switching transistors.
- the first and second switching transistors are P-type switching transistors.
- the present invention further provides an optimization method for the input voltage range of the above IC chip, comprising the following steps:
- the pull-up unit receives an input voltage and outputs a corresponding voltage level;
- the trigger unit compares the voltage level outputted by the pull-up unit with a given threshold voltage, and outputs an enable signal of a corresponding level to the enable end of the IC chip according to the comparison result to control the start and stop of the IC chip;
- the voltage stabilizing unit receives the voltage level of the output of the pull-up unit and the trigger unit, and outputs a voltage of a corresponding level to the pull-up unit according to the voltage level outputted by the pull-up unit and the trigger unit, so that the voltage level of the pull-up unit is pulled up.
- the ic chip is started or operated, or the voltage level at which the pull-up unit maintains the output is greater than or equal to the threshold voltage, so that the ic chip operates without being affected by the input voltage change.
- the ic chip input voltage range optimization circuit and optimization method provided by the invention ensure that the ic chip can still work normally when the input voltage changes within a certain range.
- FIG. 1 is a schematic diagram of the composition of an IC chip input voltage range optimization circuit provided by the present invention
- FIG. 2 is a circuit connection diagram of an embodiment of an IC chip input voltage range optimization circuit provided by the present invention. Concrete real
- FIG. 1 it is a schematic diagram of the composition of an IC chip input voltage range optimization circuit provided by the present invention, which includes:
- the pull-up unit 10 has an input terminal 11 electrically connected to the input voltage Vin for pulling the voltage level of the output terminal 12 according to the input voltage Vin;
- the triggering unit 20 has an input end 21 electrically connected to the output end 12 of the pull-up unit 10, and an output end 22 electrically connected to the enable end EN of the IC chip for using the voltage level outputted by the pull-up unit 10 and a given threshold voltage. VT+ for comparison, and
- the trigger unit 20 When the voltage level output by the pull-up unit 10 is less than a given threshold voltage VT+, the trigger unit 20 outputs an enable signal of a low level to the enable terminal EN of the IC chip to make the IC chip inoperable;
- the trigger unit 20 When the voltage level outputted by the pull-up unit 10 is greater than or equal to a given threshold voltage VT+, the trigger unit 20 outputs a high-level enable signal to the enable terminal EN of the IC chip to enable the IC chip to start up;
- the voltage stabilizing unit 30 has a first input end 31 electrically connected to the output end 12 of the pull-up unit 10, a second input end 32 electrically connected to the output end 22 of the trigger unit 20, and an output end 33 electrically connected to the control end 13 of the pull-up unit 10. , for outputting a corresponding voltage stabilization level to the pull-up unit 10 according to the voltages output by the pull-up unit 10 and the trigger unit 20, to
- the voltage level of the pull-up output of the pull-up unit 10 is greater than or equal to the threshold voltage VT+, thereby causing the IC chip to start working;
- the voltage level at which the pull-up unit 10 is kept output is greater than or equal to the threshold voltage VT+, thereby causing the IC chip to operate without being affected by the variation of the input voltage Vin.
- FIG. 2 it is a circuit connection diagram of a specific embodiment of an IC chip input voltage range optimization circuit provided by the present invention, wherein:
- the pull-up unit 10 includes a P-type switching transistor Q pull-up resistor R1 and a voltage dividing resistor R2.
- the source of the P-type switching transistor Q1 is electrically connected to the first end of the pull-up resistor R1, as the input terminal 11 of the pull-up unit 10, receiving the input voltage Vin; the drain of the P-type switching transistor Q1 as the output of the pull-up unit 10
- the terminal 12 is electrically grounded through the voltage dividing resistor R2; the gate of the P-type switching transistor Q1 is controlled as the pull-up unit 10
- the terminal 13 is electrically connected to the second end of the pull-up resistor R1.
- the input voltage Vin is 20V, and will fluctuate within a certain range, for example, 20V ⁇ 6V.
- the trigger unit 20 includes a Schmitt trigger S Trigger and an inverter NOT connected in series with each other, and an input end of the Schmitt trigger S Trigger serves as an input end 21 of the trigger unit 20, and electrically connects the output end of the pull-up unit 10 12.
- the output terminal of the inverter NOT is used as the output terminal 22 of the trigger unit 20 to electrically connect the enable terminal EN of the IC chip.
- the Schmitt trigger S Trigger has a threshold voltage VT+ of 5V, that is, when the voltage level of the input Schmitt trigger S Trigger is less than 5V, the Schmitt trigger S Trigger outputs a high level voltage, which is inverted. After the NOT is inverted, the enable signal of the low level is output to the enable terminal EN of the IC chip; when the voltage level of the input Schmitt trigger S Trigger is greater than or equal to 5V, the Schmitt trigger S Trigger output is low.
- the level voltage after being inverted by the inverter NOT, outputs an enable signal of a high level to the enable terminal EN of the IC chip.
- the voltage stabilizing unit 30 includes first, second and third Zener diodes ZD1, ZD2 and ZD3 connected in series with each other, and first and second N-type switching transistors Q2 and Q3. among them:
- the cathode of the first Zener diode ZD1 is electrically connected to the control terminal 13 of the pull-up unit 10, that is, the second terminal of the pull-up resistor R1, and the anode of the first Zener diode ZD1 is electrically connected to the cathode of the second Zener diode ZD2,
- the anode of the second Zener diode ZD2 is electrically connected to the cathode of the third Zener diode ZD3, and the anode of the third Zener diode ZD3 is electrically grounded.
- the source of the first N-type switching transistor Q2 is electrically connected to the negative terminal of the third Zener diode ZD3 in the voltage stabilizing unit 30, the drain is electrically grounded, and the gate is electrically connected to the output terminal 12 of the pull-up unit 10 to be in the pull-up unit.
- the negative pole of the third Zener diode ZD3 is turned on, and the third Zener diode ZD3 is short-circuited at both ends.
- the source of the second N-type switching transistor Q3 is electrically connected to the cathode of the second Zener diode ZD2 in the voltage stabilizing unit 30, the drain is electrically grounded, and the gate is electrically connected to the output terminal 22 of the trigger unit 20 for output at the trigger unit 20.
- the cathode of the second Zener diode ZD2 is turned on, and the second and third Zener diodes ZD2 and ZD3 are simultaneously short-circuited.
- the reverse conducting voltage of the first, second, and third Zener diodes ZD1, ZD2, and ZD3 is 5.
- the function of the first and second N-type switching transistors Q2 and Q3 is to short-circuit the corresponding Zener diode under the control of the respective gate signals, so that other controllable switches having the same or similar functions can also be used. Generation.
- the first, second and third Zener diodes ZD1, ZD2 and ZD3 in the voltage stabilizing unit 30 are all turned on, and a current flows.
- the source and drain of the P-type switching transistor are turned on, and then the source-drain current of the P-type switching transistor flows through the voltage dividing resistor R2, and the voltage at the output terminal 12 of the pull-up unit 10 starts to rise. , Greater than zero.
- the first and second Zener diodes ZD1 and ZD2 are operated in the voltage stabilizing unit 30, and the voltage at the second end of the pull-up resistor R1 is due to the voltage regulation of the first and second Zener diodes ZD1 and ZD2 ( That is, the gate voltage of the P-type switching transistor Q1 is controlled to about 10V, so the voltage drop across the pull-up resistor R1 increases, that is, the absolute value of the gate-to-source voltage difference (less than zero) of the P-type switching transistor increases.
- the source-drain current of the P-type switching transistor will increase accordingly, so the voltage at the output terminal 12 of the pull-up unit 10 will continue to rise as long as the output voltage is less than Schmidt
- the threshold voltage of the flip-flop is VT+.
- the Schmitt trigger outputs a high level, and after the inverter NOT acts, it outputs a low level enable signal to the enable terminal EN of the IC chip, so the IC chip does not start working.
- the Schmitt trigger When the voltage at the output terminal 12 of the pull-up unit 10 rises to be greater than or equal to the threshold voltage VT+ of the Schmitt trigger, the Schmitt trigger outputs a low level, and outputs a high level after being operated by the inverter NOT.
- the signal can be signaled to the enable terminal EN of the IC chip, so the IC chip starts to work.
- the output terminal 22 of the trigger unit 20 is at a high level voltage, the source and the drain of the second N-type switching transistor Q3 are turned on, and the second and third Zener diodes ZD2 and ZD3 are simultaneously short-circuited. Only one first Zener diode ZD1 operates in unit 30. Due to the voltage regulation of the first Zener diode ZD1, the voltage at the second end of the pull-up resistor R1 (ie, the gate voltage of the P-type switching transistor Q1) is controlled. About 5V. At this time, even if the input voltage Vin fluctuates greatly, for example, from 20V to 6V, as long as the input voltage Vin is greater than the reverse conducting voltage of the first Zener diode ZD1 5.
- the first Zener diode ZD1 remains conductive.
- a current flows through the pull-up resistor R1, and the P-type switching transistor Q1 is in an on state.
- the voltage of the output terminal 12 of the pull-up unit 10 is approximately equal to the input voltage Vin, and is still greater than or equal to the threshold voltage VT+ of the Schmitt trigger. Therefore, the trigger unit 20 outputs an enable signal of a high level to the enable terminal EN of the IC chip. , keep the IC chip working normally without being affected by input voltage fluctuations. Of course, the input voltage Vin cannot be infinitely small. When the input voltage is less than the reverse conduction voltage 5.
- the P-type switching transistor Q1 is turned off, and the voltage at the output terminal 12 of the pull-up unit 10 is less than the Schmidt.
- the threshold voltage of the flip-flop VT+, the IC chip will stop working.
- the IC chip input voltage range optimization circuit provided by the present invention can ensure that the IC chip can still operate normally when the input voltage changes within a certain range.
- the present invention can also be used to drive other types of IC chips, and the normal voltage of the input voltage Vin can also be used.
- the fluctuation range may not be limited to 20V ⁇ 6V, and the selection of the corresponding circuit components and the setting of its parameters may be adjusted and changed according to specific requirements.
- the number of Zener diodes in the voltage stabilizing unit may not be limited to three, and a Zener diode having different reverse conducting voltages may be selected to constitute a voltage stabilizing unit.
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- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Radar, Positioning & Navigation (AREA)
- Electromagnetism (AREA)
- Electronic Switches (AREA)
- Dc-Dc Converters (AREA)
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016536802A JP6388656B2 (ja) | 2013-12-06 | 2014-01-21 | Icチップの入力電圧範囲の最適化回路及び最適化方法 |
KR1020167015243A KR101751194B1 (ko) | 2013-12-06 | 2014-01-21 | Ic칩 입력전압범위 최적화 회로 및 최적화 방법 |
US14/240,377 US9268349B2 (en) | 2013-12-06 | 2014-01-21 | Circuit and method for optimizing input voltage range of IC chip |
RU2016121670A RU2653179C2 (ru) | 2013-12-06 | 2014-01-21 | Схема и способ для оптимизации диапазона входного напряжения интегральной микросхемы |
GB1609705.7A GB2536584B (en) | 2013-12-06 | 2014-01-21 | Circuit and method for optimizing input voltage range of IC chip |
Applications Claiming Priority (2)
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CN201310655572.9A CN103677053B (zh) | 2013-12-06 | 2013-12-06 | 一种ic芯片输入电压范围优化电路及优化方法 |
CN201310655572.9 | 2013-12-06 |
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WO2015081628A1 true WO2015081628A1 (zh) | 2015-06-11 |
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PCT/CN2014/071011 WO2015081628A1 (zh) | 2013-12-06 | 2014-01-21 | 一种ic芯片输入电压范围优化电路及优化方法 |
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JP (1) | JP6388656B2 (zh) |
KR (1) | KR101751194B1 (zh) |
CN (1) | CN103677053B (zh) |
GB (1) | GB2536584B (zh) |
RU (1) | RU2653179C2 (zh) |
WO (1) | WO2015081628A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN116256622A (zh) * | 2023-05-15 | 2023-06-13 | 苏州贝克微电子股份有限公司 | 一种芯片的测试模式控制电路及控制方法 |
Families Citing this family (1)
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CN109410807B (zh) | 2018-11-21 | 2020-08-28 | 惠科股份有限公司 | 驱动电路和显示面板 |
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JP2000341935A (ja) * | 1999-05-25 | 2000-12-08 | Tdk Corp | 電源装置 |
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2013
- 2013-12-06 CN CN201310655572.9A patent/CN103677053B/zh active Active
-
2014
- 2014-01-21 RU RU2016121670A patent/RU2653179C2/ru active
- 2014-01-21 GB GB1609705.7A patent/GB2536584B/en active Active
- 2014-01-21 WO PCT/CN2014/071011 patent/WO2015081628A1/zh active Application Filing
- 2014-01-21 KR KR1020167015243A patent/KR101751194B1/ko active IP Right Grant
- 2014-01-21 JP JP2016536802A patent/JP6388656B2/ja active Active
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EP2354881A1 (en) * | 2010-02-05 | 2011-08-10 | Dialog Semiconductor GmbH | Domino voltage regulator (DVR) |
CN101826791A (zh) * | 2010-05-06 | 2010-09-08 | 日银Imp微电子有限公司 | 一种欠压锁存电路 |
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CN102131328A (zh) * | 2010-12-24 | 2011-07-20 | 苏州华芯微电子股份有限公司 | 一种led驱动芯片的上电电路 |
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CN116256622A (zh) * | 2023-05-15 | 2023-06-13 | 苏州贝克微电子股份有限公司 | 一种芯片的测试模式控制电路及控制方法 |
CN116256622B (zh) * | 2023-05-15 | 2023-08-08 | 苏州贝克微电子股份有限公司 | 一种芯片的测试模式控制电路及控制方法 |
Also Published As
Publication number | Publication date |
---|---|
RU2653179C2 (ru) | 2018-05-08 |
CN103677053B (zh) | 2015-12-09 |
GB2536584B (en) | 2020-10-28 |
JP6388656B2 (ja) | 2018-09-12 |
KR20160085297A (ko) | 2016-07-15 |
GB2536584A (en) | 2016-09-21 |
JP2017502395A (ja) | 2017-01-19 |
CN103677053A (zh) | 2014-03-26 |
GB201609705D0 (en) | 2016-07-20 |
KR101751194B1 (ko) | 2017-07-11 |
RU2016121670A (ru) | 2017-12-06 |
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