WO2015074514A1 - 存储设备的写入方法及写入装置 - Google Patents

存储设备的写入方法及写入装置 Download PDF

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Publication number
WO2015074514A1
WO2015074514A1 PCT/CN2014/091069 CN2014091069W WO2015074514A1 WO 2015074514 A1 WO2015074514 A1 WO 2015074514A1 CN 2014091069 W CN2014091069 W CN 2014091069W WO 2015074514 A1 WO2015074514 A1 WO 2015074514A1
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Prior art keywords
bits
group
fault
bit
written
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PCT/CN2014/091069
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English (en)
French (fr)
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WO2015074514A4 (zh
Inventor
舒继武
范捷
朱冠宇
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP18161384.5A priority Critical patent/EP3428922B1/en
Priority to RU2016124766A priority patent/RU2640294C1/ru
Priority to KR1020167015471A priority patent/KR101810029B1/ko
Priority to EP14864332.3A priority patent/EP3073492B1/en
Priority to JP2016533651A priority patent/JP6236720B2/ja
Publication of WO2015074514A1 publication Critical patent/WO2015074514A1/zh
Publication of WO2015074514A4 publication Critical patent/WO2015074514A4/zh
Priority to US15/159,613 priority patent/US9898228B2/en
Priority to US15/873,634 priority patent/US10789012B2/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0035—Evaluating degradation, retention or wearout, e.g. by counting writing cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information

Definitions

  • Embodiments of the present invention relate to the field of computer storage, and more particularly, to a writing method and a writing device of a storage device.
  • the resistive memory device stores information of "0" and "1", respectively, through different impedance states of the medium.
  • most impedance storage devices have problems with write life, and frequent write operations can result in stuck-at faults.
  • the Hamming code-based multi-bit error correction mechanism in the existing memory system can be used to correct such stuck-at faults, but the Hamming code-based multi-bit error correction mechanism is write-intensive and will aggravate the system's stuck. -at fault occurred.
  • Embodiments of the present invention provide a method for writing a storage device, which can solve the problem of a write error of a storage device in which a fixed type of failure occurs.
  • a write method of a storage device includes: acquiring n values to be written; determining n bits corresponding to the n values to be written, and The information of the fixed type fault included in the n bits, the information of the fixed type fault includes a position of the fixed type fault in the n bits and a value of a bit in which the fixed type fault is located; Dividing the n bits into B sets of bits such that the B sets of bits satisfy a grouping condition and such that when the n bits are represented as a two-dimensional array of B rows and A columns, the n Any two bits belonging to the same group in the same bit are different in row and different columns, or any two bits belonging to the same group of the n bits are in the same row.
  • the grouping condition is for defining a fixed type fault included in each of the group B bits; according to the information of the fixed type fault included in each of the group B bits and The bit corresponding to the fixed fault The value to be written, the n value corresponding to the written, to the n bits, wherein, n, A and B are positive integers, n ⁇ A ⁇ B.
  • the dividing the n bits into B groups of bits, so that the B group of bits meet a grouping condition includes: using the n bits
  • the bits are divided into B sets of bits such that when the n bits are represented as a two-dimensional array of the B rows and A columns, the jth bit of the i th group of the B sets of bits
  • the value of k is such that the B sets of bits satisfy the grouping condition, wherein p i,j is the jth bit of the i th group of bits in the B set of bits in the two-dimensional array
  • the number of columns, q i,j is the number of rows of the j-th bit of the i-th bit in the B-group of bits in the two
  • the grouping condition includes: each of the group B bits includes no more than one fixed type of fault.
  • the grouping condition includes: a fixed type included in each group of the B group of bits
  • the type of the fault is the same, and the type of the fixed fault includes a positive fixed fault or a reverse fixed fault, and the positive fixed fault is a value of the first bit where the fixed fault is located and the first bit Corresponding values to be written are equal, and the value of the second bit in which the inverse type fault is located in the fixed type of fault is opposite to the value to be written corresponding to the second bit.
  • the fixed fault included according to each of the B groups of bits The information and the value to be written corresponding to the bit in which the fixed type of fault is located, and the n values to be written are correspondingly written into the n bits, including: according to the B group of bits The information of the fixed type fault included in each group of bits and the value to be written corresponding to the bit where the fixed type of fault is located, determining the fixedness of each group of bits in the group B bits Type of a type of fault; correspondingly writing the n values to be written to the n according to the type of fixed fault included in each of the B group of bits and the set of B bits Bits.
  • the fixed type included according to each of the B group of bits and the B group of bits The type of the fault, the n values to be written are correspondingly written into the n bits, including: when the type ith of the B group of bits contains a fixed type of fault is anti-fixed In the case of a type fault, the value to be written corresponding to the ith group of bits is correspondingly written in the ith group of bits, where i is a positive integer not greater than B.
  • the fixed type included according to each of the B group of bits and the B group of bits The type of the fault, the n values to be written are correspondingly written into the n bits, including: assigning an identifier bit m i to the i-th bit in the B group of bits, the mi a type for indicating a fixed type of fault included in an ith group of bits of the B group of bits; according to the flag bit m i , a value to be written corresponding to the ith group of bits is correspondingly written The ith group of bits is entered, where i is a positive integer not greater than B.
  • the value corresponding to the ith group of bits corresponding to the written bit is corresponding to the identifier bit m i
  • a second aspect provides a writing device of a storage device, the writing device comprising: an obtaining unit, configured to acquire n values that need to be written; and a first determining unit, configured to determine that the writing needs to be performed n bits corresponding to n values, and information of the fixed type faults contained in the n bits, the information of the fixed type faults including the position of the fixed type of faults in the n bits a value of a bit in which the fixed type of failure is located; a grouping unit for dividing the n bits into B groups of bits such that the group B bits satisfy a grouping condition and such that when the n When a bit is represented as a two-dimensional array of B rows and A columns, any two of the n bits belonging to the same group are different in row and different columns, or in the n bits The same is true for any two bits belonging to the same group, the grouping condition is used to define a fixed type of fault included in each of the group B bits; the writing unit is used to Each group of bits in the B group of
  • the grouping unit is specifically configured to:
  • the grouping condition is: a fixed part of each group of the B group of bits The number of types of faults does not exceed one.
  • the grouping condition is: a fixed one of each group of the B group of bits
  • the type of the type of fault is the same
  • the type of the fixed type of fault includes a positive fixed type fault or a reverse fixed type fault
  • the positive fixed type fault is a value of the first bit where the fixed type fault is located and the first bit
  • the values corresponding to the bits to be written are equal
  • the value of the second bit in which the inverse type of the fault is located is opposite to the value to be written corresponding to the second bit.
  • the writing unit includes: a second determining unit, configured to perform, according to the B group of bits Each set of bits in the bit contains information of a fixed type of fault and a value to be written corresponding to a bit in which the fixed type of fault is located, and determines each set of bits included in the group B of bits a type of fixed type of failure; a first writing unit, configured to write the required type according to a type of fixed type fault included in each of the group B bit and the group B bit n The values correspond to the n bits.
  • the first writing unit is specifically configured to: when the ith group of the B group of bits When the type of the fixed type fault included is an anti-fixed type fault, the value to be written corresponding to the ith group of bits is correspondingly written in the ith group of bits, wherein i is not greater than A positive integer of B.
  • the writing unit further includes an allocating unit, where the allocation unit is configured to be in the B group of bits the i-th group allocation flag bits i m, i m for the stuck-at fault type in the i-th group of bits B group contains bits representation; the first write unit, particularly with And according to the identifier bit m i , the value to be written corresponding to the ith group of bits is correspondingly written into the ith group of bits, where i is a positive integer not greater than B.
  • the type of fault is an anti-fixed fault.
  • the n bits are divided into B groups, and the information needs to be written according to the information of the fixed fault in each group of the B group.
  • the value is written corresponding to n bits, and thus it is possible to effectively prevent a write error caused by a fixed type failure in the resistive memory device.
  • FIG. 1 is a flow chart of a method of writing a memory device in accordance with an embodiment of the present invention.
  • FIG. 2 is a flow chart of a method of writing a memory device according to another embodiment of the present invention.
  • FIG. 3 is a flow chart of a method of writing a memory device according to another embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a specific example of a writing method of a storage device according to another embodiment of the present invention.
  • Figure 5 is a block diagram of a writing device of a memory device in accordance with one embodiment of the present invention.
  • Figure 6 is a block diagram of a writing device of a memory device in accordance with one embodiment of the present invention.
  • FIG. 1 is a flow chart of a method of writing a memory device in accordance with an embodiment of the present invention.
  • the writing method shown in Figure 1 includes:
  • n bits Divide the n bits into B groups of bits such that the B groups of bits satisfy a grouping condition, and when the n bits are represented as a two-dimensional array of B rows and A columns, the n bits Any two bits belonging to the same group in the bit are in different rows and different columns, or the rows of any two bits belonging to the same group of the n bits are the same.
  • a fixed type of fault contained in each of the set of B bits is defined.
  • n A and B are positive integers, n ⁇ A ⁇ B.
  • the n bits are divided into B groups, and the information needs to be written according to the information of the fixed fault in each group of the B group.
  • the value is written corresponding to n bits, and thus it is possible to effectively prevent a write error caused by a fixed type failure in the resistive memory device.
  • the n bits are the positions at which n values in step 101 need to be correspondingly written. And while determining n bits, the information of the fixed type fault included in the n bits can also be determined.
  • the information of the fixed type of failure may include the number of fixed type faults included in n bits, the position of the fixed type of fault in n bits, and the value of the bit in which the fixed type of fault is located.
  • n bits determined in step 102 may be sequentially numbered 1 through n, which may also be understood as the position number of n bits.
  • n bits are first initially grouped.
  • the initial grouping may be: dividing n bits in turn to divide each A bit into groups, such that the initial packet divides n bits into B groups of bits, wherein the first B-1 group bits of the B group of bits
  • Each set of bits contains A bits, and the B-th bit, that is, the last set of bits, contains nA x (B-1) bits.
  • the n bits are divided into B groups of bits, such that when the n bits are represented as a two-dimensional array of B rows and A columns, the B groups of bits
  • the value of k can be adjusted such that the B group of bits satisfies the grouping condition.
  • p i,j is the number of columns of the jth bit of the i th group of bits in the B group of bits in the two-dimensional array
  • q i,j is the i-th bit of the B group of bits
  • the number of rows of the jth bit in the two-dimensional array, i and q i,j are positive integers not greater than B, j and p i,j are positive integers not greater than A, and k is a non-negative integer less than B
  • the adjusting the value of the k includes increasing the value of k by 1, and B is not less than Minimum number of primes, and
  • the n bits may correspond to the two-dimensional array according to the initial grouping.
  • k corresponding to the initial packet may also be other integers smaller than B, such as 1, or 2, or B-1, and the like.
  • the invention is not limited thereto.
  • the n bits are divided into B groups of bits such that two adjacent bits in each of the B groups of bits are in the n bits.
  • the difference between the position numbers in the middle is k ⁇ A + 1, or it can be said that the bits of the interval x k ⁇ A + 1 among the n bits are located in the same group.
  • the next bit of the nth bit of n bits can be considered as the first bit of n bits, or it can be considered that n bits are connected end to end. Looped, grouped by interval.
  • n+1th bit to the A ⁇ B bit position is empty, and the next bit of the nth bit of the n bits is empty n+1th
  • the bit, the next bit of the A ⁇ B bit is the first bit of n bits, or it may be considered that A ⁇ B bits are connected end to end in a ring shape and grouped at intervals.
  • n bits are divided into B groups of bits, so that when n bits are mapped to n data points in the two-dimensional Cartesian coordinate system, Two data points corresponding to any two bits of the same group have the same ordinate in the two-dimensional Cartesian coordinate system, or two data points corresponding to any two bits belonging to the same group, in two-dimensional flute
  • the abscissa in the Carl coordinate system is different and the ordinate is also different.
  • multiple lines with equal slopes can be made, and all data points on the same line belong to the same group.
  • the slope of the plurality of straight lines is k.
  • the correspondence between the n bits and the n data points in the two-dimensional Cartesian coordinate system can be referred to the correspondence between the n bits and the points in the two-dimensional array.
  • two-dimensional Descartes sits
  • the k corresponding to the initial group may also be another integer of B-1, which is not limited in the present invention.
  • k the position interval of two adjacent bits in the same group in n bits is k ⁇ A+1. It can also be understood as the difference between the rows of two adjacent bits in the same group in the two-dimensional array. It can also be understood as the slope of the line in which the bits in the same group are located in a two-dimensional Cartesian coordinate system.
  • the new packet can be determined by adjusting the value of k.
  • the value of k is adjusted, and the value of k may be increased by 1, for example, from 0 to 1, from 1 to 2, and so on. Where k ranges from 0 to B integers between B and 1.
  • the grouping condition in step 103 may be a first grouping condition: each group of the B group of bits includes no more than one fixed type of fault.
  • the grouping condition in step 103 may be a second grouping condition: each group of the B group of bits includes the same type of fixed fault, and the type of the fixed fault Including positive fixed type and anti-fixed type faults, the positive fixed type fault is that the value of the first bit where the fixed type fault is located is equal to the value that needs to be written corresponding to the first bit, and the fixed type fault is a fixed type fault. The value of the second bit is opposite to the value that needs to be written corresponding to the second bit.
  • the number of fixed faults included in the same group is zero or one.
  • the number of fixed faults included in the same group may be zero or one or more.
  • step 104 information about a fixed type of fault included in each group of bits in the B group of bits and a write corresponding to a bit in which the fixed type of fault is located are required to be written.
  • the value entered determines the type of fixed fault included in each of the B bits.
  • n values to be written are correspondingly written to n bits according to the type of fixed type fault included in each of the B group of bits and the B group of bits.
  • the type of the fixed type fault included in the ith group of the B group bits is an anti-fixed type fault
  • the value to be written corresponding to the ith group of bits may be inverted and then written.
  • the ith group of bits where i is a positive integer not greater than B.
  • i is a positive integer not greater than B.
  • a group of bits can be assigned a vector m having B components, the ith component of the vector corresponding to the identification bit m i of the ith group of bits in the B group of bits. And it can be set that the initial value of the vector m is 0.
  • the corresponding identifier position of the group is 1. At the time of writing, for the group whose flag bit is 1, the value to be written corresponding to the group is inversely written.
  • the specific manner of writing is not limited.
  • writing can be performed based on the determined packet.
  • the value to be written corresponding to the first group of bits in the determined packet may be first written, and the value to be written corresponding to the second group of bits in the determined packet may be written to In this way, the writing of n values of the B group bits is completed.
  • it may be written in the order of the position numbers of n bits or in reverse order.
  • the group in which the first bit of the n bits is located may be determined first, and the identifier corresponding to the group in which the first bit is located is written, and then the second bit of the n bits is determined.
  • the determined number of groups of packets is fixed, that is, for n bits, the number of groups of the packets remains unchanged in the B group.
  • the value of k is B integers from 0 to B-1, and the maximum number of times k is determined to be a packet is B times. In this way, the efficiency of the grouping can be guaranteed.
  • this grouping method is relatively simple to implement.
  • FIG. 2 is a flow chart of a method of writing a memory device according to another embodiment of the present invention.
  • the writing method shown in Figure 2 includes:
  • n bits can be initially divided into B groups of bits, and each of the first B-1 group bits includes A bits, and the B group bits include nA ⁇ (B-1) bits. Bit. For example, the first bit to the Ath bit of the n bits are divided into the first group, the A+1th bit to the 2Ath bit are divided into the second group, and so on.
  • the description of k is as described above, and to avoid repetition, it will not be described again here.
  • k corresponding to the initial group may also be other integers of B-1, which is not limited by the present invention.
  • step 204 Determine whether the packet satisfies the first grouping condition. When not satisfied, step 205 is performed; when satisfied, step 206 is performed.
  • step 202 if it is judged in step 202 that the number of occurrences of fixed faults among the n bits is greater than B, then grouping by this method makes it impossible to satisfy the first grouping condition. Or, on the other hand, when it is determined in step 204 that the first grouping condition is not satisfied, step 205 is performed. When k is increased from 0 to B-1, the grouping of k at any of the B values does not satisfy the first grouping condition.
  • the value of 205,k is increased by 1, and the grouping is performed again.
  • the value of k is increased by 1, and the manner of re-determining the packet is as described above. To avoid repetition, it will not be repeated here.
  • the value of the bit where the fixed type of fault occurs is compared with the value of the bit that needs to be written on the bit to determine the type of the fixed type of fault.
  • the type of the fixed type of failure is a positive fixed type of failure.
  • the type of the fixed type of failure is an anti-fixed type of failure.
  • the identification bit of the group in which it is located can be assigned to 1, and the type of the group that does not include the fixed type of fault and the type of the fixed type fault are those in which the fixed type fault is located.
  • the group's flag is assigned a value of 0.
  • the group whose flag bit is 1 is correspondingly written in reverse.
  • the group whose flag bit is 0 is normally written normally.
  • the n bits are divided into B groups, and the information needs to be written according to the information of the fixed fault in each group of the B group.
  • the value is written corresponding to n bits, and thus it is possible to effectively prevent a write error caused by a fixed type failure in the resistive memory device.
  • FIG. 3 is a flow chart of a method of writing a memory device according to another embodiment of the present invention.
  • the writing method shown in FIG. 3 includes:
  • the value of the bit where the fixed type of fault occurs is compared with the value of the bit that needs to be written on the bit to determine the type of the fixed type of fault.
  • the type of the fixed type of failure is a positive fixed type of failure.
  • the type of the fixed type of failure is an anti-fixed type of failure.
  • n bits can be initially divided into B groups of bits, and each of the first B-1 group bits includes A bits, and the B group bits include nA ⁇ (B-1) Bits.
  • the first bit to the Ath bit of the n bits are divided into the first group, the A+1th bit to the 2Ath bit are divided into the second group, and so on.
  • the description of k is as described above, and to avoid repetition, it will not be described again here.
  • k corresponding to the initial group may also be other integers of B-1, which is not limited by the present invention.
  • step 304 Determine whether the packet satisfies the second grouping condition. When not satisfied, step 305 is performed; when satisfied, step 306 is performed.
  • k takes a value of 1, and re-groups.
  • the n bits are divided into B groups, and the information needs to be written according to the information of the fixed fault in each group of the B group.
  • the value is written corresponding to n bits, and thus it is possible to effectively prevent a write error caused by a fixed type failure in the resistive memory device.
  • FIG. 4 is a schematic diagram of a specific example of a writing method of a storage device according to another embodiment of the present invention.
  • Each of the 32 bits of the behavior shown in Figure 4 is a value.
  • the broken line in Fig. 4 indicates the position at which a fixed type of failure occurs.
  • n 32 bits.
  • the value of the 32 bits is shown in the first line in Figure 4: before n values are written.
  • the position where the 32 bits are located is sequentially numbered from 1 to 32, and the position numbers and corresponding values of the 32 bits are as shown in Table 1. Among them, the position number of the stack-at fault in the 32 bits is 7, 9, 16, 17, 27.
  • the position number refers to the sequence number generated by sequentially numbering the n bits of the data block.
  • n values to be written The 32 position numbers and the corresponding 32 values to be written are shown in Table 2.
  • the two-dimensional array shown in Table 3 is a position number corresponding to the numerical value shown in Table 1.
  • one row of the two-dimensional value represents a group, that is, the rows of any two bits belonging to the same group are the same.
  • the embodiment of the present invention imaginarily supplements the position numbers 33, 34, 35 in Table 3.
  • the imaginary position number is 33, 34, and the bit of the bit is empty.
  • Table 3 is only a schematic description, and is not a unique representation of the 32-position number sequence represented as a two-dimensional array of 7 rows and 5 columns.
  • the invention is not limited thereto.
  • each of the grouping methods includes five position numbers.
  • the 32 position numbers are divided into 7 groups. From the first point of view, this grouping can be understood as: the position of the jth position number of the i-th group in the 7 groups in the two-dimensional array (q i,j ,p i,j ) satisfies:
  • q i,j is the number of rows of the jth position number of the i-th group in the 7 groups in the two-dimensional array
  • p i,j is the j-th position number of the i-th group in the 7 groups The number of columns in the two-dimensional array.
  • the position in the two-dimensional array refers to the position information of the rows and columns in the two-dimensional array.
  • this grouping method is that the difference between the position numbers of two adjacent ones in each group is 1. That is to say, the position number of the adjacent two in each group has an interval of 1. And, the interval may correspond to k ⁇ A+1 of the first angle.
  • this grouping method is: when n bits are mapped to n data points in the two-dimensional Cartesian coordinate system, any two bits belonging to the same group correspond to The two data points have the same ordinate in the two-dimensional Cartesian coordinate system.
  • the 32 data points corresponding to the 32 bits are located on the 7 straight lines in the two-dimensional Cartesian coordinate system, and the data points on each straight line are located in the same group. And the slope of these 7 straight lines is 0. Also, the slope of the line may correspond to k of the first angle.
  • the grouping condition may be a first grouping condition: the number of fixed type faults included in each group is no more than one.
  • the position numbers of the fixed faults among the 32 bits shown in Table 1 are 7, 9, 16, 17, 27. Referring to Table 3, it can be found that the position numbers of the fixed type faults are 7 and 9 are located in the second group, and the position numbers of the fixed type faults are 16 and 17 are located in the fourth group. That is, in the above-mentioned grouping, the number of fixed type faults included in the second group and the fourth group exceeds one, and the first grouping condition is not satisfied. In this case, the above packet mode needs to be adjusted, and the 32 bits are re-grouped.
  • the new grouping manner is: the corresponding position number of the first group is 1, 7, 13, 19, 25; the corresponding position number of the second group is 6, 12, 18, 24, 30; the corresponding position of the third group
  • the serial numbers are 11, 17, 23, 29, ⁇ ; the corresponding position numbers of the fourth group are 16, 22, 28, ⁇ , 5; the corresponding position numbers of the fifth group are 21, 27, ⁇ , 4, 10;
  • the corresponding position numbers of the group are 26, 32, 3, 9, and 15; the corresponding position numbers of the seventh group are 31, 2, 8, 14, and 20.
  • ⁇ , ⁇ , and ⁇ indicate null, and sequentially represent the imaginary position numbers 33, 34, and 35 in Table 3.
  • this new grouping method is that the difference between the position numbers of two adjacent ones in each group is 6. That is to say, the position number of the adjacent two in each group has an interval of 6. And, the interval may correspond to k ⁇ A+1 of the first angle.
  • the fourth group in the new group as an example, the interval between the two of the first three position numbers 16, 22, 28 of the fourth group is 6, and the fourth position number ⁇ represents the hypothesis.
  • the position number 34, and the interval between 34 and 28 is 6, and the fifth position number 5 can be understood as: the next position number of 35 is 1, that is, it can be assumed that the position numbers from 1 to 35 are arranged in a head-to-tail phase.
  • the ring is connected so that the next position number with the interval of 6 is 34.
  • the five fingers include the case of the imaginary position number, and the fifth one in the fourth group has been determined as the position number 5, so The fourth group of grouping methods can be determined.
  • the position numbers in other groups corresponding to the second angle described above can be similarly understood. To avoid repetition, details are not described herein again.
  • the new packet satisfies the first grouping condition.
  • the position numbers of the fixed faults among the 32 bits shown in Table 1 are 7, 9, 16, 17, 27.
  • the location numbers of the fixed faults are 7, 9, 16, 17, and 27 located in the first group, the sixth group, the fourth group, the third group, and the new group respectively.
  • the fifth group That is to say, the new grouping method satisfies the first grouping condition: no more than one fixed type of fault is included in each group. Thereby, it is determined that the 7 groups satisfying the grouping condition are the new packet.
  • k may be incremented by one to obtain another new packet, and it is further determined whether the other new packet satisfies the first packet condition.
  • the grouping condition may be a second grouping condition: in each group
  • the types of fixed faults included are the same.
  • the types of fixed faults include positive fixed faults or reverse fixed faults.
  • Positive fixed faults are the values of the first bit where the fixed fault is located and the first bit needs to be written.
  • the values entered are equal, and the value of the second bit where the anti-fixed fault is the fixed fault is the opposite of the value that needs to be written on the second bit.
  • the position numbers of the fixed faults among the 32 bits shown in Table 1 are 7, 9, 16, 17, 27. Referring to Table 1 and Table 2, it can be seen that the value in the bit position number 7 in Table 1 is "0", which is equal to the value "0" to be written at the position in Table 2, so the position number is fixed at 7.
  • the type of fault is a positive fixed fault.
  • the type of fixed type fault with position number 9 is a positive fixed type fault
  • the type of fixed type fault with position number 16 is an anti-fixed type fault
  • the type of fixed type fault with position number 17 is positive fixed type.
  • Type fault the type of fixed fault with position number 27 is anti-fixed fault.
  • the positions numbers 7 and 9 belong to the second group
  • the types of the fixed type faults of the position numbers 7 and 9 are positive fixed type faults, and the second grouping condition is satisfied.
  • the location numbers 16 and 17 belong to the fourth group, but the types of fixed faults with position numbers 7 and 9 are different, and the second grouping condition is not satisfied. Therefore, at this time, it is also necessary to adjust the above-described grouping method, and re-group the 32 bits.
  • the method for determining the re-grouping is similar to the method for re-grouping according to the foregoing determination according to the first grouping condition. To avoid repetition, details are not described herein again. It can be seen from the foregoing analysis that the new grouping method is: the corresponding position number of the first group is 1, 7, 13, 19, 25; the corresponding position number of the second group is 6, 12, 18, 24, 30; the third group The corresponding position numbers are 11, 17, 23, 29, ⁇ ; the corresponding position numbers of the fourth group are 16, 22, 28, ⁇ , 5; the corresponding position numbers of the fifth group are 21, 27, ⁇ , 4, 10 The corresponding position numbers of the sixth group are 26, 32, 3, 9, and 15; the corresponding position numbers of the seventh group are 31, 2, 8, 14, and 20. Among them, ⁇ , ⁇ , and ⁇ indicate null, and sequentially represent the imaginary position numbers 33, 34, and 35 in Table 3.
  • the new packet satisfies the second grouping condition.
  • the position numbers of the fixed faults among the 32 bits shown in Table 1 are 7, 9, 16, 17, 27.
  • the location numbers of the fixed faults are 7, 9, 16, 17, and 27 respectively located in the new grouping.
  • the first group, the sixth group, the fourth group, the third group and the fifth group are the same. Thereby, it is determined that the 7 groups satisfying the grouping condition are the new packet.
  • k may be incremented by one to obtain another new packet, and it is further determined whether the other new packet satisfies the second packet condition.
  • the grouping manner determined according to the first grouping condition and the grouping manner determined according to the second grouping condition are independent of each other.
  • the grouping method determined by the two grouping conditions may be the same or different.
  • 32 values to be written in Table 2 are correspondingly written into the 32 bits of Table 1 according to the information of the fixed type failure included in each group of the new packet.
  • the information of the fixed fault here includes the position number of the fixed fault and the type of the fixed fault.
  • the type of the fixed type of fault included in each group is first. Since the position numbers of the fixed type faults are 7, 9, 16, 17, 27 are respectively located in the first group, the sixth group, the fourth group, the third group, and the fifth group in the new group. Combined with the analysis of Tables 1 and 2, it can be seen that the types of fixed faults with position numbers 7, 9 and 17 are positive fixed faults, and the types of fixed faults with position numbers 16 and 27 are reverse fixed faults. The values to be written in the group in which the anti-fixed type fault is located, the fourth group and the fifth group are written in reverse; the values to be written corresponding to the other groups are normally written. The value of the 32 bits after writing is shown in the third line in Figure 4: after n values are written. Thus, the 32 position numbers after completion of writing and the corresponding written values can be as shown in Table 5.
  • each group of the new packet may be assigned an identification bit m i , i representing an ith group in the 7 group, and i is a positive integer not greater than 7.
  • the seven groups have seven flag bits, which are used to indicate the type of fixed faults included in the group. For example, 0 can be used to indicate a positive fixed type fault, and 1 can be used to indicate a reverse fixed type fault.
  • the identifier bits corresponding to the new packet are 0001100 in order.
  • writing can be performed according to the identifier bits corresponding to each group. Specifically, when the identification bit of a certain group is 1, the value corresponding to the group to be written is reversed; when the identification bit of a certain group is 0, the corresponding record corresponding to the group is required to be written. The value is normally written.
  • the flag bit may be a vector m having B components whose i-th component corresponds to the flag bit m i of the i-th bit bit in the B group of bits. And you can set the initial value of this vector to be 0. Where i is a positive integer not greater than B.
  • the specific manner of writing is not limited. Alternatively, writing can be performed based on the determined packet. For example, if the location number of the first group is 1, 7, 13, 19, 25, and the type of fixed fault included in the first group is a positive fixed fault, or the identifier of the first group is 0, then The values corresponding to the position numbers 1, 7, 13, 19, 25 are normally written. The writing is then completed in the order of the second to seventh groups. Alternatively, it may be written in the order of the position number.
  • location number 1 For example, for location number 1, first determine that the group in which it is located is the first group, and the type of the fixed type fault included in the first group is a positive fixed type fault, or the flag of the first group is 0, then The value corresponding to the position number 1 is normally written. After that, for the position number 2, it is first determined that the group in which it is located is the seventh group, and the seventh group does not include a fixed type fault, or the flag of the first group is 0, the value corresponding to the position number 2 is normal. Write. The writing is then completed in the order of position numbers 3 to 32. Or can also be rooted Write according to the position number in reverse order. It is also possible to complete the writing in other ways. Those skilled in the art will appreciate that writing in other ways is still within the scope of embodiments of the present invention.
  • the types of fixed faults included in the fourth group and the fifth group in the new group are inverse fixed type faults
  • Other types of fixed faults included in the other groups are positive fixed faults or do not contain fixed faults.
  • the value to be written corresponding to the group in which the anti-fixed type fault is located is reverse-written; the value to be written corresponding to the other group is normally written.
  • the value of the 32 bits after completion of writing can be as shown in Table 5.
  • the identification bits corresponding to each group can also be introduced and further written according to the identification bits.
  • the identifier refer to the description above for the first grouping condition. To avoid repetition, details are not described herein again.
  • FIG. 5 is a block diagram of a writing device of a memory device in accordance with one embodiment of the present invention.
  • the writing device 500 shown in FIG. 5 includes an acquisition unit 501, a first determination unit 502, a grouping unit 503, and a writing unit 504.
  • the obtaining unit 501 is configured to acquire n values that need to be written.
  • a first determining unit 502 configured to determine n bits corresponding to the n values to be written, and information of the fixed fault included in the n bits, where the information of the fixed fault includes the fixed fault The position in the n bits and the value of the bit in which the fixed type of fault is located.
  • a grouping unit 503 configured to divide the n bits into B groups of bits such that the B groups of bits satisfy a grouping condition, and when the n bits are represented as a two-dimensional array of B rows and A columns, Any two of the n bits belonging to the same group are different in row and different columns, or any of the n bits belonging to the same group are in the same row,
  • the grouping condition is used to define a fixed type of fault contained in each of the set of B bits.
  • the writing unit 504 is configured to: according to the information of the fixed type fault included in each group of the B group of bits and the value to be written corresponding to the bit where the fixed type of the fault is located, The n values to be written correspond to the n bits,
  • n A and B are positive integers, n ⁇ A ⁇ B.
  • the n bits are divided into B groups, and the information that needs to be written may be written according to the information of the fixed fault in each group of the B group.
  • the value is written in n bits, and the writing error caused by the fixed type failure in the resistive memory device can be effectively prevented.
  • p i,j is the number of columns of the jth bit of the i th group of bits in the B group of bits in the two dimensional array
  • q i,j is the i th group of the B group of bits
  • the number of rows of the jth bit of the bit in the two-dimensional array, i and q i,j are positive integers not greater than B
  • j and p i,j are positive integers not greater than A
  • k is less than B
  • the value of the adjustment k includes the value of k increasing by 1, and B being not less than Minimum prime number
  • the grouping condition is that each of the group B bits includes no more than one fixed type of fault.
  • the grouping condition is: each of the B groups of bits includes the same type of fixed fault, and the type of the fixed fault includes a positive fixed fault or an inverse fixed type.
  • the positive fixed fault is that the value of the first bit where the fixed fault is located is equal to the value to be written corresponding to the first bit
  • the inverse fixed fault is the second bit of the fixed fault The value of the bit is opposite to the value of the second bit that needs to be written.
  • the writing unit 504 includes a second determining unit 505 and a first a writing unit 506, wherein the second determining unit 505 is configured to: according to the information of the fixed type fault included in each of the group B bits, and the value to be written corresponding to the bit where the fixed type fault is located, A type of fixed type of fault included in each of the set of B bits is determined.
  • the first writing unit 506 is configured to write the n values to be written into the n according to the type of the fixed type fault included in each of the B group of bits and the B group of bits. Bit.
  • the first writing unit 506 is specifically configured to: when the type of the fixed type fault included in the ith group of the B group of bits is an anti-fixed type fault, The value to be written corresponding to the ith group of bits is correspondingly written in the ith group of bits, where i is a positive integer not greater than B.
  • the writing unit 504 further includes an allocating unit 507, configured to allocate an identifier bit m i for the i-th group of the B group of bits, where the mi is used to represent The type of fixed fault included in the i-th bit of the B sets of bits.
  • the first writing unit 506 is specifically configured to write, according to the identifier m i , a value to be written corresponding to the ith group bit to the ith group bit. Where i is a positive integer not greater than B.
  • the identifier bit indicates that the type of the fixed type fault included in the ith group of the group B is an anti-fixed type fault
  • the value corresponding to the ith group corresponding to the write is inverted.
  • the identifier bit m i 1
  • the type of fixed fault included in the i-th bit of the B group of bits is an anti-fixed fault.
  • the writing device 500 can implement the various processes implemented by the writing device in the embodiment of FIG. 2 to FIG. 4, and to avoid repetition, details are not described herein again.
  • FIG. 6 is a block diagram of a writing device of a memory device in accordance with one embodiment of the present invention.
  • the writing device 600 shown in FIG. 6 includes a processor 601, a memory 602, and a transceiver circuit 603.
  • the transceiver circuit 603 is configured to acquire n values that need to be written.
  • a processor 601 configured to determine n bits corresponding to the n values that need to be written, and
  • the n bits contain information of a fixed type of fault, and the information of the fixed type of fault includes a position of the fixed type of fault in the n bits and a value of a bit in which the fixed type of fault is located.
  • n bits are written, where n, A, and B are positive integers, n ⁇ A ⁇ B.
  • the n bits are divided into B groups, and the information that needs to be written may be written according to the information of the fixed fault in each group of the B group.
  • the value is written in n bits, and the writing error caused by the fixed type failure in the resistive memory device can be effectively prevented.
  • bus system 604 which in addition to the data bus includes a power bus, a control bus, and a status signal bus.
  • bus system 604 various buses are labeled as bus system 604 in FIG.
  • Processor 601 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the foregoing method may be completed by an integrated logic circuit of hardware in the processor 601 or an instruction in a form of software.
  • the processor 601 may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a Field Programmable Gate Array (FPGA), or the like. Programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA Field Programmable Gate Array
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like. Knot The steps of the method disclosed in the embodiments of the present invention may be directly implemented by the hardware decoding processor, or may be performed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable read only memory or an electrically erasable programmable memory, a register, etc. In the storage medium.
  • the storage medium is located in the memory 602, and the processor 601 reads the information in the memory 602 and completes the steps of the above method in combination with its hardware.
  • p i,j is the number of columns of the jth bit of the i th group of bits in the B group of bits in the two dimensional array
  • q i,j is the i th group of the B group of bits
  • the number of rows of the jth bit of the bit in the two-dimensional array, i and q i,j are positive integers not greater than B
  • j and p i,j are positive integers not greater than A
  • k is less than B
  • the value of the adjustment k includes the value of k increasing by 1, and B being not less than Minimum prime number
  • the grouping condition is that each of the group B bits includes no more than one fixed type of fault.
  • each group of the B group of bits includes the same type of fixed fault, and the type of the fixed fault includes a positive fixed fault or an inverse fixed fault.
  • the positive fixed type fault is that the value of the first bit where the fixed type fault is located is equal to the value to be written corresponding to the first bit
  • the inverse fixed type fault is the second bit of the fixed type fault. The value of the second bit is opposite to the value to be written corresponding to the second bit.
  • the processor 601 is specifically configured to: according to the B group of bits Each set of bits contains information of a fixed type of fault and a value to be written corresponding to a bit in which the fixed type of fault is located, and determines a fixed type of fault included in each of the set of bits of the group B of bits Types of. And according to the type of the fixed type fault included in the B group of bits and each of the B groups of bits, the n values to be written are correspondingly written into the n bits.
  • the processor 601 is configured to: when the type of the fixed type fault included in the ith group of the B group of bits is an anti-fixed type fault, The value corresponding to the bit to be written is correspondingly written in the ith group of bits, where i is a positive integer not greater than B.
  • the processor 601 is specifically configured to: allocate an identifier bit m i for the i-th group of the B group of bits, where the mi is used to represent the first of the B groups of bits The type of the fixed type of fault included in the i group of bits; according to the flag m i , the value to be written corresponding to the ith group of bits is correspondingly written to the ith group of bits.
  • i is a positive integer not greater than B.
  • the identifier bit indicates that the type of the fixed type fault included in the ith group of the group B is an anti-fixed type fault
  • the value corresponding to the ith group corresponding to the write is inverted.
  • the identifier bit m i 1
  • the type of fixed fault included in the i-th bit of the B group of bits is an anti-fixed fault.
  • the writing device 600 can implement the various processes implemented by the writing device in the embodiment of FIG. 2 to FIG. 4, and to avoid repetition, details are not described herein again.
  • the disclosed systems, devices, and methods may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present invention which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

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Abstract

一种存储设备的写入方法及写入装置，该写入方法包括：获取需要写入的n个数值；确定与其对应的n个比特位，以及n个比特位包含的固定型故障的信息；将n个比特位分成B组比特位，以使得满足分组条件，并且使得当将n个比特位表示为B行A列的二维数组时，属于同一个组的任何两个比特位所在的行和列均不同或所在的行相同；根据B组比特位中的每一组比特位包含的固定型故障的信息和与之对应的需要写入的数值，将n个数值对应写入。通过调整同一组中相邻两个比特位的间隔，确定分组，并根据每一组包含的固定型故障的信息，将需要写入的n个数值对应写入，能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。

Description

存储设备的写入方法及写入装置
本申请要求于2013年11月22日提交中国专利局、申请号为201310597968.2、发明名称为“存储设备的写入方法及写入装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明实施例涉及计算机存储领域，并且更具体地，涉及一种存储设备的写入方法及写入装置。
背景技术
阻抗性存储设备通过介质不同的阻抗状态来分别存储“0”和“1”的信息。但是，绝大多数的阻抗性存储设备都存在写寿命的问题，频繁的写操作会导致产生固定型故障(stuck-at fault)。
当阻抗性存储设备产生stuck-at fault的硬件错误时，发生错误的存储单元保持在一个固定的值“0”或“1”不变，并且此单元的值将永远不能再继续被改写。并且，stuck-at fault发生的概率远高于短暂性错误(transient error)，成为了阻抗性内存中的一种主要故障错误。
现有的内存系统下基于汉明码的多位纠错机制虽然可以用于纠正此类stuck-at fault，但是这种基于汉明码的多位纠错机制是写密集型的，会加重系统的stuck-at fault的发生。
发明内容
本发明实施例提供一种存储设备的写入方法，能够解决发生固定型故障的存储设备写入错误的问题。
第一方面，提供了一种存储设备的写入方法，所述写入方法包括：获取需要写入的n个数值；确定与所述需要写入的n个数值对应的n个比特位，以及所述n个比特位包含的固定型故障的信息，所述固定型故障的信息包括所述固定型故障在所述n个比特位中的位置和所述固定型故障所在的比特位的数值；将所述n个比特位分成B组比特位，以使得所述B组比特位满足分组条件，并且使得当将所述n个比特位表示为B行A列的二维数组时，所述n个比特位中的属于同一个组的任何两个比特位所在的行不同且所在的列不同，或者所述n个比特位中的属于同一个组的任何两个比特位所在的行相同，所述分组条件用于限定所述B组比特位中的每一组比特位包含的固定型故障；根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，将所述需要写入的n个数值对应写入所述n个比特位，其中，n、A和B为正整数，n≤A×B。
结合第一方面，在第一种可能的实现方式中，所述将所述n个比特位分成B组比特位，以使得所述B组比特位满足分组条件，包括：将所述n个比特位分成B组比特位，以使得当将所述n个比特位表示为所述B行A列的二维数组时，所述B组比特位中的第i组比特位的第j个比特位在所述B行A列的二维数组中的位置满足：pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)modB；调整所述k的取值，使得所述B组比特位满足分组条件，其中，pi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的列数，qi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，所述调整所述k的取值包括所述k的取值增加1，B为不小于
Figure PCTCN2014091069-appb-000001
的最小素数，且
Figure PCTCN2014091069-appb-000002
结合第一方面或者第一方面的第一种可能的实现方式，在第二种可能的 实现方式中，所述分组条件包括：所述B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
结合第一方面或者第一方面的第一种可能的实现方式，在第三种可能的实现方式中，所述分组条件包括：所述B组比特位中的每一组比特位包含的固定型故障的类型相同，所述固定型故障的类型包括正固定型故障或者反固定型故障，所述正固定型故障为所述固定型故障所在的第一比特位的数值与所述第一比特位对应的需要写入的数值相等，所述反固定型故障为所述固定型故障所在的第二比特位的数值与所述第二比特位对应的需要写入的数值相反。
结合第一方面或者或者上述第一方面的任一种可能的实现方式，在第四种可能的实现方式中，所述根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，将所述需要写入的n个数值对应写入所述n个比特位，包括：根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，确定所述B组比特位中的每一组比特位包含的固定型故障的类型；根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n个数值对应写入所述n个比特位。
结合第一方面的第四种可能的实现方式，在第五种可能的实现方式中，所述根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n个数值对应写入所述n个比特位，包括：当所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障时，将与所述第i组比特位对应的需要写入的数值对应地取反写入所述第i组比特位，其中，i为不大于B的正整数。
结合第一方面的第四种可能的实现方式，在第六种可能的实现方式中，所述根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型 故障的类型，将所述需要写入的n个数值对应写入所述n个比特位，包括：为所述B组比特位中的第i组比特位分配标识位mi，所述mi用于表示所述B组比特位中的第i组比特位包含的固定型故障的类型；根据所述标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入所述第i组比特位，其中，i为不大于B的正整数。
结合第一方面的第六种可能的实现方式，在第七种可能的实现方式中，所述根据所述标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入所述第i组比特位，包括：当所述标识位mi＝1时，将与所述第i组比特位对应的需要写入的数值取反写入所述第i组比特位，所述标识位mi＝1表示所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。
第二方面，提供了一种存储设备的写入装置，所述写入装置包括：获取单元，用于获取需要写入的n个数值；第一确定单元，用于确定与所述需要写入的n个数值对应的n个比特位，以及所述n个比特位包含的固定型故障的信息，所述固定型故障的信息包括所述固定型故障在所述n个比特位中的位置和所述固定型故障所在的比特位的数值；分组单元，用于将所述n个比特位分成B组比特位，以使得所述B组比特位满足分组条件，并且使得当将所述n个比特位表示为B行A列的二维数组时，所述n个比特位中的属于同一个组的任何两个比特位所在的行不同且所在的列不同，或者所述n个比特位中的属于同一个组的任何两个比特位所在的行相同，所述分组条件用于限定所述B组比特位中的每一组比特位包含的固定型故障；写入单元，用于根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，将所述需要写入的n个数值对应写入所述n个比特位，其中n、A和B为正整数，n≤A×B。
结合第二方面，在第一种可能的实现方式中，所述分组单元，具体用于：
将所述n个比特位分成B组比特位，以使得当将所述n个比特位表示为 所述B行A列的二维数组时，所述B组比特位中的第i组比特位的第j个比特位在所述B行A列的二维数组中的位置满足：pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)modB；调整所述k的取值，使得所述B组比特位满足分组条件，其中，pi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的列数，qi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，所述调整所述k的取值包括所述k的取值增加1，B为不小于
Figure PCTCN2014091069-appb-000003
的最小素数，且
Figure PCTCN2014091069-appb-000004
结合第二方面或者第二方面的第一种可能的实现方式中，在第二种可能的实现方式中，所述分组条件为：所述B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
结合第二方面或者第二方面的第一种可能的实现方式中，在第三种可能的实现方式中，所述分组条件为：所述B组比特位中的每一组比特位包含的固定型故障的类型相同，所述固定型故障的类型包括正固定型故障或者反固定型故障，所述正固定型故障为所述固定型故障所在的第一比特位的数值与所述第一比特位对应的需要写入的数值相等，所述反固定型故障为所述固定型故障所在的第二比特位的数值与所述第二比特位对应的需要写入的数值相反。
结合第二方面或者上述第二方面的任一种可能的实现方式中，在第四种可能的实现方式中，所述写入单元，包括：第二确定单元，用于根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，确定所述B组比特位中的每一组比特位包含的固定型故障的类型；第一写入单元，用于根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n 个数值对应写入所述n个比特位。
结合第二方面的第四种可能的实现方式中，在第五种可能的实现方式中，所述第一写入单元，具体用于：当所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障时，将与所述第i组比特位对应的需要写入的数值对应地取反写入所述第i组比特位，其中，i为不大于B的正整数。
结合第二方面的第四种可能的实现方式中，在第六种可能的实现方式中，所述写入单元，还包括分配单元，所述分配单元，用于为所述B组比特位中的第i组比特位分配标识位mi，所述mi用于表示所述B组比特位中的第i组比特位包含的固定型故障的类型；所述第一写入单元，具体用于根据所述标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入所述第i组比特位，其中，i为不大于B的正整数。
结合第二方面的第六种可能的实现方式中，在第七种可能的实现方式中，所述第一写入单元，具体用于：当所述标识位mi＝1时，将与所述第i组比特位对应的需要写入的数值取反写入所述第i组比特位，所述标识位mi＝1表示所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。
本发明实施例通过调整同一分组中相邻两个比特位的间隔，确定将n个比特位分成B组，可以根据所述B组的每一组中的固定型故障的信息，将需要写入的数值对应写入n个比特位，进而能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例描述所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明一个实施例的存储设备的写入方法的流程图。
图2是本发明另一个实施例的存储设备的写入方法的流程图。
图3是本发明另一个实施例的存储设备的写入方法的流程图。
图4是本发明另一个实施例的存储设备的写入方法的具体例子的示意图。
图5是本发明一个实施例的存储设备的写入装置的框图。
图6是本发明一个实施例的存储设备的写入装置的框图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
图1是本发明一个实施例的存储设备的写入方法的流程图。图1所示的写入方法包括：
101，获取需要写入的n个数值。
102，确定与该需要写入的n个数值对应的n个比特位，以及该n个比特位包含的固定型故障的信息，该固定型故障的信息包括固定型故障在该n个比特位中的位置和固定型故障所在的比特位的数值。
103，将该n个比特位分成B组比特位，以使得该B组比特位满足分组条件，并且使得当将该n个比特位表示为B行A列的二维数组时，该n个比特位中的属于同一个组的任何两个比特位所在的行不同且所在的列不同，或者该n个比特位中的属于同一个组的任何两个比特位所在的行相同，该分组条件用于限定B组比特位中的每一组比特位包含的固定型故障。
104，根据该B组比特位中的每一组比特位包含的固定型故障的信息和与固定型故障所在的比特位对应的需要写入的数值，将该需要写入的n个数值对应写入该n个比特位。
其中n、A和B为正整数，n≤A×B。
本发明实施例通过调整同一分组中相邻两个比特位的间隔，确定将n个比特位分成B组，可以根据所述B组的每一组中的固定型故障的信息，将需要写入的数值对应写入n个比特位，进而能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。
在步骤102中，n个比特位是步骤101中的n个数值需要对应写入的位置。并且在确定n个比特位的同时，也可确定该n个比特位所包含的固定型故障的信息。固定型故障的信息可包括n个比特位所包含的固定型故障的个数、固定型故障在n个比特位中的位置以及固定型故障所在的比特位的数值。
为了方便理解，可将在步骤102中确定的n个比特位顺序编号1至n，也可理解为n个比特位的位置序号。
在步骤103中，首先将n个比特位进行初始分组。初始分组可以为：将n个比特位依次将每A个比特位分为一组，这样初始分组将n个比特位分为B组比特位，其中B组比特位的前B-1组比特位中每一组比特位包含A个比特位，第B组比特位，也就是最后一组比特位中包含n-A×(B-1)个比特位。
可选地，在步骤103中，可理解为，将n个比特位分成B组比特位，以使得当将n个比特位表示为B行A列的二维数组时，所述B组比特位中的第i组比特位的第j个比特位在该B行A列的二维数组中的位置应满足：pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)modB。并且可通过调整k的取值，使得所述B组比特位满足分组条件，
其中，pi,j为B组比特位中的第i组比特位的第j个比特位在二维数组中的列数，qi,j为B组比特位中的第i组比特位的第j个比特位在二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，所述调整所述k的取值包括k的取值增加1，B为不小于
Figure PCTCN2014091069-appb-000005
的最 小素数，且
Figure PCTCN2014091069-appb-000006
具体地，该n个比特位可以是根据初始分组与二维数组相互对应的。例如，二维数组的一行可以对应初始分组的一组，即k＝0。或者，假设一个比特位在n个比特位中的位置序号为x，该比特位对应在二维数组中的行为a，列为b，则应满足x＝(b-1)×A+a。
应注意，初始分组对应的k也可以为小于B的其他的整数，如1，或2，或B-1等。本发明对此不作限定。
可选地，在步骤103中，也可理解为，将n个比特位分成B组比特位，以使得B组比特位中的每一组中的相邻的两个比特位在n个比特位中的位置序号的差为k×A+1，或者，也可以说，n个比特位中每间隔k×A+1的比特位位于同一组中。具体地，若n＝A×B，可认为n个比特位的第n个比特位的下一个比特位为n个比特位的第一个比特位，或者也可认为将n个比特位首尾相连成环状，按间隔进行分组。若n<A×B，可认为将第n+1个比特位至第A×B个比特位置空，n个比特位的第n个比特位的下一个比特位为空的第n+1个比特位，第A×B个比特位的下一个比特位为n个比特位的第一个比特位，或者也可认为将A×B个比特位首尾相连成环状，按间隔进行分组。
可选地，在步骤102中，也可理解为，将n个比特位分成B组比特位，以使得当将n个比特位对应到二维笛卡尔坐标系中的n个数据点时，属于同一组的任何两个比特位对应的两个数据点在二维笛卡尔坐标系中的纵坐标都相同，或者，属于同一组的任何两个比特位对应的两个数据点，在二维笛卡尔坐标系中的横坐标不同且纵坐标也不同。并且，可作出斜率相等的多条直线，位于同一条直线上的所有数据点均属于同一组。并且，该多条直线的斜率为k。
具体地，该n个比特位与二维笛卡尔坐标系中的n个数据点的对应关系，可参见上述n个比特位与二维数组中的点的对应关系。例如，二维笛卡尔坐 标系中的n个数据点中的纵坐标相同的数据点可对应n个比特位的初始分组中的一组，即斜率k＝0。可选地，该初始分组对应的k也可为B-1的其他的整数，本发明对此不作限定。
应注意，以上所描述的只是从不同的数学角度进行的分组分析。其共同的参数为k。可以理解为同一组中相邻的两个比特位在n个比特位中的位置间隔为k×A+1。也可以理解为在二维数组中，同一组中列相邻的两个比特位所在的行的差。也可以理解为在二维笛卡尔坐标系中，同一组中的比特位所在的直线的斜率。进一步调整分组时，都可通过调整k的取值，确定新的分组。这里调整k的取值，可以是k的取值增加1，例如从0增加至1，从1增加至2，等等。其中，k的取值范围为0至B-1之间的B个整数。
本领域技术人员能够理解，只要可以表示为通过参数k的取值变化来确定分组的方式，即使运用其他的数学手段或方法进行分析，仍然落入本发明实施例的范围内。
可选地，作为一个实施例，步骤103中所说的分组条件可以为第一分组条件：B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
可选地，作为另一个实施例，步骤103中所说的分组条件可以为第二分组条件：B组比特位中的每一组比特位包含的固定型故障的类型相同，固定型故障的类型包括正固定型故障和反固定型故障，正固定型故障为固定型故障所在的第一比特位的数值与该第一比特位对应地需要写入的数值相等，反固定型故障为固定型故障所在的第二比特位的数值与该第二比特位对应地需要写入的数值相反。
其中，满足第一分组条件的分组方式中，同一个组中包含的固定型故障的个数为零个或者一个。满足第二分组条件的分组方式中，同一个组中包含的固定型故障的个数可以是零个，也可以是一个或者多个。
可选地，作为一个实施例，在步骤104中，根据B组比特位中的每一组比特位包含的固定型故障的信息和与固定型故障所在的比特位对应的需要写 入的数值，确定B组比特位中的每一组比特位包含的固定型故障的类型。随后，根据B组比特位和B组比特位中的每一组比特位包含的固定型故障的类型，将需要写入的n个数值对应写入n个比特位。
具体地，当B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障时，可将与第i组比特位对应的需要写入的数值取反后再写入该第i组比特位。其中，i为不大于B的正整数。
具体地，作为另一个实施例，可为B组比特位中的第i组比特位分配对应的标识位mi，mi用于表示该第i组比特位包含的固定型故障的类型；进一步根据标识位mi，将与第i组比特位对应的需要写入的数值对应写入该第i组比特位。其中，i为不大于B的正整数。
例如，可用mi＝1表示B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。并且，当mi＝1时，将与第i组比特位对应的需要写入的数值对应地取反写入第i组比特位。
例如，可为B组比特位分配一个具有B个分量的矢量m，该矢量的第i个分量对应于B组比特位中的第i组比特位的标识位mi。并且可设置该矢量m的初始值均为0。当可确定某一组包含的固定型故障为反固定型故障时，将该组对应的标识位置为1。在写入时，对标识位为1的组，将与该组对应的需要写入的数值对应地取反写入。
应注意，本发明实施例中，对写入的具体方式不作限定。可选地，可根据所确定的分组进行写入。例如，可先将与确定的分组中的第一组比特位对应的需要写入的数值写入，再将与确定的分组中的第二组比特位对应的需要写入的数值写入，以此类推，完成B组比特位的n个数值的写入。或者，也可根据n个比特位的位置序号顺序或逆序写入。例如，可先确定n个比特位的第一个比特位所在的组，并根据该第一个比特位所在的组对应的标识位进行写入，再确定n个比特位的第二个比特位所在的组，并根据该第二个比特 位所在的组对应的标识位进行写入，以此类推，完成n个数值的写入。本领域技术人员能够理解，运用其他的方式完成写入，仍然落入本发明实施例的范围内。
本发明实施例中，所确定的分组的组数是固定不变的，即对于n个比特位，分组的组数保持B组不变。并且，k的取值为从0至B-1的B个整数，调整k确定分组的最多次数为B次。这样，能够保证分组的效率。并且，这种分组方式在实现上比较简单。
本发明实施例中，每一次写入都需要进行分组条件的判断。例如，当第一次写入确定的分组对应的k＝k1。第二次写入时进行分组条件判断的初始分组对应的k＝k1，可在k＝k1的基础上进行分组调整，并确定第二次写入时满足分组条件的对应的k。
图2是本发明另一个实施例的存储设备的写入方法的流程图。图2所示的写入方法包括：
201，获取需要写入的n个数值。
202，确定与该需要写入的n个数值对应的n个比特位，以及该n个比特位包含的固定型故障的信息，该固定型故障的信息包括固定型故障在该n个比特位中的位置和固定型故障所在的比特位的数值。
203，确定初始分组，以及固定型故障所在的组。
具体地，可将n个比特位初始分成B组比特位，并且前B-1组比特位中每一组比特位包含A个比特位，第B组比特位包含n-A×(B-1)个比特位。例如，将n个比特位的第一个比特位至第A个比特位分在第一组，将第A+1个比特位至第2A个比特位分在第二组，以此类推。
这种分组方式对应k＝0，关于k的描述如前所述，为避免重复，这里不再赘述。
应注意，初始分组对应的k也可为B-1的其他整数，本发明对此不作限定。
204，判断分组是否满足第一分组条件。当不满足时，执行步骤205；当满足时，执行步骤206。
应注意，若在步骤202中判断发现n个比特位中发生固定型故障的个数大于B，那么运用该方式分组，不可能满足第一分组条件。或者，另一方面，当步骤204判断发现不满足第一分组条件，即执行步骤205。当k从0增加至B-1，k在这B个取值的任一个时的分组都不满足第一分组条件。
205，k的取值增加1，重新进行分组。
k的取值增加1，重新确定的分组的方式如前所述，为避免重复，这里不再赘述。
206，确定分组中的每一组所包含的固定型故障的类型。
具体地，对比发生固定型故障所在的比特位的数值与该比特位上对应的需要写入的数值，以确定固定型故障的类型。当该比特位的数值与该比特位上对应的需要写入的数值相同时，固定型故障的类型为正固定型故障。当该比特位的数值与该比特位上对应的需要写入的数值相反时，固定型故障的类型为反固定型故障。
207，根据步骤206中确定的类型为每一组分配一个标识位。
具体地，若固定型故障的类型为反固定型故障，可将其所在的组的标识位分配为1，并将不包含固定型故障的组和固定型故障的类型为正固定型故障所在的组的标识位分配为0。
208，根据确定的分组以及对应的标识位，将n个数值进行写入。
具体地，将标识位为1的组，对应地取反写入。将标识位为0的组，对应地正常写入。
本发明实施例通过调整同一分组中相邻两个比特位的间隔，确定将n个比特位分成B组，可以根据所述B组的每一组中的固定型故障的信息，将需要写入的数值对应写入n个比特位，进而能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。
图3是本发明另一个实施例的存储设备的写入方法的流程图。图3所示的写入方法包括：
301，获取需要写入的n个数值。
302，确定与该需要写入的n个数值对应的n个比特位，以及该n个比特位包含的固定型故障的信息，该固定型故障的信息包括固定型故障在该n个比特位中的位置、固定型故障所在的比特位的数值、以及固定型故障的类型。
具体地，对比发生固定型故障所在的比特位的数值与该比特位上对应的需要写入的数值，以确定固定型故障的类型。当该比特位的数值与该比特位上对应的需要写入的数值相同时，固定型故障的类型为正固定型故障。当该比特位的数值与该比特位上对应的需要写入的数值相反时，固定型故障的类型为反固定型故障。
303，确定初始分组，以及固定型故障所在的组。
具体地，可将n个比特位初始分成B组比特位，并且前B-1组比特位中每一组比特位中包含A个比特位，第B组比特位包含n-A×(B-1)个比特位。例如，将n个比特位的第一个比特位至第A个比特位分在第一组，将第A+1个比特位至第2A个比特位分在第二组，以此类推。
这种分组方式对应k＝0，关于k的描述如前所述，为避免重复，这里不再赘述。
应注意，初始分组对应的k也可为B-1的其他整数，本发明对此不作限定。
304，判断分组是否满足第二分组条件。当不满足时，执行步骤305；当满足时，执行步骤306。
305，k的取值增加1，重新进行分组。
306，根据确定分组中的每一组所包含的固定型故障的类型，为每一组分配分配一个标识位。
307，根据确定的分组以及对应的标识位，将n个数值进行写入。
本发明实施例通过调整同一分组中相邻两个比特位的间隔，确定将n个比特位分成B组，可以根据所述B组的每一组中的固定型故障的信息，将需要写入的数值对应写入n个比特位，进而能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。
图4是本发明另一个实施例的存储设备的写入方法的具体例子的示意图。图4所示的方法以n＝32作为一个具体的例子描述本发明的实施例。
图4所示的每一行为32个比特位中的数值。图4中的虚线表示发生固定型故障的位置。
应注意，图4的实施例中，以n＝32为例进行描述。但本领域技术人员能够理解，n可以为其他正整数，这样的变化仍落入本发明实施例的范围内。
假设数据块包含n＝32个比特位。该32个比特位的数值见图4中的第一行：n个数值写入之前。为该32个比特位所在的位置顺序编号为1至32，32个比特位所在的位置序号与对应的数值如表1所示。其中，32个比特位中发生stack-at fault的位置序号为7,9,16,17,27。
表1
Figure PCTCN2014091069-appb-000007
应注意，本发明实施例中，位置序号是指将数据块的n个比特位进行顺序编号所产生的序号。
与该32个比特位对应的需要写入的数值见图4中的第二行：需要写入的n个数值。该32个位置序号与对应的需要写入的32个数值如表2所示。
表2
Figure PCTCN2014091069-appb-000008
取B为大于等于
Figure PCTCN2014091069-appb-000009
的最小素数，即B＝7；取
Figure PCTCN2014091069-appb-000010
即A＝5。
将表1所示的n＝32个比特位表示为B＝7行A＝5列的二维数组，如表3所示。为了方便描述，表3中示出的二维数组中为与表1所示的数值对应的位置序号。并且该二维数值的一行代表一组，即属于同一个组的任何两个比特位所在的行都相同。为了描述方便，本发明实施例假想地在表3中补充了位置序号33,34,35。并相对应地，假想位置序号为33,34,35的比特位为空。
表3
1 2 3 4 5
6 7 8 9 0
1 2 3 4 5
         
6 7 8 9 0
1 2 3 4 5
        0
         
在表3中，假设位置序号x在该二维数组中的行数为a，列数为b，则表3中位置序号的排布满足：x＝(b-1)×A+a。
应注意，表3只是示意性的描述，不是该32个位置序号表示为7行5列的二维数组的唯一表示。例如，该32个位置序号还可以竖向排列，即满足x＝(b-1)×B+a。本发明对此不作限定。
将32个比特位分为B＝7组，并且如表3所示的二维数组的每一行相应地作为一个组，即将该二维数组的行数作为组数，第一组对应的位置序号为1,2,3,4,5；第二组对应的位置序号为6,7,8,9,10；第三组对应的位置序号为11,12,13,14,15；第四组对应的位置序号为16,17,18,19,20；第五组对应的位置序号为21,22,23,24,25；第六组对应的位置序号为26,27,28,29,30；第七组对应的位置序号为31,32。
应注意，对n＝32的比特位来说，分成了7组，并且每组所包含的比特位的个数不超多A＝5个。假如包含三个假想的位置序号33,34,35，那么可以认为上述分组方式中，每一个组中均含有5个位置序号。
这样，便将该32个位置序号分成了7组。从第一个角度，这种分组方式可以理解为：这7组中的第i组的第j个的位置序号在该二维数组中的位置(qi,j,pi,j)满足：
pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)modB                   (1)
这里k＝0，B＝7。qi,j为这7组中的第i组的第j个的位置序号在该二维 数组中的行数，pi,j为这7组中的第i组的第j个的位置序号在该二维数组中的列数。
应注意，本发明实施例中，在二维数组中的位置是指在二维数组中的行和列的位置信息。
例如，以上述分组中的第四组为例，即i＝4，该第四组中的位置序号与其在二维数组中的位置(qi,j,pi,j)的对应关系如表4所示。可发现，(qi,j,pi,j)与i和j的对应关系满足上述(1)式。
表4
Figure PCTCN2014091069-appb-000011
从第二个角度，也可理解为，这种分组方式是：每一个组中的相邻的两个的位置序号的差为1。也就是说，每一个组中的相邻两个的位置序号的间隔为1。并且，该间隔可对应于第一个角度的k×A+1。
从第三个角度，也可理解为，这种分组方式是：当将n个比特位对应到二维笛卡尔坐标系中的n个数据点时，属于同一个组的任何两个比特位对应 的两个数据点在二维笛卡尔坐标系中的纵坐标都相同。与32个比特位对应的32个数据点在该二维笛卡尔坐标系中位于7条直线上，并且每条直线上的数据点位于同一个分组中。并且这7条直线的斜率为0。并且，该直线的斜率可对应于第一个角度的k。
应注意，上述所述的第一角度至第三角度，只是对当前分组的不同的数学理解。本领域技术人员能够理解，运用其他的数学手段或方法分析对该分组方式的分析，仍然落入本发明实施例的范围内。
对表3所示的分组方式，首先要判断该分组是否满足分组条件。
可选地，作为一个实施例，分组条件可以为第一分组条件：每一组中包含的固定型故障个数不超过一个。由于表1所示的32个比特位中发生固定型故障的位置序号为7,9,16,17,27。对照表3，可发现，固定型故障的位置序号为7和9同位于第二组，固定型故障的位置序号为16和17同位于第四组。即上述的分组中，第二组和第四组中包含的固定型故障个数都超过了一个，不满足第一分组条件。此时需要对上述分组方式进行调整，对该32个比特位进行重新分组。
对应于上述第一个角度，重新分组的方式可以是k增加1。即前述k＝0，重新分组的k＝1。则，新的分组方式为：第一组对应的位置序号为1,7,13,19,25；第二组对应的位置序号为6,12,18,24,30；第三组对应的位置序号为11,17,23,29,○；第四组对应的位置序号为16,22,28,□,5；第五组对应的位置序号为21,27,◎,4,10；第六组对应的位置序号为26,32,3,9,15；第七组对应的位置序号为31,2,8,14,20。其中，◎，□和○表示空，依次代表表3中的假想的位置序号33,34和35。
参考表3，可见，这样的新的分组方式中，属于同一个组的任何两个比特位所在的行不同且所在的列不同。并且，对应于上述第一个角度，这种新的分组方式中，这7组中的第i组的第j个的位置序号在该二维数组中的位置(qi,j,pi,j)仍然满足上述(1)式，此时k＝1。为避免重复，这里不再赘述。
对应于上述第二个角度，也可理解为，这种新的分组方式是：每一个组中的相邻的两个的位置序号的差为6。也就是说，每一个组中的相邻两个的位置序号的间隔为6。并且，该间隔可对应于第一个角度的k×A+1。以该新的分组中的第四组为例进行分析，其中，第四组的前三个位置序号16,22,28的两两之间的间隔均为6，第四个位置序号□代表假想的位置序号34，且34与28之间的间隔为6，第五个位置序号5可以理解为：35的下一个位置序号为1，即可以假想从1至35的位置序号排成一个首尾相接的圆环，这样与34的间隔为6的下一个位置序号即为5。另外，由于每个组中所包含的位置序号的个数为5个，该5个指包括假想的位置序号的情形，而在第四组中的第五个已经确定为位置序号5，因此该分组方式的第四组即可确定。对应于上述第二个角度的其他几个组中的位置序号可类似理解，为避免重复，这里不再赘述。
对应于上述第三个角度，也可理解为，这种新的分组方式是：当将32个比特位对应到二维笛卡尔坐标系中的32个数据点时，属于同一个组的任何两个比特位对应的两个数据点，在二维笛卡尔坐标系中的横坐标不同且纵坐标也不同。并且，可作出斜率相等的多条直线，位于同一条直线上的所有数据点均属于同一个组。并且，该多条直线的斜率可对应于第一个角度的k＝1。
进一步地，要判断该新的分组是否满足第一分组条件。由于表1所示的32个比特位中发生固定型故障的位置序号为7,9,16,17,27。结合该新的分组方式，可发现，发生固定型故障的位置序号为7,9,16,17,27分别位于新的分组中的第一组，第六组，第四组，第三组和第五组。也就是说，该新的分组方式满足第一分组条件：每一组中包含的固定型故障个数不超过一个。从而可确定满足分组条件的7组为该新的分组。
应注意，假设如果该新的分组仍然不满足第一分组条件，可将k继续增加1，得到另一新的分组，并进一步判断该另一新的分组是否满足第一分组条件。
可选地，作为另一个实施例，分组条件可以为第二分组条件：每一组中 包含的固定型故障的类型相同，固定型故障的类型包括正固定型故障或者反固定型故障，正固定型故障为固定型故障所在的第一比特位的数值与该第一比特位上需要写入的数值相等，反固定型故障为固定型故障所在的第二比特位的数值与该第二比特位上需要写入的数值相反。
由于表1所示的32个比特位中发生固定型故障的位置序号为7,9,16,17,27。结合表1和表2，可知表1中位置序号为7的比特位上的数值为“0”，与表2中该位置上需要写入的数值“0”相等，因此位置序号为7的固定型故障的类型为正固定型故障。类似地，可知，位置序号为9的固定型故障的类型为正固定型故障，位置序号为16的固定型故障的类型为反固定型故障，位置序号为17的固定型故障的类型为正固定型故障，位置序号为27的固定型故障的类型为反固定型故障。
对于上述分组方式，虽然位置序号为7和9同属于第二组，但是位置序号为7和9的固定型故障的类型均为正固定型故障，满足第二分组条件。位置序号为16和17同属于第四组，但是位置序号为7和9的固定型故障的类型不相同，不满足第二分组条件。因此，此时也需要对上述分组方式进行调整，对该32个比特位进行重新分组。
确定重新分组的方法与前述根据第一分组条件判断后进行重新分组的方法类似，为避免重复，这里不再赘述。由前述分析可知，新的分组方式为：第一组对应的位置序号为1,7,13,19,25；第二组对应的位置序号为6,12,18,24,30；第三组对应的位置序号为11,17,23,29,○；第四组对应的位置序号为16,22,28,□,5；第五组对应的位置序号为21,27,◎,4,10；第六组对应的位置序号为26,32,3,9,15；第七组对应的位置序号为31,2,8,14,20。其中，◎，□和○表示空，依次代表表3中的假想的位置序号33,34和35。
进一步地，要判断该新的分组是否满足第二分组条件。由于表1所示的32个比特位中发生固定型故障的位置序号为7,9,16,17,27。结合该新的分组方式，可发现，发生固定型故障的位置序号为7,9,16,17,27分别位于新的分组中 的第一组，第六组，第四组，第三组和第五组。也就是说，该新的分组方式满足第二分组条件：每一组中包含的固定型故障的类型相同。从而可确定满足分组条件的7组为该新的分组。
应注意，假设如果该新的分组仍然不满足第二分组条件，可将k继续增加1，得到另一新的分组，并进一步判断该另一新的分组是否满足第二分组条件。
应注意，本发明实施例中，根据第一分组条件所确定的分组方式，和根据第二分组条件所确定的分组方式，是相互独立的。两种分组条件确定的分组方式可以是相同的，也可以是不同的。
更进一步地，根据该新的分组的每一组中包含的固定型故障的信息，将表2中需要写入的32个数值对应写入表1的32个比特位中。这里的固定型故障的信息包括固定型故障的位置序号和固定型故障的类型。
可选地，作为一个实施例，根据第一分组条件确定的新的分组之后，首先每一组中包含的固定型故障的类型。由于发生固定型故障的位置序号为7,9,16,17,27分别位于新的分组中的第一组，第六组，第四组，第三组和第五组。结合表1和表2分析，可知，位置序号为7,9和17的固定型故障的类型为正固定型故障，位置序号为16和27的固定型故障的类型为反固定型故障。将与反固定型故障所在的组，第四组和第五组，对应的需要写入的数值取反写入；将其他组对应的需要写入的数值正常写入。写入之后的32个比特位的数值见图4中的第三行：n个数值写入之后。这样，完成写入之后的32个位置序号与对应的写入的数值可如表5所示。
表5
Figure PCTCN2014091069-appb-000012
Figure PCTCN2014091069-appb-000013
或者，也可为该新的分组的每个组指定标识位mi，i代表7组中的第i组，且i为不大于7的正整数。对应地，7个组有7个标识位，标识位用来表示该组所包含的固定型故障的类型。例如，可用0表示正固定型故障，用1表示反固定型故障。这样，上述新的分组对应的标识位依次为0001100。进一步地，可根据各个组对应的标识位进行写入。具体地，当某一组的标识位为1时，将与该组对应的需要写入的数值取反写入；当某一组的标识位为0时，将与该组对应的需要写入的数值正常写入。
应注意，本发明对标识位的形式不作限定。例如，该标识位可以是具有B个分量的矢量m，该矢量的第i个分量对应于B组比特位中的第i组比特位的标识位mi。并且可设置该矢量的初始值均为0。其中，i为不大于B的正整数。
应注意，本发明实施例中，对写入的具体方式不作限定。可选地，可根据所确定的分组进行写入。例如，第一组的位置序号为1,7,13,19,25，且第一组中所包含的固定型故障的类型为正固定型故障，或者第一组的标识位为0，则将与位置序号1,7,13,19,25对应的数值正常写入。之后再按照第二组至第七组的顺序完成写入。可选地，也可根据位置序号顺序写入。例如，对于位置序号1，首先判断其所在的组为第一组，且第一组中所包含的固定型故障的类型为正固定型故障，或者第一组的标识位为0，则将与该位置序号1对应的数值正常写入。之后，对于位置序号2，首先判断其所在的组为第七组，且第七组中不包含固定型故障，或者第一组的标识位为0，则将与该位置序号2对应的数值正常写入。之后再按照位置序号3至32的顺序完成写入。或者也可根 据位置序号逆序写入。也可以其他的方式完成写入。本领域技术人员能够理解，运用其他的方式完成写入，仍然落入本发明实施例的范围内。
可选地，作为另一个实施例，根据第二分组条件确定的新的分组之后，可知，该新的分组中的第四组和第五组所包含的固定型故障的类型反固定型故障，其他组所包含的固定型故障的类型为正固定型故障或者不包含固定型故障。将与反固定型故障所在的组对应的需要写入的数值取反写入；将其他组对应的需要写入的数值正常写入。这样，完成写入之后的32个比特位的数值可如表5所示。
类似地，也可引入与每组对应的标识位，并进一步根据标识位进行写入。该标识位的具体描述可参见上述针对第一分组条件的描述，为避免重复，这里不再赘述。
图5是本发明一个实施例的存储设备的写入装置的框图。图5所示的写入装置500包括获取单元501、第一确定单元502、分组单元503和写入单元504。
获取单元501，用于获取需要写入的n个数值。
第一确定单元502，用于确定与该需要写入的n个数值对应的n个比特位，以及该n个比特位包含的固定型故障的信息，该固定型故障的信息包括该固定型故障在该n个比特位中的位置和该固定型故障所在的比特位的数值。
分组单元503，用于将该n个比特位分成B组比特位，以使得该B组比特位满足分组条件，并且使得当将该n个比特位表示为B行A列的二维数组时，该n个比特位中的属于同一个组的任何两个比特位所在的行不同且所在的列不同，或者该n个比特位中的属于同一个组的任何两个比特位所在的行相同，该分组条件用于限定该B组比特位中的每一组比特位包含的固定型故障。
写入单元504，用于根据该B组比特位中的每一组比特位包含的固定型故障的信息和与该固定型故障所在的比特位对应的需要写入的数值，将该需 要写入的n个数值对应写入该n个比特位，
其中n、A和B为正整数，n≤A×B。
本发明实施例通过调整同一分组中相邻两个比特位的间隔，确定将n个比特位分成B组，可以根据该B组的每一组中的固定型故障的信息，将需要写入的数值对应写入n个比特位，进而能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。
可选地，作为一个实施例，分组单元502具体用于：将该n个比特位分成B组比特位，以使得当将该n个比特位表示为该B行A列的二维数组时，该B组比特位中的第i组比特位的第j个比特位在该B行A列的二维数组中的位置满足：pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)modB；调整该k的取值，使得该B组比特位满足分组条件。
其中，pi,j为该B组比特位中的第i组比特位的第j个比特位在该二维数组中的列数，qi,j为该B组比特位中的第i组比特位的第j个比特位在该二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，该调整该k的取值包括该k的取值增加1，B为不小于
Figure PCTCN2014091069-appb-000014
的最小素数，且
Figure PCTCN2014091069-appb-000015
可选地，作为一个实施例，分组条件为：该B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
可选地，作为另一个实施例，分组条件为：该B组比特位中的每一组比特位包含的固定型故障的类型相同，该固定型故障的类型包括正固定型故障或者反固定型故障，该正固定型故障为该固定型故障所在的第一比特位的数值与该第一比特位对应的需要写入的数值相等，该反固定型故障为该固定型故障所在的第二比特位的数值与该第二比特位对应的需要写入的数值相反。
可选地，作为一个实施例，写入单元504包括第二确定单元505和第一 写入单元506，第二确定单元505用于根据该B组比特位中的每一组比特位包含的固定型故障的信息和与该固定型故障所在的比特位对应的需要写入的数值，确定该B组比特位中的每一组比特位包含的固定型故障的类型。第一写入单元506用于根据该B组比特位和该B组比特位中的每一组比特位包含的固定型故障的类型，将该需要写入的n个数值对应写入该n个比特位。
可选地，作为另一个实施例，第一写入单元506具体用于：当所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障时，将与所述第i组比特位对应的需要写入的数值对应地取反写入所述第i组比特位，其中，i为不大于B的正整数。
可选地，作为另一个实施例，写入单元504还包括分配单元507，分配单元507用于为该B组比特位中的第i组比特位分配标识位mi，该mi用于表示该B组比特位中的第i组比特位包含的固定型故障的类型。第一写入单元506具体用于根据该标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入该第i组比特位。其中，i为不大于B的正整数。
具体地，当该标识位表示该B组的第i组包含的固定型故障的类型为反固定型故障时，将与该第i组对应的需要写入的数值取反写入。
或者，具体地，当该标识位mi＝1时，将与该第i组比特位对应的需要写入的数值取反写入该第i组比特位，该标识位mi＝1表示该B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。
写入装置500能够实现图2至图4的实施例中由写入装置实现的各个过程，为避免重复，这里不再赘述。
图6是本发明一个实施例的存储设备的写入装置的框图。图6所示的写入装置600包括处理器601、存储器602和收发电路603。
收发电路603，用于获取需要写入的n个数值。
处理器601，用于确定与该需要写入的n个数值对应的n个比特位，以及 该n个比特位包含的固定型故障的信息，该固定型故障的信息包括该固定型故障在该n个比特位中的位置和该固定型故障所在的比特位的数值。用于将该n个比特位分成B组比特位，以使得该B组比特位满足分组条件，并且使得当将该n个比特位表示为B行A列的二维数组时，该n个比特位中的属于同一个组的任何两个比特位所在的行不同且所在的列不同，或者该n个比特位中的属于同一个组的任何两个比特位所在的行相同，该分组条件用于限定该B组比特位中的每一组比特位包含的固定型故障。并用于根据该B组比特位中的每一组比特位包含的固定型故障的信息和与该固定型故障所在的比特位对应的需要写入的数值，将该需要写入的n个数值对应写入该n个比特位，其中n、A和B为正整数，n≤A×B。
本发明实施例通过调整同一分组中相邻两个比特位的间隔，确定将n个比特位分成B组，可以根据该B组的每一组中的固定型故障的信息，将需要写入的数值对应写入n个比特位，进而能够有效地防止阻抗性存储设备中的固定型故障导致的写入错误。
写入装置600中的各个组件通过总线系统604耦合在一起，其中总线系统604除包括数据总线之外，还包括电源总线、控制总线和状态信号总线。但是为了清楚说明起见，在图6中将各种总线都标为总线系统604。
上述本发明实施例揭示的方法可以应用于处理器601中，或者由处理器601实现。处理器601可能是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法的各步骤可以通过处理器601中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器601可以是通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现成可编程门阵列(Field Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本发明实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结 合本发明实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存取存储器(Random Access Memory，RAM)、闪存、只读存储器(Read-Only Memory，ROM)、可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器602，处理器601读取存储器602中的信息，结合其硬件完成上述方法的步骤。
可选地，作为一个实施例，处理器601具体用于：将该n个比特位分成B组比特位，以使得当将该n个比特位表示为该B行A列的二维数组时，该B组比特位中的第i组比特位的第j个比特位在该B行A列的二维数组中的位置满足：pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)modB；调整该k的取值，使得该B组比特位满足分组条件。
其中，pi,j为该B组比特位中的第i组比特位的第j个比特位在该二维数组中的列数，qi,j为该B组比特位中的第i组比特位的第j个比特位在该二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，该调整该k的取值包括该k的取值增加1，B为不小于
Figure PCTCN2014091069-appb-000016
的最小素数，且
Figure PCTCN2014091069-appb-000017
可选地，作为一个实施例，分组条件为：该B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
可选地，作为另一个实施例，分组条件为：该B组比特位的每一组比特位包含的固定型故障的类型相同，该固定型故障的类型包括正固定型故障或者反固定型故障，该正固定型故障为该固定型故障所在的第一比特位的数值与该第一比特位对应的需要写入的数值相等，该反固定型故障为该固定型故障所在的第二比特位的数值与该第二比特位对应的需要写入的数值相反。
可选地，作为一个实施例，处理器601具体用于：根据该B组比特位中 的每一组比特位包含的固定型故障的信息和与该固定型故障所在的比特位对应的需要写入的数值，确定该B组比特位中的每一组比特位包含的固定型故障的类型。并根据该B组比特位和该B组比特位中的每一组比特位包含的固定型故障的类型，将该需要写入的n个数值对应写入该n个比特位。
可选地，作为另一个实施例，处理器601用于当所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障时，将与所述第i组比特位对应的需要写入的数值对应地取反写入所述第i组比特位，其中，i为不大于B的正整数。
可选地，作为另一个实施例，处理器601具体用于：为该B组比特位中的第i组比特位分配标识位mi，该mi用于表示该B组比特位中的第i组比特位包含的固定型故障的类型；根据该标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入该第i组比特位。其中，i为不大于B的正整数。
具体地，当该标识位表示该B组的第i组包含的固定型故障的类型为反固定型故障时，将与该第i组对应的需要写入的数值取反写入。
或者，具体地，当该标识位mi＝1时，将与该第i组比特位对应的需要写入的数值取反写入该第i组比特位，该标识位mi＝1表示该B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。
写入装置600能够实现图2至图4的实施例中由写入装置实现的各个过程，为避免重复，这里不再赘述。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描 述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易 想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以权利要求的保护范围为准。

Claims (16)

  1. 一种存储设备的写入方法，其特征在于，所述写入方法包括：
    获取需要写入的n个数值；
    确定与所述需要写入的n个数值对应的n个比特位，以及所述n个比特位包含的固定型故障的信息，所述固定型故障的信息包括所述固定型故障在所述n个比特位中的位置和所述固定型故障所在的比特位的数值；
    将所述n个比特位分成B组比特位，以使得所述B组比特位满足分组条件，并且使得当将所述n个比特位表示为B行A列的二维数组时，所述n个比特位中的属于同一个组的任何两个比特位所在的行不同且所在的列不同，或者所述n个比特位中的属于同一个组的任何两个比特位所在的行相同，所述分组条件用于限定所述B组比特位中的每一组比特位包含的固定型故障；
    根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，将所述需要写入的n个数值对应写入所述n个比特位，
    其中，n、A和B为正整数，n≤A×B。
  2. 根据权利要求1所述的写入方法，其特征在于，所述将所述n个比特位分成B组比特位，以使得所述B组比特位满足分组条件，包括：
    将所述n个比特位分成B组比特位，以使得当将所述n个比特位表示为所述B行A列的二维数组时，所述B组比特位中的第i组比特位的第j个比特位在所述B行A列的二维数组中的位置满足：
    pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)mod B；
    调整所述k的取值，使得所述B组比特位满足分组条件，
    其中，pi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的列数，qi,j为所述B组比特位中的第i组比特位的第j个比特 位在所述二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，所述调整所述k的取值包括所述k的取值增加1，B为不小于
    Figure PCTCN2014091069-appb-100001
    的最小素数，且
    Figure PCTCN2014091069-appb-100002
  3. 根据权利要求1或2所述的写入方法，其特征在于，所述分组条件包括：所述B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
  4. 根据权利要求1或2所述的写入方法，其特征在于，所述分组条件包括：所述B组比特位中的每一组比特位包含的固定型故障的类型相同，所述固定型故障的类型包括正固定型故障或者反固定型故障，所述正固定型故障为所述固定型故障所在的第一比特位的数值与所述第一比特位对应的需要写入的数值相等，所述反固定型故障为所述固定型故障所在的第二比特位的数值与所述第二比特位对应的需要写入的数值相反。
  5. 根据权利要求1至4任一项所述的写入方法，其特征在于，所述根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，将所述需要写入的n个数值对应写入所述n个比特位，包括：
    根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，确定所述B组比特位中的每一组比特位包含的固定型故障的类型；
    根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n个数值对应写入所述n个比特位。
  6. 根据权利要求5所述的写入方法，其特征在于，所述根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n个数值对应写入所述n个比特位，包括：
    当所述B组比特位中的第i组比特位包含的固定型故障的类型为反固 定型故障时，将与所述第i组比特位对应的需要写入的数值对应地取反写入所述第i组比特位，其中，i为不大于B的正整数。
  7. 根据权利要求5所述的写入方法，其特征在于，所述根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n个数值对应写入所述n个比特位，包括：
    为所述B组比特位中的第i组比特位分配标识位mi，所述mi用于表示所述B组比特位中的第i组比特位包含的固定型故障的类型；
    根据所述标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入所述第i组比特位，
    其中，i为不大于B的正整数。
  8. 根据权利要求7所述的写入方法，其特征在于，所述根据所述标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入所述第i组比特位，包括：
    当所述标识位mi＝1时，将与所述第i组比特位对应的需要写入的数值取反写入所述第i组比特位，所述标识位mi＝1表示所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。
  9. 一种存储设备的写入装置，其特征在于，所述写入装置包括：
    获取单元，用于获取需要写入的n个数值；
    第一确定单元，用于确定与所述需要写入的n个数值对应的n个比特位，以及所述n个比特位包含的固定型故障的信息，所述固定型故障的信息包括所述固定型故障在所述n个比特位中的位置和所述固定型故障所在的比特位的数值；
    分组单元，用于将所述n个比特位分成B组比特位，以使得所述B组比特位满足分组条件，并且使得当将所述n个比特位表示为B行A列的二维数组时，所述n个比特位中的属于同一个组的任何两个比特位所在的行 不同且所在的列不同，或者所述n个比特位中的属于同一个组的任何两个比特位所在的行相同，所述分组条件用于限定所述B组比特位中的每一组比特位包含的固定型故障；
    写入单元，用于根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，将所述需要写入的n个数值对应写入所述n个比特位，
    其中n、A和B为正整数，n≤A×B。
  10. 根据权利要求9所述的写入装置，其特征在于，所述分组单元，具体用于：
    将所述n个比特位分成B组比特位，以使得当将所述n个比特位表示为所述B行A列的二维数组时，所述B组比特位中的第i组比特位的第j个比特位在所述B行A列的二维数组中的位置满足：
    pi,j+1＝pi,j+1，qi,j+1＝(qi,j+k)mod B；
    调整所述k的取值，使得所述B组比特位满足分组条件，
    其中，pi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的列数，qi,j为所述B组比特位中的第i组比特位的第j个比特位在所述二维数组中的行数，i和qi,j为不大于B的正整数，j和pi,j为不大于A的正整数，k为小于B的非负整数，所述调整所述k的取值包括所述k的取值增加1，B为不小于
    Figure PCTCN2014091069-appb-100003
    的最小素数，且
    Figure PCTCN2014091069-appb-100004
  11. 根据权利要求9或10所述的写入装置，其特征在于，所述分组条件为：所述B组比特位中的每一组比特位包含的固定型故障的个数不超过一个。
  12. 根据权利要求9或10所述的写入装置，其特征在于，所述分组条件为：所述B组比特位中的每一组比特位包含的固定型故障的类型相同， 所述固定型故障的类型包括正固定型故障或者反固定型故障，所述正固定型故障为所述固定型故障所在的第一比特位的数值与所述第一比特位对应的需要写入的数值相等，所述反固定型故障为所述固定型故障所在的第二比特位的数值与所述第二比特位对应的需要写入的数值相反。
  13. 根据权利要求9至12所述的写入装置，其特征在于，所述写入单元，包括：
    第二确定单元，用于根据所述B组比特位中的每一组比特位包含的固定型故障的信息和与所述固定型故障所在的比特位对应的需要写入的数值，确定所述B组比特位中的每一组比特位包含的固定型故障的类型；
    第一写入单元，用于根据所述B组比特位和所述B组比特位中的每一组比特位包含的固定型故障的类型，将所述需要写入的n个数值对应写入所述n个比特位。
  14. 根据权利要求13所述的写入装置，其特征在于，所述第一写入单元，具体用于：
    当所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障时，将与所述第i组比特位对应的需要写入的数值对应地取反写入所述第i组比特位，其中，i为不大于B的正整数。
  15. 根据权利要求13所述的写入装置，其特征在于，所述写入单元，还包括分配单元，
    所述分配单元，用于为所述B组比特位中的第i组比特位分配标识位mi，所述mi用于表示所述B组比特位中的第i组比特位包含的固定型故障的类型；
    所述第一写入单元，具体用于根据所述标识位mi，将与所述第i组比特位对应的需要写入的数值对应写入所述第i组比特位，
    其中，i为不大于B的正整数。
  16. 根据权利要求15所述的写入装置，其特征在于，所述第一写入单 元，具体用于：
    当所述标识位mi＝1时，将与所述第i组比特位对应的需要写入的数值取反写入所述第i组比特位，所述标识位mi＝1表示所述B组比特位中的第i组比特位包含的固定型故障的类型为反固定型故障。
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