WO2015039974A3 - Cellule de mémoire non volatile, procédé de programmation, d'effacement et de lecture d'une telle cellule et dispositif de mémoire non volatile - Google Patents

Cellule de mémoire non volatile, procédé de programmation, d'effacement et de lecture d'une telle cellule et dispositif de mémoire non volatile Download PDF

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Publication number
WO2015039974A3
WO2015039974A3 PCT/EP2014/069544 EP2014069544W WO2015039974A3 WO 2015039974 A3 WO2015039974 A3 WO 2015039974A3 EP 2014069544 W EP2014069544 W EP 2014069544W WO 2015039974 A3 WO2015039974 A3 WO 2015039974A3
Authority
WO
WIPO (PCT)
Prior art keywords
volatile memory
cell
memory cell
programming
deleting
Prior art date
Application number
PCT/EP2014/069544
Other languages
English (en)
Other versions
WO2015039974A2 (fr
Inventor
Willem-Jan Toren
Original Assignee
Semiconsultor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconsultor filed Critical Semiconsultor
Publication of WO2015039974A2 publication Critical patent/WO2015039974A2/fr
Publication of WO2015039974A3 publication Critical patent/WO2015039974A3/fr

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/60—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

Abstract

La présente invention propose une cellule de mémoire non volatile et un dispositif de mémoire non volatile fonctionnant avec une faible tension de programmation et d'effacement, avec une très bonne rétention en mémoire. De plus, la cellule de mémoire non volatile comprend un circuit de sortie permettant une lecture rapide et à faible puissance des informations de la cellule de mémoire.
PCT/EP2014/069544 2013-09-20 2014-09-12 Cellule de mémoire non volatile, procédé de programmation, d'effacement et de lecture d'une telle cellule et dispositif de mémoire non volatile WO2015039974A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1359053A FR3011123B1 (fr) 2013-09-20 2013-09-20 Cellule de memoire non volatile, procede de programmation d'effacement et de lecture d'une telle cellule et dispositif de memoire non volatile
FR1359053 2013-09-20

Publications (2)

Publication Number Publication Date
WO2015039974A2 WO2015039974A2 (fr) 2015-03-26
WO2015039974A3 true WO2015039974A3 (fr) 2015-07-16

Family

ID=50231252

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2014/069544 WO2015039974A2 (fr) 2013-09-20 2014-09-12 Cellule de mémoire non volatile, procédé de programmation, d'effacement et de lecture d'une telle cellule et dispositif de mémoire non volatile

Country Status (2)

Country Link
FR (1) FR3011123B1 (fr)
WO (1) WO2015039974A2 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5272368A (en) * 1991-05-10 1993-12-21 Altera Corporation Complementary low power non-volatile reconfigurable EEcell
US5587945A (en) * 1995-11-06 1996-12-24 Advanced Micro Devices, Inc. CMOS EEPROM cell with tunneling window in the read path
US5892709A (en) * 1997-05-09 1999-04-06 Motorola, Inc. Single level gate nonvolatile memory device and method for accessing the same
US20090065838A1 (en) * 2007-09-12 2009-03-12 Takeshi Nagao Semiconductor memory device and method of manufacturing the same
US20120037971A1 (en) * 2010-08-13 2012-02-16 Samsung Electronics Co., Ltd. Nonvolatile memory device and method of forming the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB979384A (en) 1962-02-23 1965-01-01 Cav Ltd Reciprocating liquid fuel pumps
US4203158A (en) 1978-02-24 1980-05-13 Intel Corporation Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
US5029130A (en) 1990-01-22 1991-07-02 Silicon Storage Technology, Inc. Single transistor non-valatile electrically alterable semiconductor memory device
US5780341A (en) 1996-12-06 1998-07-14 Halo Lsi Design & Device Technology, Inc. Low voltage EEPROM/NVRAM transistors and making method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5272368A (en) * 1991-05-10 1993-12-21 Altera Corporation Complementary low power non-volatile reconfigurable EEcell
US5587945A (en) * 1995-11-06 1996-12-24 Advanced Micro Devices, Inc. CMOS EEPROM cell with tunneling window in the read path
US5892709A (en) * 1997-05-09 1999-04-06 Motorola, Inc. Single level gate nonvolatile memory device and method for accessing the same
US20090065838A1 (en) * 2007-09-12 2009-03-12 Takeshi Nagao Semiconductor memory device and method of manufacturing the same
US20120037971A1 (en) * 2010-08-13 2012-02-16 Samsung Electronics Co., Ltd. Nonvolatile memory device and method of forming the same

Also Published As

Publication number Publication date
WO2015039974A2 (fr) 2015-03-26
FR3011123B1 (fr) 2016-12-23
FR3011123A1 (fr) 2015-03-27

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