WO2015039598A1

WO2015039598A1 - Fault locating method and device

Info

Publication number: WO2015039598A1
Application number: PCT/CN2014/086684
Authority: WO
Inventors: 刘通良; 姜广吉; 陈俊杰
Original assignee: 华为技术有限公司
Priority date: 2013-09-17
Filing date: 2014-09-17
Publication date: 2015-03-26
Also published as: CN103500133A

Abstract

Provided are a fault locating method and device. The fault locating method of the present invention comprises: monitoring a hardware exception trigger condition when a powered-on start device executes a basic input and output system (BIOS) program; collecting exception information when the exception trigger condition is monitored, the exception information at least comprising fault information about a central processing unit (CPU); and uploading the exception information to a monitoring server through a network. In the embodiments of the present invention, the viewing and accurate locating of fault information is realized in a remote manner.

Description

Fault location method and device

The present application claims priority to Chinese Patent Application No. 201310425373.9, filed on Sep. 17, 2013, the entire disclosure of which is hereby incorporated by reference.

Technical field

The embodiments of the present invention relate to computer technologies, and in particular, to a fault location method and apparatus.

Background technique

The reliability of computer systems, especially server products, has always been a hot topic. If the server is faulty, it needs to be detected, located, and removed in time. This requires that the server can be conveniently used when the server does not have a standard cathode ray tube (CRT) or liquid crystal display (LCD) display function. Present the fault information to the user. At this time, the collection and location of fault information in the Power On Self-Test (POST) phase is very important.

A logical block diagram of a typical computer or server is shown in FIG. 1. The main board 100 includes: a memory 10, a CPU 20, a north bridge 30, a south bridge 40, a peripheral 50, and a basic input and output system (BIOS) 60. . In addition, the motherboard 100 is also connected to a peripheral expansion device (hard disk, graphics card, etc.) 70.

In the prior art, on the basis of FIG. 1, an apparatus 80 is added, wherein the apparatus 80 includes a memory 81, a controller 82 and a display module 83, as shown in FIG. Use the structure shown in Figure 2 to perform the following steps to achieve the display of the self-test information in the POST phase:

1) Power on the computer device and execute the BIOS 60 program;

2) The POST phase self-test information is sent to the controller 82 according to a certain data structure;

3) The controller 82 sends the decoded and decoded data to the display module 83 to display the POST phase self-test information in real time.

The prior art requires an additional controller 82 and a display module 83 to display POST phase self-test information through the display module 83, the self-test information includes fault information; and the user needs to obtain the self-test information. Visit the equipment site.

Summary of the invention

The embodiment of the invention provides a fault location method and device for realizing the viewing and positioning of fault information in a remote manner.

In a first aspect, an embodiment of the present invention provides a fault location method, including:

Monitoring the hardware abnormal trigger condition when the power-on boot device executes the basic input/output system BIOS program;

Collecting abnormal information when the abnormal trigger condition is detected, where the abnormal information includes at least fault information of the CPU of the central processing unit;

The abnormal information is reported to the monitoring server through the network.

In a first possible implementation manner of the first aspect, when the abnormal trigger condition is detected, collecting abnormal information includes:

During the execution of the BIOS program, if an abnormal trigger condition is detected, an entry function corresponding to each abnormal information trigger source is triggered;

The exception function is collected using the entry function.

According to the first possible implementation manner of the first aspect, in a second possible implementation manner, in the process of executing the BIOS program, if an abnormal trigger condition is detected, triggering an identifier corresponding to each abnormal information trigger source The entry functions include:

If the CPU processor abnormal trigger condition is detected, the corresponding entry function of the CPU is triggered;

If the memory exception trigger condition is detected, the memory corresponding entry function is triggered;

If the north bridge abnormal trigger condition is detected, the corresponding entrance function of the north bridge is triggered;

If the South Bridge abnormal trigger condition is detected, the corresponding entry function of the South Bridge is triggered.

According to the first aspect, any one of the first to the second possible implementation manners of the first aspect, in a third possible implementation manner, when the power-on booting device executes the basic input/output system BIOS program , monitoring hardware exception trigger conditions include:

Monitors whether to generate a system management interrupt SMI or different when the device is powered on to execute the BIOS program. The event event or exception message, if yes, determines that an exception trigger condition is detected, wherein the exception event or exception message is an event or message generated in the BIOS program that triggers an exception.

In a fourth possible implementation manner of the first aspect, when the abnormal trigger condition is detected, collecting the abnormal information includes:

When an abnormal trigger condition is detected, the fault information is collected, and the software call stack relationship and/or the value of the program counter and the program status register at the time of the fault occurrence are collected to indicate the location of the fault information.

In a fifth possible implementation manner of the foregoing aspect, the reporting the abnormal information to the monitoring server by using the network includes:

The abnormal information is reported to the monitoring server by using the intelligent platform management interface IPMI or standard Ethernet.

According to the first aspect, any one of the first to fifth possible implementation manners of the first aspect, in the sixth possible implementation, before the reporting the abnormality information to the monitoring server by using the network, Also includes:

The exception information is encapsulated into capsules including header information, hardware error information, program run stack information, program counters, program status register information, and trailer information.

In a second aspect, an embodiment of the present invention provides a fault location apparatus, including:

The monitoring driving module is configured to monitor a hardware abnormal triggering condition when the power-on starting device executes the basic input/output system BIOS program;

An abnormality information collecting module, configured to collect abnormal information when the monitoring driving module detects an abnormal triggering condition, where the abnormality information includes at least fault information of a CPU of the central processing unit;

The information reporting module is configured to report the abnormality information to the monitoring server through the network.

In a first possible implementation manner of the second aspect, the abnormal information collecting module is specifically configured to: when an abnormal trigger condition is detected in the process of executing the BIOS program, trigger an entry function corresponding to each abnormal information trigger source And, using the entry function to collect exception information.

According to a first possible implementation of the second aspect, in a second possible implementation, The abnormal information collection module is also used to:

If the CPU abnormal trigger condition is detected, the corresponding entry function of the CPU is triggered;

According to the second aspect, any one of the first to the second possible implementation manners of the second aspect, in a third possible implementation, the monitoring driving module is specifically configured to execute a BIOS on the power-on booting device At the time of the program, monitoring whether a system management interrupt SMI, an abnormal event event, or an exception message is generated, and if so, determining that an abnormal trigger condition is detected, wherein the abnormal event or the abnormal message is an execution of the abnormality generated by the BIOS program. Event or message.

In a fourth possible implementation manner of the second aspect, the abnormal information collecting module is specifically configured to collect fault information when an abnormal trigger condition is detected, and collect a software call stack relationship and/or a program counter when the fault occurs. And the value of the program status register to indicate the location of the fault information.

The fault location method and device of the embodiment of the present invention can report the abnormal information to the monitoring server, so that the operator can remotely view the abnormal information, that is, the operator can perform fault location and troubleshooting according to the reported abnormal information on the monitoring server side, and reduce the use. Dimensional cost.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description of the drawings used in the embodiments or the prior art description will be briefly described below. Obviously, the drawings in the following description It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any inventive labor.

Figure 1 is a logical block diagram of a typical computer or server;

2 is a schematic structural diagram of a self-checking information display for a POST phase in the prior art;

3 is a flowchart of Embodiment 1 of a fault location method according to the present invention;

4 is a flowchart of Embodiment 2 of a fault location method according to the present invention;

5 is a diagram showing an example of a capsule encapsulation format in Embodiment 2 of the fault location method of the present invention;

FIG. 6 is a schematic structural diagram of Embodiment 1 of a fault locating device according to the present invention; FIG.

FIG. 7 is a schematic structural diagram of Embodiment 1 of a fault location system according to the present invention.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. It is a partial embodiment of the invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

With the widespread use of servers, a large number of servers are deployed in a data center or a computer room. The server running status is usually monitored remotely outside the equipment room. Therefore, remote POST phase fault information collection and monitoring are required.

FIG. 3 is a flowchart of Embodiment 1 of a fault location method according to the present invention. Embodiments of the present invention provide a fault location method, which may be performed by a fault location apparatus, which may be integrated in a computer or a server, and implemented by software and/or hardware. As shown in FIG. 3, the method in this embodiment includes:

Step 301: Monitor a hardware abnormal trigger condition when the power-on boot device executes the BIOS program.

Normally, in the POST phase, the BIOS program is executed, and the hardware components of the device, such as the block diagram shown in FIG. 1, the central processing unit (CPU), the memory, the north bridge, the south bridge, and the like are performed. Initialize and query the working status of these hardware components. When a fault occurs in the POST phase, first check if the hardware environment is normal.

In this embodiment, in the POST phase, the BIOS program is executed, and a callback function is registered in the BIOS program. If the hardware environment of the device is abnormal, for example, the CPU initialization is abnormal, indicating that an abnormal trigger condition is generated, the callback function is triggered to be triggered. The abnormal information is collected, that is, step 302 is executed to collect the abnormal information generated by the abnormal trigger condition triggering subfunction caused by the hardware environment abnormality in the device, wherein the abnormal trigger condition is used as an input parameter of the callback function.

Step 302: Collect abnormal information when the abnormal trigger condition is detected, where the abnormal information is at least Includes fault information for the CPU.

Specifically, the BIOS program includes at least one sub-function for collecting abnormal information, and the sub-functions are called by the above-mentioned callback function. The fault information includes fault information of hardware components such as CPU, memory, north bridge, south bridge, and the like, for example, CPU fault information Core or Uncore, to determine whether the current fault information causes a CPU fault, and locate the fault cause according to the fault phenomenon; The fault information includes the root port (Root Port) and the bus and interface standard (Pciepheral Component Interface Express, Pcie) device fault information. The fault information is used to check whether there is a North Bridge or Pcie device fault, especially when an input/output occurs. Or Output, referred to as: IO) When checking for errors, it is especially important to check the relevant register information of Pcie; the fault information of the south bridge to check whether the equipment mounted on the south bridge is abnormal; the fault information of the memory, including the system management interrupt (System) Management Interrupt (SMI) and Double Rate Synchronous Dynamic Random Access Memory (DDR) fault information, such as SMI channel error, DIMM strip ECC error or DIMM detection failure.

Step 303: The abnormality information is reported to the monitoring server through the network.

The monitoring server receives the abnormal information through Ethernet communication or LPC communication, parses and records the abnormal information, and saves the abnormal information to the local storage medium, including but not limited to the hard disk and the non-volatile random access memory (Non- Volatile Random Access Memory (NVRAM) for fault management and long-term maintenance, as important data for subsequent positioning; at the same time, the operator can be informed of faults in a readable and visual form, and maintenance personnel can also query faults based on abnormal information. Library for more detailed fault location information.

It should be noted that the manner in which the operator knows that the fault is generated is arbitrary. For example, the monitoring server may perform the alarm, or may be learned by the operator in real time, and is not limited herein.

In the prior art, the self-test information of the computer or the server in the POST phase is displayed through a display module, such as a display device such as an LCD or a VFT. The display modules are installed on the front panel of the chassis, and therefore, the operator is required to come to the device site. In this embodiment, the abnormality information is reported to the monitoring service. The server allows the operator to remotely view the anomaly information through the monitoring server.

In the embodiment of the present invention, the abnormality information is reported to the monitoring server, so that the operator can remotely view the abnormal information, that is, the operator can perform fault location and troubleshooting according to the reported abnormal information on the monitoring server side, thereby reducing the cost of using the dimension.

Based on the above embodiment, when an abnormal trigger condition is detected, the collection abnormal information can be further refined into:

1. In the process of executing the BIOS program, if an abnormal trigger condition is detected, an entry function corresponding to each abnormal information trigger source is triggered;

2. Collecting abnormal information by using the entry function.

Specifically, a person skilled in the art can understand the abnormal information trigger source as a hardware component whose state is abnormal, that is, the hardware component mentioned above that detects an abnormal trigger condition. The abnormal trigger condition is taken as the input parameter of the entry function corresponding to the trigger source of the abnormal information.

Specifically, in the startup process of the BIOS chip, if an abnormal trigger condition is detected, triggering an entry function corresponding to each abnormal information trigger source may include:

If the CPU CPU abnormal trigger condition is detected, the corresponding entry function of the CPU is triggered; if the memory abnormal trigger condition is detected, the memory corresponding entry function is triggered; if the North Bridge abnormal trigger condition is detected, the north bridge corresponding is triggered. The entry function; if the south bridge abnormal trigger condition is detected, the corresponding entrance function of the south bridge is triggered; and so on, if other hardware abnormality trigger conditions are detected, the hardware is triggered, that is, the abnormal information trigger source corresponds to The entry function is not repeated here.

On the basis of the foregoing, when the power-on booting device executes the BIOS program, monitoring the hardware abnormal triggering condition may include: monitoring whether to generate an SMI, an abnormal event (Event), or an abnormal message (Message) when the power-on booting device executes the BIOS program. If yes, it is determined that an abnormal trigger condition is detected, wherein the abnormal event or abnormal message is an event or message generated in the BIOS program that triggers an abnormality. At this time, the triggering mode for triggering the collection of the abnormal information according to the detected abnormal triggering condition includes: SMI mode, abnormal event mode, or abnormal message mode, as follows for each trigger mode. How to call the entry function corresponding to each exception information trigger source to explain:

If the abnormal trigger condition is detected as SMI mode, an SMI interrupt is triggered, and an entry function corresponding to each abnormal information trigger source is called in the SMI Handler;

If the abnormal trigger condition is detected as the abnormal event mode, an Event is sent, and an entry function corresponding to the trigger source of each abnormal information is called in the callback function of the Event;

If the abnormal trigger condition is detected as the abnormal message mode, a message is sent, and the entry function corresponding to the trigger source of each abnormal information is called in the callback function of the message.

When the abnormal trigger condition is detected, collecting the abnormality information may include: collecting the fault information when the abnormal trigger condition is detected, and collecting the software call stack relationship and/or the program counter and the program status register when the fault occurs. A value to indicate the location of the fault information. In general, if only the fault information is reported, it is not enough to complete the fault location and troubleshooting. Therefore, accurate information is needed to assist in the fault location. Therefore, the present invention introduces the concept of kernel dump in linux OS, collects the software call stack relationship when the fault occurs, and saves it as a data base for precise positioning while collecting the fault information; in addition, it also collects the current program counter and program status. The value of the register saves the current running program counter and the value of the program status register, which is useful for analyzing the program running clues when the exception occurs and the register status of the processor is correct or not, and saving the CPU running status when the abnormality is saved.

Further, reporting the abnormality information to the monitoring server by using the network may include: reporting the abnormality information to the monitoring server by using an Intelligent Platform Management Interface (IPMI) or a standard Ethernet. In addition, abnormal information can be reported by other communication methods.

FIG. 4 is a flowchart of Embodiment 2 of a fault location method according to the present invention. As shown in FIG. 4, on the basis of the foregoing embodiment, the fault location method may further include the following steps:

Step 401: Monitor a hardware abnormal trigger condition when the power-on boot device executes the BIOS program.

This step refers to step 301 of the embodiment shown in FIG. 3, and details are not described herein again.

Step 402: Collect abnormal information when the abnormal trigger condition is detected, where the abnormal information is at least Includes fault information for the CPU.

This step refers to step 302 of the embodiment shown in FIG. 3, and details are not described herein again.

Step 403: Encapsulate the abnormality information into capsules.

FIG. 5 is a schematic diagram of a capsule encapsulation format in Embodiment 2 of the fault location method of the present invention. Referring to FIG. 5, the capsule may include header information, hardware error information, program run stack information, a program counter, program status register information, and trailer information. Wherein, the header information and the tail information are indispensable, and the middle portion of the capsule may include any combination of hardware error information, program run stack information, program counter and program status register information. Here, the hardware includes a CPU, a memory, a north bridge, and a south bridge; the program running stack information includes a stack information of the current execution function and a stack information of an internal calling function of the current function, wherein the number of internal calling functions is not limited, When there is no fault in the hardware, the fault location analysis should be performed by checking the running thread of the program; the values of the registers and counters involved in the running of the program, for example, the values of the program counter and the program status register, are used to analyze the environment in which the current program runs. Whether the parameter has an exception, for example, whether the value of the program pointer register is illegal, and whether the stack overflows or the like.

Step 404: Report the abnormality information to the monitoring server through the network.

Specifically, the abnormal information is encapsulated into a capsule or other information format, and then reported to the monitoring server through IPMI or standard Ethernet or other communication methods; the monitoring server parses the received abnormal information according to the corresponding encapsulation format, and obtains hardware, stack, and Program counter and other information.

In this embodiment, more detailed fault location information is provided by collecting fault information, a software call stack relationship when the fault occurs, and values of the current program counter and the program status register, thereby further ensuring reliability of fault location.

The technical solution of the present invention can be used in the product development stage, and accurate fault information can accelerate the positioning of faults in the development of the computer system/product, reduce the research and development cost, and ensure the product quality; the technical solution of the present invention can also be used in the product operation and maintenance stage. Accurate fault information reduces the difficulty of operation and maintenance.

FIG. 6 is a schematic structural diagram of Embodiment 1 of the fault locating device of the present invention. As shown in FIG. 6, the device of the present embodiment includes: a monitoring driving module 61, an abnormality information collecting module 62, and an information reporting module 63.

The monitoring driving module 61 is configured to monitor a hardware abnormal triggering condition when the power-on starting device executes the basic input/output system BIOS program, and the abnormal information collecting module 62 is configured to collect an abnormality when the monitoring driving module detects an abnormal triggering condition. The information, the abnormality information includes at least the fault information of the CPU, and the information reporting module 63 is configured to report the abnormality information to the monitoring server through the network.

The fault locating device of this embodiment can be used to implement the technical solution of the method embodiment shown in FIG. 1 , and the implementation principle and technical effects are similar, and details are not described herein again.

In the above embodiment, the abnormality information collecting module 62 may be specifically configured to: when an abnormal trigger condition is detected, trigger an entry function corresponding to each abnormal information trigger source; and use the entry function Collect abnormal information.

On the basis of the above, the abnormality information collecting module 62 can also be configured to: if the CPU abnormal trigger condition is detected, trigger the corresponding entry function of the CPU; if the memory abnormal trigger condition is detected, trigger the memory corresponding entry function; When the north bridge abnormal trigger condition is detected, the corresponding entrance function of the north bridge is triggered; if the south bridge abnormal trigger condition is detected, the corresponding entrance function of the south bridge is triggered.

Further, the monitoring driving module 61 may be specifically configured to monitor whether a system management interrupt SMI, an abnormal event event, or an abnormal message is generated when the power-on booting device executes the BIOS program, and if yes, determine that an abnormal trigger condition is detected, wherein the An exception event or exception message is an event or message generated in the BIOS program that triggers an exception.

Preferably, the abnormality information collecting module 62 is specifically configured to collect fault information when an abnormal trigger condition is detected, and collect a software call stack relationship and/or a program counter and a program status register value when the fault occurs to indicate the The location of the fault message.

On the basis of the above, the information reporting module 63 can be specifically used to report the abnormal information to the monitoring server by using the intelligent platform management interface IPMI or the standard Ethernet mode.

On the basis of the above, the information reporting module 63 can also be configured to: encapsulate the abnormal information into capsules, the capsule includes header information, hardware error information, program running stack information, a program counter, program status register information, and tail information.

The fault locating device of this embodiment can be used to execute the technical method of any of the foregoing method embodiments. The implementation principle and technical effect are similar, and will not be described here.

FIG. 7 is a schematic structural diagram of Embodiment 1 of the fault locating system of the present invention. As shown in FIG. 7, the system of the present embodiment includes: a main board 100, a fault locating device 110, and a monitoring server 200. The main board 100 can adopt the logic block diagram of the typical computer or server shown in FIG. 1. The fault locating device 110 can be integrated into the BIOS 60 in the main board 100 by using the structure of the apparatus embodiment shown in FIG. 6, which can be executed correspondingly. The technical solution of the foregoing method embodiment is similar to the technical solution, and is not described here. The monitoring server 200 integrates the abnormal information parsing module 210, and the abnormal information parsing module 210 is configured to parse the information in the fault locating device 110. The abnormality information reported by the reporting module 113; the dotted line between the main board 100 and the monitoring server 200 indicates a wireless connection, and the two communicate through Ethernet communication or LPC.

One of ordinary skill in the art will appreciate that all or part of the steps to implement the various method embodiments described above may be accomplished by hardware associated with the program instructions. The aforementioned program can be stored in a computer readable storage medium. The program, when executed, performs the steps including the foregoing method embodiments; and the foregoing storage medium includes various media that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that The technical solutions described in the foregoing embodiments may be modified, or some or all of the technical features may be equivalently replaced; and the modifications or substitutions do not deviate from the technical solutions of the embodiments of the present invention. range.

Claims

A fault location method, comprising:

Monitoring the hardware abnormal trigger condition when the power-on boot device executes the basic input/output system BIOS program;

Collecting abnormal information when the abnormal trigger condition is detected, where the abnormal information includes at least fault information of the CPU of the central processing unit;

The abnormal information is reported to the monitoring server through the network.
The method according to claim 1, wherein when the abnormal trigger condition is detected, collecting abnormal information includes:

During the execution of the BIOS program, if an abnormal trigger condition is detected, an entry function corresponding to each abnormal information trigger source is triggered;

The exception function is collected using the entry function.
The method according to claim 2, wherein, in the process of executing the BIOS program, if an abnormal trigger condition is detected, triggering an entry function corresponding to each abnormal information trigger source includes:

If the CPU processor abnormal trigger condition is detected, the corresponding entry function of the CPU is triggered;

If the memory exception trigger condition is detected, the memory corresponding entry function is triggered;

If the north bridge abnormal trigger condition is detected, the corresponding entrance function of the north bridge is triggered;

If the South Bridge abnormal trigger condition is detected, the corresponding entry function of the South Bridge is triggered.
The method according to claim 1 or 2 or 3, wherein when the power-on booting device executes the basic input/output system BIOS program, the monitoring hardware abnormal triggering conditions include:

When the power-on boot device executes the BIOS program, it is monitored whether a system management interrupt SMI, an abnormal event event, or an abnormal message is generated, and if yes, it is determined that an abnormal trigger condition is detected, wherein the abnormal event or abnormal message is to execute the BIOS program. An event or message generated in the event that will trigger an exception.
The method according to claim 1, wherein when the abnormal trigger condition is detected, collecting abnormal information includes:

When an abnormal trigger condition is detected, the fault information is collected, and the software call stack relationship and/or the value of the program counter and the program status register at the time of the fault occurrence are collected to indicate the location of the fault information.
The method according to claim 1, wherein the reporting the abnormality information to the monitoring server through the network comprises:

The abnormal information is reported to the monitoring server by using the intelligent platform management interface IPMI or standard Ethernet.
The method according to any one of claims 1-6, wherein before the reporting the abnormality information to the monitoring server through the network, the method further includes:

The exception information is encapsulated into capsules including header information, hardware error information, program run stack information, program counters, program status register information, and trailer information.
A fault locating device, comprising:

The monitoring driving module is configured to monitor a hardware abnormal triggering condition when the power-on starting device executes the basic input/output system BIOS program;

An abnormality information collecting module, configured to collect abnormal information when the monitoring driving module detects an abnormal triggering condition, where the abnormality information includes at least fault information of a CPU of the central processing unit;

The information reporting module is configured to report the abnormality information to the monitoring server through the network.
The apparatus according to claim 8, wherein the abnormality information collecting module is configured to trigger an entry function corresponding to each abnormal information trigger source if an abnormal trigger condition is detected during execution of the BIOS program; And using the entry function to collect abnormal information.
The device according to claim 9, wherein the abnormality information collecting module is further configured to:

If the CPU abnormal trigger condition is detected, the corresponding entry function of the CPU is triggered;

If the memory exception trigger condition is detected, the memory corresponding entry function is triggered;

If the north bridge abnormal trigger condition is detected, the corresponding entrance function of the north bridge is triggered;

If the South Bridge abnormal trigger condition is detected, the corresponding entry function of the South Bridge is triggered.
The device according to claim 8 or 9 or 10, wherein the monitoring driving module is specifically configured to monitor whether a system management interrupt SMI, an abnormal event Event or an abnormal message is generated when the power-on booting device executes the BIOS program. If yes, it is determined that an abnormal trigger condition is detected, wherein the abnormal event or abnormal message is an event or message generated in the BIOS program that triggers an abnormality.
The device according to claim 8, wherein the abnormality information collecting module is configured to collect fault information when an abnormal trigger condition is detected, and collect a software call stack relationship and/or a program counter when the fault occurs. The value of the program status register to indicate the location of the fault message.