WO2015039463A1 - 控制信号发生电路和电路系统 - Google Patents

控制信号发生电路和电路系统 Download PDF

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Publication number
WO2015039463A1
WO2015039463A1 PCT/CN2014/079508 CN2014079508W WO2015039463A1 WO 2015039463 A1 WO2015039463 A1 WO 2015039463A1 CN 2014079508 W CN2014079508 W CN 2014079508W WO 2015039463 A1 WO2015039463 A1 WO 2015039463A1
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WIPO (PCT)
Prior art keywords
control signal
input terminal
output module
signal
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2014/079508
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English (en)
French (fr)
Inventor
戴其兵
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Publication date
Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US14/429,172 priority Critical patent/US9728113B2/en
Publication of WO2015039463A1 publication Critical patent/WO2015039463A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present invention relates to the field of control and test techniques for circuits, and in particular to a control signal generating circuit and a circuit system including the control signal generating circuit. Background technique
  • a gate drive circuit (GOA is widely used in an array substrate of a display device)
  • the gate drive circuit integrated on the array substrate.
  • the control signals of the gate drive circuit include a high level signal VGH (gate turn-on voltage) and a low level signal VGL (gate turn-off voltage).
  • VGH gate turn-on voltage
  • VGL gate turn-off voltage
  • the control signal generating circuit of the gate driving circuit mostly uses an operational amplifier to realize conversion between the high level signal VGH and the low level signal VGL, but when the gate driving circuit requires a rapidly changing control signal This method of using an operational amplifier to provide a control signal does not meet its needs.
  • An object of the present invention is to provide a control signal generating circuit capable of realizing rapid switching between a high level signal and a low level signal and a circuit system including the control signal generating circuit.
  • a control signal generating circuit includes a signal output module, and the signal output module includes an output end, a first control signal input end, and a second control signal input end.
  • the first control signal input end is configured to receive a first control signal
  • the second control signal input end is configured to receive a second control signal
  • the signal output module is capable of selectively inputting the first control signal
  • the first control signal input from the terminal or the second control signal input from the second control signal input terminal is output to the control signal receiving circuit via the output terminal.
  • the signal output module further includes a timing signal input end, wherein the timing signal input end is configured to receive a timing signal, and the signal output module selectively selects a timing signal according to the timing signal input from the timing signal input end
  • the first control signal input from the first control signal input terminal or the second control signal input from the second control signal input terminal is output to the control signal receiving circuit via the output terminal.
  • the signal output module includes at least one analog switch, each of the analog switches including the output end, the first control signal input end, the second control signal input end, and the timing signal input And the output terminal is selectively connected to the first control signal input end or the second control signal input end according to a timing signal input from the timing signal input end.
  • control signal generating circuit further comprises a programmable logic device for generating the timing signal, the timing signal output terminal of the programmable logic device being connected to the timing signal input terminal of the signal output module.
  • the signal output module includes a plurality of the timing signal input terminals and a plurality of the output terminals in one-to-one correspondence with a plurality of the timing signal input terminals
  • the programmable logic device includes a plurality of timing signal outputs.
  • the plurality of timing signal output ends are respectively connected to the plurality of timing signal input ends of the signal output module, and the plurality of timing signal output ends of the programmable logic device are capable of outputting a plurality of timing signals.
  • the control signal receiving circuit is a gate driving circuit of the display device
  • the signal output module includes three of the timing signal input terminals
  • the plurality of the timing signal output terminals of the programmable logic device include a first timing signal output terminal outputting a first timing signal, a second timing signal output terminal capable of outputting a second timing signal, and a third timing signal output terminal capable of outputting a third timing signal, wherein the first timing signal is used for control
  • the signal output module outputs an initial signal
  • the second timing signal is used to control the signal output module to output a first clock signal
  • the third timing signal is used to control the signal output module to output a second clock signal.
  • the programmable logic device comprises a programmable gate array device, and an output pin of the programmable gate array device is formed as the timing signal output terminal.
  • the control signal generating circuit further includes a DC voltage conversion module, the DC voltage conversion module includes a first control signal output module that generates the first control signal, and a second control signal output that generates the second control signal And a module, the first control signal output module is connected to the first control signal input end of the signal output module, and the second control signal output module is connected to the second control signal input end of the signal output module.
  • the first control signal output module comprises a first DC voltage input terminal, a first DC voltage conversion chip and a first control signal output end, and the first DC voltage input terminal is connected to the DC power source and is input through the first DC voltage.
  • the DC voltage inputted by the terminal is converted by the first DC voltage conversion chip and the electronic component connected to the first DC voltage conversion chip to form a first control signal, and the first control signal is outputted from the first control signal output terminal;
  • the second control signal output module includes a second DC voltage input terminal, a second DC voltage conversion chip and a second control signal output terminal, and the second DC voltage input terminal is connected to the DC power source and input through the second DC voltage input terminal.
  • the DC voltage is converted by the second DC voltage conversion chip and the electronic component connected to the second DC voltage conversion chip to form a second control signal, and the second control signal is outputted from the second control signal output terminal.
  • control signal generating circuit includes a plurality of the DC voltage conversion modules
  • signal output module includes a plurality of sets of first control signal input ends and second control signal input ends, and the plurality of the DC voltage conversion modules respectively And corresponding to the plurality of sets of first control signal input ends and second control signal input ends of the signal output module.
  • the first control signal output by the first control signal output module can be adjusted within a first predetermined range; and/or the second control signal output by the second control signal output module can be within a second predetermined range Adjustment.
  • the first predetermined range is 5V to 20V
  • the second predetermined range is -20V to -5V.
  • a circuit system including a control signal generating circuit and a control signal receiving circuit, wherein the control signal generating circuit is the above-described control signal generating circuit provided by the present invention, and the control signal occurs The letter of the circuit The output of the number output module is electrically connected to the control signal receiving circuit.
  • control signal receiving circuit is a gate driving circuit of the display device
  • the gate driving circuit includes an initial signal input end, a first clock signal input end and a second clock signal input end
  • control signal generating circuit The signal output module is capable of providing an initial signal to an initial signal input terminal of the gate driving circuit, a first clock signal to a first clock signal input end of the gate driving circuit, and a first clock signal for the gate driving circuit
  • the second clock signal input provides a second clock signal.
  • control signal generating circuit When the control signal generating circuit provided by the present invention provides the first control signal and the second control signal required for control of the control signal receiving circuit, the control signal generating circuit only needs to be in the first control signal mode and the second control Switching between signal modes does not require complex transformations (for example, there is no need to use an op amp to switch between the first control signal and the second control signal). It can be seen that the control signal generating circuit provided by the present invention can quickly switch between the two modes of the first control signal mode and the second control signal mode, so that the control signal received by the control signal receiving circuit can be satisfied. An operational requirement for fast switching between the first control signal and the second control signal.
  • FIG. 1 is a schematic diagram of a control signal generating circuit and a display device according to an embodiment of the present invention
  • FIG. 2 is a circuit diagram of a first control signal output module in a DC voltage conversion module according to an embodiment of the present invention
  • FIG. 3 is a circuit diagram of a second control signal output module in a DC voltage conversion module according to an embodiment of the present invention
  • FIG. 4 is a circuit diagram of a signal output module according to an embodiment of the present invention.
  • FIG. 5 is a timing diagram of timing signals generated by a programmable logic device according to an embodiment of the present invention. Description of the reference numerals
  • Control signal generation circuit 110 DC voltage conversion module
  • First control signal output module 112 second control signal output module
  • Display panel 220 Source drive circuit
  • timing signal input terminal 111a first DC voltage input terminal
  • 112a second DC voltage input terminal 112b: second control signal output terminal
  • a control signal generating circuit 100 which includes a signal output module 120, which includes an output terminal, a first control signal input terminal, and a second control signal input terminal. End, the first control signal input end is configured to receive a first control signal, the second control signal input end is configured to receive a second control signal, and the signal output module 120 is configured to selectively receive the first control signal The first control signal input from the input terminal or the second control signal input from the second control signal input terminal is output to the control signal receiving circuit via the output terminal.
  • the control signal received by the control signal receiving circuit during normal operation needs to be switched between the first control signal and the second control signal.
  • the control signal generating circuit 100 provided by the present invention has two modes of a first control signal mode and a second control signal mode, and can switch between the two modes. Specifically, in the first control signal mode, the signal output module 120 outputs a first control signal input from the first control signal input terminal to the control signal receiving circuit; in the second control signal mode, the signal output module 120 A second control signal input from the second control signal input terminal is output to the control signal receiving circuit.
  • the first control signal and the second control signal may be level signals that are different from each other.
  • the first control signal may be a low level signal VGL
  • the second control signal may be a high level signal VGH, or vice versa
  • the control signal receiving circuit may be a gate driving circuit in a display device.
  • the first control signal and the second control signal may be generated by existing components and output to the first control signal input terminal and the second control signal input terminal of the signal output module 120, respectively.
  • control signal generating circuit 100 When the control signal generating circuit 100 provided by the present invention provides the first control signal and the second control signal required for control of the control signal receiving circuit, only the first control signal mode of the control signal generating circuit 100 and Switching between the second control signal modes is possible without complicated transformation (for example, there is no need to use an operational amplifier to switch between the first control signal and the second control signal). It can be seen that the control signal generating circuit 100 provided by the present invention can quickly switch between the two modes of the first control signal mode and the second control signal mode, so that the control signal received by the control signal receiving circuit can be satisfied. An operational requirement for fast switching between the first control signal and the second control signal.
  • control signal generating circuit 100 provided by the present invention can also be used to test the control signal receiving circuit that needs to quickly switch between the first control signal and the second control signal.
  • control signal generating circuit provided by the invention can also be used to test the control signal receiving circuit that needs to quickly switch between the first control signal and the second control signal.
  • the 100 can more realistically simulate the operating environment of the control signal receiving circuit (e.g., the gate driving circuit in the display device) to test the control signal receiving circuit to determine whether the control signal receiving circuit is good.
  • the control signal receiving circuit e.g., the gate driving circuit in the display device
  • control signal generating circuit 100 can be switched between the first control signal mode and the second control signal mode in a plurality of ways.
  • the control signal generating circuit 100 can be switched between the first control signal mode and the second control signal mode by mechanical means.
  • a timing unit can be provided in the control signal generating circuit 100, which can be periodically operated to cause the control signal generating circuit 100 to periodically switch between the first control signal mode and the second control signal mode.
  • the signal output module 120 may further include a timing signal input end, where the timing signal input end is configured to receive a timing signal, and the signal output module 120 selectively selects the timing signal according to the timing signal input from the timing signal input end.
  • a first control signal input from the first control signal input terminal or a second control signal input from the second control signal input terminal is output to the control signal receiving circuit via the output terminal.
  • timing of the timing signal input from the timing signal input terminal of the signal output module 120 and the control signals (ie, the first control signal and the second control signal) required for the normal operation of the control signal receiving circuit are Synchronous.
  • the timing signal can be generated by an existing component and output to a timing signal input terminal of the signal output module 120.
  • the signal output module 120 may further include at least one analog switch 121.
  • each analog switch 121 includes an output end 121a, a first control signal input end 121b, The second control signal input terminal 121c and the timing signal input terminal 121d.
  • the output terminal 121a is selectively connected to the first control signal input terminal 121b or the second control signal input terminal 121c according to the timing signal input from the timing signal input terminal 121d, thereby correspondingly outputting the first to the control signal receiving circuit. Control signal or second control signal.
  • the output terminal 121a of the analog switch 121 is connected to the first control signal input terminal 121b, so that the first input from the first control signal input terminal 121b is input.
  • the control signal is output to the control signal receiving circuit via the output terminal 121a; when the timing signal input from the timing signal input terminal 121d is low level, the output terminal 121a of the analog switch 121 is connected to the second control signal input terminal 121c, thereby The second control signal input from the second control signal input terminal 121c is output to the control signal receiving circuit via the output terminal 121a.
  • the output terminal 121a of the analog switch 121 is connected to the first control signal input terminal 121b, so that the first control input from the first control signal input terminal 121b is input.
  • the signal is output to the control signal receiving circuit via the output terminal 121a; when the timing signal input from the timing signal input terminal 121d is at a high level, the output terminal 121a of the analog switch 121 and the second control signal are input.
  • the input terminal 121c is connected so that the second control signal input from the second control signal input terminal 121c is output to the control signal receiving circuit via the output terminal 121a.
  • the signal output module 120 can have an analog switch.
  • signal output module 120 has four analog switches, so that signal output module 120 has four outputs.
  • the signal output module 120 having a plurality of analog switches 121 will be described in detail below, and will not be described here.
  • the timing signal generating means for the control signal generating circuit 100 can be supplied with a timing signal by means of an external timing signal generating means.
  • the control signal generating circuit 100 can be reduced.
  • the overall size of the circuitry, preferably, programmable logic device 130 for generating the timing signals may be integrated within control signal generation circuit 100, the timing signal output of programmable logic device 130 and the signal output module 120 The timing signal input is connected.
  • the control signal generating circuit 100 may include a plurality of signal output modules 120 Each signal output module 120 has an output.
  • the control signal generating circuit 100 may include only one signal output module 120, and the signal output module 120 may include a plurality of the output terminals, for example, the signal output module 120 may A plurality of analog switches 121 are included, and each analog switch 121 has an output end
  • the signal output module 120 to have a plurality of outputs.
  • each set of control signals required for the normal operation of the control signal receiving circuit includes a first control signal and a second control signal
  • the signal output module 120 when the signal output module 120 has a plurality of outputs, the signal output module 120 further A plurality of the timing signal input terminals may be included, and the plurality of the timing signal input terminals are in one-to-one correspondence with the plurality of the output terminals.
  • the programmable logic device 130 includes a plurality of the timing signal output ends, and the plurality of the timing signal output ends of the programmable logic device 130 are respectively connected to the plurality of the timing signal input ends of the signal output module 120, A plurality of timing signals are output from a plurality of the timing signal output terminals of the programmable logic device 130.
  • each group of control signals (each group of control signals)
  • the timings of the first control signal and the second control signal may be the same or different. Therefore, the plurality of timing signals outputted from the plurality of timing signal output ends of the programmable logic device 130 may be the same. They may be different as long as it is ensured that the timings of the respective sets of control signals required for the operation of the control signal receiving circuit are synchronized.
  • control signal receiving circuits require different control signals.
  • a control signal required for operation of the control signal receiving circuit as the gate driving circuit has an initial signal STV (including a low level signal and a high level) The signal), the first clock signal CLK1 (including the low level signal and the high level signal), and the second clock signal CLK2 (including the low level signal and the high level signal) have three sets of control signals.
  • the signal output module 120 includes three of the timing signal input terminals, and the plurality of timing signal output ends of the programmable logic device 130 include a first timing signal output terminal capable of outputting a first timing signal, and capable of outputting a second a second timing signal output end of the timing signal and a third timing signal output terminal capable of outputting a third timing signal, wherein the timing diagrams of the first timing signal, the second timing signal, and the third timing signal are as shown in FIG. 5
  • the first timing signal is used by the control signal output module 120 to output an initial signal STV
  • the second timing signal is used to control the signal output module 120 to output a first clock signal CLK1
  • the third timing signal is used to control the signal output module 120.
  • the second clock signal CLK2 is output.
  • signal output module 120 can include three analog switches 121.
  • the specific form of the programmable logic device 130 is also not particularly limited.
  • the programmable logic device 130 may be a single chip microcomputer.
  • the programmable logic device 130 may include a Field-Programmable Gate Array (FPGA), and an output pin of the programmable gate array device is formed as the timing signal output. Since the programmable gate array device includes a plurality of output pins, in this case, the programmable logic device 130 can easily realize the output of a plurality of timing signals.
  • FPGA Field-Programmable Gate Array
  • the control signal generating circuit 100 may further include a DC voltage conversion module 110, which
  • the DC voltage conversion module 110 may include a first control signal output module 111 (shown in FIG. 2) that generates the first control signal and a second control signal output module 112 that generates the second control signal (as shown in FIG. 3).
  • the first control signal output module 111 is connected to the first control signal input end of the signal output module 120
  • the second control signal output module 112 is connected to the second control signal input end of the signal output module 120.
  • the first control signal output module 111 may include a first DC voltage input terminal l la, a first DC voltage conversion chip 111c, and a first control signal output terminal l l lb.
  • the first DC voltage input terminal 111a is connected to the DC power source, and the DC voltage input through the first DC voltage input terminal 111a is converted by the first DC voltage conversion chip 111c and various electronic components connected to the first DC voltage conversion chip 111c. Forming a first control signal and outputting the first control signal from the first control signal output terminal 111b.
  • the second control signal output module 112 may include a second DC voltage input terminal 112a, a second DC voltage conversion chip 112c, and a second control signal output terminal 112b.
  • the second DC voltage input terminal 112a is connected to the DC power source, and the DC voltage input through the second DC voltage input terminal 112a is converted by the second DC voltage conversion chip 112c and various electronic components connected to the second DC voltage conversion chip 112c. Forming a second control signal and outputting the second control signal from the second control signal output terminal 112b.
  • the DC voltage conversion module 110 may include a first control signal output module 111 that converts a DC voltage into a first control signal (eg, a low level signal VGL) and converts the DC voltage into a second control.
  • a second control signal outputting module 112 of the signal for example, a high level signal VGH
  • the switching between the 111 and the second control signal output module 112 can be performed without complicated conversion (for example, without the operational amplifier generating the first control signal or the second control signal), and the control signal receiving circuit requiring fast action can be performed (for example, The gate drive circuit in the display device) provides the timing signals required for operation or tests them.
  • the first control signal output terminal 111b of the first control signal output module 111 may be connected to the first control signal input terminal 121b of the analog switch 121,
  • the second control signal output terminal 112b of the second control signal output module 112 can be input with the second control signal of the analog switch 121.
  • the input terminal 121c is connected.
  • the first control signal output module 111 may output a stable first control signal, gp.
  • the first control signal output by the first control signal output module ill is fixed, and the first control signal is It may be a control signal required to control the operation of the signal receiving circuit.
  • the second control signal output module 112 can output a stable second control signal, gP.
  • the second control signal output by the second control signal output module 112 is fixed, and the second control signal can be It is the control signal required to control the operation of the signal receiving circuit. It can be seen that the test environment provided by the control signal generating circuit 100 is almost the same as the working environment of the control signal receiving circuit, so that a more accurate test result can be obtained.
  • the first control signal output by the first control signal output module 111 is a low level VGL
  • the second control signal output by the second control signal output module 112 is a high power.
  • Flat VGH flat VGH
  • the control signal receiving circuit may require a plurality of sets of control signals during normal operation (each set of control signals includes a first control signal and a second control signal).
  • each set of control signals includes a first control signal and a second control signal.
  • the plurality of sets of the first control signal input end and the second control signal input end of the signal output module 120 (each group only includes A first control signal input terminal and a second control signal input terminal are both connected to the same DC voltage conversion module 110 (the first control signal input terminals of the signal output module 120 are the first with the DC voltage conversion module 110)
  • the control signal output terminal 111b is connected, and each of the second control signal input terminals of the signal output module 120 is coupled to the second control signal output terminal 112b of the DC voltage conversion module 110.
  • the control signal generating circuit 100 may include a plurality of DC voltage conversion modules 110.
  • the plurality of sets of the first control signal input end and the second control signal input end of the signal output module 120 are respectively coupled to the plurality of DC voltage conversion modules 110. correspond. That is, each of the DC voltage conversion modules 110 is connected to a set of first control signal inputs and second control signal inputs of a set of control signals (including the first control signal and the second control signal) corresponding to the input.
  • the control signal generating circuit 100 provided by the present invention can be used to control or test various control signal receiving circuits. Therefore, preferably, the first control signal output module The first control signal outputted by the 111 may be adjusted within a first predetermined range; and/or the second control signal output by the second control signal output module 112 may be adjusted within a second predetermined range. As shown in FIGS. 2 and 3, in order to achieve this, an adjustable resistor may be respectively disposed in the first control signal output module 111 and the second control signal output module 112.
  • the first control signal is a high level signal VGH, and the first predetermined range may be 5V to 20V, the second control The signal is a low level signal VGL, and the second predetermined range may be -20V to -5V.
  • the control signal generating circuit 100 provided by the present invention may include a signal output module 120, and may also include a plurality of signal output modules 120.
  • the control signal receiving circuit is the gate driving circuit of the LCD display panel
  • the control signal generating circuit 100 may include only one signal output module. 120, providing a control signal required for operation or testing the gate driving circuit of the LCD display panel.
  • the control signal receiving circuit is the gate driving circuit of the AMOLED display panel (as shown in FIG.
  • two signal output modules 120 are required, because the gate driving circuit is disposed on both sides of the AMOLED display panel, The function of the gate drive circuit on the side is to provide the scan signal, and the function of the gate drive circuit on the other side is to control the illumination of the OLED. Therefore, the two signal output modules 120 are required to provide the work for the gate drive circuits on both sides. Control signals, or test the gate drive circuits on both sides.
  • a circuit system including a control signal generating circuit 100 and a control signal receiving circuit (in FIG. 1 is a gate driving circuit 230 of the display device 200) is provided.
  • the control signal generating circuit 100 is the control signal generating circuit provided by the present invention, and the control signal receiving circuit is electrically connected to an output end of the signal output module 120 of the control signal generating circuit 100.
  • control signal receiving circuit may be a gate driving circuit 230 of the display device 200, and the gate driving circuit 230 includes an initial signal input end, a first clock signal input end, and a second clock signal input end.
  • the signal output module 120 of the control signal generating circuit may provide the initial signal input terminal with an initial signal STV, A first clock signal CLK1 is provided for the first clock signal input terminal, and a second clock signal CLK2 is provided for the second clock signal input terminal.
  • the display device 200 further includes a display panel 210 and a display panel source driving circuit 220.
  • control signal generating circuit and the circuit system provided by the present invention are described with the gate driving circuit as the control signal receiving circuit in the present invention, the present invention is not limited thereto.
  • the control signal generating circuit provided by the present invention can also be used to provide or test a control signal required for operation of other control signal receiving circuits other than the gate driving circuit.

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Abstract

一种控制信号发生电路，其中，所述控制信号发生电路包括信号输出模块，所述信号输出模块包括输出端、第一控制信号输入端和第二控制信号输入端，所述信号输出模块能够选择性地将所述第一控制信号输入端输入的第一控制信号或所述第二控制信号输入端输入的第二控制信号从输出端输出至控制信号接收电路。一种包括所述控制信号发生电路的电路系统。在为控制信号接收电路提供高电平信号和低电平信号时，控制信号发生电路只需在第一控制信号模式和第二控制信号模式之间进行切换即可，无需复杂的变换。此外，控制信号发生电路还可以对各种需要快速动作的信号接收电路进行测试。

Description

控制信号发生电路和电路系统 技术领域
本发明涉及电路的控制及测试技术领域， 具体地， 涉及一种控 制信号发生电路和一种包括该控制信号发生电路的电路系统。 背景技术
在显示装置的阵列基板中大量使用了栅极驱动电路 （GOA ,
Gate-driver On Array, 集成在阵列基板上的栅极驱动电路） ， 在测试 显示面板时， 对栅极驱动电路的测试是整个测试过程中的重要环节。 栅极驱动电路的控制信号包括高电平信号 VGH (栅极开启电压） 和 低电平信号 VGL (栅极关断电压） 。 在现有技术中， 栅极驱动电路 的控制信号发生电路大多利用运算放大器来实现高电平信号 VGH和 低电平信号 VGL之间的转换， 但是当栅极驱动电路需要快速变化的 控制信号时，这种利用运算放大器提供控制信号的方法并不能满足其 需求。
因此， 提供一种能够实现高电平信号和低电平信号之间的快速 转换的栅极驱动电路的控制信号发生电路成为必需。 发明内容
本发明的目的在于提供一种能够实现在高电平信号和低电平信 号之间快速转换的控制信号发生电路和一种包括该控制信号发生电 路的电路系统。
为了实现上述目的， 作为本发明的一个方面， 提供一种控制信 号发生电路， 其包括信号输出模块， 所述信号输出模块包括输出端、 第一控制信号输入端和第二控制信号输入端，所述第一控制信号输入 端用于接收第一控制信号，所述第二控制信号输入端用于接收第二控 制信号，所述信号输出模块能够选择性地将从所述第一控制信号输入 端输入的第一控制信号或从所述第二控制信号输入端输入的第二控 制信号经所述输出端输出至控制信号接收电路。
优选地， 所述信号输出模块还包括时序信号输入端， 所述时序 信号输入端用于接收时序信号，所述信号输出模块根据从所述时序信 号输入端输入的时序信号选择性地将从所述第一控制信号输入端输 入的第一控制信号或从所述第二控制信号输入端输入的第二控制信 号经所述输出端输出至控制信号接收电路。
优选地， 所述信号输出模块包括至少一个模拟开关， 每个所述 模拟开关都包括所述输出端、所述第一控制信号输入端、所述第二控 制信号输入端和所述时序信号输入端，所述输出端根据从所述时序信 号输入端输入的时序信号选择性地与所述第一控制信号输入端或所 述第二控制信号输入端相连。
优选地， 所述控制信号发生电路还包括用于产生所述时序信号 的可编程逻辑器件，所述可编程逻辑器件的时序信号输出端与所述信 号输出模块的时序信号输入端连接。
优选地， 所述信号输出模块包括多个所述时序信号输入端和与 多个所述时序信号输入端一一对应的多个所述输出端，所述可编程逻 辑器件包括多个时序信号输出端，该多个时序信号输出端分别与所述 信号输出模块的多个所述时序信号输入端相连，所述可编程逻辑器件 的多个所述时序信号输出端能够输出多种时序信号。
优选地， 所述控制信号接收电路为显示装置的栅极驱动电路， 所述信号输出模块包括三个所述时序信号输入端，所述可编程逻辑器 件的多个所述时序信号输出端包括能够输出第一时序信号的第一时 序信号输出端、能够输出第二时序信号的第二时序信号输出端和能够 输出第三时序信号的第三时序信号输出端，所述第一时序信号用于控 制所述信号输出模块输出初始信号，所述第二时序信号用于控制所述 信号输出模块输出第一时钟信号，所述第三时序信号用于控制所述信 号输出模块输出第二时钟信号。
优选地， 所述可编程逻辑器件包括可编程门阵列器件， 所述可 编程门阵列器件的输出管脚形成为所述时序信号输出端。 优选地， 所述控制信号发生电路还包括直流电压转换模块， 该 直流电压转换模块包括产生所述第一控制信号的第一控制信号输出 模块和产生所述第二控制信号的第二控制信号输出模块，所述第一控 制信号输出模块与所述信号输出模块的第一控制信号输入端连接，所 述第二控制信号输出模块与所述信号输出模块的第二控制信号输入 端连接。
优选地， 所述第一控制信号输出模块包括第一直流电压输入端、 第一直流电压转换芯片和第一控制信号输出端，第一直流电压输入端 与直流电源连接，通过第一直流电压输入端输入的直流电压经过第一 直流电压转换芯片以及与该第一直流电压转换芯片相连的电子元件 转换后， 形成第一控制信号， 并从第一控制信号输出端输出所述第一 控制信号；
所述第二控制信号输出模块包括第二直流电压输入端、 第二直 流电压转换芯片和第二控制信号输出端，第二直流电压输入端与直流 电源连接，通过第二直流电压输入端输入的直流电压经过第二直流电 压转换芯片以及与该第二直流电压转换芯片相连的电子元件转换后， 形成第二控制信号， 并从第二控制信号输出端输出所述第二控制信 号。
优选地， 所述控制信号发生电路包括多个所述直流电压转换模 块，所述信号输出模块包括多组第一控制信号输入端和第二控制信号 输入端，多个所述直流电压转换模块分别与所述信号输出模块的多组 第一控制信号输入端和第二控制信号输入端一一对应。
优选地， 所述第一控制信号输出模块输出的第一控制信号能够 在第一预定范围内调节； 和 /或所述第二控制信号输出模块输出的第 二控制信号能够在第二预定范围内调节。
优选地， 所述第一预定范围为 5V至 20V, 所述第二预定范围为 -20V至 -5V。
作为本发明的另一个方面， 提供一种电路系统， 包括控制信号 发生电路和控制信号接收电路， 其中， 所述控制信号发生电路为本发 明所提供的上述控制信号发生电路，所述控制信号发生电路的所述信 号输出模块的输出端与所述控制信号接收电路电连接。
优选地， 所述控制信号接收电路为显示装置的栅极驱动电路， 该栅极驱动电路包括初始信号输入端、第一时钟信号输入端和第二时 钟信号输入端，所述控制信号发生电路的信号输出模块能够为所述栅 极驱动电路的初始信号输入端提供初始信号、为所述栅极驱动电路的 第一时钟信号输入端提供第一时钟信号，以及为所述栅极驱动电路的 第二时钟信号输入端提供第二时钟信号。
在利用本发明所提供的控制信号发生电路为所述控制信号接收 电路提供控制所需的第一控制信号和第二控制信号时，控制信号发生 电路只需在第一控制信号模式和第二控制信号模式之间进行切换即 可， 无需经过复杂的变换（例如， 无需利用运算放大器实现第一控制 信号和第二控制信号之间的切换） 。 由此可知， 本发明所提供的控制 信号发生电路可以在第一控制信号模式和第二控制信号模式这两种 模式之间快速地切换，从而可以满足控制信号接收电路所接收的控制 信号需要在第一控制信号和第二控制信号之间快速切换的运行要求。 附图说明
附图用来提供对本发明的进一步理解， 并且构成说明书的一部 分， 与下面的具体实施方式一起用于解释本发明， 但并不构成对本发 明的限制。 在附图中：
图 1 是本发明的具体实施方式所提供的控制信号发生电路和显 示装置的示意图；
图 2 是本发明的具体实施方式所提供的直流电压转换模块中的 第一控制信号输出模块的电路图；
图 3 是本发明的具体实施方式所提供的直流电压转换模块中的 第二控制信号输出模块的电路图；
图 4是本发明的具体实施方式所提供的信号输出模块的电路图； 图 5 是本发明的具体实施方式所提供的可编程逻辑器件产生的 时序信号的时序图。 附图标记说明
100： 控制信号发生电路 110： 直流电压转换模块
111： 第一控制信号输出模块 112： 第二控制信号输出模块
120： 信号输出模块 121： 模拟开关
130： 可编程逻辑器件 200： 显示装置
210： 显示面板 220： 源极驱动电路
230： 栅极驱动电路 121a: 输出端
121b: 第一控制信号输入端 121c: 第二控制信号输入端
121d: 时序信号输入端 111a: 第一直流电压输入端
111b: 第一控制信号输出端 111c:第一直流电压转换芯片
112a: 第二直流电压输入端 112b: 第二控制信号输出端
112c: 第二直流电压转换芯片 具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。 应当理 解的是， 此处所描述的具体实施方式仅用于说明和解释本发明， 并不 用于限制本发明。
如图 1 所示， 作为本发明的一个方面， 提供一种控制信号发生 电路 100， 其包括信号输出模块 120， 该信号输出模块 120包括输出 端、第一控制信号输入端和第二控制信号输入端， 所述第一控制信号 输入端用于接收第一控制信号，所述第二控制信号输入端用于接收第 二控制信号，信号输出模块 120能够选择性地将从所述第一控制信号 输入端输入的第一控制信号或从所述第二控制信号输入端输入的第 二控制信号经所述输出端输出至控制信号接收电路。
控制信号接收电路在正常工作时接收的控制信号需要在第一控 制信号和第二控制信号之间进行切换。本发明所提供的控制信号发生 电路 100具有第一控制信号模式和第二控制信号模式两种模式，并能 在这两种模式之间进行切换。 具体地， 在第一控制信号模式中， 信号 输出模块 120 将从第一控制信号输入端输入的第一控制信号输出至 所述控制信号接收电路； 在第二控制信号模式中， 信号输出模块 120 将从第二控制信号输入端输入的第二控制信号输出至所述控制信号 接收电路。
第一控制信号和第二控制信号可以为互不相同的电平信号。 例 如， 第一控制信号可以为低电平信号 VGL， 而第二控制信号可以为 高电平信号 VGH, 反之亦可； 所述控制信号接收电路可以为显示装 置中的栅极驱动电路。所述第一控制信号和第二控制信号可通过现有 的元器件产生并分别输出至信号输出模块 120 的第一控制信号输入 端和第二控制信号输入端。
在利用本发明所提供的控制信号发生电路 100 为所述控制信号 接收电路提供控制所需的第一控制信号和第二控制信号时，只需在控 制信号发生电路 100 的第一控制信号模式和第二控制信号模式之间 进行切换即可， 无需经过复杂的变换（例如， 无需利用运算放大器实 现第一控制信号和第二控制信号之间的切换） 。 由此可知， 本发明所 提供的控制信号发生电路 100 可以在第一控制信号模式和第二控制 信号模式这两种模式之间快速地切换，从而可以满足控制信号接收电 路所接收的控制信号需要在第一控制信号和第二控制信号之间快速 切换的运行要求。
除此之外， 本发明所提供的控制信号发生电路 100还可以用于 对需要在第一控制信号和第二控制信号之间进行快速切换的所述控 制信号接收电路进行测试。 gP， 本发明所提供的控制信号发生电路
100可以更加真实地模拟控制信号接收电路 （例如， 显示装置中的栅 极驱动电路） 的工作环境， 以对控制信号接收电路进行测试， 从而判 断该控制信号接收电路是否为良品。
在本发明中， 可以通过多种方式使控制信号发生电路 100在所 述第一控制信号模式和所述第二控制信号模式之间进行切换。 例如， 可以通过机械手段使控制信号发生电路 100 在第一控制信号模式和 第二控制信号模式之间切换。 具体地， 可以在控制信号发生电路 100 中设置计时单元， 该计时单元可以周期性地动作， 使控制信号发生电 路 100周期性地在第一控制信号模式和第二控制信号模式之间切换。
为了提高控制信号发生电路 100在第一控制信号模式和第二控 制信号模式之间的切换速度， 优选地， 可以利用电子手段使控制信号 发生电路 100在第一控制信号模式和第二控制信号模式之间切换。具 体地， 信号输出模块 120还可以包括时序信号输入端， 所述时序信号 输入端用于接收时序信号，信号输出模块 120根据从所述时序信号输 入端输入的时序信号选择性地将从所述第一控制信号输入端输入的 第一控制信号或从所述第二控制信号输入端输入的第二控制信号经 所述输出端输出至所述控制信号接收电路。应当理解的是， 从信号输 出模块 120 的时序信号输入端输入的时序信号与所述控制信号接收 电路正常运行时所需的控制信号（即，第一控制信号和第二控制信号） 的时序是同步的。所述时序信号可通过现有的元器件产生并输出至信 号输出模块 120的时序信号输入端。
为了快速地响应所述时序信号， 优选地， 信号输出模块 120还 可以包括至少一个模拟开关 121， 如图 4所示， 每个模拟开关 121都 包括输出端 121a、 第一控制信号输入端 121b、 第二控制信号输入端 121c和时序信号输入端 121d。输出端 121a根据从所述时序信号输入 端 121d输入的时序信号选择性地与第一控制信号输入端 121b或第二 控制信号输入端 121c相连， 从而对应地向所述控制信号接收电路输 出第一控制信号或第二控制信号。
具体地，当从时序信号输入端 121d输入的时序信号为高电平时， 模拟开关 121的输出端 121a与第一控制信号输入端 121b相连，从而 将从第一控制信号输入端 121b 输入的第一控制信号经输出端 121a 输出至所述控制信号接收电路； 当从时序信号输入端 121d输入的时 序信号为低电平时， 模拟开关 121 的输出端 121a与第二控制信号输 入端 121c相连，从而将从第二控制信号输入端 121c输入的第二控制 信号经输出端 121a输出至所述控制信号接收电路。
或者， 当从时序信号输入端 121d输入的时序信号为低电平时， 模拟开关 121的输出端 121a与第一控制信号输入端 121b相连，从而 将从第一控制信号输入端 121b 输入的第一控制信号经输出端 121a 输出至所述控制信号接收电路； 当从时序信号输入端 121d输入的时 序信号为高电平时， 模拟开关 121 的输出端 121a与第二控制信号输 入端 121c相连，从而将从第二控制信号输入端 121c输入的第二控制 信号经输出端 121a输出至所述控制信号接收电路。
当信号输出模块 120 具有一个输出端时， 该信号输出模块 120 可以具有一个模拟开关。在图 4中所示的具体实施方式中， 信号输出 模块 120具有四个模拟开关，故该信号输出模块 120具有四个输出端。 下文中将详细介绍具有多个模拟开关 121的信号输出模块 120， 这里 先不赘述。
在本发明中， 可以利用外置的时序信号发生装置为控制信号发 生电路 100的信号输出模块 120提供时序信号，为了提高控制信号发 生电路 100的集成化程度，减小包括控制信号发生电路 100的电路系 统的总体尺寸， 优选地， 可以在控制信号发生电路 100内集成用于产 生所述时序信号的可编程逻辑器件 130， 该可编程逻辑器件 130的时 序信号输出端与所述信号输出模块 120的时序信号输入端连接。
当所述控制信号接收电路正常运行需要多组控制信号 （每组控 制信号都包括所述第一控制信号和所述第二控制信号）时， 控制信号 发生电路 100可以包括多个信号输出模块 120，每个信号输出模块 120 具有一个输出端。为了提高控制信号发生电路 100的集成化程度， 优 选地， 控制信号发生电路 100可以只包括一个信号输出模块 120， 而 该信号输出模块 120 可以包括多个所述输出端， 例如信号输出模块 120可以包括多个模拟开关 121， 每个模拟开关 121具有一个输出端
121a, 从而使得信号输出模块 120具有多个输出端。
由于所述控制信号接收电路正常运行时所需的每组控制信号都 包括第一控制信号和第二控制信号， 因此， 在所述信号输出模块 120 具有多个输出端时，信号输出模块 120还可以包括多个所述时序信号 输入端， 且该多个所述时序信号输入端与多个所述输出端一一对应。 相应地， 可编程逻辑器件 130包括多个所述时序信号输出端， 可编程 逻辑器件 130 的多个所述时序信号输出端分别与信号输出模块 120 的多个所述时序信号输入端相连，能够从可编程逻辑器件 130的多个 所述时序信号输出端输出多种时序信号。
本领域技术人员应当理解的是， 各组控制信号 （每组控制信号 都包括所述第一控制信号和所述第二控制信号）的时序可以相同也可 以不同， 因此， 从可编程逻辑器件 130的多个所述时序信号输出端输 出的多种时序信号可以相同也可以各不相同，只要确保分别与所述控 制信号接收电路运行所需的各组控制信号的时序同步即可。
不同类型的控制信号接收电路需要不同的控制信号。 例如， 当 所述控制信号接收电路为显示面板中的栅极驱动电路时，作为栅极驱 动电路的控制信号接收电路运行所需的控制信号有初始信号 STV (包 括低电平信号和高电平信号） 、 第一时钟信号 CLK1 (包括低电平信 号和高电平信号） 和第二时钟信号 CLK2 (包括低电平信号和高电平 信号） 共三组控制信号。
相应地， 信号输出模块 120包括三个所述时序信号输入端， 可 编程逻辑器件 130 的多个所述时序信号输出端包括能够输出第一时 序信号的第一时序信号输出端、能够输出第二时序信号的第二时序信 号输出端和能够输出第三时序信号的第三时序信号输出端，所述第一 时序信号、第二时序信号和第三时序信号的时序图如图 5所示， 所述 第一时序信号用于控制信号输出模块 120输出初始信号 STV， 所述 第二时序信号用于控制信号输出模块 120输出第一时钟信号 CLK1 , 所述第三时序信号用于控制信号输出模块 120 输出第二时钟信号 CLK2。
在信号输出模块 120包括三个所述时序信号输入端的实施方式 中， 信号输出模块 120可以包括三个模拟开关 121。
在本发明所提供的控制信号发生电路 100 中， 对可编程逻辑器 件 130 的具体形式也没有特殊的限定， 例如， 可编程逻辑器件 130 可以是单片机。优选地， 可编程逻辑器件 130可以包括可编程门阵列 器件 （FPGA, Field-Programmable Gate Array ) ， 该可编程门阵列器 件的输出管脚形成为所述时序信号输出端。由于可编程门阵列器件包 括多个输出管脚， 因此， 在这种情况中， 可编程逻辑器件 130可容易 地实现多个时序信号的输出。
为了便于提供第一控制信号和第二控制信号， 优选地， 如图 1 所示， 控制信号发生电路 100还可以包括直流电压转换模块 110， 该 直流电压转换模块 110 可以包括产生所述第一控制信号的第一控制 信号输出模块 111 (如图 2所示） 和产生所述第二控制信号的第二控 制信号输出模块 112 (如图 3所示） ， 第一控制信号输出模块 111与 所述信号输出模块 120的第一控制信号输入端连接，第二控制信号输 出模块 112与所述信号输出模块 120的第二控制信号输入端连接。
如图 2所示， 第一控制信号输出模块 111 可以包括第一直流电 压输入端 l l la、 第一直流电压转换芯片 111c和第一控制信号输出端 l l lb。 第一直流电压输入端 111a与直流电源连接， 通过第一直流电 压输入端 111a输入的直流电压经过第一直流电压转换芯片 111c以及 与该第一直流电压转换芯片 111c相连的各种电子元件转换后， 形成 第一控制信号，并从第一控制信号输出端 111b输出该第一控制信号。
如图 3所示， 第二控制信号输出模块 112可以包括第二直流电 压输入端 112a、 第二直流电压转换芯片 112c和第二控制信号输出端 112b。 第二直流电压输入端 112a与直流电源连接， 通过第二直流电 压输入端 112a输入的直流电压经过第二直流电压转换芯片 112c以及 与该第二直流电压转换芯片 112c相连的各种电子元件转换后， 形成 第二控制信号，并从第二控制信号输出端 112b输出该第二控制信号。
在本发明中， 由于所述直流电压转换模块 110 可以包括将直流 电压转换为第一控制信号 （例如为低电平信号 VGL) 的第一控制信 号输出模块 111和将直流电压转换成第二控制信号（例如为高电平信 号 VGH) 的第二控制信号输出模块 112， 因此， 在利用第一控制信 号和第二控制信号对控制信号接收电路进行测试时，只需要在第一控 制信号输出模块 111和第二控制信号输出模块 112之间切换即可，无 需复杂的变换（例如， 无需运算放大器产生第一控制信号或第二控制 信号） ， 可以对需要快速动作的控制信号接收电路 （例如， 显示装置 中的栅极驱动电路） 提供工作所需的时序信号， 或对其进行测试。
在包括模拟开关 121 的实施方式中， 如图 2-图 4所示， 第一控 制信号输出模块 111 的第一控制信号输出端 111b 可以与模拟开关 121 的第一控制信号输入端 121b连接， 第二控制信号输出模块 112 的第二控制信号输出端 112b可以与模拟开关 121的第二控制信号输 入端 121c连接。
此外， 第一控制信号输出模块 111 可以输出稳定的第一控制信 号， gp， 当设定完毕后， 第一控制信号输出模块 i l l输出的第一控制 信号是固定不变的，该第一控制信号可以是控制信号接收电路工作所 需的控制信号。并且第二控制信号输出模块 112可以输出稳定的第二 控制信号， gP， 当设定完毕后， 第二控制信号输出模块 112输出的第 二控制信号是固定不变的，该第二控制信号可以是控制信号接收电路 工作所需的控制信号。 由此可知， 所述控制信号发生电路 100所提供 的测试环境几乎与所述控制信号接收电路的工作环境相同，因此可以 获得更准确的测试效果。
在图 2和图 3 中所示的具体实施方式中， 第一控制信号输出模 块 111输出的第一控制信号为低电平 VGL， 第二控制信号输出模块 112输出的第二控制信号为高电平 VGH。
如上文中所述， 所述控制信号接收电路正常运行时可能需要多 组控制信号 （每组控制信号都包括第一控制信号和第二控制信号） 。 当各组控制信号中的第一控制信号彼此相同，第二控制信号也彼此相 同时，可以将信号输出模块 120的多组第一控制信号输入端和第二控 制信号输入端（每组只包括一个第一控制信号输入端和一个第二控制 信号输入端）均与同一个直流电压转换模块 110相连（信号输出模块 120的各第一控制信号输入端均与该直流电压转换模块 110的第一控 制信号输出端 111b连接， 信号输出模块 120的各第二控制信号输入 端均与该直流电压转换模块 110的第二控制信号输出端 112b ) 。 为 了便于连接，控制信号发生电路 100可以包括多个直流电压转换模块 110， 信号输出模块 120的多组第一控制信号输入端和第二控制信号 输入端分别与多个直流电压转换模块 110—一对应。 即， 每个直流电 压转换模块 110均与输入相对应的一组控制信号（包括第一控制信号 和第二控制信号）的一组第一控制信号输入端和第二控制信号输入端 对应连接。
本发明所提供的控制信号发生电路 100可以用于对多种控制信 号接收电路进行控制或测试， 因此， 优选地， 第一控制信号输出模块 111 输出的第一控制信号可以在第一预定范围内调节； 和 /或第二控 制信号输出模块 112 输出的第二控制信号可以在第二预定范围内调 节。 如图 2和图 3中所示， 为了实现这一目的， 可以在第一控制信号 输出模块 111和第二控制信号输出模块 112中分别设置可调电阻。
当利用本发明所提供的控制信号发生电路对显示装置中的栅极 驱动电路进行测试时， 第一控制信号为高电平信号 VGH， 所述第一 预定范围可以为 5V至 20V, 第二控制信号为低电平信号 VGL, 所述 第二预定范围可以为 -20V至 -5V。
本发明所提供的控制信号发生电路 100可以包括一个信号输出 模块 120， 也可以包括多个信号输出模块 120。 例如， 当控制信号接 收电路为 LCD显示面板的栅极驱动电路时，由于仅在 LCD显示面板 的一侧设置有栅极驱动电路， 因此， 所述控制信号发生电路 100可以 仅包括一个信号输出模块 120， 为 LCD显示面板的栅极驱动电路提 供工作所需的控制信号或对其进行测试。 当控制信号接收电路为 AMOLED显示面板的栅极驱动电路时 （如图 1所示） ， 则需要两个 信号输出模块 120， 这是由于 AMOLED显示面板的两侧都设置有栅 极驱动电路， 一侧的栅极驱动电路的作用是提供扫描信号， 另一侧的 栅极驱动电路的作用是控制 OLED 发光， 因此需要两个信号输出模 块 120分别为两侧的栅极驱动电路提供工作所需的控制信号，或分别 对两侧的栅极驱动电路进行测试。
作为本发明的另一个方面， 如图 1 所示， 提供一种电路系统， 该电路系统包括控制信号发生电路 100和控制信号接收电路（在图 1 中为显示装置 200的栅极驱动电路 230 ) ， 其中， 所述控制信号发生 电路 100为本发明所提供的上述控制信号发生电路，所述控制信号接 收电路与所述控制信号发生电路 100的信号输出模块 120的输出端电 连接。
具体地， 所述控制信号接收电路可以为显示装置 200 的栅极驱 动电路 230， 该栅极驱动电路 230包括初始信号输入端、 第一时钟信 号输入端和第二时钟信号输入端。在这种情况下， 控制信号发生电路 的信号输出模块 120可以为所述初始信号输入端提供初始信号 STV、 为所述第一时钟信号输入端提供第一时钟信号 CLK1 , 以及为所述第 二时钟信号输入端提供第二时钟信号 CLK2。
如图 1所示， 显示装置 200还包括显示面板 210和显示面板源 极驱动电路 220。
本领域技术人员应当理解的是， 虽然在本发明中以栅极驱动电 路作为所述控制信号接收电路描述了本发明所提供的控制信号发生 电路和电路系统， 但是， 本发明并不限制于此， 本发明所提供的控制 信号发生电路还可以用于为栅极驱动电路之外的其他控制信号接收 电路提供工作所需的控制信号或对其进行测试。
以上结合附图详细描述了本发明的优选实施方式， 但是， 本发 明并不限于上述实施方式中的具体细节， 在本发明的技术构思范围 内， 可以对本发明的技术方案进行多种简单变型， 这些简单变型均属 于本发明的保护范围。
另外需要说明的是， 在上述具体实施方式中所描述的各个具体 技术特征， 在不矛盾的情况下， 可以通过任何合适的方式进行组合。 为了避免不必要的重复， 本发明对各种可能的组合方式不再另行说 明。
此外， 本发明的各种不同的实施方式之间也可以进行任意组合， 只要其不违背本发明的思想， 其同样应当视为本发明所公开的内容。

Claims

1、 一种控制信号发生电路， 其特征在于， 所述控制信号发生电 路包括信号输出模块， 所述信号输出模块包括输出端、第一控制信号 输入端和第二控制信号输入端，所述第一控制信号输入端用于接收第 一控制信号， 所述第二控制信号输入端用于接收第二控制信号， 所述 信号输出模块能够选择性地将从所述第一控制信号输入端输入的第 一控制信号或从所述第二控制信号输入端输入的第二控制信号经所 述输出端输出至控制信号接收电路。
2、 根据权利要求 1所述的控制信号发生电路， 其特征在于， 所 述信号输出模块还包括时序信号输入端，所述时序信号输入端用于接 收时序信号，所述信号输出模块根据从所述时序信号输入端输入的时 序信号选择性地将从所述第一控制信号输入端输入的第一控制信号 或从所述第二控制信号输入端输入的第二控制信号经所述输出端输 出至控制信号接收电路。
3、 根据权利要求 2所述的控制信号发生电路， 其特征在于， 所 述信号输出模块包括至少一个模拟开关，每个所述模拟开关都包括所 述输出端、所述第一控制信号输入端、所述第二控制信号输入端和所 述时序信号输入端，所述输出端根据从所述时序信号输入端输入的时 序信号选择性地与所述第一控制信号输入端或所述第二控制信号输 入端相连。
4、根据权利要求 2或 3所述的控制信号发生电路，其特征在于， 所述控制信号发生电路还包括用于产生所述时序信号的可编程逻辑 器件，所述可编程逻辑器件的时序信号输出端与所述信号输出模块的 时序信号输入端连接。
5、 根据权利要求 4所述的控制信号发生电路， 其特征在于， 所 述信号输出模块包括多个所述时序信号输入端和与多个所述时序信 号输入端一一对应的多个所述输出端，所述可编程逻辑器件包括多个 时序信号输出端，该多个时序信号输出端分别与所述信号输出模块的 多个所述时序信号输入端相连，所述可编程逻辑器件的多个所述时序 信号输出端能够输出多种时序信号。
6、 根据权利要求 5所述的控制信号发生电路， 其特征在于， 所 述控制信号接收电路为显示装置的栅极驱动电路，所述信号输出模块 包括三个所述时序信号输入端，所述可编程逻辑器件的多个所述时序 信号输出端包括能够输出第一时序信号的第一时序信号输出端、能够 输出第二时序信号的第二时序信号输出端和能够输出第三时序信号 的第三时序信号输出端，所述第一时序信号用于控制所述信号输出模 块输出初始信号，所述第二时序信号用于控制所述信号输出模块输出 第一时钟信号，所述第三时序信号用于控制所述信号输出模块输出第 二时钟信号。
7、 根据权利要求 4所述的控制信号发生电路， 其特征在于， 所 述可编程逻辑器件包括可编程门阵列器件，所述可编程门阵列器件的 输出管脚形成为所述时序信号输出端。
8、 根据权利要求 1至 3中任意一项所述的控制信号发生电路， 其特征在于， 所述控制信号发生电路还包括直流电压转换模块， 该直 流电压转换模块包括产生所述第一控制信号的第一控制信号输出模 块和产生所述第二控制信号的第二控制信号输出模块，所述第一控制 信号输出模块与所述信号输出模块的第一控制信号输入端连接，所述 第二控制信号输出模块与所述信号输出模块的第二控制信号输入端 连接。
9、 根据权利要求 8所述的控制信号发生电路， 其特征在于， 所述第一控制信号输出模块包括第一直流电压输入端、 第一直 流电压转换芯片和第一控制信号输出端，所述第一直流电压输入端与 直流电源连接，通过所述第一直流电压输入端输入的直流电压经过所 述第一直流电压转换芯片以及与所述第一直流电压转换芯片相连的 电子元件转换后， 形成第一控制信号， 并从所述第一控制信号输出端 输出所述第一控制信号；
所述第二控制信号输出模块包括第二直流电压输入端、 第二直 流电压转换芯片和第二控制信号输出端，所述第二直流电压输入端与 直流电源连接，通过所述第二直流电压输入端输入的直流电压经过所 述第二直流电压转换芯片以及与所述第二直流电压转换芯片相连的 电子元件转换后， 形成第二控制信号， 并从所述第二控制信号输出端 输出所述第二控制信号。
10、 根据权利要求 8 所述的控制信号发生电路， 其特征在于， 所述控制信号发生电路包括多个所述直流电压转换模块，所述信号输 出模块包括多组第一控制信号输入端和第二控制信号输入端，多个所 述直流电压转换模块分别与所述信号输出模块的多组第一控制信号 输入端和第二控制信号输入端一一对应。
11、 根据权利要求 8 所述的控制信号发生电路， 其特征在于， 所述第一控制信号输出模块输出的第一控制信号能够在第一预定范 围内调节； 和 /或所述第二控制信号输出模块输出的第二控制信号能 够在第二预定范围内调节。
12、 根据权利要求 11所述的控制信号发生电路， 其特征在于， 所述第一预定范围为 5V至 20V, 所述第二预定范围为 -20V至 -5V。
13、 一种电路系统， 包括控制信号发生电路和控制信号接收电 路， 其特征在于， 所述控制信号发生电路为权利要求 1至 12中任意 一项所述的控制信号发生电路，所述控制信号发生电路的所述信号输 出模块的输出端与所述控制信号接收电路电连接。
14、 根据权利要求 13所述的电路系统， 其特征在于， 所述控制 信号接收电路为显示装置的栅极驱动电路，该栅极驱动电路包括初始 信号输入端、第一时钟信号输入端和第二时钟信号输入端， 所述控制 信号发生电路的信号输出模块能够为所述栅极驱动电路的初始信号 输入端提供初始信号、为所述栅极驱动电路的第一时钟信号输入端提 供第一时钟信号，以及为所述栅极驱动电路的第二时钟信号输入端提 供第二时钟信号。
PCT/CN2014/079508 2013-09-17 2014-06-09 控制信号发生电路和电路系统 Ceased WO2015039463A1 (zh)

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