Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
  • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
  • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
  • H01L31/022458—Electrode arrangements specially adapted for back-contact solar cells for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
  • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
  • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
  • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
  • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
  • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
  • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
  • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
  • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
  • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
  • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/547—Monocrystalline silicon PV cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• the present invention relates to a method of preparing a back-contact type of solar cell having via-holes connecting the front side and the rear side of the substrate.
• a solar cell has electrodes respectively on the front side and the rear side of a semiconductor substrate, and as a front electrode is disposed on the front side, which is a light-receiving side, a light-receiving area decreases by the area of the front electrode.
• a back-contact type of solar cell has been proposed.
• a back-contact type of solar cell is divided into IBC (interdigitated back contact), MWT (metallization wrap through), EWT (emitter wrap through), and the like types according to the structure.
• the EWT type and the MWT type have via-holes connecting the front side and the rear side of the substrate, and the wall surface of the via-hole should also be doped so that carriers may move in the via-hole.
• a diffusion method has been generally used.
• an ion implantation method has been replacing the diffusion method because it is favorable for the preparation of high efficiency solar cells.
• an ion beam that is accelerated with high energy is implanted on the surface of a semiconductor substrate, and it has advantages in that the implantation depth, distribution, composition, and the like of impurities may be closely controlled, compared to the diffusion method wherein impurities are diffused by heat.
• the ion implantation is mainly being used during preparation of high efficiency solar cells through the formation of a shallow emitter, a selector emitter, and the like.
• a back-contact type of solar cell uses a semiconductor substrate having via-holes that penetrate the front side and the rear side, and particularly, for an emitter wrap through type of solar cell, the wall surface of the via-holes should also be doped. Due to the structural property, the application of ion implantation has been very limited for the preparation of an emitter wrap through type of solar cell. This is because ion implantation is a doping method using a direct-driving ion beam, and it is difficult to dope the wall surface of via-holes therewith.
• the via-hole may have a shape wherein a cross-sectional area horizontal to both sides of the substrate decreases from one side to the other side of the substrate.
• the via-hole may be formed by laser drilling, wet etching, dry etching, mechanical drilling, or water jet machining.
• Fig. 1 and Fig. 2 schematically show the ion implantation process during the preparation process of a common emitter wrap through type of solar cell.
• Figs. 3 to 5 schematically show the ion implantation process during the preparation process of an emitter wrap through type of solar cell according to one embodiment of the invention.
• comprising specifies properties, areas, integers, steps, operations, elements, or ingredients, but does not exclude addition of other properties, areas, integers, steps, operations, elements, or ingredients.
• a first constitutional element may be named a second constitutional element
• a second constitutional element may be named a first constitutional element, without departing from the right scope of the invention.
• the inventors during studies on solar cells, confirmed that when a semiconductor substrate wherein via-holes surrounded by a side wall having an inclined plane, for example, tapered via-holes are formed is used, ion implantation may be applied for the preparation of an emitter wrap through type of solar cell, and thus, a high efficiency back-contact type of solar cell may be prepared by a more simplified method, and completed the invention.
• an ion implantation method can closely control the implantation depth, distribution, composition of impurities, and the like, and allows formation of a selective emitter, and the like, and thus it is being applied for the preparation of a solar cell of a conventional structure having an electrode on the front side.
• an emitter wrap through type of solar cell uses a semiconductor substrate having multiple via-holes, it is difficult to apply the ion implantation method for the doping process of impurities.
• a high efficiency back-contact type of solar cell of a selective emitter structure having a high resistance emitter layer (31 ) and a low resistance emitter layer (33) may be prepared by a more simplified process.
• a method for preparing an emitter wrap-through solar cell including:
• preparing a first conductive type of semiconductor substrate having a front side facing the sun during normal operation and a rear side opposite to the front side; forming at least one via-hole that penetrates both sides of the substrate, and that is surrounded by a side wall having an incline plane on at least a part thereof;
• the preparation method of one embodiment may be commonly applied for the preparation of back-contact type of solar cells using a semiconductor substrate having via-holes, such as MWA (metallization wrap around), MWT (metallization wrap through), EWT (emitter wrap through) type of solar cells, and the like, and for convenience, it will be explained with reference to an emitter wrap through type of solar cell.
• MWA metalization wrap around
• MWT metalization wrap through
• EWT emitter wrap through
• the depth of the semiconductor substrate may be determined considering electrical performance and mechanical properties required for solar cells, and the like, and it is not specifically limited. However, for a non-limiting example, the depth of the semiconductor substrate may be 150 to 250 pm.
• the front side of the semiconductor substrate is a side facing the sun during normal operation, and it may be textured so as to have an uneven structure to improve the absorption rate of incident sunlight.
• the uneven structure may have various forms including a regular inverted pyramid pattern.
• the texturing may be produced by wet etching or dry etching.
• the wet etching may be conducted using an etchant composition including at least one alkali compound selected from the group consisting of potassium hydroxide, sodium hydroxide, ammonium hydroxide, tetra(hydroxymethyl)ammonium, and tetra(hydroxyethyl)ammonium.
• the etchant composition may include a cyclic compound having a boiling point of 100 °C or more, preferably 150 to 400 °C.
• the cyclic compound may be included in the content of 0.1 to 50 wt%, preferably 2 to 30 wt%, more preferably 2 to 10 wt%, based on total weight of the composition.
• the cyclic compound may improve wettability of a crystalline silicon surface to prevent overetching by the alkali compound, and it also functions to rapidly drop etched and dissolved hydrogen bubbles to prevent generation of a bubble stick phenomenon.
• the via-hole may have a circular cross-section that is horizontal to both sides of the substrate.
• the via-hole is surrounded by a side wall that is not perpendicular to both sides of the substrate, and preferably, the via-hole has a cross-sectional area in the horizontal direction to both sides of the substrate that decreases from one side to the other side of the substrate.
• the cross- sectional area of the via-hole may be continuously decreased from one side to the other side of the substrate (Fig. 3: tapered via-hole), or may be discontinuously decreased (Fig. 4: stepwise via-hole having an inclined plane).
• the tapered via-hole of Fig. 3 is one example wherein the cross-section in the perpendicular direction to both sides of the substrate forms a trapezoid, and the stepwise via-hole having an inclined plane of Fig.
• the via-hole is surrounded by a side wall that is not perpendicular to both sides of the substrate, ion implantation that has been very limitedly applied in the preparation of an emitter wrap through type of solar cell may be applied, and the wall surface of the via- holes may be uniformly doped with impurities through ion implantation. Furthermore, filling efficiency of the emitter electrode forming material may be improved in the subsequent step.
• the via-hole is not specifically limited in terms of the diameter and the like, as long as it satisfies the above-explained shape.
• the via-hole may have a diameter of 20 to 200 pm on one side of the substrate, and it is advantageous in terms of the realization of the above effect and preparation efficiency for the ratio of the minimum diameter and the maximum diameter of the via-hole to be 1 :1.2 to 1 :10, preferably 1 :1.2 to 1 :5.
• the via-hole may have a tapered shape with a diameter of 80 pm on one side and a diameter of 40 pm on the other side.
• laser drilling wet etching, dry etching, mechanical drilling, water jet machining, a combined process, or the like may be applied, and laser drilling may be advantageous in terms of process efficiency and accuracy improvement.
• the laser processing conditions may be modified according to the thickness of the substrate, the shape of via-holes, and the like, and it may be conducted while controlling energy of one shot, the location of the shot, the number of shots, total energy, and the like.
• damage removal etching may be further conducted.
• This process is used to remove a damaged area such as a burr on the surface of the substrate, and as a non-limiting example, it may be conducted using an etchant composition including an alkali compound at a temperature of 70 to 00 °C for 1 to 10 minutes.
• a second conductive type of emitter layer is formed on both sides of the substrate and the wall surface of the via- holes by ion implantation.
• the ion implantation enables doping of impurities to a desired depth while controlling the concentration, and it may achieve good uniformity even at a low doping concentration.
• the ion implantation may be conducted by the processes of wet cleaning, ion implantation, activation, and the like. Each process may be conducted according to methods and conditions commonly used in the technical field to which the invention pertains. However, according to one embodiment, ion implantation may be conducted without a separate mask for a front emitter, and it may be conducted using a mask for a rear emitter. Further, as an implantation source, a gas such as BF 3 (11 B+, 49BF2+), PH 3 (31 P+), AsH 3 (75As+), and the like may be used. In addition, implantation energy of about 5 to 50 keV, preferably about 10 keV, may be used, and if necessary, implantation energy of 50 keV or more may be used. The activation may be progressed in a high temperature furnace or an RTP furnace, and the like. Next, a step of forming a passivation layer on the front side and the rear side of the substrate is conducted.
• a gas such as BF 3
• the passivation layer aids in decreasing loss of photogenerated carriers on the substrate, and decreasing electrical loss due to shunt currents.
• the passivation layer is a dielectric layer on the substrate, and it may function to prevent escape of light received inside of the solar cell to the outside of the solar cell, and function to passivate surface defects acting as electron trap sites on the front side of the substrate.
• the functions of the passivation layer may be exhibited by a single material or multiple different materials, and the anti-reflection layer may be a monolayered thin film or a multilayered thin film.
• a first conductive type of a base electrode and a second conductive type of an emitter electrode are formed on the rear side of the substrate.
• the base electrode and the emitter electrode may be formed with common structures at common locations.
• the emitter electrode may be formed by filling a composition for an emitter electrode in the via-holes and printing on certain areas covering the via-holes, and the base electrode may be formed by printing with a composition for a base electrode in a separated form from the emitter electrode.
• each electrode may be interdigitated in a herring bone shape.
• a composition including impurities affording a first conductive type for a non- limiting example, an aluminum-based composition may be used.
• a composition including impurities affording a second conductive type for a non-limiting example, a silver-based composition may be used.
• an emitter layer was formed simultaneously on both side of the silicon wafer and the wall surface of the via-holes.
• an emitter layer in the area where a base electrode is to be formed was selectively removed.
• an etch-resist was screen printed on the area other than a base electrode forming area, and the wafer was dipped in a composition containing hydrofluoric acid for about 3 minutes to remove the emitter layer.
• the wafer was then dipped in an organic solvent containing alcohol such as methanol and ethanol, and the like, for about 1 hour to remove the etch-resist.
• silicon nitride films were formed on both sides of the wafer to a thickness of about 80 nm by plasma deposition (using a mixed gas of SiH 4 and NH 3 , deposition time about 200 seconds).
• An aluminum-based paste was then printed on the rear side of the wafer to a width of about 400 pm to form a base electrode, and a silver-based paste was printed in the via-holes and in the trench to a width of about 200 pm to form an emitter electrode.

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Citations (5)

• 2013
  • 2013-07-02 KR KR20130077252A patent/KR20150004488A/ko not_active Application Discontinuation
• 2014
  • 2014-06-20 WO PCT/KR2014/005487 patent/WO2015002398A1/en active Application Filing
  • 2014-07-01 TW TW103122725A patent/TW201503384A/zh unknown

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