WO2014205890A1 - 一种用于实现热插拔的通信模块及终端 - Google Patents

一种用于实现热插拔的通信模块及终端 Download PDF

Info

Publication number
WO2014205890A1
WO2014205890A1 PCT/CN2013/081134 CN2013081134W WO2014205890A1 WO 2014205890 A1 WO2014205890 A1 WO 2014205890A1 CN 2013081134 W CN2013081134 W CN 2013081134W WO 2014205890 A1 WO2014205890 A1 WO 2014205890A1
Authority
WO
WIPO (PCT)
Prior art keywords
communication module
capacitor
power
resistor
pin
Prior art date
Application number
PCT/CN2013/081134
Other languages
English (en)
French (fr)
Inventor
赵士青
Original Assignee
惠州Tcl移动通信有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠州Tcl移动通信有限公司 filed Critical 惠州Tcl移动通信有限公司
Priority to EP13888209.7A priority Critical patent/EP3016363B1/en
Priority to US14/419,062 priority patent/US9588561B2/en
Priority to ES13888209T priority patent/ES2726623T3/es
Publication of WO2014205890A1 publication Critical patent/WO2014205890A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power

Definitions

  • the present invention relates to mobile communication technologies, and in particular, to a communication module and a terminal for implementing hot plugging.
  • the current communication modules commonly use third-generation communication technology (3G, 3rd-generation, third-generation mobile communication technology) modules and fourth-generation communication technology.
  • (4G, 4th-generation, fourth-generation mobile communication technology) module which uses a universal serial bus (USB, Universal Serial)
  • USB Universal Serial
  • the BUS (Universal Serial Bus) interface is mainly used (specifically, the Mini-PCIe interface), and it can be connected to a terminal such as a mobile phone or a tablet computer, and connected to the internal host system to implement the Internet access function.
  • the 3G/4G module is often hot-swapped with the USB interface of the terminal, that is, the hot plugging and unplugging allows the user to remove or replace the 3G/4G module without shutting down the system. In this way, the 3G/4G module can be taken out simply by inserting and unplugging, and the system maintains uninterrupted normal operation, thereby improving the system's timely recovery capability, scalability and flexibility.
  • the USB interface data is corrupted.
  • the PCB (PCB, Printed Circuit Board) board of the existing 3G/4G module is designed to have the same length of all signal and data pins, such as the USB data pin D+ (Data+, positive data) of the USB data interface.
  • the USB data pin D-(Data-, negative data) is the same length as the power pin.
  • the power interface generates a large instantaneous current.
  • the power supply voltage output from the host system is immediately input to the power supply terminal of the 3G/4G module, generating a large instantaneous current.
  • This large current may burn some components in the power module of the 3G/4G module, causing the system to malfunction or even collapse.
  • an object of the present invention is to provide a communication module and a terminal for implementing hot plugging, so as to solve the data corruption and large moment when the communication module is hot swapped in the prior art.
  • Current causes problems with system instability.
  • a communication module for implementing hot plugging comprising a new generation micro bus interface, the new generation micro bus interface is used for connecting with a host system, and the method further includes:
  • a power switch for controlling the connection between the power end of the communication module and the power supply end of the host system
  • a charging unit configured to generate a charging current when the power switch is turned off to increase a power supply voltage of the power supply end of the communication module
  • a delay unit for generating a predetermined delay and controlling the power switch to be turned on with the predetermined delay
  • the opening and closing control unit is configured to output a control signal to control the communication module to be turned on and off after the power switch is turned on;
  • the charging unit, the power switch, the delay unit, and the opening and closing control unit are respectively connected to the new generation micro bus interface, the power switch is connected to the charging unit, and the charging unit is connected Said power terminal of the communication module;
  • the length of the data pin of the universal serial bus of the new generation micro bus interface is shorter than the power pin length of the universal serial bus by a predetermined value, and the predetermined value is 1 of the length of the power pin /3, the communication module is a third generation communication technology module.
  • the source of the FET is respectively connected to the 24th pin of the new generation micro bus interface, the first input end of the charging unit, and the delay unit The input terminal is connected, the gate of the FET is connected to the output of the delay unit, and the drain of the FET is connected to the second input of the charging unit.
  • the charging unit includes a first resistor, a first capacitor, and a second capacitor; a first end of the first resistor and a source of the FET, the new generation micro bus a 24th pin of the interface is coupled to an input of the delay unit, a second end of the first resistor and a drain of the FET, a first end of the first capacitor, and a second A positive pole of the capacitor is coupled to the power terminal of the communication module; a second end of the first capacitor and a cathode of the second capacitor are both grounded.
  • the capacitance of the first capacitor is 100 picofarads
  • the capacitance of the second capacitor is 150 microfarads.
  • the delay unit includes a second resistor and a third capacitor, a first end of the second resistor is coupled to a gate of the FET, and a first end of the second resistor A first end of the first resistor and a source of the FET are also connected through the third capacitor, and a second end of the second resistor is grounded.
  • the resistance of the second resistor is 220 kilo ohms
  • the capacitance of the third capacitor is 1 micro volt
  • time constant determined by the first resistance and the second capacitance is less than a time constant determined by the second resistance and the third capacitance.
  • a communication module for implementing hot plugging comprising a new generation micro bus interface, the new generation micro bus interface is used for connecting with a host system, and the method further includes:
  • a power switch for controlling the connection between the power end of the communication module and the power supply end of the host system
  • a charging unit configured to generate a charging current when the power switch is turned off to increase a power supply voltage of the power supply end of the communication module
  • a delay unit for generating a predetermined delay and controlling the power switch to be turned on with the predetermined delay
  • the opening and closing control unit is configured to output a control signal to control the communication module to be turned on and off after the power switch is turned on;
  • the charging unit, the power switch, the delay unit, and the opening and closing control unit are respectively connected to the new generation micro bus interface, the power switch is connected to the charging unit, and the charging unit is connected Said power terminal of the communication module;
  • the length of the universal serial bus data pin of the new generation micro bus interface is shorter than the power pin of the new generation micro bus interface.
  • the length of the data pin of the universal serial bus is shorter than the length of the power pin by a predetermined value, and the predetermined value is 1/3 of the length of the power pin.
  • the source of the FET is respectively connected to the 24th pin of the new generation micro bus interface, the first input end of the charging unit, and the delay unit The input terminal is connected, the gate of the FET is connected to the output of the delay unit, and the drain of the FET is connected to the second input of the charging unit.
  • the charging unit includes a first resistor, a first capacitor, and a second capacitor; a first end of the first resistor and a source of the FET, the new generation micro bus a 24th pin of the interface is coupled to an input of the delay unit, a second end of the first resistor and a drain of the FET, a first end of the first capacitor, and a second A positive pole of the capacitor is coupled to the power terminal of the communication module; a second end of the first capacitor and a cathode of the second capacitor are both grounded.
  • the capacitance of the first capacitor is 100 picofarads
  • the capacitance of the second capacitor is 150 microfarads.
  • the delay unit includes a second resistor and a third capacitor, a first end of the second resistor is coupled to a gate of the FET, and a first end of the second resistor A first end of the first resistor and a source of the FET are also connected through the third capacitor, and a second end of the second resistor is grounded.
  • the resistance of the second resistor is 220 kilo ohms
  • the capacitance of the third capacitor is 1 micro volt
  • time constant determined by the first resistance and the second capacitance is less than a time constant determined by the second resistance and the third capacitance.
  • the communication module is a third generation communication technology module or a fourth generation communication technology module.
  • a terminal includes a host system and a communication module for implementing hot plugging, the host system is connected to the communication module; the host system generates a control signal to control after the power switch of the communication module is turned on The communication module is turned on and off;
  • the communication module includes:
  • a power switch for controlling the connection between the power end of the communication module and the power supply end of the host system
  • a charging unit configured to generate a charging current when the power switch is turned off to increase a power supply voltage of the power supply end of the communication module
  • a delay unit for generating a predetermined delay and controlling the power switch to be turned on with the predetermined delay
  • the opening and closing control unit is configured to output a control signal to control the communication module to be turned on and off after the power switch is turned on;
  • the charging unit, the power switch, the delay unit, and the opening and closing control unit are respectively connected to the new generation micro bus interface, the power switch is connected to the charging unit, and the charging unit is connected to the power supply of the communication module. end;
  • the length of the universal serial bus data pin of the new generation micro bus interface is shorter than the power pin of the new generation micro bus interface.
  • the length of the data pin of the universal serial bus is shorter than the length of the power pin by a predetermined value, and the predetermined value is 1/3 of the length of the power pin.
  • the source of the FET is respectively connected to the 24th pin of the new generation micro bus interface, the first input end of the charging unit, and the delay unit The input terminal is connected, the gate of the FET is connected to the output of the delay unit, and the drain of the FET is connected to the second input of the charging unit.
  • the charging unit includes a first resistor, a first capacitor, and a second capacitor; a first end of the first resistor and a source of the FET, the new generation micro bus a 24th pin of the interface is coupled to an input of the delay unit, a second end of the first resistor and a drain of the FET, a first end of the first capacitor, and a second A positive pole of the capacitor is coupled to the power terminal of the communication module; a second end of the first capacitor and a cathode of the second capacitor are both grounded.
  • the capacitance of the first capacitor is 100 picofarads
  • the capacitance of the second capacitor is 150 microfarads.
  • the delay unit includes a second resistor and a third capacitor, a first end of the second resistor is coupled to a gate of the FET, and a first end of the second resistor A first end of the first resistor and a source of the FET are also connected through the third capacitor, and a second end of the second resistor is grounded.
  • the resistance of the second resistor is 220 kilo ohms
  • the capacitance of the third capacitor is 1 micro volt
  • time constant determined by the first resistance and the second capacitance is less than a time constant determined by the second resistance and the third capacitance.
  • the communication module is a third generation communication technology module or a fourth generation communication technology module.
  • the communication module and the terminal for implementing hot plugging provided by the present invention set the USB data pin of the new generation micro bus interface to be shorter than the new generation micro when the communication module performs hot drawing or hot plugging.
  • the power supply pin of the bus interface enables the host system to pre-store USB data or complete power-on preparation, and then perform USB disconnection or communication to ensure data integrity and stability.
  • the charging unit first raises the communication module.
  • the power supply voltage after the predetermined delay of the delay unit arrives, controls the power switch to open, to avoid the instantaneous large current generated at this time to damage the electronic component; meanwhile, the opening and closing control unit outputs a control signal according to the host system after the power switch is turned on. Control communication module to open and close, avoiding the instantaneous drop caused by instantaneous large current to the power supply voltage of the host system, improving the stability and reliability of the system.
  • FIG. 1 is a block diagram showing the structure of a terminal for implementing hot swap according to the present invention
  • FIG. 2 is a schematic diagram of a part of a pin of a communication module and a host system for implementing hot plugging according to the present invention
  • FIG. 3 is a PCB diagram of a communication module for implementing hot plugging according to the present invention.
  • FIG. 4 is an enlarged schematic view showing a portion A of a PCB diagram of a communication module for implementing hot plugging according to the present invention
  • FIG. 5 is a schematic circuit diagram of a communication module for implementing hot plugging and a new generation micro bus interface according to the present invention.
  • the present invention provides a communication module and a terminal for implementing hot plugging.
  • the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
  • the communication module for implementing hot plugging includes a new generation micro bus (Mini-PCIe, Peripheral Component Interconnect Express, PCI-E bus based interface), the new generation of micro bus interface is connected to the host system.
  • the communication module further includes a power switch 100, a charging unit 200, a delay unit 300, and an opening and closing control unit 400.
  • the charging unit 200, the power switch 100, the delay unit 300, and the opening and closing control unit 400 are respectively connected to a new generation micro bus interface, and the power switch 100 is connected to the charging unit 200, and the charging unit 200 is connected to the power terminal V_IO of the communication module.
  • the new generation micro bus interface is a gold finger interface (GOLD-FINGER, gold finger interface), which has the characteristics of small contact resistance and oxidation prevention.
  • the communication module is a 3G module or a 4G module.
  • the present invention is only an embodiment in which the improved module of the communication module, that is, the power switch 100, the charging unit 200, the delay unit 300, and the opening and closing control unit 400 are taken as an embodiment. It is stated that the remaining modules in the communication module are prior art and will not be described in detail herein.
  • the communication module is connected to the host system by using a new generation micro bus interface, and data loss can be avoided when the plug of the communication module is inserted or removed from the socket of the host system, that is, when hot plugged or hot extracted. Or the saving fails.
  • the plug represents the next generation microbus interface of the communication module, showing only the USB data pins and power pins in the next generation microbus interface.
  • the socket represents the interface of the host system, only the USB data pins and power pins in the interface are shown, and the remaining pins are not shown. As can be seen from FIG.
  • the USB data pin D- and the USB data pin D+ of the new generation micro bus interface of the communication module are shorter than the power supply pin VBUS, and the respective pins on the host system socket remain as they are.
  • the USB data pin D- and the USB data pin D+ are shorter than the remaining pins, and the rest of the communication module pins (including the power pin) , not shown in the figure) keep the original length, and the length of these pins are equal.
  • the lengths of the USB data pin D- and the USB data pin D+ of the communication module are shorter than the length of the power pin of the communication module by about 1/3, preferably the length of the power pin. ⁇ 0.1mm.
  • USB data pin D- and the USB data pin D+ of the new generation micro bus interface are shorter than other pins, such as the power supply pin VBUS, when the communication module is inserted into the host system, that is, the plug is inserted.
  • the power supply pin VBUS of the new generation micro bus interface of the communication module is first connected to the power supply pin VBUS on the host system socket, and the whole system is first energized to work, and then the USB data pin D- of the new generation micro bus interface.
  • the USB data pin D+ is respectively connected to the USB data pin D- and the USB data pin D+ on the host system to perform USB communication.
  • This CPU in the host system (CPU, Central The Processing Unit, the central processing unit, can power up the communication module in advance, and the system is stable and ready to wait for the transmission of USB data.
  • the USB data pin D- and the USB data pin D+ of the new generation micro bus interface are first disconnected from the USB data pin D- of the host system and the USB data pin D+, that is, the data transmission of the USB.
  • the communication is disconnected first; at this point, the CPU can handle the USB disconnect event and save the relevant data.
  • the power supply pin VBUS of the communication module is disconnected from the power supply pin VBUS of the host system, and the communication module is powered off.
  • the length of the USB data pin D- and the USB data pin D+ of the new generation micro bus interface may be shorter than other pins by 0.5 mm, as shown in FIG.
  • the time that the power supply pin VBUS is disconnected from the USB data pin D- and the USB data pin D+ is delayed by about several hundred milliseconds, then the USB data pin is on the USB data pin. After the D- and USB data pins D+ are disconnected, the power supply pin VBUS is disconnected for a period of several hundred milliseconds.
  • the CPU is sufficient to process the USB disconnect event and save the relevant data during this time period. In this way, before the communication module is powered off, the CPU has saved all the data and stopped the data transmission, so that the problem of data loss and storage failure caused by the prior art interruption and disconnection of the data transmission can be avoided, and the data is greatly improved. Integrity and correctness.
  • the communication module controls the opening and closing of the power switch 100 through the charging unit 200 and the delay unit 300. Please refer to FIG. 1 and FIG. 5 simultaneously.
  • the power switch 100 is used to control the power supply end of the host system to be connected or disconnected from the power terminal V_IO of the communication module, that is, the output terminal 3 of the charging unit 200.
  • the power switch 100 is a MOS field effect transistor Q1, the source of the MOS field effect transistor Q1 is connected to the 24th pin of the new generation micro bus interface (ie, 3.3VAUX end), the first input end 1 of the charging unit 200, and The input terminal 4 of the delay unit 300, the gate of the MOS field effect transistor Q1 is connected to the output terminal 5 of the delay unit 300, and the drain of the MOS field effect transistor Q1 is connected to the second input terminal 2 of the charging unit.
  • the system power supply SYSTEM_POWER provided by the power supply terminal of the host system is transmitted to the source of the MOS FET Q1, the first input terminal 1 of the charging unit 200, and the input terminal of the delay unit 300 through the 24th pin of the new generation micro bus interface J1. 4.
  • the MOS field effect transistor Q1 is a PMOS transistor. When the gate thereof inputs a low level, the MOS field effect transistor Q1 is turned on; when the gate thereof inputs a high level, the MOS field effect transistor Q1 is turned off.
  • the new generation of micro bus interface J1 is prior art, and only the pins and their port names associated with the present invention are shown in FIG.
  • the charging unit 200 generates a charging current when the power switch 100 is turned off, that is, when the MOS field effect transistor Q1 is turned off to increase the power supply voltage of the communication module, so that the power supply voltage G_POWER on the power supply terminal V_IO of the communication module gradually rises from 0V to near. Or equal to the system power SYSTEM_POWER of the host system.
  • the charging unit 200 includes a first resistor R1, a first capacitor C1, and a second capacitor C2. The first end of the first resistor R1 is connected to the source of the MOS field effect transistor Q1, and the second terminal of the new generation micro bus interface J1.
  • the input end of the pin and delay unit 300, the second end of the first resistor R1 is connected to the drain of the MOS field effect transistor Q1, the first end of the first capacitor C1, the anode of the second capacitor C2, and the communication module
  • the power terminal V_IO; the second terminal of the first capacitor C1 and the cathode of the second capacitor C2 are both grounded.
  • the intersection of the second end of the first resistor R1 with the drain of the MOS field effect transistor Q1, the first end of the first capacitor C1 and the anode of the second capacitor C2 is the output terminal 3 of the charging unit 200, that is, the communication module Power terminal V_IO.
  • the system power supply SYSTEM_POWER performs small current charging on the first capacitor C1 and the second capacitor C2 through the first resistor R1.
  • the magnitude of the charging current is (V_SYSTEM_POWER –V_G_POWER)/R1
  • VSYSTEM_POWER is the voltage value of the system power supply SYSTEM_POWER
  • V_G_POWER is the voltage value of the power supply voltage G_POWER.
  • the first capacitor C1 is a filter capacitor for filtering high frequency and pulse interference, and the capacitance is 100 pF.
  • the second capacitor C2 is a large capacitor for charging, and the pulse power consumption is controlled within an adaptive range, and the capacitance is 150 uF.
  • the delay unit 300 is configured to generate a predetermined delay, and control the power switch to be turned on after the predetermined delay arrives, even if the MOS FET Q1 is turned on.
  • the delay unit 300 includes a second resistor R2 and a third capacitor C3.
  • the first end of the second resistor R2 is connected to the gate of the MOS field effect transistor Q1, and the first end of the second resistor R2 is also passed through the third capacitor.
  • C3 is connected to the first end of the first resistor R1 and the source of the MOS field effect transistor Q1, and the second end of the second resistor R2 is grounded.
  • the voltage across the third capacitor C3 cannot be abrupt.
  • the voltage on the second terminal of the third capacitor C3 is equal to the system power supply SYSTEM_POWER
  • the voltage Vg on the second resistor R2 is equal to the system power supply SYSTEM_POWER, which is equivalent to MOS.
  • the gate voltage of the field effect transistor Q1 is equal to the source voltage, and the MOS field effect transistor Q1 is turned off. Since the voltage across the third capacitor C3 is equal at this time, there is no pressure difference, so there is no energy.
  • the current on the voltage Vg flows to the ground through the second resistor R2, the voltage Vg starts to gradually decrease, and the third capacitor C3 performs negative charging; at this time, the differential pressure starts to appear at both ends of the third capacitor C3, and energy is generated.
  • the MOS field effect transistor Q1 remains in an off state, at which time the second capacitor C2 is charged by the first resistor R1.
  • the MOS FET Q1 is turned on, and since the conduction internal resistance of the MOS FET Q1 is small, the power supply terminal V_IO of the communication module can be regarded as a through-host system.
  • the power supply terminal that is, the power supply voltage G_POWER is equal to the system power supply SYSTEM_POWER, and provides the operating voltage for the communication module.
  • the magnitudes of the first resistor R1, the second resistor R2, the second capacitor C2, and the third capacitor C3 should satisfy: the time constant determined by the first resistor R1 and the second capacitor C2 is less than The time constant determined by the second resistor R2 and the third capacitor C3; that is, after the second capacitor C2 is fully charged, and the power supply voltage G_POWER of the communication module is close to or equal to the system power supply SYSTEM_POWER, the third capacitor C3 is completed negative. Charging, ie voltage Vg drops to the switching threshold voltage.
  • the power supply voltage G_POWER is close to or equal to the system power supply SYSTEM_POWER
  • the current flowing from the system power supply SYSTEM_POWER to the power supply voltage G_POWER is small, and the MOS FET Q1 is turned on at this time, thereby avoiding a certain pressure value immediately after insertion.
  • the system power supply SYSTEM_POWER transmits a large instantaneous current to the power supply voltage G_POWER of 0V, and the impact of the instantaneous current on the power switch 100, that is, the MOS FET Q1 is small, and the components inside the power module in the communication module are not burned.
  • the power supply to the communication module becomes smaller. Therefore, according to the magnitudes of the first resistor R1 and the second capacitor C2, the resistance of the second resistor R2 is set to 220K ohms, and the capacitance of the third capacitor C3 is 1uF.
  • the CPU of the host system In order to prevent a large instantaneous current from being generated immediately after the communication module is inserted, the CPU of the host system generates a control signal to turn on the communication module after the MOS FET Q1 is turned on.
  • the control signal is output through the 49th pin (ie, RESERVED terminal) of the new generation micro bus interface J1, and is transmitted to the ON/OFF control circuit ON/OFF of the opening and closing control unit.
  • the communication module is in the off or working state, the voltage on the ON/OFF control line is defaulted to a high level, and the control signal is a low level pulse.
  • the control signal converts the voltage on the ON/OFF control line of the power on/off control line to a low level, and the communication module responds to the low level to realize the power on action, and the communication module starts to enter the working state due to low power.
  • the level only lasts for a while, and then the voltage on the ON/OFF of the power-on/off control line returns to a high level.
  • the principle that the communication module implements the shutdown action can be known.
  • the communication module immediately works to cause an instantaneous drop to the main system power supply voltage, which improves the stability and reliability of the system.
  • the invention also provides a terminal, comprising a host system and the communication module, wherein the host system is connected to the communication module; the host system generates a control signal opening and closing communication module after the power switch of the communication module is turned on.
  • the communication module is inserted into the mobile phone for the 4G module, and the system power supply SYSTEM_POWER is equal to 5V as an example to explain the working principle of the USB data pin, power interface and 4G module startup.
  • the power pin of the 4G module is first connected to the power pin on the mobile phone socket, first connected. After the power is turned on, the USB data pin D- and the USB data pin D+ are turned on again. In this way, the CPU in the host system is ready to be powered on, and then wait for the transmission of USB data; transmitting or processing USB data after the system is stable can ensure the accuracy of the data.
  • the system power supply SYSTEM_POWER of the host system is transmitted to the source of the MOS field effect transistor Q1 through the 24th pin of the new generation micro bus interface J1, and the voltage across the third capacitor C3 is equal and 5V. That is, the gate voltage of the MOS field effect transistor Q1 is equal to the source voltage and is 5V, and the MOS field effect transistor Q1 is turned off.
  • the system power supply SYSTEM_POWER performs small current charging on the first capacitor C1 and the second capacitor C2 through the first resistor R1, and the value of the voltage Vg in this phase gradually decreases with the negative charging process of the third capacitor C3.
  • the power supply voltage G_POWER of the communication module is close to or equal to the system power supply SYSTEM_POWER.
  • the third capacitor C3 completes the negative charging, and the voltage Vg drops to the switching threshold voltage to turn on the MOS field effect transistor Q1. Since the power supply voltage G_POWER is close to or equal to the system power supply SYSTEM_POWER, the current of the system power supply SYSTEM_POWER transmitted to the power supply voltage G_POWER is very high. Small, that is, the impact on the MOS field effect transistor Q1 becomes small. Avoid turning on the MOS FET Q1 immediately after the 4G module is inserted. When the system power supply SYSTEM_POWER of 5V is transmitted to the 0V power supply voltage G_POWER, a large instantaneous current is generated, and the MOS FET Q1 is caused to burn, which affects the system power supply. problem.
  • the communication module and the terminal for implementing hot plugging provided by the present invention set the USB data pin of the new generation micro bus interface to be shorter than the other pins of the new generation micro bus interface (including the power supply tube)
  • the length of the foot allows the host system to pre-store USB data or complete power-on preparation before the communication module performs hot-plugging or hot-plugging, and then perform USB disconnection or communication to ensure data integrity and stability;
  • the MOS field effect transistor is turned off, and the second capacitor is charged to raise the power supply voltage of the communication module. After the second capacitor is fully charged and the power supply voltage of the communication module is close to or equal to the system power supply, the third capacitor completes the negative charging.
  • the MOS field effect transistor is controlled to be turned on, which reduces the impact of the instantaneous current on the MOS FET and stabilizes the system power supply.
  • the host system After the MOS FET is turned on, the host system outputs a control signal to open and close the communication module, which avoids the instantaneous drop caused by the instantaneous large current to the power supply voltage of the host system, and improves the stability and reliability of the system.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

本发明公开一种通信模块及终端，通信模块包括：新一代微型总线接口、电源开关、充电单元、延时单元和启闭控制单元；充电单元、电源开关、延时单元、启闭控制单元分别连接新一代微型总线接口，电源开关连接充电单元，充电单元连接通信模块电源端；通用串形总线数据管脚短于其电源管脚。通信模块及终端稳定好且可靠性高。

Description

一种用于实现热插拔的通信模块及终端 技术领域
本发明涉及移动通信技术，特别涉及一种用于实现热插拔的通信模块及终端。
 背景技术
目前的通信模块常用的有第三代通信技术（3G,3rd-generation，第三代移动通信技术）模块和第四代通信技术 (4G,,4th-generation，第四代移动通信技术)模块，其以通用串形总线（USB,Universal Serial BUS,通用串行总线）接口为主（具体采用Mini-PCIe接口），将其插入手机、平板电脑等终端、与其内部的主机系统连接即可实现上网功能。3G/4G模块在使用时常与终端的USB接口进行热插拔操作，即带电插拔、允许用户在不关闭系统，不切断电源的情况下取出或更换3G/4G模块。这种方式只需简单的插入、拔出动作即可取出3G/4G模块，且系统保持不间断地正常运行，从而提高了系统对灾难的及时恢复能力、扩展性和灵活性。
但是，现有的3G/4G模块在热插拔时存在以下问题：
1、USB接口数据损坏。现有3G/4G模块的PCB（PCB，PrintedCircuitBoard，印制电路板）板在设计时，所有信号、数据管脚的长度均相等，如USB数据接口的USB数据管脚D+（Data+,正数据）、USB数据管脚D-（Data-,负数据）与电源管脚的长度相同。当3G/4G模块拔出时，USB的通讯和数据同时断开，此时数据可能仍在传输中，主机系统还来不急保存数据导致部分数据丢失。
2、电源接口产生瞬间大电流。3G/4G模块在插入时，主机系统输出的电源电压会立即输入到3G/4G模块的电源端，产生一个大的瞬间电流。该大电流可能会烧损3G/4G模块的电源模块中的部分元件，导致系统工作失常、甚至崩溃。
3、接通电源立即开启3G/4G模块产生瞬间大电流。现有的3G/4G模块在插入后，主机系统会立即启动该模块。由于3G/4G模块一上电就开始启动，会产生一个大的瞬间电流，对主机系统的电源电压造成瞬间的跌落，严重影响系统的稳定性和可靠性。
因而现有技术还有待改进和提高。
 技术问题
鉴于上述现有技术的不足之处，本发明的目的在于提供一种用于实现热插拔的通信模块及终端，以解决现在技术中通信模块进行热插拔时出现数据损坏、产生大的瞬间电流导致系统不稳定的问题。
 技术解决方案
一种用于实现热插拔的通信模块，包括新一代微型总线接口，所述新一代微型总线接口用于与主机系统连接，其还包括：
电源开关，用于控制所述通信模块的电源端与所述主机系统供电端连接的通断;
充电单元，用于在所述电源开关关闭时产生充电电流以升高所述通信模块电源端的供电电压；
延时单元，用于产生预定延时，并以所述预定延时控制所述电源开关开启；以及
启闭控制单元，用于当主机系统在电源开关开启后输出一控制信号控制所述通信模块启闭；
其中所述充电单元、所述电源开关、所述延时单元以及所述启闭控制单元分别与所述新一代微型总线接口连接，所述电源开关连接所述充电单元，所述充电单元连接所述通信模块的所述电源端；
所述新一代微型总线接口的所述通用串行总线的数据管脚的长度较所述通用串行总线的电源管脚长度短一预定值，所述预定值为所述电源管脚长度的1/3，所述通信模块为第三代通信技术模块。
在一实施例中，其中所述电源开关为场效应管，所述场效应管的源极分别与所述新一代微型总线接口的第24引脚、充电单元的第一输入端和延时单元的输入端连接，所述场效应管的栅极与所述延时单元的输出端连接，所述场效应管的漏极与所述充电单元的第二输入端连接。
在一实施例中，其中所述充电单元包括第一电阻、第一电容和第二电容；所述第一电阻的第一端分别与所述场效应管的源极、所述新一代微型总线接口的第24引脚和所述延时单元的输入端连接，所述第一电阻的第二端与所述场效应管的漏极、所述第一电容的第一端、所述第二电容的正极和所述通信模块的所述电源端连接；所述第一电容的第二端和所述第二电容的负极均接地。
在一实施例中，其中所述第一电阻的阻值为20欧姆，所述第一电容的容值为100皮法，所述第二电容的容值为150微法。
在一实施例中，其中所述延时单元包括第二电阻和第三电容，所述第二电阻的第一端连接所述场效应管的栅极，且所述第二电阻的第一端还通过所述第三电容连接所述第一电阻的第一端和所述场效应管的源极，所述第二电阻的第二端接地。
在一实施例中，其中所述第二电阻的阻值为220千欧姆，所述第三电容的容值为1微发。
在一实施例中，其中由所述第一电阻和所述第二电容确定的时间常数小于由所述第二电阻和所述第三电容确定的时间常数。
一种用于实现热插拔的通信模块，包括新一代微型总线接口，所述新一代微型总线接口用于与主机系统连接，其还包括：
电源开关，用于控制所述通信模块的电源端与所述主机系统供电端连接的通断;
充电单元，用于在所述电源开关关闭时产生充电电流以升高所述通信模块电源端的供电电压；
延时单元，用于产生预定延时，并以所述预定延时控制所述电源开关开启；以及
启闭控制单元，用于当主机系统在电源开关开启后输出一控制信号控制所述通信模块启闭；
其中所述充电单元、所述电源开关、所述延时单元以及所述启闭控制单元分别与所述新一代微型总线接口连接，所述电源开关连接所述充电单元，所述充电单元连接所述通信模块的所述电源端；
所述新一代微型总线接口的通用串行总线数据管脚的长度短于所述新一代微型总线接口的电源管脚。
在一实施例中，其中所述通用串行总线的数据管脚的长度较所述电源管脚长度短一预定值，所述预定值为所述电源管脚长度的1/3。
在一实施例中，其中所述电源开关为场效应管，所述场效应管的源极分别与所述新一代微型总线接口的第24引脚、充电单元的第一输入端和延时单元的输入端连接，所述场效应管的栅极与所述延时单元的输出端连接，所述场效应管的漏极与所述充电单元的第二输入端连接。
在一实施例中，其中所述充电单元包括第一电阻、第一电容和第二电容；所述第一电阻的第一端分别与所述场效应管的源极、所述新一代微型总线接口的第24引脚和所述延时单元的输入端连接，所述第一电阻的第二端与所述场效应管的漏极、所述第一电容的第一端、所述第二电容的正极和所述通信模块的所述电源端连接；所述第一电容的第二端和所述第二电容的负极均接地。
在一实施例中，其中所述第一电阻的阻值为20欧姆，所述第一电容的容值为100皮法，所述第二电容的容值为150微法。
在一实施例中，其中所述延时单元包括第二电阻和第三电容，所述第二电阻的第一端连接所述场效应管的栅极，且所述第二电阻的第一端还通过所述第三电容连接所述第一电阻的第一端和所述场效应管的源极，所述第二电阻的第二端接地。
在一实施例中，其中所述第二电阻的阻值为220千欧姆，所述第三电容的容值为1微发。
在一实施例中，其中由所述第一电阻和所述第二电容确定的时间常数小于由所述第二电阻和所述第三电容确定的时间常数。
在一实施例中，其中所述通信模块为第三代通信技术模块或第四代通信技术模块。
一种终端，其包括主机系统和用于实现热插拔的通信模块，所述主机系统与所述通信模块连接；所述主机系统在所述通信模块的电源开关开启后生成一控制信号以控制所述通信模块启闭;
所述通信模块包括：
新一代微型总线接口，用于与所述主机系统连接;
电源开关，用于控制所述通信模块的电源端与所述主机系统供电端连接的通断;
充电单元，用于在所述电源开关关闭时产生充电电流以升高所述通信模块电源端的供电电压；
延时单元，用于产生预定延时，并以所述预定延时控制所述电源开关开启；以及
启闭控制单元，用于当主机系统在电源开关开启后输出一控制信号控制所述通信模块启闭；
所述充电单元、电源开关、延时单元以及所述启闭控制单元分别与所述新一代微型总线接口连接，所述电源开关连接所述充电单元，所述充电单元连接所述通信模块的电源端；
所述新一代微型总线接口的通用串形总线数据管脚的长度短于所述新一代微型总线接口的电源管脚。
在一实施例中，其中所述通用串行总线的数据管脚的长度较所述电源管脚长度短一预定值，所述预定值为所述电源管脚长度的1/3。
在一实施例中，其中所述电源开关为场效应管，所述场效应管的源极分别与所述新一代微型总线接口的第24引脚、充电单元的第一输入端和延时单元的输入端连接，所述场效应管的栅极与所述延时单元的输出端连接，所述场效应管的漏极与所述充电单元的第二输入端连接。
在一实施例中，其中所述充电单元包括第一电阻、第一电容和第二电容；所述第一电阻的第一端分别与所述场效应管的源极、所述新一代微型总线接口的第24引脚和所述延时单元的输入端连接，所述第一电阻的第二端与所述场效应管的漏极、所述第一电容的第一端、所述第二电容的正极和所述通信模块的所述电源端连接；所述第一电容的第二端和所述第二电容的负极均接地。
在一实施例中，其中所述第一电阻的阻值为20欧姆，所述第一电容的容值为100皮法，所述第二电容的容值为150微法。
在一实施例中，其中所述延时单元包括第二电阻和第三电容，所述第二电阻的第一端连接所述场效应管的栅极，且所述第二电阻的第一端还通过所述第三电容连接所述第一电阻的第一端和所述场效应管的源极，所述第二电阻的第二端接地。
在一实施例中，其中所述第二电阻的阻值为220千欧姆，所述第三电容的容值为1微发。
在一实施例中，其中由所述第一电阻和所述第二电容确定的时间常数小于由所述第二电阻和所述第三电容确定的时间常数。
在一实施例中，其中所述通信模块为第三代通信技术模块或第四代通信技术模块。
 有益效果
相较于现有技术，本发明提供的用于实现热插拔的通信模块及终端，在通信模块进行热拔或热插时，设置新一代微型总线接口的USB数据管脚短于新一代微型总线接口的电源管脚，使主机系统预先保存USB数据或完成上电准备，再进行USB切断或通讯，确保了数据的完整性和稳定性；在热插时，由充电单元先升高通信模块的电源电压，在延时单元的预定延时到达后再控制电源开关打开，避免此时产生的瞬间大电流损坏电子元件；同时，启闭控制单元根据主机系统在电源开关打开后输出的控制信号控制通信模块启闭，避免了瞬间大电流对主机系统的电源电压造成的瞬间跌落，提高了系统的稳定性和可靠性。
 附图说明
图1为本发明用于实现热插拔的终端的结构方框示意图；
图2为本发明用于实现热插拔的通信模块与主机系统的部分管脚示意图；
图3为本发明用于实现热插拔的通信模块的PCB图；
图4为本发明用于实现热插拔的通信模块的PCB图中A部分的放大示意图；
图5为本发明用于实现热插拔的通信模块与新一代微型总线接口的电路示意图。
 本发明的最佳实施方式
本发明提供一种用于实现热插拔的通信模块及终端，为使本发明的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本发明进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
请参阅图1，本发明提供的用于实现热插拔的通信模块包括新一代微型总线(Mini-PCIe, Peripheral Component Interconnect Express，基于PCI-E总线的接口）接口，所述新一代微型总线接口与主机系统连接。所述通信模块还包括电源开关100、充电单元200、延时单元300和启闭控制单元400。所述充电单元200、电源开关100、延时单元300、启闭控制单元400分别连接新一代微型总线接口，所述电源开关100连接充电单元200，所述充电单元200连接通信模块的电源端V_IO。所述新一代微型总线接口为金手指接口(GOLD-FINGER,金手指接口)，其具有接触电阻小，防氧化等特点。
所述通信模块为3G模块或4G模块，本发明仅以通信模块中有所改进的部分模块、即上述的电源开关100、充电单元200、延时单元300和启闭控制单元400为实施例进行阐述，通信模块中的其余模块为现有技术，在此不作详述。
本实施例中，所述通信模块采用新一代微型总线接口与所述主机系统连接，为了使通信模块的插头插入或拔出主机系统的插座时、即热插入或热拔出时能避免数据丢失或保存失败，在设置通信模块的PCB板时，使USB数据管脚的长度短于PCB板上电源管脚的长度，如图2和图3所示。在图2中，插头表示通信模块的新一代微型总线接口，仅示出新一代微型总线接口中的USB数据管脚和电源管脚。插座表示主机系统的接口，仅示出接口中的USB数据管脚和电源管脚，其余管脚未示出。从图2中可以看出，通信模块的新一代微型总线接口的USB数据管脚D-和USB数据管脚D+均比其电源管脚VBUS短，而主机系统插座上的各个管脚保持原状。在绘制PCB板时，如图3左边所示的一排管脚，只有USB数据管脚D-和USB数据管脚D+比其余管脚短，而通信模块的其余部分管脚（包括电源管脚，图中未标出）保持原来的长度，且这些管脚的长度均相等。本实施例中，所述通信模块的USB数据管脚D-和USB数据管脚D+的长度比通信模块的电源管脚的长度短1/3左右，较佳地为电源管脚长度的 ±0.1mm。
请再次参阅图2和图3，由于新一代微型总线接口的USB数据管脚D-和USB数据管脚D+短于其他管脚、如电源管脚VBUS，当通信模块插入主机系统、即插头插入插座时，通信模块的新一代微型总线接口的电源管脚VBUS先与主机系统插座上的电源管脚VBUS接通，整个系统先通电工作起来，然后新一代微型总线接口的USB数据管脚D-和USB数据管脚D+再分别与主机系统上的USB数据管脚D-和USB数据管脚D+接通，进行USB通讯。这样主机系统中的CPU（CPU,Central Processing Unit，中央处理器）就能提前对通信模块加电，系统已经稳定后再做好准备等待USB数据的传输。
当通信模块拔出时，新一代微型总线接口的USB数据管脚D-和USB数据管脚D+先与主机系统的USB数据管脚D-和USB数据管脚D+断开、即USB的数据传输通讯先断开；此时CPU即可处理USB的断开事件并保存好相关数据。之后，通信模块的电源管脚VBUS再与主机系统的电源管脚VBUS断开连接，通信模块断电。在具体实施时，新一代微型总线接口的USB数据管脚D-和USB数据管脚D+的长度可以比其他管脚短0.5mm，如图4所示的L的长度。根据插拔速度的不同，电源管脚VBUS断开的时间比所述USB数据管脚D-和USB数据管脚D+断开的时间会延后大约几百毫秒，则在所述USB数据管脚D-和USB数据管脚D+断开之后、电源管脚VBUS断开之前就有了几百毫秒的时间段，CPU在这个时间段内足以处理完USB断开事件并保存好相关数据。这样在通信模块断电前CPU已经保存所有数据、并停止了数据的传输，就可避免现有技术中断电与断开数据传输同时进行导致数据丢失、保存失败的问题，大大提高了数据的完整性和正确性。
为了避免通信模块插入时电源接口产生一个大的瞬间电流，所述通信模块通过充电单元200和延时单元300来控制电源开关100的启闭。请同时参与图1和图5，所述电源开关100用于控制主机系统的供电端与通信模块的电源端V_IO、即充电单元200的输出端3连接或断开。所述电源开关100为MOS场效应管Q1，所述MOS场效应管Q1的源极连接新一代微型总线接口的第24引脚（即3.3VAUX端）、充电单元200的第一输入端1和延时单元300的输入端4，所述MOS场效应管Q1的栅极连接延时单元300的输出端5，所述MOS场效应管Q1的漏极连接充电单元的第二输入端2。主机系统的供电端提供的系统电源SYSTEM_POWER通过新一代微型总线接口J1的第24引脚传输至MOS场效应管Q1的源极、充电单元200的第一输入端1和延时单元300的输入端4。在具体实施时，所述MOS场效应管Q1为PMOS管，当其栅极输入低电平时，MOS场效应管Q1导通；当其栅极输入高电平时，MOS场效应管Q1截止。新一代微型总线接口J1为现有技术，图5中仅示出与本发明有关的引脚及其端口名。
所述充电单元200在电源开关100关闭时、即MOS场效应管Q1截止时产生充电电流来升高通信模块的电源电压，使通信模块的电源端V_IO上的电源电压G_POWER从0V逐渐上升至接近或等于主机系统的系统电源SYSTEM_POWER。所述充电单元200包括第一电阻R1、第一电容C1和第二电容C2；所述第一电阻R1的第一端连接MOS场效应管Q1的源极、新一代微型总线接口J1的第24引脚和延时单元300的输入端，所述第一电阻R1的第二端连接MOS场效应管Q1的漏极、第一电容C1的第一端、第二电容C2的正极和通信模块的电源端V_IO；所述第一电容C1的第二端和第二电容C2的负极均接地。
第一电阻R1的第二端与MOS场效应管Q1的漏极、第一电容C1的第一端和第二电容C2的正极的交点为充电单元200的输出端3，也即是通信模块的电源端V_IO。当MOS场效应管Q1截止时，系统电源SYSTEM_POWER通过第一电阻R1对第一电容C1和第二电容C2进行小电流充电。充电电流的大小为（V_SYSTEM_POWER –V_G_POWER）/R1, VSYSTEM_POWER为系统电源SYSTEM_POWER的压值，V_G_POWER为电源电压G_POWER的压值。其中，第一电容C1为滤波电容，用于滤除高频、脉冲干扰，其容值为100pF。第二电容C2为大电容，用于充电、将脉冲耗电控制在适应的范围内，其容值为150uF。
所述延时单元300用于产生预定延时，在预定延时到达后控制电源开关打开、即使MOS场效应管Q1导通。所述延时单元300包括第二电阻R2和第三电容C3，所述第二电阻R2的第一端连接MOS场效应管Q1的栅极，第二电阻R2的第一端还通过第三电容C3连接第一电阻R1的第一端和MOS场效应管Q1的源极，第二电阻R2的第二端接地。当通信模块刚插入时，系统电源SYSTEM_POWER传输至延时单元300的输入端4、即第三电容C3的第一端。基于电容的特性，第三电容C3两端的电压不能突变，此时第三电容C3的第二端上的电压等于系统电源SYSTEM_POWER、则第二电阻R2上的电压Vg等于系统电源SYSTEM_POWER，相当于MOS场效应管Q1的栅极电压与源极电压相等，MOS场效应管Q1截止。由于此时第三电容C3的两端电压相等，但无压差，因此无能量。接着电压Vg上的电流通过第二电阻R2流向地，电压Vg开始逐渐下降，第三电容C3进行负充电；此时第三电容C3的两端开始出现压差，有能量产生。在电压Vg下降至使MOS场效应管Q1导通的开关阈值电压之前，MOS场效应管Q1保持截止状态，此时由第一电阻R1对第二电容C2充电。当电压Vg下降至等于所述开关阈值电压时，MOS场效应管Q1导通，由于MOS场效应管Q1的导通内阻很小可以忽略，通信模块的电源端V_IO可以看作直通主机系统的供电端，即电源电压G_POWER与系统电源SYSTEM_POWER相等，为通信模块提供了工作电压。由第二电阻R2和第三电容C3的值来确定MOS场效应管Q1的时延常数t，t=R2×C3×ln((VSYSTEM_POWER – Vg1)/VSYSTEM_POWER)，其中，VSYSTEM_POWER为系统电源SYSTEM_POWER的压值，Vg1为MOS场效应管的开关阈值电压。
需要注意的是，第一电阻R1、第二电阻R2、第二电容C2、第三电容C3的取值大小应满足：由所述第一电阻R1和第二电容C2确定的时间常数小于由所述第二电阻R2和第三电容C3确定的时间常数；也即是说，在第二电容C2充满电、且通信模块的电源电压G_POWER接近或等于系统电源SYSTEM_POWER之后，第三电容C3才完成负充电、即电压Vg下降至开关阈值电压。这是因为当电源电压G_POWER接近或等于系统电源SYSTEM_POWER时，从系统电源SYSTEM_POWER流向电源电压G_POWER的电流很小，此时再导通MOS场效应管Q1，也就避免了刚插入时具有一定压值的系统电源SYSTEM_POWER传输至0V的电源电压G_POWER出现大的瞬间电流，瞬间电流对电源开关100、即MOS场效应管Q1的冲击就小，也就不会烧损通信模块中电源模块内部的元件，对通信模块的电源影响变小。因此，根据上述第一电阻R1和第二电容C2的取值大小，相应地设置第二电阻R2的阻值为220K欧姆，第三电容C3的容值为1uF。
为了避免通信模块插入后就立即启动产生大的瞬间电流，主机系统的CPU在MOS场效应管Q1导通后，生成一控制信号来开启通信模块。所述控制信号通过新一代微型总线接口J1的第49引脚（即RESERVED端）输出，传输至启闭控制单元的开机/关机控制线ON/OFF上。当通信模块处于关闭或工作状态时，开机/关机控制线ON/OFF上的电压默认为高电平，控制信号为一低电平脉冲。在通信模块处于关闭状态时，控制信号将开机/关机控制线ON/OFF上的电压转换为低电平，则通信模块响应该低电平实现开机动作，通信模块开机进入工作状态，由于低电平仅持续一段时间，之后开机/关机控制线ON/OFF上的电压又恢复为高电平。同理可知通信模块实现关机动作的原理。由于控制信号是在MOS场效应管Q1导通后生成的，此时整个系统都已稳定，且从系统电源SYSTEM_POWER流向电源电压G_POWER的电流很小，不会出现瞬间的大电流，从而避免了现有技术中通信模块插入后即刻工作对主系统电源电压造成瞬间的跌落，提高了系统的稳定性和可靠性。
本发明还提供一种终端，包括主机系统和上述的通信模块，所述主机系统连接通信模块；所述主机系统在通信模块的电源开关打开后生成一控制信号启闭通信模块。
下面请结合图1、3、5，以通信模块为4G模块插入手机、系统电源SYSTEM_POWER等于5V为例，分别阐述USB数据管脚、电源接口和4G模块启动三个方面的工作原理：
1、4G模块插入手机时，由于4G模块上的USB数据管脚D-和USB数据管脚D+比其余管脚短，4G模块的电源管脚先与手机插座上的电源管脚连接，先接通电源，之后所述USB数据管脚D-和USB数据管脚D+再接通。这样主机系统中的CPU完成上电做好准备后、再等待USB数据的传输；在系统稳定后传输或处理USB数据能确保数据的准确性。
2、4G模块插入后，主机系统的系统电源SYSTEM_POWER通过新一代微型总线接口J1的第24引脚传输至MOS场效应管Q1的源极，此时第三电容C3两端的电压相等且为5V，即MOS场效应管Q1的栅极电压与源极电压相等且为5V，MOS场效应管Q1截止。此时，系统电源SYSTEM_POWER通过第一电阻R1对第一电容C1和第二电容C2进行小电流充电，此阶段内电压Vg的值随着第三电容C3的负充电过程逐渐降低。在第二电容C2充满电后，通信模块的电源电压G_POWER接近或等于系统电源SYSTEM_POWER。之后，第三电容C3完成负充电，电压Vg下降至开关阈值电压使MOS场效应管Q1导通，由于此时电源电压G_POWER接近或等于系统电源SYSTEM_POWER，系统电源SYSTEM_POWER传输至电源电压G_POWER的电流很小，即对MOS场效应管Q1的冲击变小。避免出现4G模块插入后立即导通MOS场效应管Q1，5V的系统电源SYSTEM_POWER传输至0V的电源电压G_POWER时产生一个大的瞬间电流、冲击MOS场效应管Q1导致其烧损，影响系统电源的问题。
3、主机系统的CPU检测到MOS场效应管Q1导通后，生成一控制信号通过过新一代微型总线接口J1的第49引脚输出，传输至通信模块的开机/关机控制线ON/OFF上，开启通信模块。基于MOS场效应管Q1导通后整个系统进入稳定状态，此时再开启通信模块可避免对主系统电源电压造成瞬间的跌落，提高了系统的稳定性和可靠性。
综上所述，本发明提供的用于实现热插拔的通信模块及终端，设置新一代微型总线接口的USB数据管脚的长度短于新一代微型总线接口的其他管脚（包含了电源管脚）的长度，在通信模块进行热拔或热插时，使主机系统预先保存USB数据或完成上电准备，再进行USB切断或通讯，确保了数据的完整性和稳定性；在热插时，先截止MOS场效应管，对第二电容充电来升高通信模块的电源电压，在第二电容充满电、且通信模块的电源电压接近或等于系统电源之后，第三电容才完成负充电，控制MOS场效应管导通，减小了瞬间电流对MOS场效应管的冲击，稳定了系统电源。主机系统在MOS场效应管导通后输出控制信号启闭通信模块，避免了瞬间大电流对主机系统的电源电压造成的瞬间跌落，提高了系统的稳定性和可靠性。
可以理解的是，对本领域普通技术人员来说，可以根据本发明的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本发明所附的权利要求的保护范围。
 本发明的实施方式
工业实用性
序列表自由内容

Claims (20)

  1. 一种用于实现热插拔的通信模块，包括新一代微型总线接口，所述新一代微型总线接口用于与主机系统连接，还包括：
    电源开关，用于控制所述通信模块的电源端与所述主机系统供电端连接的通断;
    充电单元，用于在所述电源开关关闭时产生充电电流以升高所述通信模块的所述电源端的供电电压；
    延时单元，用于产生预定延时，并以所述预定延时控制所述电源开关开启；以及
    启闭控制单元，用于当所述主机系统在所述电源开关开启后输出一控制信号控制所述通信模块启闭；
    其中所述充电单元、所述电源开关、所述延时单元以及所述启闭控制单元分别与所述新一代微型总线接口连接，所述电源开关连接所述充电单元，所述充电单元连接所述通信模块的所述电源端；
    所述新一代微型总线接口的所述通用串行总线的数据管脚的长度较所述通用串行总线的电源管脚长度短一预定值，所述预定值为所述电源管脚长度的1/3，所述通信模块为第三代通信技术模块。
  2. 根据权利要求1所述的用于实现热插拔的通信模块，其中所述电源开关为场效应管，所述场效应管的源极分别与所述新一代微型总线接口的第24引脚、所述充电单元的第一输入端和所述延时单元的输入端连接，所述场效应管的栅极与所述延时单元的输出端连接，所述场效应管的漏极与所述充电单元的第二输入端连接。
  3. 根据权利要求2所述的用于实现热插拔的通信模块，其中所述充电单元包括第一电阻、第一电容和第二电容；所述第一电阻的第一端分别与所述场效应管的源极、所述新一代微型总线接口的第24引脚和所述延时单元的输入端连接，所述第一电阻的第二端与所述场效应管的漏极、所述第一电容的第一端、所述第二电容的正极和所述通信模块的所述电源端连接；所述第一电容的第二端和所述第二电容的负极均接地。
  4. 根据权利要求3所述的用于实现热插拔的通信模块，其中所述第一电阻的阻值为20欧姆，所述第一电容的容值为100皮法，所述第二电容的容值为150微法。
  5. 根据权利要求3所述的用于实现热插拔的通信模块，其中所述延时单元包括第二电阻和第三电容，所述第二电阻的第一端连接所述场效应管的栅极，且所述第二电阻的第一端还通过所述第三电容连接所述第一电阻的第一端和所述场效应管的源极，所述第二电阻的第二端接地。
  6. 根据权利要求5所述的用于实现热插拔的通信模块，其中所述第二电阻的阻值为220千欧姆，所述第三电容的容值为1微发。
  7. 根据权利要求5所述的用于实现热插拔的通信模块，其中由所述第一电阻和所述第二电容确定的时间常数小于由所述第二电阻和所述第三电容确定的时间常数。
  8. 一种用于实现热插拔的通信模块，包括新一代微型总线接口，所述新一代微型总线接口用于与主机系统连接，还包括：
    电源开关，用于控制所述通信模块的电源端与所述主机系统供电端连接的通断;
    充电单元，用于在所述电源开关关闭时产生充电电流以升高所述通信模块电源端的供电电压；
    延时单元，用于产生预定延时，并以所述预定延时控制所述电源开关开启；以及
    启闭控制单元，用于当所述主机系统在所述电源开关开启后输出一控制信号控制所述通信模块启闭；
    其中所述充电单元、所述电源开关、所述延时单元以及所述启闭控制单元分别与所述新一代微型总线接口连接，所述电源开关连接所述充电单元，所述充电单元连接所述通信模块的所述电源端；
    所述新一代微型总线接口的通用串行总线数据管脚的长度短于所述新一代微型总线接口的电源管脚。
  9. 根据权利要求8所述的用于实现热插拔的通信模块，其中所述通用串行总线的数据管脚的长度较所述电源管脚长度短一预定值，所述预定值为所述电源管脚长度的1/3。
  10. 根据权利要求8所述的用于实现热插拔的通信模块，其中所述电源开关为场效应管，所述场效应管的源极分别与所述新一代微型总线接口的第24引脚、所述充电单元的第一输入端和所述延时单元的输入端连接，所述场效应管的栅极与所述延时单元的输出端连接，所述场效应管的漏极与所述充电单元的第二输入端连接。
  11. 根据权利要求10所述的用于实现热插拔的通信模块，其中所述充电单元包括第一电阻、第一电容和第二电容；所述第一电阻的第一端分别与所述场效应管的源极、所述新一代微型总线接口的第24引脚和所述延时单元的输入端连接，所述第一电阻的第二端与所述场效应管的漏极、所述第一电容的第一端、所述第二电容的正极和所述通信模块的所述电源端连接；所述第一电容的第二端和所述第二电容的负极均接地。
  12. 根据权利要求11所述的用于实现热插拔的通信模块，其中所述第一电阻的阻值为20欧姆，所述第一电容的容值为100皮法，所述第二电容的容值为150微法。
  13. 根据权利要求11所述的用于实现热插拔的通信模块，其中所述延时单元包括第二电阻和第三电容，所述第二电阻的第一端连接所述场效应管的栅极，且所述第二电阻的第一端还通过所述第三电容连接所述第一电阻的第一端和所述场效应管的源极，所述第二电阻的第二端接地。
  14. 根据权利要求13所述的用于实现热插拔的通信模块，其中所述第二电阻的阻值为220千欧姆，所述第三电容的容值为1微发。
  15. 根据权利要求13所述的用于实现热插拔的通信模块，其中由所述第一电阻和所述第二电容确定的时间常数小于由所述第二电阻和所述第三电容确定的时间常数。
  16. 根据权利要求8所述的用于实现热插拔的通信模块，其中所述通信模块为第三代通信技术模块或第四代通信技术模块。
  17. 一种终端，其包括主机系统和用于实现热插拔的通信模块，所述主机系统与所述通信模块连接；所述主机系统在所述通信模块的电源开关开启后生成一控制信号以控制所述通信模块启闭;
    所述通信模块包括：
    新一代微型总线接口，用于与所述主机系统连接;
    电源开关，用于控制所述通信模块的电源端与所述主机系统供电端连接的通断;
    充电单元，用于在所述电源开关关闭时产生充电电流以升高所述通信模块电源端的供电电压；
    延时单元，用于产生预定延时，并以所述预定延时控制所述电源开关开启；以及
    启闭控制单元，用于当所述主机系统在所述电源开关开启后输出一控制信号控制所述通信模块启闭；
    所述充电单元、电源开关、延时单元以及所述启闭控制单元分别与所述新一代微型总线接口连接，所述电源开关连接所述充电单元，所述充电单元连接所述通信模块的电源端；
    所述新一代微型总线接口的通用串形总线数据管脚的长度短于所述新一代微型总线接口的电源管脚。
  18. 根据权利要求17所述的用于实现热插拔的通信模块，其中所述通用串行总线的数据管脚的长度较所述电源管脚长度短一预定值，所述预定值为所述电源管脚长度的1/3。
  19. 根据权利要求17所述的用于实现热插拔的通信模块，其中所述电源开关为场效应管，所述场效应管的源极分别与所述新一代微型总线接口的第24引脚、所述充电单元的第一输入端和所述延时单元的输入端连接，所述场效应管的栅极与所述延时单元的输出端连接，所述场效应管的漏极与所述充电单元的第二输入端连接。
  20. 根据权利要求19所述的用于实现热插拔的通信模块，其中所述充电单元包括第一电阻、第一电容和第二电容；所述第一电阻的第一端分别与所述场效应管的源极、所述新一代微型总线接口的第24引脚和所述延时单元的输入端连接，所述第一电阻的第二端与所述场效应管的漏极、所述第一电容的第一端、所述第二电容的正极和所述通信模块的所述电源端连接；所述第一电容的第二端和所述第二电容的负极均接地。
PCT/CN2013/081134 2013-06-26 2013-08-09 一种用于实现热插拔的通信模块及终端 WO2014205890A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP13888209.7A EP3016363B1 (en) 2013-06-26 2013-08-09 Communication module and terminal for realizing hot plug
US14/419,062 US9588561B2 (en) 2013-06-26 2013-08-09 Communication module and terminal for implementing hot plug
ES13888209T ES2726623T3 (es) 2013-06-26 2013-08-09 Módulo de comunicación y terminal para realizar una conexión directa en caliente

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201310257589.9A CN103345460B (zh) 2013-06-26 2013-06-26 一种用于实现热插拔的通信模块及终端
CN201310257589.9 2013-06-26

Publications (1)

Publication Number Publication Date
WO2014205890A1 true WO2014205890A1 (zh) 2014-12-31

Family

ID=49280258

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2013/081134 WO2014205890A1 (zh) 2013-06-26 2013-08-09 一种用于实现热插拔的通信模块及终端

Country Status (5)

Country Link
US (1) US9588561B2 (zh)
EP (1) EP3016363B1 (zh)
CN (1) CN103345460B (zh)
ES (1) ES2726623T3 (zh)
WO (1) WO2014205890A1 (zh)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103327656B (zh) * 2013-06-26 2016-11-16 惠州Tcl移动通信有限公司 通信模块和便携式终端
US9939482B2 (en) * 2014-10-27 2018-04-10 Honeywell International Inc. Method and apparatus for providing early warning of extraction of module under power
US9891680B2 (en) 2014-11-19 2018-02-13 Dell Products L.P. Information handling system multi-purpose connector guide pin structure
US9501118B2 (en) * 2014-11-19 2016-11-22 Dell Products L.P. Information handling system multi-purpose connector guide pin structure
US10320128B2 (en) 2014-11-19 2019-06-11 Dell Products L.P. Information handling system multi-purpose connector guide pin structure
US9791906B2 (en) 2014-11-19 2017-10-17 Dell Products L.P. Information handling system multi-purpose connector guide pin structure
CN105068959A (zh) * 2015-08-25 2015-11-18 广东欧珀移动通信有限公司 一种终端以及具有数据交换功能的终端的充电方法和装置
CN105955911B (zh) * 2016-05-09 2023-06-02 杭州宏杉科技股份有限公司 一种热插拔控制电路及其控制方法
CN105978548B (zh) * 2016-06-28 2018-10-26 青岛歌尔声学科技有限公司 一种支持热插拔功能的电路
CN106649172B (zh) * 2016-09-30 2019-10-11 宇龙计算机通信科技(深圳)有限公司 一种数据存储方法及装置
CN108243359B (zh) * 2016-12-26 2021-03-23 神讯电脑(昆山)有限公司 基于3g/4g模组检测装置及其检测方法
CN108628787B (zh) * 2017-03-22 2023-02-07 鸿富锦精密工业(武汉)有限公司 接口控制电路
CN107544880A (zh) * 2017-07-18 2018-01-05 惠州市德赛西威汽车电子股份有限公司 一种usb热插拔稳定性测试方法及测试装置
CN107861839A (zh) * 2017-10-18 2018-03-30 深圳市汉普电子技术开发有限公司 Usb热插拔数据防丢失方法、设备及存储介质
CN109362130B (zh) * 2018-10-18 2023-04-28 深圳码时创新科技有限公司 Mifi设备系统及方法
CN110737621A (zh) * 2019-09-03 2020-01-31 北京立华莱康平台科技有限公司 接口的切换方法、系统、装置、存储介质和处理器
CN112213569B (zh) * 2020-09-23 2022-11-08 国网福建省电力有限公司 变电站手持核相仪延时断电保证数据完整的装置及方法
CN113204279B (zh) * 2021-04-23 2022-12-02 山东英信计算机技术有限公司 基于冗余电源提高服务器效能的方法、系统、设备及介质
CN113568855B (zh) * 2021-07-30 2024-05-14 福州创实讯联信息技术有限公司 一种低成本的pcie热拔插多模式兼容装置
CN113806272B (zh) * 2021-10-20 2024-05-28 深圳创维－Rgb电子有限公司 支持串口热插拔的电路、控制方法以及电子设备
CN114050714B (zh) * 2022-01-13 2022-04-22 苏州浪潮智能科技有限公司 一种保护pcie卡电源的方法、电路、装置及介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101192053A (zh) * 2007-12-12 2008-06-04 福建星网锐捷网络有限公司 模块化设备中热插拔模块的上电方法及热插拔控制电路
CN201984507U (zh) * 2010-11-16 2011-09-21 北京中电华大电子设计有限责任公司 一种防热插拔的智能卡触点

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210855A (en) * 1989-06-09 1993-05-11 International Business Machines Corporation System for computer peripheral bus for allowing hot extraction on insertion without disrupting adjacent devices
US5898844A (en) * 1996-09-13 1999-04-27 International Business Machines Corporation Data processing system including a hot-plug circuit for receiving high-power adaptor cards
US7021971B2 (en) * 2003-09-11 2006-04-04 Super Talent Electronics, Inc. Dual-personality extended-USB plug and receptacle with PCI-Express or Serial-At-Attachment extensions
KR20040074491A (ko) * 2003-02-19 2004-08-25 삼성전자주식회사 핫 플러그 신호 생성장치 및 생성방법
KR101038109B1 (ko) * 2004-07-05 2011-06-01 삼성전자주식회사 듀얼 인터페이스 모드를 지원하는 스마트 카드 시스템
TWM266635U (en) * 2004-10-01 2005-06-01 Megawin Technology Co Ltd USB over-current protection circuit
TWI304283B (en) * 2006-03-20 2008-12-11 Hith Tech Computer Corp Connector
CN101989246A (zh) * 2009-07-29 2011-03-23 鸿富锦精密工业（深圳）有限公司 可自动切换usb主从设备模式的电子装置
CN201594876U (zh) * 2010-01-30 2010-09-29 青岛海信电器股份有限公司 一种接口供电电路及具有所述电路的电视机
CN101969192A (zh) * 2010-09-09 2011-02-09 惠州Tcl移动通信有限公司 一种用于保护usb供电设备的通信终端
US9407087B2 (en) * 2011-08-08 2016-08-02 Anpec Electronics Corporation Over voltage protection circuit and electronic system for handling hot plug
TW201328070A (zh) * 2011-12-26 2013-07-01 Hon Hai Prec Ind Co Ltd Usb插頭
CN103034607B (zh) * 2012-11-27 2015-08-19 福建星网锐捷网络有限公司 热插拔电路、接口电路及电子设备组件
CN103327656B (zh) * 2013-06-26 2016-11-16 惠州Tcl移动通信有限公司 通信模块和便携式终端
TW201523266A (zh) * 2013-12-13 2015-06-16 Primax Electronics Ltd 使用通用序列匯流排（ｕｓｂ）插座進行韌體載入的電子裝置及其韌體載入方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101192053A (zh) * 2007-12-12 2008-06-04 福建星网锐捷网络有限公司 模块化设备中热插拔模块的上电方法及热插拔控制电路
CN201984507U (zh) * 2010-11-16 2011-09-21 北京中电华大电子设计有限责任公司 一种防热插拔的智能卡触点

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3016363A4 *

Also Published As

Publication number Publication date
CN103345460B (zh) 2016-08-10
CN103345460A (zh) 2013-10-09
ES2726623T3 (es) 2019-10-08
US20150205337A1 (en) 2015-07-23
EP3016363B1 (en) 2019-02-27
EP3016363A4 (en) 2017-02-08
US9588561B2 (en) 2017-03-07
EP3016363A1 (en) 2016-05-04

Similar Documents

Publication Publication Date Title
WO2014205890A1 (zh) 一种用于实现热插拔的通信模块及终端
WO2011032410A1 (zh) 一种移动终端usb或充电器插入识别方法及识别装置
CN111258403B (zh) 一种服务器集中供电的控制装置
WO2014205902A1 (zh) 通信模块及相应的便携式终端
WO2014166182A1 (zh) 可变充电电压的usb充电系统、充电器及智能终端
CN104081368A (zh) 移动设备自动检测装置和方法
CN106301342B (zh) 接口电路及终端设备
WO2011124049A1 (zh) Usbkey装置及利用usb接口实现智能卡通信的方法
WO2014187030A1 (zh) Sim卡连接器和移动终端
CN103208822A (zh) Usb充电控制电路
WO2015074378A1 (zh) 一种快速充电终端
CN104781754A (zh) 通信端口中的空闲功率的减小
WO2014079223A1 (zh) 一种移动终端及其控制sim卡热插拔的方法
CN101907914A (zh) 电脑电源开启信号控制电路
CN113568855B (zh) 一种低成本的pcie热拔插多模式兼容装置
CN201877592U (zh) Usb接口结构及具有该usb接口结构的电脑机箱
CN109344108A (zh) 一种Type-C接口设备、通信方法和通信系统
WO2022057372A1 (zh) 一种基于pca9511芯片的iic挂死的链路恢复电路及方法
WO2022063067A1 (zh) 电源适配器、终端设备、电子设备及其充电控制方法
CN207020664U (zh) 用于扩展pci‑e接口的扩展卡
WO2018040175A1 (zh) 一种充电方法及装置
CN111417034A (zh) 一种交换机及其交换板卡热插拔方法、装置和系统
CN204809565U (zh) Usb集线器
CN203520299U (zh) 一种定时开机控制电路
CN112821156B (zh) 一种电子标签芯片与type-c数据线

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14419062

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13888209

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2013888209

Country of ref document: EP