WO2014188481A1 - Dispositif d'identification de signal vidéo, dispositif d'affichage vidéo, procédé d'identification de signal vidéo et procédé d'affichage vidéo - Google Patents

Dispositif d'identification de signal vidéo, dispositif d'affichage vidéo, procédé d'identification de signal vidéo et procédé d'affichage vidéo Download PDF

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Publication number
WO2014188481A1
WO2014188481A1 PCT/JP2013/063915 JP2013063915W WO2014188481A1 WO 2014188481 A1 WO2014188481 A1 WO 2014188481A1 JP 2013063915 W JP2013063915 W JP 2013063915W WO 2014188481 A1 WO2014188481 A1 WO 2014188481A1
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WIPO (PCT)
Prior art keywords
signal
video
width
synchronization signal
vertical
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PCT/JP2013/063915
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English (en)
Japanese (ja)
Inventor
亨 片岡
Original Assignee
Ｎｅｃディスプレイソリューションズ株式会社
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Priority to PCT/JP2013/063915 priority Critical patent/WO2014188481A1/fr
Priority to JP2015517938A priority patent/JP6099165B2/ja
Publication of WO2014188481A1 publication Critical patent/WO2014188481A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00—Diagnosis, testing or measuring for television systems or their details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/08—Separation of synchronising signals from picture signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0442—Handling or displaying different aspect ratios, or changing the aspect ratio
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/12—Synchronisation between the display unit and other units, e.g. other display units, video-disc players
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays

Definitions

  • the present invention relates to a video signal determination device, a video display device, a video signal determination method, and a video display method for determining characteristics of a video signal.
  • the type of the input signal (video signal A technique for determining the type). For example, in Patent Document 1, in addition to the above information, the width of the vertical synchronization signal is detected to determine the type of the input video signal. Then, using this determination result, an image corresponding to the image signal is displayed.
  • FIG. 1 is a block diagram showing a video display device in Patent Document 1.
  • FIG. 1 is a block diagram showing a video display device in Patent Document 1.
  • the video display apparatus includes an input terminal 1, a video synchronization processing circuit 2 (hereinafter referred to as a synchronization processing circuit 2), a detection unit 30, a CPU 4, and a scaler (scaler in Patent Document 1).
  • a circuit 5 a fixed pixel panel drive circuit 6 (hereinafter referred to as drive circuit 6), and a fixed pixel panel 7 (hereinafter referred to as panel 7).
  • the synchronization processing circuit 2 is an AD conversion unit that performs analog-to-digital conversion of an analog input signal including a video signal input to the input terminal 1, a synchronization separation unit that separates the synchronization signal and the video signal, and the like.
  • the synchronization separation unit generates a synchronization type signal corresponding to the synchronization type of the input signal.
  • the synchronization processing circuit 2 outputs the separated synchronization signal, video signal, and synchronization type signal to the detection unit 30. Further, the synchronization processing circuit 2 outputs the separated video signal to the scaler circuit 5.
  • the detection unit 30 detects the horizontal synchronization frequency, the vertical synchronization frequency, the scan type, the total number of lines, the number of video lines, the synchronization type, and the vertical synchronization from the synchronization signal, the video signal, and the synchronization type signal output from the synchronization processing circuit 2. Detect signal width and sync polarity.
  • FIG. 2 is a diagram showing an internal configuration of the detection unit 30 shown in FIG.
  • the detection unit 30 shown in FIG. 1 includes a horizontal / vertical frequency detection circuit 31, a synchronization polarity detection circuit 32, a synchronization type detection circuit 33, a scan type detection circuit 34, and the number of video lines.
  • a detection circuit 35, a total line number detection circuit 36, and a vertical synchronization signal width detection circuit 3A2 are provided.
  • the CPU 4 discriminates the type of the input video signal based on the detection result of the detection unit 30, and drives various types of control data suitable for the discriminated signal type to the video synchronization processing circuit 2, the scaler circuit 5, and the fixed pixel panel drive. Set for each circuit 6.
  • FIG. 3 illustrates a process of determining the aspect ratio based on the vertical sync signal width for a signal having 768 video lines and a vertical sync frequency of around 60 Hz in the video display apparatus shown in FIG. It is a flowchart for.
  • Fig. 4 shows the vertical sync signal width and aspect ratio when the input signal is a CVT (Coordinated Video Timings) signal defined by VESA (Video Electronics Standards Association), an industry standardization organization for video peripherals such as personal computers. It is a figure which shows the relationship.
  • CVT Coordinatd Video Timings
  • VESA Video Electronics Standards Association
  • step 101 the CPU 4 determines the number of lines of the vertical synchronization signal width detected by the vertical synchronization signal width detection circuit 3A2 in step 101 for a signal having 768 video lines and a vertical synchronization frequency of 60 Hz. Determine whether.
  • the CPU 4 determines that the aspect ratio is 4: 3 based on the relationship shown in FIG. . If the vertical synchronization signal width is 4 lines as a result of the determination, in step 103, the CPU 4 determines that the aspect ratio is 4: 3 based on the relationship shown in FIG. If the vertical synchronization signal width is 5 lines as a result of the determination, in step 104, the CPU 4 determines that the aspect ratio is 16: 9 based on the relationship shown in FIG. If the vertical synchronization signal width is 6 lines as a result of the determination, in step 105, the CPU 4 determines that the aspect ratio is 16:10 based on the relationship shown in FIG. If the vertical synchronization signal width is 7 lines as a result of the determination, in step 106, the CPU 4 determines that the aspect ratio is 15: 9 based on the relationship shown in FIG.
  • FIG. 5 is a diagram showing the determination result of the aspect ratio performed based on the vertical sync signal width for a signal having 768 video lines and a vertical sync frequency of around 60 Hz. As shown in Fig. 5, the number of video lines is 768 lines, and the vertical frequency is around 60Hz.
  • DMT Display Monitor Timings
  • GFT Generalized Timing Formula
  • the aspect ratio of the display image does not become a correct value.
  • the horizontal synchronization frequency is around 47 KHz
  • the vertical synchronization frequency is around 60 Hz
  • the difference between the signals in both the horizontal synchronization frequency and the vertical synchronization frequency is very small. Therefore, it is difficult to identify the signals by frequency. Further, even if a determination element other than the synchronization frequency is added, the conventional video signal determination method cannot be individually identified.
  • An object of the present invention is to provide a video signal determination device, a video display device, a video signal determination method, and a video display method that solve the above-described problems.
  • the video signal determination device of the present invention is A detection unit that inputs an input signal including a synchronization signal and a video signal, and detects the number of video lines, a vertical synchronization frequency, a vertical synchronization signal width, and a horizontal synchronization signal width from the synchronization signal and the video signal; And a determination unit that determines the aspect ratio of the video signal based on the number of video lines, the vertical synchronization frequency, the vertical synchronization signal width, and the horizontal synchronization signal width detected by the detection unit.
  • the video display device of the present invention is An input signal including a synchronization signal and a video signal is input, and the number of video lines, a vertical synchronization frequency, a vertical synchronization signal width, and a horizontal synchronization signal width are detected from the synchronization signal and the video signal, and the detected video line
  • a video processing unit that processes the video signal using the aspect ratio determined by the control unit;
  • a display unit that displays video based on the video signal processed by the video processing unit.
  • the video signal determination method of the present invention includes: Inputting an input signal including a synchronization signal and a video signal, and detecting a number of video lines, a vertical synchronization frequency, a vertical synchronization signal width and a horizontal synchronization signal width from the synchronization signal and the video signal; Determining the aspect ratio of the video signal based on the detected number of video lines, vertical synchronization frequency, vertical synchronization signal width, and horizontal synchronization signal width.
  • the video display method of the present invention includes: Inputting an input signal including a synchronization signal and a video signal, and detecting a number of video lines, a vertical synchronization frequency, a vertical synchronization signal width and a horizontal synchronization signal width from the synchronization signal and the video signal; Determining an aspect ratio of the video signal based on the detected number of video lines, vertical synchronization frequency, vertical synchronization signal width and horizontal synchronization signal width; Processing the video signal using the determined aspect ratio; Displaying an image based on the processed image signal.
  • FIG. 2 It is an example of the block diagram which shows a general video display apparatus. It is a figure which shows the internal structure of the detection part shown in FIG. 2 is a flowchart for explaining processing for determining an aspect ratio based on a vertical synchronization signal width for a signal having 768 video lines and a vertical synchronization frequency of 60 Hz in the video display apparatus shown in FIG. 1. . It is a figure which shows the relationship between a vertical-synchronization signal width
  • FIG. 7 It is a block diagram which shows one Embodiment of the video display apparatus of this invention. It is a figure which shows an example of the internal structure of the detection part shown in FIG. 7 is a flowchart for explaining an aspect ratio determination process in a determination unit shown in FIG. 6. It is a figure which shows the result of the determination process of the aspect ratio in the determination part shown in FIG. It is a figure which shows an example of the internal structure of the detection part shown in FIG.
  • FIG. 6 is a block diagram showing an embodiment of the video display device of the present invention.
  • the present embodiment includes an input terminal 1, an input unit 200, a detection unit 300, a determination unit 400, a scaler circuit 5, a drive circuit 6, and a display unit 7.
  • the detection unit 300 and the determination unit 400 constitute a video signal determination device.
  • the scaler circuit 5 is an example of a video processing unit.
  • the detection unit 300 and the determination unit 400 constitute a control unit.
  • the input unit 200 converts the analog signal into a digital signal.
  • the input unit 2 performs serial-parallel conversion.
  • the digital video signal is output from the input unit 200 to the scaler circuit 5 and the detection unit 300.
  • the synchronization signal is output from the input unit 200 to the detection unit 300, and the synchronization signal is included in the video signal.
  • the combined signal is separated into a synchronization signal and a video signal at the input unit 200, and the video signal is sent to the scaler circuit 5 and the detection unit 300.
  • the synchronization signal is output to the detection unit 300.
  • the synchronization signal output to the detection unit 300 may be a horizontal synchronization signal and a vertical synchronization signal separated or a composite synchronization signal.
  • the detection unit 300 detects an analog video signal input from the input terminal 1, for example, a COMPUTER (D-Sub) terminal. In addition to the operation of the detection unit 30 shown in FIG. 1, the detection unit 300 detects the horizontal synchronization signal width from the synchronization signal.
  • a COMPUTER D-Sub
  • FIG. 7 is a diagram illustrating an example of an internal configuration of the detection unit 300 illustrated in FIG.
  • the detection unit 300 shown in FIG. 6 includes a horizontal / vertical frequency detection circuit 31, a synchronization polarity detection circuit 32, a synchronization type detection circuit 33, a scan type detection circuit 34, and the number of video lines.
  • a detection circuit 35, a vertical synchronization signal width detection circuit 3A2, a total line number detection circuit 36, and a horizontal synchronization signal width detection circuit 38 are provided.
  • the horizontal / vertical frequency detection circuit 31 detects the frequency of the horizontal / vertical synchronization signal using a reference clock (for example, 100 MHz) asynchronous with the input video signal.
  • the sync polarity detection circuit 32 detects the polarities of the horizontal and vertical sync signals.
  • the synchronization type detection circuit 33 detects whether the horizontal / vertical synchronization signal is separated (separate), mixed (mix), or superimposed on the video signal (Sync-on-Green or ternary synchronization). To do.
  • the scan type detection circuit 34 detects whether the input video signal is interlaced scanning (interlaced) or sequential scanning (progressive).
  • the video line number detection circuit 35 detects the number of effective video display lines using the video signal and the horizontal / vertical synchronization signal.
  • the vertical synchronization signal width detection circuit 3A2 detects the vertical same signal width by counting the width of the vertical synchronization signal with the horizontal synchronization signal.
  • the total line number detection circuit 36 detects the total number of lines from the synchronization signal.
  • the total line number detection circuit 36 outputs the detected total number of lines to the determination unit 400.
  • the horizontal synchronization signal width detection circuit 38 counts from the synchronization signal using a predetermined reference clock (for example, 100 MHz), and detects the horizontal synchronization signal width (pulse width). Further, the horizontal synchronization signal width detection circuit 38 outputs the detected horizontal synchronization signal width to the determination unit 400.
  • a predetermined reference clock for example, 100 MHz
  • the determination unit 400 determines the aspect of the video signal based on the number of video lines, the vertical synchronization frequency, the vertical synchronization signal width, and the horizontal synchronization signal width detected by the detection unit 300. It is the determination part which determines ratio.
  • FIG. 8 is a flowchart for explaining the aspect ratio determination processing in the determination unit 400 shown in FIG.
  • the determination unit 400 determines the vertical synchronization signal width detected by the vertical synchronization signal width detection circuit 3A2 of the detection unit 300 in step 1 for a signal having 768 video lines and a vertical synchronization frequency in the vicinity of 60 Hz. Determine if it is a line.
  • step 1 determines that the vertical synchronization signal width is 4, 8, 9, 10 lines
  • step 2 determines that the aspect ratio set for the video signal is 4: 3. To do. If the result of determination in step 1 is that the vertical synchronization signal width is 5 lines, in step 3, the determination unit 400 determines that the aspect ratio set for the video signal is 16: 9. If the result of determination in step 1 is that the vertical synchronization signal width is 7 lines, in step 4, the determination unit 400 determines that the aspect ratio set for the video signal is 15: 9.
  • step 5 the determination unit 400 is based on the horizontal synchronization signal width detected by the horizontal synchronization signal width detection circuit 38 of the detection unit 300. Judgment.
  • FIG. 9 is a diagram illustrating a result of the aspect ratio determination process in the determination unit 400 illustrated in FIG.
  • a signal having a vertical sync signal width of 3 lines is No. 2, No. 8, no. 9, no. 14 corresponds.
  • no. No. 8 has a horizontal synchronizing signal width Hw of 1.673 [uSec]
  • no. No. 9 has a horizontal sync signal width Hw of 0.778 [uSec]
  • the horizontal synchronization signal width Hw of the 14 signal is 1.697 [uSec].
  • the dot clock is an integral multiple of the horizontal synchronizing signal of the input signal.
  • step 6 the determination unit 400 determines that the video It is determined that the aspect ratio set for the signal is 15: 9.
  • the horizontal synchronizing signal width is 1.673 [uSec] (a value corresponding to 143 pixels when the dot clock is 85.5 MHz) or 0.778 [uSec] (when the dot clock is 72 MHz).
  • step 7 the determination unit 400 determines that the aspect ratio set for the video signal is 16: 9.
  • the determination unit 400 determines that the aspect ratio set for the video signal is 4: 3.
  • the aspect ratio set when the value is other than the predetermined value is 4: 3.
  • step 9 the determination unit 400 is based on the horizontal synchronization signal width detected by the horizontal synchronization signal width detection circuit 38 of the detection unit 300. Judgment.
  • a signal having a vertical synchronization signal width of 6 Line is No. 4, no. 5, no. 10, no. 11, no. 15 corresponds.
  • the horizontal synchronization signal width Hw is 136 [Pixel]
  • the horizontal synchronizing signal width Hw of the signal No. 5 is 1.310 [uSec].
  • the horizontal synchronization signal width Hw of the signal No. 10 is 0.489 [uSec]
  • the horizontal synchronizing signal width Hw of the signal No. 11 is 1.579 [uSec]
  • the horizontal synchronization signal width Hw of the 15 signals is 1.383 [uSec].
  • step 10 the determination unit 400 adds the video signal to the video signal. It is determined that the aspect ratio to be set is 15: 9.
  • step 9 If the result of determination in step 9 is that the horizontal synchronization signal width is 1.310 [uSec] (a value corresponding to 112 pixels when the dot clock is 85.5 MHz), the determination unit 400 in step 11 It is determined that the aspect ratio set for the video signal is 16: 9. If the result of determination in step 9 is that the horizontal synchronization signal width is 2.092 [uSec] (a value corresponding to 136 pixels when the dot clock is 65 MHz), in step 12, the determination unit 400 determines that the video It is determined that the aspect ratio set for the signal is 4: 3.
  • the determination unit 400 It is determined that the aspect ratio set for the video signal is 16:10. Here, the aspect ratio set when the value is other than the predetermined value is 16:10. However, it is desirable to set the aspect ratio that is most commonly used in the signal group determined in step 9.
  • the determination unit 400 sets the aspect ratio determined as described above in the scaler circuit 5.
  • the horizontal sync signal width is added to the condition for determining the aspect ratio.
  • the horizontal frequency, the vertical frequency, the horizontal synchronization width, and the like are measured using a reference clock that is always constant without depending on the input signal, which is used for timing measurement. Note that since the vertical synchronization signal width is measured in units of the number of scanning lines (lines), it can be measured without depending on the frequency of the dot clock.
  • the horizontal sync signal width is measured, the signal is discriminated, and the aspect ratio is set according to the judgment result.
  • No. shown in FIG. No. 8 has a horizontal sync signal width of 1.673 [uSec].
  • the horizontal sync signal width of the signal No. 8 is 1.697 [uSec], which is a small difference.
  • the frequency of the reference clock may not be set to the above frequency (100 MHz) for reasons such as reducing power consumption, limiting the operating frequency of peripheral devices, and reducing costs. .
  • the reference clock is set to 50 MHz. If the reference clock is 50 MHz and the vertical synchronizing signal width is 3 lines, No. No. 8 horizontal sync signal width and No. 8 signal. The difference between the 14 signals and the horizontal sync signal width is small, making it difficult to distinguish, but distinguishing from other signals is possible. That is, the horizontal sync signal width of each signal is No. 2 signal is 1.622 [uSec], No. 2 signal. 8 signal is 1.673 [uSec], No. 8 signal.
  • 9 is 0.778 [uSec], No. 9 signal. 14 signal is 1.697 [uSec], so no. No. 8 signal and no.
  • the signals other than 14 can be identified by detecting the horizontal synchronizing signal width with a 50 MHz reference clock.
  • FIG. 10 is a diagram illustrating an example of an internal configuration of the detection unit 300 illustrated in FIG.
  • the detection unit 300 in the second embodiment further includes a vertical back porch detection unit 39.
  • the vertical back porch detection circuit 39 detects the width of the vertical back porch from the video signal and the synchronization signal. Note that the width of the vertical back porch is calculated as the number of horizontal lines. That is, it counts using a horizontal synchronizing signal. Further, the vertical back porch detection circuit 39 outputs the detected width of the vertical back porch to the determination unit 400.
  • the width of the vertical back porch is used as a discriminating material.
  • the width of the back porch of No. 8 is 24 lines. Since the back porch 14 has a width of 23 lines, both can be identified. As described above, by using both the detection of the horizontal synchronization signal width and the detection of the vertical back porch width, it is possible to correctly identify a signal that is difficult to identify only by detecting the horizontal synchronization signal width.
  • the vertical sync signal width is 6 lines
  • the difference between which the horizontal sync signal width is minimized is 73 [nSec], so that it can be identified using the horizontal sync signal width. Even if the number of lines of the pouch is used, each signal can be identified.
  • a signal whose vertical sync signal width is 6 lines is No. 4, no. 5, no. 10, no. 11, no. Since the vertical back porch width is 29 lines, 18 lines, 13 lines, 21 lines, and 25 lines in this order, these signals can be identified only by the vertical back porch width.
  • the vertical back porch width detection circuit need only be 5 bits wide and can be easily configured.
  • the horizontal synchronizing signal is used as the counting clock, there is an advantage that it can be driven at a relatively low frequency and power consumption can be reduced.
  • the frequency of the reference clock can be set lower than that in the first embodiment, power consumption can be reduced.
  • circuit components having a low operating frequency can be employed as peripheral devices, cost reduction can be achieved.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • General Health & Medical Sciences (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

L'invention concerne une unité d'entrée (200) qui sépare un signal d'entrée comprenant un signal de synchronisation et un signal vidéo en le signal de synchronisation et le signal vidéo. A partir du signal de synchronisation séparé, une unité de détection (300) détecte le nombre de lignes vidéo, la fréquence de synchronisation verticale, la largeur du signal de synchronisation verticale, et la largeur du signal de synchronisation horizontale. Une unité de détermination (400) détermine le rapport de dimensions du signal vidéo sur la base du nombre détecté de lignes vidéo, de la fréquence de synchronisation verticale, de la largeur du signal de synchronisation verticale et de la largeur du signal de synchronisation horizontale.
PCT/JP2013/063915 2013-05-20 2013-05-20 Dispositif d'identification de signal vidéo, dispositif d'affichage vidéo, procédé d'identification de signal vidéo et procédé d'affichage vidéo WO2014188481A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2013/063915 WO2014188481A1 (fr) 2013-05-20 2013-05-20 Dispositif d'identification de signal vidéo, dispositif d'affichage vidéo, procédé d'identification de signal vidéo et procédé d'affichage vidéo
JP2015517938A JP6099165B2 (ja) 2013-05-20 2013-05-20 映像信号判定装置、映像表示装置、映像信号判定方法および映像表示方法

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PCT/JP2013/063915 WO2014188481A1 (fr) 2013-05-20 2013-05-20 Dispositif d'identification de signal vidéo, dispositif d'affichage vidéo, procédé d'identification de signal vidéo et procédé d'affichage vidéo

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200826A (ja) * 1996-12-24 1998-07-31 Lg Electron Inc テレビジョンの自動アスペクト比検出方法及び補正装置
WO1999013450A1 (fr) * 1997-09-05 1999-03-18 Sony Corporation Procede et appareil d'affichage d'images
JP2002135681A (ja) * 2000-10-20 2002-05-10 Fujitsu General Ltd 映像表示装置
JP2007096875A (ja) * 2005-09-29 2007-04-12 Nec Viewtechnology Ltd 映像信号判定装置、映像表示装置、映像信号判定方法および映像表示方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200826A (ja) * 1996-12-24 1998-07-31 Lg Electron Inc テレビジョンの自動アスペクト比検出方法及び補正装置
WO1999013450A1 (fr) * 1997-09-05 1999-03-18 Sony Corporation Procede et appareil d'affichage d'images
JP2002135681A (ja) * 2000-10-20 2002-05-10 Fujitsu General Ltd 映像表示装置
JP2007096875A (ja) * 2005-09-29 2007-04-12 Nec Viewtechnology Ltd 映像信号判定装置、映像表示装置、映像信号判定方法および映像表示方法

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