WO2014086074A1

WO2014086074A1 - Method of fabricating cmos image sensor

Info

Publication number: WO2014086074A1
Application number: PCT/CN2012/087844
Authority: WO
Inventors: 李琛; 顾学强
Original assignee: 上海集成电路研发中心有限公司
Priority date: 2012-12-03
Filing date: 2012-12-28
Publication date: 2014-06-12
Also published as: CN102938410B; CN102938410A

Abstract

Disclosed is a method of fabricating a Complementary Metal-Oxide Semiconductor (CMOS) image sensor, comprising: providing a silicon on insulator (SOI) substrate, the SOI substrate comprising a thin-body silicon substrate, a thick-body silicon substrate, and a silicon dioxide layer; sequentially forming a photodiode region and a first metal bonding layer on the thin-body silicon substrate; stripping the thick-body silicon substrate along the silicon dioxide layer; providing a bulk silicon substrate, the bulk silicon substrate comprising a photodiode corresponding region and other circuit regions; sequentially forming a Poly-Silicon layer and at least one metal interconnection layer in the photodiode corresponding region on the bulk silicon substrate, and forming a second metal bonding layer above the metal interconnection layer on the top; and performing metal bonding between the first thin-body silicon substrate and the bulk silicon substrate. The present invention is simple in process and low in cost, and has found wide application in fabrication of CMOS image sensors of different pixels.

Description

CMOS image sensor manufacturing method

Technical field

The present invention relates to the field of image sensors, and in particular to a method of fabricating a CMOS image sensor. technical background

Image sensors are an important part of a digital camera. Depending on the component, it can be classified into two types: CCD (Charge Coupled Device) and CMOS (Complementary Metal-Oxide Semiconductor). One of the preconditions for CMOS sensors to be widely used is their higher sensitivity, shorter exposure times, and shrinking pixel sizes.

Among them, the pixel sensitivity of one of the important performance indicators of the CMOS image sensor is mainly determined by the product of the fill factor (the ratio of the photosensitive area to the entire pixel area) and the quantum efficiency (the number of electrons generated by the photons bombarding the screen). In CMOS image sensors, active pixels are used in CMOS image sensors in order to achieve noise levels and sensitivity levels comparable to those of CCD converters. However, the application of active pixels (pixel cells) inevitably leads to a reduction in the fill factor because a significant portion of the area of the pixel surface is occupied by the amplifier transistors, leaving less space available for the photodiodes. Therefore, an important research direction of today's CMOS sensors is to expand the fill factor.

The traditional CMOS image sensor uses the front side illumination (FSI, Front Side Illumination) technology, which is the front-illumination technology. As shown in Figure 1, the main feature of the front-illumination technology is the sequential fabrication of photodiodes, metal interconnect layers, and color filters on the front side of the wafer. The advantages are: simple process, and CMOS The process is fully compatible; the cost is lower; the color filter filling material has an adjustable refractive index; it is beneficial to increase the transmittance of incident light and reduce crosstalk. The front-illumination technology is a technology compatible with CMOS standard processes and is widely used in the production of various (especially large-pixel) CMOS image sensor chips. However, the fill factor and sensitivity of the front-illumination technique are generally low because the light first needs to pass through the upper metal interconnect layer to illuminate the underlying photodiode.

As the pixel size becomes smaller, it becomes more difficult to increase the fill factor. Another technique is to change from the conventional front-sensing type to the back-side illumination (BSI), which is a back-illumination technique. As shown in Figure 2, the main feature of the backlight technology is that the photodiode and the metal interconnection layer are first formed on the front side of the silicon wafer, and then the back surface of the silicon wafer is thinned (usually required to be thinned to 20 μm or less), and The most important through-silicon via technology (TSV, Through-Silicon-Via) of the back-sensing CMOS sensor interconnects the photodiodes. Through-silicon via technology is the latest technology for interconnecting chips by making vertical conduction between the chip and the chip, between the wafer and the wafer. Since the interconnect is placed on the back, the front is left to the photodiode, which achieves the largest possible fill factor. The advantage of the through-silicon via technology is that the incident light that is incident on the photodiode is not affected by the metal interconnection, the sensitivity is high, and the fill factor is high. However, the through-silicon via technology is more difficult, the requirements for the device are higher, and the cost is relatively high. Moreover, due to the limitation of the thinning process of ultra-thin silicon wafers, the general backlighting technique is applied to small pixel image sensors, such as small and medium pixel cameras of smart phones, and cannot be applied to image sensor manufacturing of large pixels. Summary of invention

To achieve the above object, the present invention provides a method of fabricating a CMOS image sensor, comprising the steps of: providing an SOI substrate comprising a thin bulk silicon substrate, a thick silicon substrate, and a silicon dioxide layer; sequentially forming a photodiode region and a first metal bonding layer on the thin silicon substrate; stripping the thick silicon substrate along the SiO 2 layer; providing a bulk silicon substrate, The bulk silicon substrate comprises a photodiode corresponding region and other circuit regions; a corresponding layer of the photodiode on the bulk silicon substrate sequentially forms a polysilicon layer, at least one metal interconnect layer, and forms a layer above the top metal interconnect layer a second metal bonding layer; and metal bonding the thin silicon substrate to the bulk silicon substrate.

Optionally, the step of performing metal bonding on the thin silicon substrate and the bulk silicon substrate comprises: inverting the thin silicon substrate; and the thin silicon substrate and the bulk silicon Substrate alignment; the thin bulk silicon substrate is metal bonded to the bulk silicon substrate by a metal bonding process.

Optionally, the step of aligning the thin bulk silicon substrate with the bulk silicon substrate comprises: forming a first alignment mark outside the photodiode region; forming outside the corresponding region of the photodiode a second alignment mark; aligning the thin bulk silicon substrate with the bulk silicon substrate by the first alignment mark and the second alignment mark.

Optionally, the step of aligning the first metal bonding layer with the second metal bonding layer comprises forming a first layer outside the photodiode region when forming the first metal bonding layer Aligning mark; forming a second alignment mark outside the corresponding area of the photodiode when forming the second metal bonding layer; passing the first alignment mark and the second alignment mark The thin bulk silicon substrate is aligned with the bulk silicon substrate.

Optionally, the first bonding layer and the second bonding layer comprise a Ti layer and an Au layer.

Alternatively, the first metal bonding layer and the second metal bonding layer are formed by vapor deposition of a metal film.

Optionally, the bonding time of the metal bonding of the thin silicon substrate to the bulk silicon substrate is Optionally, the CMOS image sensor manufacturing method further includes forming a read circuit, a control circuit, an interconnect, a drain, and a turn on other circuit regions of the bulk silicon substrate.

Optionally, the first metal bonding layer is interconnected with the photodiode region through the interconnect line, and the second metal bonding layer passes through the interconnect line and the bulk silicon substrate a top metal interconnect layer interconnect; a polysilicon region on the bulk silicon substrate, at least one metal interconnect layer being interconnected by the interconnect.

Optionally, the CMOS image sensor manufacturing method further comprises the steps of forming a color filter and forming a microlens above each of the color filters.

Optionally, the CMOS image sensor manufacturing method further comprises the steps of: drawing the wire into the wire to package the CMOS image sensor.

The beneficial effects of the present invention are that

(1) Using advanced process technology to fabricate the read circuit and control circuit with high requirements on the standard bulk silicon substrate, and fabricate the image sensor pixel unit on the SOI substrate in a low-cost micro-scale process, thus the image The fabrication of sensor pixel units saves a lot of process costs.

(2) By replacing the traditional front-illumination and back-illumination processes with the standard body silicon substrate and the SOI substrate metal bonding method, the incident light irradiated to the photodiode is not affected by the metal interconnection, and the sensitivity is higher, and the filling factor is higher. high. Compared with the back-illuminated CMOS image sensor manufacturing process, the pixel unit of the back-illuminated CMOS image sensor manufacturing process is realized under the premise of avoiding complicated and high-cost ultra-thin thinning process and through-silicon via technology. Fill factor performance. In addition, the present invention also breaks through the limitation that the back-illuminated CMOS image sensor manufacturing process can only be used for small and medium pixel sensors, and can be widely applied to various types of large-pixel CMOS image sensors. Country deletion

Fig. 1 is a cross-sectional view showing the structure of a front-illuminated CMOS image sensor in the prior art.

2 is a cross-sectional view showing a manufacturing method of a back-illuminated CMOS image sensor in the prior art. 3A to 3E are cross-sectional views showing a method of manufacturing a CMOS image sensor of the present invention.

In order to make the content of the present invention clearer and easier to understand, the contents of the present invention will be further described below in conjunction with the accompanying drawings. Of course, the invention is not limited to the specific embodiment, and general replacements well known to those skilled in the art are also encompassed within the scope of the invention.

A method for manufacturing a novel CMOS image sensor according to the present invention will be described below with reference to Figs. 3A to 3E.

Referring to FIG. 3A, first, a semiconductor substrate is provided. The semiconductor substrate is an SOI substrate, including a thin bulk silicon substrate 1, a thick silicon substrate 3, and a thin silicon substrate and a thick silicon substrate. A layer of silicon dioxide 2. Next, a photosensitive diode region 10 for light sensing is formed on the thin silicon substrate 1, and a first metal bonding layer (Metal X) 11 is formed over the photosensitive diode region. In this embodiment, the first formed The metal bonding layer 11 is interconnected with the photodiode region 10 for subsequent extraction of the photodiode electrical signals and connection of control signals. Since the size of the photodiode, that is, the pixel unit, is usually large, such as 5umX 5um, the above process on a standard SOI substrate can be completed only by micron-scale process equipment.

Next, referring to Fig. 3B, the thick silicon substrate is peeled off along the silicon dioxide layer, and the remaining thin silicon substrate 1 is used in the next process.

Please refer to FIG. 3C. Next, another standard bulk silicon substrate 4 is provided. The bulk silicon substrate 4 includes Photosensitive diode corresponding area and other circuit areas. A polysilicon layer 40 and one or more metal interconnection layers 41 are sequentially formed in the corresponding regions of the photodiode. The number of layers of the metal interconnection layer 41 formed in this embodiment is 3, and other circuits except the corresponding regions of the photodiodes are formed. The area forms a read circuit (such as an ADC), a control circuit (such as a digital connection, etc.), an interconnect, a 10, and a pad PAD43. The polysilicon layer 40, the first metal interconnect layer M1, the second metal interconnect layer M2, and the top metal interconnect layer M3 of the photodiode corresponding region are interconnected by interconnect lines. Since the read circuit example and the control circuit are generally affected by the process technology, such as the read circuit and the control circuit fabricated by the 55 nm process technology, the area and power consumption are superior to the O.lSum process technology. Therefore, it can be realized by advanced process technology.

Next, a second metal bonding layer (Metal Y) is formed over the corresponding region of the photoreceptor of the standard bulk silicon substrate 4, and the second metal bonding layer 42 and the top metal interconnect layer M3 are interconnected by interconnect lines.

The first metal bonding layer 11 and the second metal bonding layer 42 may be formed by vapor-depositing a metal film, and the preferred metal film may be a Ti film and an Au film. Specifically, the Ti film is evaporated first, and the Au film is evaporated. Since the Ti film has good adhesion, it can also serve as a diffusion barrier to prevent Au and bonding defects from entering the device. Of course, in other embodiments of the present invention, the metal film may be a Pt film, an In film, an In/Sn film, a Cu/Ti film, a Cr/Au film, or the like, and the present invention is not limited thereto.

Next, referring to FIG. 3D, the thin bulk silicon substrate 1 and the standard bulk silicon substrate 4 are metal bonded. Specifically, the thin silicon substrate 1 prepared with the photodiode 10 and the first metal bonding layer 11 described above is first inverted to prepare for the subsequent metal bonding process. The inverted thin bulk silicon substrate 1 is then aligned with the standard bulk silicon substrate 4. Preferably, the alignment method is performed by aligning the marks. Specifically, in the above manufacturing process, a first alignment mark is formed outside the photodiode region when the first metal bonding layer 11 is formed; and a photodiode is formed when the second metal bonding layer 42 is formed. A second alignment mark is formed outside the corresponding area of the tube, and then alignment is completed by aligning the first alignment mark and the second alignment mark. After aligning the thin bulk silicon substrate 1 with the standard bulk silicon substrate 4, the first metal bonding layer 11 on the thin bulk silicon substrate and the second metal on the standard bulk silicon substrate are bonded by a metal bonding process The bonding layer 42 corresponds to a bond. The metal bonding process may employ metal diffusion bonding or melting eutectic bonding techniques. In the present embodiment, the metal bonding process is completed by hot press annealing in a metal bonding apparatus, the annealing temperature is 420 ° C, and the annealing time is 30 to 120 minutes, so that the metal bonding layers are firmly bonded together. Of course, when the metal bonding layer material is other metals, the metal bonding conditions are also changed accordingly. In other embodiments, the bonding can also be accomplished directly by heat and pressure in a metal bonding apparatus, which is well known to those skilled in the art and will not be described herein. The bonding of the thin-body silicon substrate 1 to the standard bulk silicon substrate 4 is finally achieved by metal bonding to form a CMOS image sensor.

After the CMOS image sensor is formed, the electrical signal of the photodiode can be effectively extracted through the disk 43 on the standard bulk silicon substrate 4, and the CMOS image sensor is allowed to interact with the external power source and the control signal.

In addition, referring to FIG. 3E, the CMOS image sensor manufacturing method of the embodiment further includes forming a color filter (color filter) and a microlens above each photodiode region (ie, an image pixel unit) through a color filter process. Process, the step of forming a microlens (Micro Len) above each color filter.

Finally, the CMOS image sensor chip is packaged by using a conventional CMOS image sensor package technology to take the metal wire out of the disk 43.

In summary, the present invention replaces the conventional method by fabricating a photodiode on a thin silicon substrate, forming a read circuit, a control circuit, and the like on another standard silicon substrate, and bonding the two metals together. The illuminating and back-illuminated CMOS image sensor manufacturing process realizes the high fill factor performance of the pixel unit of the back-illuminated CMOS image sensor process. In addition, the present invention fabricates an image sensor pixel unit on a standard SOI substrate, which is simple in process, can be realized by a low-cost micro-scale process, and avoids high requirements on process equipment, thereby greatly reducing manufacturing of CMOS images. The cost of the sensor. On the other hand, the present invention also breaks through the limitation that the conventional back-illuminated process can only be used for small and medium pixel sensors, and can be widely applied to the manufacture of various (especially large pixel) CMOS image sensors.

The present invention has been described in terms of the preferred embodiments of the present invention. The present invention is not limited by the scope of the present invention. In the case of a number of changes and refinements, the scope of protection claimed in the present invention shall be as defined in the claims.

Claims

Rights request

A CMOS image sensor manufacturing method, comprising the steps of: providing an SOI substrate, the SOI substrate comprising a thin bulk silicon substrate, a thick silicon substrate, and a silicon dioxide layer;

Forming a photodiode region and a first metal bonding layer on the thin silicon substrate; peeling the thick silicon substrate along the silicon dioxide layer;

Providing a bulk silicon substrate, the bulk silicon substrate includes a photodiode corresponding region and other circuit regions; a photodiode corresponding region on the bulk silicon substrate sequentially forms a polysilicon layer, at least one metal interconnect layer, and Forming a second metal bonding layer over the top metal interconnect layer;

The thin bulk silicon substrate is metal bonded to the bulk silicon substrate.

2. The CMOS image sensor manufacturing method according to claim 1, wherein the step of metal bonding the thin silicon substrate to the bulk silicon substrate comprises:

Inverting the thin silicon substrate;

Aligning the thin bulk silicon substrate with the bulk silicon substrate;

The thin bulk silicon substrate is metal bonded to the bulk silicon substrate by a metal bonding process.

3. The CMOS image sensor manufacturing method according to claim 2, wherein the step of aligning the thin silicon substrate with the bulk silicon substrate comprises:

Forming a first alignment mark outside the photodiode region;

Forming a second alignment mark outside the corresponding region of the photodiode;

The thin bulk silicon substrate is aligned with the bulk silicon substrate by the first alignment mark and the second alignment mark.

4. The CMOS image sensor manufacturing method according to claim 1, wherein the first bonding layer and the second bonding layer comprise a Ti layer and an Au layer.

The CMOS image sensor manufacturing method according to claim 4, wherein the first metal bonding layer and the second metal bonding layer are formed by vapor deposition of a metal film.

6. The CMOS image sensor manufacturing method according to claim 1, wherein: The bonding time of the metal bonding of the thin silicon substrate to the bulk silicon substrate is 30 to 120 minutes, and the bonding temperature is 420 °C.

The CMOS image sensor manufacturing method according to claim 1, wherein the manufacturing method further comprises:

Read circuits, control circuits, interconnect lines, 10 and pads are formed in other circuit regions of the bulk silicon substrate.

8. The CMOS image sensor manufacturing method according to claim 7, wherein the first metal bonding layer is interconnected with the photodiode region through the interconnect line, the second metal bonding layer Interconnecting with a top metal interconnect layer on the bulk silicon substrate through the interconnect; a polysilicon region on the bulk silicon substrate, at least one metal interconnect layer being interconnected by the interconnect.

9. The CMOS image sensor manufacturing method according to claim 1, further comprising the step of forming a color filter and forming a microlens over each of the color filters.

10. The method of fabricating a CMOS image sensor according to claim 1, further comprising the step of conducting the metal wire from the disk to package the CMOS image sensor.