CN110246857A - Imaging sensor and forming method thereof - Google Patents
Imaging sensor and forming method thereof Download PDFInfo
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- CN110246857A CN110246857A CN201910538543.1A CN201910538543A CN110246857A CN 110246857 A CN110246857 A CN 110246857A CN 201910538543 A CN201910538543 A CN 201910538543A CN 110246857 A CN110246857 A CN 110246857A
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- 238000003384 imaging method Methods 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 30
- 229910052751 metal Inorganic materials 0.000 claims abstract description 123
- 239000002184 metal Substances 0.000 claims abstract description 123
- 239000000463 material Substances 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 11
- 238000012856 packing Methods 0.000 claims abstract description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 14
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 7
- 239000007769 metal material Substances 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 116
- 235000012431 wafers Nutrition 0.000 description 105
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 239000010931 gold Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14627—Microlenses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
Abstract
A kind of imaging sensor and forming method thereof, which comprises provide pixel wafer and logic wafer, the front of the pixel wafer has top layer pixel metal interconnection structure, and the front of the logic wafer has top-level logic metal interconnection structure；The front in front and logic wafer to the pixel wafer is bonded, so that top layer pixel metal interconnection structure is contacted with top-level logic metal interconnection structure；The pixel wafer is performed etching from the back side of the pixel wafer, to form TSV trench, the TSV trench exposes the top layer pixel metal interconnection structure；Into the TSV trench, packing material is to form TSV structure；Filter and lens arrangement are formed at the back side of the pixel wafer.The present invention program helps avoid damage filter and lens arrangement when removal mask layer, to improve the quality of imaging sensor.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors more particularly to a kind of imaging sensor and forming method thereof.
Background technique
Imaging sensor is the core component of picture pick-up device, realizes image taking function by converting optical signals into electric signal
Energy.By taking cmos image sensor (CMOS Image Sensors, CIS) device as an example, due to its tool
There is the advantages of low-power consumption and high s/n ratio, therefore is widely applied in various fields.
3 dimension stacking-type (3D-Stack) CIS are developed, to support the demand to higher quality image.Specifically,
3D-Stack CIS can make logic wafer and pixel wafer respectively, so by the logic wafer front with
And the front bonding of the pixel wafer, since pixel portion and logic circuitry portions are mutually indepedent, high image quality can be directed to
Demand pixel portion is optimized, logic circuitry portions are optimized for high performance demand.
In a kind of existing 3D-Stack CIS, after being bonded to pixel wafer and logic wafer, it is initially formed
Filter and lens arrangement, then filter and lens arrangement are protected using mask layer, and exposes positioned at deep trouth
Interior bond pads, and then remove mask layer.
However during removing mask layer, it is easy to damage filter and lens arrangement.
Summary of the invention
The technical problem to be solved by the present invention is to provide a kind of imaging sensors and forming method thereof, help avoid removal and cover
Filter and lens arrangement are damaged when film layer, to improve the quality of imaging sensor.
In order to solve the above technical problems, the embodiment of the present invention provides a kind of forming method of imaging sensor, comprising: provide
The front of pixel wafer and logic wafer, the pixel wafer has top layer pixel metal interconnection structure, the logic wafer
Front has top-level logic metal interconnection structure；The front in front and logic wafer to the pixel wafer is bonded, with
Contact top layer pixel metal interconnection structure with top-level logic metal interconnection structure；From the back side of the pixel wafer to the picture
Plain wafer performs etching, and to form TSV trench, the TSV trench exposes the top layer pixel metal interconnection structure；To described
Packing material is in TSV trench to form TSV structure；Filter and lens arrangement are formed at the back side of the pixel wafer.
Optionally, before the back side of the pixel wafer forms filter and lens arrangement, the image sensing
The forming method of device further include: form bond pads at the back side of pixel wafer, the bond pads are connect with TSV structure；Its
In, there is pre-determined distance between the bond pads and the filter and lens arrangement.
Optionally, forming bond pads at the back side of pixel wafer includes: to form gasket material at the back side of pixel wafer
Layer；Patterned mask layer is formed on the surface of the cushioning material layer；Using the mask layer as exposure mask, to the gasket material
Layer is performed etching to form the bond pads；Wherein, the material of the mask layer is selected from positive photoresist and negative photoresist, the filter
The material of Look mirror and lens arrangement includes negative photoresist.
Optionally, the top layer pixel metal interconnection structure include top layer pixel metal layer and with top layer pixel gold
Belong to the pixel plug of layer connection, the top-level logic metal interconnection structure includes top-level logic metal layer and patrols with the top layer
Collect the logic plug of metal layer connection；The front in front and logic wafer to the pixel wafer is bonded, so that top layer
It includes: front and logic wafer to the pixel wafer that pixel metal interconnection structure is contacted with top-level logic metal interconnection structure
Front be bonded so that the pixel plug is contacted with the logic plug.
Optionally, the longitudinal section of the pixel plug is T-type；And/or the longitudinal section of the logic plug is T-type；Its
In, the surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the pixel wafer.
Optionally, in Xiang Suoshu TSV trench packing material with formed TSV structure include: into the TSV trench fill gold
Belong to material to form TSV structure；Wherein, the metal material includes tungsten.
In order to solve the above technical problems, the embodiment of the present invention provides a kind of imaging sensor, comprising: pixel wafer and logic
The front of wafer, the pixel wafer has top layer pixel metal interconnection structure, and the front of the logic wafer is patrolled with top layer
Metal interconnection structure is collected, and the front bonding in the front of the pixel wafer and logic wafer, the top layer pixel metal interconnect
Structure is contacted with top-level logic metal interconnection structure；TSV trench, the TSV trench are located at the back side of the pixel wafer, and sudden and violent
Expose the top layer pixel metal interconnection structure；TSV structure is located in the TSV trench；Filter and lens arrangement, position
In the back side of the pixel wafer.
Optionally, the imaging sensor further include: bond pads, positioned at the back side of the pixel wafer, the key
Liner is closed to connect with TSV structure；Wherein, have between the bond pads and the filter and lens arrangement it is default away from
From.
Optionally, the top layer pixel metal interconnection structure include top layer pixel metal layer and with top layer pixel gold
Belong to the pixel plug of layer connection, the top-level logic metal interconnection structure includes top-level logic metal layer and patrols with the top layer
Collect the logic plug of metal layer connection；Wherein, the pixel plug is contacted with the logic plug.
Optionally, the longitudinal section of the pixel plug is T-type；And/or the longitudinal section of the logic plug is T-type；Its
In, the surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the pixel wafer.
Compared with prior art, the technical solution of the embodiment of the present invention has the advantages that
In embodiments of the present invention, pixel wafer and logic wafer are provided, the front of the pixel wafer has top layer picture
The front of plain metal interconnection structure, the logic wafer has top-level logic metal interconnection structure；Just to the pixel wafer
Face and the front of logic wafer are bonded, so that top layer pixel metal interconnection structure connects with top-level logic metal interconnection structure
Touching；The pixel wafer is performed etching from the back side of the pixel wafer, to form TSV trench, the TSV trench exposes
The top layer pixel metal interconnection structure；Into the TSV trench, packing material is to form TSV structure；In the pixel wafer
The back side form filter and lens arrangement.Using the above scheme, it is initially formed TSV structure, re-forms filter and lens knot
Structure re-forms TSV structure compared to filter and lens arrangement is initially formed, and helps avoid damaging colour filter when removal mask layer
Mirror and lens arrangement help to improve the quality of imaging sensor.
Further, it is contacted due to the top layer pixel metal interconnection structure with top-level logic metal interconnection structure, only
Need forming TSV structure from the back side of the pixel wafer to top layer pixel metal layer, compared with the prior art in need
The multiple TSV structures for being respectively connected to top layer pixel metal interconnection structure or top-level logic metal interconnection structure are formed, cause to deposit
In a variety of TSV structure depth, using the scheme of the embodiment of the present invention, the depth of TSV structure is single and depth value is smaller, technique letter
It is single, and help to reduce cost.
Detailed description of the invention
Fig. 1 to Fig. 3 is the corresponding device profile knot of each step in a kind of forming method of imaging sensor in the prior art
Structure schematic diagram；
Fig. 4 is a kind of flow chart of the forming method of imaging sensor in the embodiment of the present invention；
Fig. 5 to Fig. 9 is that the corresponding device of each step cuts open in a kind of forming method of imaging sensor in the embodiment of the present invention
Face structural schematic diagram.
Specific embodiment
In a kind of existing 3D-Stack CIS, after being bonded to pixel wafer and logic wafer, it is initially formed
Filter and lens arrangement, then filter and lens arrangement are protected using mask layer, and exposes positioned at deep trouth
Interior bond pads, and then remove mask layer.However during removing mask layer, it is easy to damage filter and lens knot
Structure.
Fig. 1 to Fig. 3 is the corresponding device profile knot of each step in a kind of forming method of imaging sensor in the prior art
Structure schematic diagram
Referring to Fig.1, pixel wafer 120 and logic wafer 100 are provided, the front and logic to the pixel wafer 120 are brilliant
The front of circle 100 is bonded.
Wherein, it can have photodiode 121 in the pixel wafer 120, the front of the pixel wafer 120 can be with
With pixel metal interconnecting layer 130, the front of the logic wafer 100 can have logic metal interconnecting layer 110.
It can have pixel metal interconnection structure 131 and bond pads 170 in the pixel metal interconnecting layer 130, need
It is noted that the bond pads 170 can be formed together during forming metal interconnection structure 131.
It can have logic metal interconnection structure 111 in the logic metal interconnecting layer 110.
Further, filter 151 and lens arrangement 152 can be formed at the back side of the pixel wafer 120.
Referring to Fig. 2, patterned mask layer 161 is formed, the mask layer 161 covers filter 151 and lens arrangement
152, it is exposure mask with the mask layer 161, the pixel wafer 120 is performed etching, forms bond pads groove 141.
Wherein, the bond pads groove 141 exposes the bond pads 170, so that the conducting wire of peripheral circuit can
To be connected via the bond pads 170 exposed.
Referring to Fig. 3, removal mask layer 161 (referring to Fig. 2).
The present inventor has found after study, in specific implementation, due to mask layer 161, filter 151 and thoroughly
The conventional material of mirror structure 152 is more close, such as can be photoresist class material, therefore in the process of removal mask layer 161
In, it is easy to damage filter 151 and lens arrangement 152.
In embodiments of the present invention, pixel wafer and logic wafer are provided, the front of the pixel wafer has top layer picture
The front of plain metal interconnection structure, the logic wafer has top-level logic metal interconnection structure；Just to the pixel wafer
Face and the front of logic wafer are bonded, so that top layer pixel metal interconnection structure connects with top-level logic metal interconnection structure
Touching；The pixel wafer is performed etching from the back side of the pixel wafer, to form TSV trench, the TSV trench exposes
The top layer pixel metal interconnection structure；Into the TSV trench, packing material is to form TSV structure；In the pixel wafer
The back side form filter and lens arrangement.Using the above scheme, it is initially formed TSV structure, re-forms filter and lens knot
Structure, it is possible to reduce after forming filter and lens arrangement, a possibility that forming mask layer on filter and lens arrangement,
Damage filter and lens arrangement, help to improve the quality of imaging sensor when to help avoid removal mask layer.
It is understandable to enable above-mentioned purpose of the invention, feature and beneficial effect to become apparent, with reference to the accompanying drawing to this
The specific embodiment of invention is described in detail.
Referring to Fig. 4, Fig. 4 is a kind of flow chart of the forming method of imaging sensor, described image in the embodiment of the present invention
The forming method of sensor may include step S41 to step S45:
Step S41: providing pixel wafer and logic wafer, and the front of the pixel wafer is interconnected with top layer pixel metal
The front of structure, the logic wafer has top-level logic metal interconnection structure；
Step S42: the front in front and logic wafer to the pixel wafer is bonded, so that top layer pixel metal
Interconnection structure is contacted with top-level logic metal interconnection structure；
Step S43: performing etching the pixel wafer from the back side of the pixel wafer, described to form TSV trench
TSV trench exposes the top layer pixel metal interconnection structure；
Packing material is in S44: Xiang Suoshu TSV trench of step to form TSV structure；
Step S45: filter and lens arrangement are formed at the back side of the pixel wafer.
Above-mentioned each step is illustrated below with reference to Fig. 5 to Fig. 9.
Fig. 5 to Fig. 9 is that the corresponding device of each step cuts open in a kind of forming method of imaging sensor in the embodiment of the present invention
Face structural schematic diagram.
Referring to Fig. 5, logic wafer 200 is provided, the front of the logic wafer 200 can have logic metal interconnecting layer
210, it can have logic metal interconnection structure in the logic metal interconnecting layer 210, in the logic metal interconnection structure
Top-level logic metal interconnection structure may include top-level logic metal layer 211 and connect with the top-level logic metal layer 211
Logic plug 212.
Specifically, multiple logical device (not shown) be can have in the logic wafer 200.Wherein, the logic device
Part may include the device of the transistors such as gate structure and source and drain doping area.It should be pointed out that in embodiments of the present invention,
For specific logical device composition with no restriction.
The logic metal interconnection structure may include more metal layers, can pass through through-hole between the more metal layers
It connects and passes through interlayer dielectric layer and separate.
Specifically, the longitudinal section of the logic plug 212 can be T-type, thus facilitate in the subsequent process with pixel
Plug realizes contact.Wherein, surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the logic wafer 200.
Referring to Fig. 6, pixel wafer 220 is provided, the front of the pixel wafer 220 can have pixel metal interconnecting layer
230, it can have pixel metal interconnection structure in the pixel metal interconnecting layer 230, in the pixel metal interconnection structure
Top layer pixel metal interconnection structure may include top layer pixel metal layer 231 and connect with the top layer pixel metal layer 231
Pixel plug 232.
Specifically, multiple pixel devices be can have in the pixel wafer 220.
Wherein, the pixel device may include photodiode (Photo Diode, PD) 221 and pixel circuit,
In, the pixel circuit may include forming selection transistor (Select Transistor), reset transistor (Reset
Transistor) and source with the various transistors appropriate such as transistor (Source Follower Transistor) device
Part, for example, may include transmission grid (Transfer Gate, TG) and floating diffusion region (Floating Diffusion,
FD).It should be pointed out that in embodiments of the present invention, for specific pixel circuit composition with no restriction.
The pixel metal interconnection structure may include more metal layers, can pass through through-hole between the more metal layers
It connects and passes through interlayer dielectric layer and separate.
Specifically, the longitudinal section of the pixel plug 232 can be T-type, thus facilitate in the subsequent process with logic
Plug 212 realizes contact.Wherein, surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the pixel wafer 220.
Referring to Fig. 7, the front in front and logic wafer 200 to the pixel wafer 220 is bonded, so that top layer picture
Plain metal interconnection structure is contacted with top-level logic metal interconnection structure.
Further, the front to the pixel wafer 220 and the front of logic wafer 200 are bonded, so that top layer
Pixel metal interconnection structure contacts include the steps that may include: to the pixel wafer with top-level logic metal interconnection structure
220 front and the front of logic wafer 200 are bonded, so that the pixel plug 232 connects with the logic plug 212
Touching.
In embodiments of the present invention, it is contacted by setting pixel plug 232 with the logic plug 212, picture may be implemented
The electrical connection of plain wafer 220 and logic wafer 200, to facilitate the electric property that 3D-Stack CIS is better achieved.
Further, patterned mask layer 261 is formed at the back side of the pixel wafer 220, using the mask layer
261 pairs of pixel wafers 220 perform etching, and to form TSV trench 241, the TSV trench 241 exposes the top layer picture
Plain metal interconnection structure, namely expose the top layer pixel metal layer 231.
Referring to Fig. 8, packing material is in Xiang Suoshu TSV trench 241 to form TSV structure 271, in the back of pixel wafer 220
Face forms bond pads 272, and the bond pads 272 are connect with TSV structure 271.
Specifically, the material filled in Xiang Suoshu TSV trench 241 can be metal material, such as can be selected from: tungsten, aluminium,
Copper, titanium, cobalt, silver, gold and platinum.
It preferably, can be using filling in tungsten (W) Xiang Suoshu TSV trench 241, to realize preferable electric property.
It should be pointed out that in the prior art, when the top layer pixel metal interconnection structure and top-level logic metal are mutual
When linking structure separation, need to be respectively connected to top layer pixel metal interconnection structure or top-level logic metal using multiple TSV structures
Interconnection structure causes there are a variety of TSV structure depth, and craft precision is difficult to control, and process flow is complicated.
In embodiments of the present invention, it is connect due to the top layer pixel metal interconnection structure with top-level logic metal interconnection structure
Touching, therefore only need forming the TSV structure 271 from the back side of the pixel wafer 220 to top layer pixel metal layer 231, phase
Than being respectively connected to top layer pixel metal interconnection structure or top-level logic metal interconnection structure in needing to form in the prior art
Multiple TSV structures cause there are a variety of TSV structure depth, using the scheme of the embodiment of the present invention, the depth list of TSV structure 271
One and depth value it is smaller, simple process, and help to reduce cost.
In embodiments of the present invention, it is initially formed TSV structure 271, re-forms filter and lens arrangement, compared to being initially formed
Filter and lens arrangement re-form TSV structure 271, help avoid damage filter and lens arrangement when removal mask layer,
Help to improve the quality of imaging sensor.
Further, the forming method of described image sensor can also include the processing step for forming bond pads 272.
It specifically, may include: in pixel wafer 220 the step of the back side of pixel wafer 220 forms bond pads 272
The back side formed cushioning material layer；Patterned mask layer 262 is formed on the surface of the cushioning material layer；With the mask layer
262 be exposure mask, is performed etching to the cushioning material layer to form the bond pads 272；Wherein, the mask layer 262
Material is selected from positive photoresist and negative photoresist, and the material of the filter and lens arrangement includes negative photoresist.
In embodiments of the present invention, due to the material of mask layer 262 be selected from positive photoresist and negative photoresist, the filter with
And it can be photoresist that the material of lens arrangement, which includes the material of negative photoresist namely mask layer 262 and filter, lens arrangement,
Class material, compared with the prior art in be initially formed filter, lens arrangement, re-form mask layer, and then remove mask layer to cause
Filter, lens arrangement are easy to be damaged, and using the scheme of the embodiment of the present invention, bond pads 272 are initially formed, then in subsequent work
Filter and lens arrangement are formed in skill, so as to further avoid the technique of removal mask layer 262 to filter and
The influence of lens arrangement.
Further, the material of the bond pads 272 can be metallic aluminium (Al), padded with forming aluminium, can also be
Other gasket materials appropriate.
Referring to Fig. 9, filter 251 and lens arrangement 252 are formed at the back side of the pixel wafer.
Wherein, can have between the bond pads 272 and the filter 251 and lens arrangement 252 it is default away from
From.
In embodiments of the present invention, by being initially formed TSV structure 271 and bond pads 272, filter 251 is re-formed
And lens arrangement 252, damage filter 251 and lens arrangement 252 when removal mask layer are helped avoid, is helped to improve
The quality of imaging sensor.
In embodiments of the present invention, a kind of imaging sensor is also disclosed, referring to Fig. 9, described image sensor be can wrap
Include: the front of pixel wafer 220 and logic wafer 200, the pixel wafer 220 has top layer pixel metal interconnection structure, institute
The front for stating logic wafer 200 has top-level logic metal interconnection structure, and the front of the pixel wafer 220 and logic wafer
200 front bonding, the top layer pixel metal interconnection structure are contacted with top-level logic metal interconnection structure；TSV trench, it is described
TSV trench is located at the back side of the pixel wafer 220, and exposes the top layer pixel metal interconnection structure；TSV structure 271,
In the TSV trench；Filter 251 and lens arrangement 252, positioned at the back side of the pixel wafer 220.
Further, described image sensor can also include: bond pads 272, positioned at the back of the pixel wafer 220
Face, the bond pads 272 are connect with TSV structure 271；Wherein, the bond pads 272 are with the filter 251 and thoroughly
It can have pre-determined distance between mirror structure 252.
Further, the top layer pixel metal interconnection structure may include top layer pixel metal layer 231 and with it is described
The pixel plug 232 that top layer pixel metal layer 231 connects, the top-level logic metal interconnection structure may include top-level logic gold
The logic plug 212 for belonging to layer 212 and being connect with the top-level logic metal layer 212；Wherein, the pixel plug 232 and institute
State the contact of logic plug 212.
Further, the longitudinal section of the pixel plug 232 can be T-type；And/or the vertical of the logic plug 212 cuts
Face can be T-type；Wherein, surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the pixel wafer 220.
The pass above and shown in Fig. 4 to Fig. 9 is please referred to about the principle of the imaging sensor, specific implementation and beneficial effect
In the associated description of the forming method of imaging sensor, details are not described herein again.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (10)
1. a kind of forming method of imaging sensor characterized by comprising
Pixel wafer and logic wafer are provided, the front of the pixel wafer has top layer pixel metal interconnection structure, described to patrol
The front for collecting wafer has top-level logic metal interconnection structure；
The front in front and logic wafer to the pixel wafer is bonded, so that top layer pixel metal interconnection structure and top
Layer logic metal interconnection structure contact；
The pixel wafer is performed etching from the back side of the pixel wafer, to form TSV trench, the TSV trench exposure
The top layer pixel metal interconnection structure out；
Into the TSV trench, packing material is to form TSV structure；
Filter and lens arrangement are formed at the back side of the pixel wafer.
2. the forming method of imaging sensor according to claim 1, which is characterized in that at the back side of the pixel wafer
It is formed before filter and lens arrangement, further includes:
Bond pads are formed at the back side of pixel wafer, the bond pads are connect with TSV structure；
Wherein, there is pre-determined distance between the bond pads and the filter and lens arrangement.
3. the forming method of imaging sensor according to claim 2, which is characterized in that formed at the back side of pixel wafer
Bond pads include:
Cushioning material layer is formed at the back side of pixel wafer；
Patterned mask layer is formed on the surface of the cushioning material layer；
Using the mask layer as exposure mask, the cushioning material layer is performed etching to form the bond pads；
Wherein, the material of the mask layer is selected from positive photoresist and negative photoresist, the material packet of the filter and lens arrangement
Include negative photoresist.
4. the forming method of imaging sensor according to claim 1, which is characterized in that the top layer pixel metal interconnection
Structure includes top layer pixel metal layer and the pixel plug that connect with the top layer pixel metal layer, the top-level logic metal
Interconnection structure includes top-level logic metal layer and the logic plug that connect with the top-level logic metal layer；
The front in front and logic wafer to the pixel wafer is bonded, so that top layer pixel metal interconnection structure and top
Layer logic metal interconnection structure, which contacts, includes:
The front in front and logic wafer to the pixel wafer is bonded, so that the pixel plug and the logic are inserted
Plug contact.
5. the forming method of imaging sensor according to claim 4, which is characterized in that
The longitudinal section of the pixel plug is T-type；
And/or
The longitudinal section of the logic plug is T-type；
Wherein, surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the pixel wafer.
6. the forming method of imaging sensor according to claim 1, which is characterized in that filling in Xiang Suoshu TSV trench
Material includes: to form TSV structure
Metal material is filled into the TSV trench to form TSV structure；
Wherein, the metal material includes tungsten.
7. a kind of imaging sensor characterized by comprising
Pixel wafer and logic wafer, the front of the pixel wafer have top layer pixel metal interconnection structure, and the logic is brilliant
Round front has top-level logic metal interconnection structure, and the front bonding in the front of the pixel wafer and logic wafer, institute
Top layer pixel metal interconnection structure is stated to contact with top-level logic metal interconnection structure；
TSV trench, the TSV trench are located at the back side of the pixel wafer, and expose the top layer pixel metal and mutually link
Structure；
TSV structure is located in the TSV trench；
Filter and lens arrangement, positioned at the back side of the pixel wafer.
8. imaging sensor according to claim 7, which is characterized in that further include:
Bond pads, positioned at the back side of the pixel wafer, the bond pads are connect with TSV structure；
Wherein, there is pre-determined distance between the bond pads and the filter and lens arrangement.
9. imaging sensor according to claim 7, which is characterized in that the top layer pixel metal interconnection structure includes top
Layer pixel metal layer and the pixel plug being connect with the top layer pixel metal layer, the top-level logic metal interconnection structure packet
The logic plug for including top-level logic metal layer and being connect with the top-level logic metal layer；
Wherein, the pixel plug is contacted with the logic plug.
10. imaging sensor according to claim 9, which is characterized in that
The longitudinal section of the pixel plug is T-type；
And/or
The longitudinal section of the logic plug is T-type；
Wherein, surface of the direction of the longitudinal section perpendicular to the semiconductor substrate of the pixel wafer.
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Application publication date: 20190917 |