CN117276294A - Backside illuminated image sensor and method of forming the same - Google Patents
Backside illuminated image sensor and method of forming the same Download PDFInfo
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- CN117276294A CN117276294A CN202210672570.XA CN202210672570A CN117276294A CN 117276294 A CN117276294 A CN 117276294A CN 202210672570 A CN202210672570 A CN 202210672570A CN 117276294 A CN117276294 A CN 117276294A
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 238000002955 isolation Methods 0.000 claims abstract description 53
- 230000002093 peripheral effect Effects 0.000 claims abstract description 34
- 229910052751 metal Inorganic materials 0.000 claims description 35
- 239000002184 metal Substances 0.000 claims description 35
- 239000000463 material Substances 0.000 claims description 23
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 20
- 238000005530 etching Methods 0.000 claims description 9
- 230000032798 delamination Effects 0.000 claims description 8
- 230000008021 deposition Effects 0.000 abstract description 2
- 239000003989 dielectric material Substances 0.000 abstract description 2
- 239000007769 metal material Substances 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000006978 adaptation Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052755 nonmetal Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
The invention discloses a backside illuminated image sensor and a forming method thereof, wherein the method comprises the following steps: providing a substrate with a front surface and a back surface, wherein the substrate comprises a pixel area and a peripheral circuit area positioned at the periphery of the pixel area; forming a first groove on the back surface of the substrate of the peripheral circuit region; and forming at least one dielectric layer on the back of the substrate to fill the first groove, and forming a first groove isolation structure with a gap. The technical scheme of the invention is that a back deep trench isolation structure with a gap is formed on the back of a substrate of a back-illuminated image sensor, so that stress caused by back deposition of dielectric materials and/or metal materials is reduced.
Description
Technical Field
The present disclosure relates to integrated circuits, and more particularly, to a backside illuminated image sensor and a method for forming the same.
Background
The image sensor uses the photoelectric conversion function of the photoelectric device in the pixel array to convert the light image on the light sensitive surface into an electric signal in corresponding proportion to the light image, and then the electric signal is processed and stored by the peripheral circuit, so as to record the image information.
Compared with the traditional front-illuminated image sensor, the back-illuminated image sensor has the advantages that light cannot be blocked by the metal wiring layer, so that the light transmittance is greatly improved, and the image sensor has more excellent performance. However, in the manufacturing process of the backside illuminated image sensor, a large area of dielectric layer (such as silicon oxide, silicon nitride, high dielectric constant material, etc.) is often deposited on the light incident surface. These large area films inevitably introduce stress into the chip during deposition or subsequent high temperature processes. Stress can have a number of adverse effects, such as stress can cause variations in the forbidden bandwidth and mobility of silicon, resulting in variations in the speed of the basic device transistors of the circuit. In some cases, stress can also cause delamination from film to film, creating voids, and reliability problems. Therefore, there is a need to propose a simple and efficient way to mitigate the effect of stress on the performance of a backside illuminated image sensor.
Disclosure of Invention
Based on the above-described problems, the present invention provides a backside illuminated image sensor and a method of forming the same.
In a first aspect, the present invention provides a method for forming a backside illuminated image sensor, including: providing a substrate with a front surface and a back surface, wherein the substrate comprises a pixel area and a peripheral circuit area positioned at the periphery of the pixel area; forming a first groove on the back surface of the substrate of the peripheral circuit region; and forming at least one dielectric layer on the back of the substrate to fill the first groove, and forming a first groove isolation structure with a gap.
In some embodiments, the shape of the first trench includes at least one of an elongated shape, a mesh shape, a ring shape, a rectangular shape, or a hole shape.
In some embodiments, the at least one dielectric layer includes at least one high-k material layer, and the first trench isolation structure is configured to reduce delamination problems of the at least one dielectric layer.
In some embodiments, the at least one dielectric layer includes a first dielectric layer, a second dielectric layer, and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer.
In some embodiments, the first dielectric layer is silicon oxide; the third dielectric layer is silicon oxide.
In some embodiments, the at least one dielectric layer includes a second dielectric layer and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer; the third dielectric layer is silicon oxide.
In some embodiments, forming a first trench on a back side of the substrate of the peripheral circuit region includes: forming a patterned first mask layer on the back surface of the substrate; etching the back surface of the substrate, forming the first groove in the peripheral circuit region, and forming the second groove in the pixel region; the second groove is used for forming a second groove isolation structure between the photosensitive units of the pixel area.
In some embodiments, forming the first trench on the substrate backside of the peripheral circuit region further comprises: removing the first mask layer, and forming a patterned second mask layer on the back surface of the substrate; etching the back surface of the substrate, and forming a third groove on the back surface of the substrate of the peripheral circuit region; the third groove is used for forming a metal wire.
In some embodiments, forming at least one dielectric layer on the back surface of the substrate to fill the first trench, and forming the first trench isolation structure includes: removing the second mask layer; and sequentially forming a first dielectric layer, a second dielectric layer and a third dielectric layer on the back of the substrate to fill the first groove and the second groove, so as to form the first groove isolation structure and the second groove isolation structure.
In some embodiments, the first trench isolation structure and the second trench isolation structure have a hollow gap.
In some embodiments, the method for forming a backside illuminated image sensor further comprises: forming a metal layer on the back of the substrate; and etching the metal layer, and forming the metal wiring on the back surface in the third groove.
In some embodiments, the first trench isolation structure is disposed in an area other than the metal trace.
In a second aspect, the present invention provides an illuminated image sensor comprising: a substrate including a pixel region and a peripheral circuit region located at a periphery of the pixel region; the back surface of the substrate of the peripheral circuit region comprises a first trench isolation structure; the first trench isolation structure is filled with at least one dielectric layer and has a gap.
In some embodiments, the shape of the first trench isolation structure comprises at least one of an elongated shape, a mesh shape, a ring shape, a rectangular shape, or a hole shape.
In some embodiments, the at least one dielectric layer includes at least one high-k material layer, and the first trench isolation structure is configured to reduce delamination of the at least one dielectric layer.
In some embodiments, the at least one dielectric layer includes a first dielectric layer, a second dielectric layer, and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer.
In some embodiments, the first dielectric layer is silicon oxide; the third dielectric layer is silicon oxide.
In some embodiments, the substrate backside of the peripheral circuit region further comprises metal traces; and arranging the first trench isolation structure in a region outside the metal wire.
In some embodiments, the at least one dielectric layer includes a second dielectric layer and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer; the third dielectric layer is silicon oxide.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects: embodiments of the present invention provide for reducing stress due to backside deposited dielectric material and/or metal material by forming backside deep trench isolation structures with gaps on the backside of the substrate of a backside illuminated image sensor. The technical scheme of the invention is based on the existing process module of the back-illuminated image sensor, does not additionally increase the complexity and cost of the process, and can reduce the influence of the stress introduced in the process on the image performance of the back-illuminated image sensor.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
Fig. 1 is a flowchart illustrating a method for forming a backside illuminated image sensor according to an embodiment of the invention.
Fig. 2 to 12 are schematic cross-sectional views of a backside illuminated image sensor structure during a method of forming the backside illuminated image sensor.
Detailed Description
The following detailed description is exemplary and is intended to provide further explanation of the invention. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present invention. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the singular is "a," an, "and/or" the "when used in this specification is taken to mean" the presence of a feature, step, operation, device, component, and/or combination thereof.
Fig. 1 is a flowchart of a method for forming a backside illuminated image sensor according to an embodiment of the invention, which includes the following steps.
Step S1: a substrate having a front side and a back side is provided, the substrate including a pixel region and a peripheral circuit region located at a periphery of the pixel region.
Step S, 2: and forming a first groove on the back surface of the substrate of the peripheral circuit region.
Step S3: and forming at least one dielectric layer on the back of the substrate to fill the first groove, and forming a first groove isolation structure with a gap.
In a specific embodiment, the shape of the first groove includes at least one of an elongated shape, a mesh shape, a ring shape, a rectangular shape, or a hole shape.
In an embodiment, the at least one dielectric layer includes at least one high-k material layer, and the first trench isolation structure is configured to reduce delamination problems of the at least one dielectric layer.
In a specific embodiment, the at least one dielectric layer includes a first dielectric layer, a second dielectric layer, and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer.
In one embodiment, the first dielectric layer is silicon oxide; the third dielectric layer is silicon oxide.
In a specific embodiment, the at least one dielectric layer includes a second dielectric layer and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer; the third dielectric layer is silicon oxide.
In one embodiment, forming a first trench in a back surface of a substrate of the peripheral circuit region includes: forming a patterned first mask layer on the back surface of the substrate; etching the back surface of the substrate, forming the first groove in the peripheral circuit region, and forming the second groove in the pixel region; the second groove is used for forming a second groove isolation structure between the photosensitive units of the pixel area.
In a specific embodiment, forming the first trench on the back surface of the substrate of the peripheral circuit region further includes: removing the first mask layer, and forming a patterned second mask layer on the back surface of the substrate; etching the back surface of the substrate, and forming a third groove on the back surface of the substrate of the peripheral circuit region; the third groove is used for forming a metal wire.
In a specific embodiment, forming at least one dielectric layer on the back surface of the substrate to fill the first trench, and forming the first trench isolation structure includes: removing the second mask layer; and sequentially forming a first dielectric layer, a second dielectric layer and a third dielectric layer on the back of the substrate to fill the first groove and the second groove, so as to form the first groove isolation structure and the second groove isolation structure.
In a specific embodiment, the first trench isolation structure and the second trench isolation structure have a hollow gap.
In an embodiment, the method for forming a backside illuminated image sensor further includes: forming a metal layer on the back of the substrate; and etching the metal layer, and forming the metal wiring on the back surface in the third groove.
In one embodiment, the first trench isolation structure is disposed in a region other than the metal trace.
The method of forming the back-illuminated image sensor of fig. 1 is described in detail below with reference to the accompanying drawings.
Fig. 2 to 12 are schematic cross-sectional views of a backside-illuminated image sensor according to an embodiment of the present invention. The steps of the method for forming the backside illuminated image sensor of fig. 1 are described in detail below with reference to fig. 2 to 12.
Referring to fig. 2, a substrate 10 having a Front Side (FS) and a Back Side (BS) is provided. The substrate 10 includes a pixel region 10a and a peripheral circuit region 10b located at the periphery of the pixel region 10 a. The pixel region 10a of the front surface of the substrate 10 is formed with a photosensitive unit 11, i.e., an N-type or P-type doped region of a photodiode of the back-illuminated image sensor. In this embodiment, after the formation of the photosensitive cells 11, the formation of the front isolation structures (not shown in the drawings) of the photosensitive cells 11 may be continued by ion implantation or the like.
Referring to fig. 3, a metal interconnection layer 21 is formed on the front surface of a substrate 10, and the metal interconnection layer 21 is bonded to a carrier wafer 22. The metal interconnect layer 21 internally includes a metal interconnect structure 21a.
Referring to fig. 4, a patterned first mask layer 31 is formed on the back side of the substrate 10. Specifically, the first mask layer 31 may be a hard mask material, for example, one or more of silicon oxide, silicon nitride, silicon oxynitride, and the like. The first mask layer 31 may also be a photoresist.
Referring to fig. 5, the back surface of the substrate 10 is etched, the first trench 41 is formed in the peripheral circuit region 10b, and the second trench 42 is formed in the pixel region 10 a. In a specific embodiment, the shape of the first groove 41 may be an elongated shape, a grid shape, a ring shape, a rectangular shape, or a hole shape. The second trenches 42 are used to form second trench isolation structures 62a (shown in fig. 10) between the photosensitive cells 11 of the pixel region 10 a.
Referring to fig. 6, the first mask layer 31 is removed. For example, the first mask layer 31 may be removed by a wet process.
Referring to fig. 7, a patterned second mask layer 51 is formed on the back side of the substrate 10. Alternatively, the second mask layer 51 may be a photoresist material. Alternatively, the second mask layer 51 may be a hard mask material, for example, one or more of silicon oxide, silicon nitride, silicon oxynitride, and the like.
In particular embodiments, a dielectric layer (e.g., silicon oxide) may be grown or deposited to protect the substrate surfaces of first trenches 41 and second trenches 42 from contact with second mask layer 51 prior to forming patterned second mask layer 51 on the backside of substrate 10.
Referring to fig. 8, the back surface of the substrate 10 is etched to form a third trench 43 in the peripheral circuit region 10b. The third trench 43 is used to form a metal trace 70a (shown in fig. 12) on the back side.
Referring to fig. 9, the patterned second mask layer 51 is removed. For example, the second mask layer 51 may be removed by a wet process.
Referring to fig. 10, a dielectric layer 60 is formed on the back surface 10 of the substrate to fill the first trench 41, a first trench isolation structure 60a having a gap is formed in the peripheral circuit region 10b, and a second trench isolation structure 60b having a gap is formed in the pixel region 10 a. The dielectric layer 60 at least includes a high-k material layer, and the first trench isolation structure 60a is used for reducing delamination of the dielectric layer 60.
As shown in fig. 10, in this embodiment, the dielectric layer 60 may include a first dielectric layer 61, a second dielectric layer 62, and a third dielectric layer 63. In a specific embodiment, a first dielectric layer 61, a second dielectric layer 62 and a third dielectric layer 63 are sequentially formed on the back surface of the substrate 10 to fill the first trench 41 and the second trench 42, thereby forming a first trench isolation structure 60a and a second trench isolation structure 60b. The second dielectric layer 62 may be one or more layers of high-k materials, such as aluminum oxide, tantalum oxide, hafnium oxide, or the like, or a combination thereof. The first dielectric layer 61 and the third dielectric layer 61 may be silicon oxide.
In another embodiment, the first dielectric layer 61 may be omitted, and the first trench 41 and the second trench 42 may be filled directly through the second dielectric layer 62 and the third dielectric layer 63. It should be noted that other process steps, such as forming a Through Silicon Via (TSV), etc., may be further included in the formation process of the backside illuminated image sensor, and will not be described herein.
Referring to fig. 11, a metal layer 70 is formed on the back surface of the substrate 10. In a specific embodiment, the metal layer 70 may include a first metal layer 71 and a second metal layer 72. The first metal layer 71 may be tungsten. The second metal layer 72 may be aluminum.
Referring to fig. 12, the metal layer 70 is etched to form a metal trace 70a on the back side in the third trench 43. In one embodiment, a first trench isolation structure 60a may be disposed in a region between two adjacent backside metal traces 70a.
The embodiment of the invention also relates to a back-illuminated image sensor, which comprises: a substrate including a pixel region and a peripheral circuit region located at a periphery of the pixel region; the back surface of the substrate of the peripheral circuit region comprises a first trench isolation structure; the first trench isolation structure is filled with at least one dielectric layer and has a gap. In particular, reference may be made to the description with respect to fig. 2 to 12.
In some embodiments, the shape of the first trench isolation structure comprises an elongated shape, a mesh shape, a rectangular shape, or a hole shape.
In some embodiments, the at least one dielectric layer includes at least one high-k material layer, and the first trench isolation structure is configured to reduce delamination problems of the at least one dielectric layer.
In some embodiments, the at least one dielectric layer includes a first dielectric layer, a second dielectric layer, and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer.
In some embodiments, the substrate backside of the peripheral circuit region further comprises metal traces; and arranging the first trench isolation structure in the non-metal wiring area.
While the basic concepts have been described above, it will be apparent to those skilled in the art that the foregoing detailed disclosure is by way of example only and is not intended to be limiting. Although not explicitly described herein, various modifications, improvements and adaptations of the invention may occur to one skilled in the art. Such modifications, improvements, and modifications are intended to be suggested within the present disclosure, and therefore, such modifications, improvements, and adaptations are intended to be within the spirit and scope of the exemplary embodiments of the present disclosure.
It should be understood that the embodiments described herein are merely illustrative of the principles of the embodiments of the present invention. Other variations are also possible within the scope of the invention. Thus, by way of example, and not limitation, alternative configurations of embodiments of the invention may be considered in keeping with the teachings of the invention. Accordingly, the embodiments of the present invention are not limited to the embodiments explicitly described and depicted herein.
Claims (19)
1. A method for forming a backside illuminated image sensor, comprising:
providing a substrate having a front surface and a back surface, the substrate including a pixel region and a pixel region located on the image
A peripheral circuit region at the periphery of the pixel region;
forming a first groove on the back surface of the substrate of the peripheral circuit region;
and forming at least one dielectric layer on the back of the substrate to fill the first groove, and forming a first groove isolation structure with a gap.
2. The method of forming a backside illuminated image sensor of claim 1, wherein the shape of the first trench comprises at least one of an elongated shape, a grid shape, a ring shape, a rectangular shape, or a hole shape.
3. The method of claim 2, wherein the at least one dielectric layer comprises at least one high-k material layer, and the first trench isolation structure is configured to reduce delamination problems in the at least one dielectric layer.
4. The method of forming a backside illuminated image sensor of claim 3, wherein the at least one dielectric layer comprises a first dielectric layer, a second dielectric layer, and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer.
5. The method of claim 4, wherein the first dielectric layer is silicon oxide; the third dielectric layer is silicon oxide.
6. The method of forming a backside illuminated image sensor of claim 3, wherein the at least one dielectric layer comprises a second dielectric layer and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer; the third dielectric layer is silicon oxide.
7. The method of forming a backside illuminated image sensor of claim 4, wherein forming a first trench in a backside of a substrate of the peripheral circuit region comprises:
forming a patterned first mask layer on the back surface of the substrate;
etching the back surface of the substrate, forming the first groove in the peripheral circuit region, and forming the second groove in the pixel region; the second groove is used for forming a second groove isolation structure between the photosensitive units of the pixel area.
8. The method of forming a backside illuminated image sensor of claim 7,
forming a first trench in the back side of the substrate of the peripheral circuit region further comprises:
removing the first mask layer, and forming a patterned second mask layer on the back surface of the substrate;
etching the back surface of the substrate, and forming a third groove on the back surface of the substrate of the peripheral circuit region; the third groove is used for forming a metal wire.
9. The method of forming a backside illuminated image sensor of claim 8,
forming at least one dielectric layer on the back of the substrate to fill the first trench, wherein forming the first trench isolation structure comprises:
removing the second mask layer;
and sequentially forming a first dielectric layer, a second dielectric layer and a third dielectric layer on the back of the substrate to fill the first groove and the second groove, so as to form the first groove isolation structure and the second groove isolation structure.
10. The method of forming a backside illuminated image sensor of claim 9, wherein the first trench isolation structure and the second trench isolation structure have a hollow gap.
11. The method of forming a backside illuminated image sensor of claim 10, further comprising:
forming a metal layer on the back of the substrate;
and etching the metal layer, and forming the metal wiring on the back surface in the third groove.
12. The method of claim 11, wherein the first trench isolation structure is disposed in a region other than the metal trace.
13. A backside illuminated image sensor, comprising:
a substrate including a pixel region and a peripheral circuit region located at a periphery of the pixel region;
the back surface of the substrate of the peripheral circuit region comprises a first trench isolation structure; the first trench isolation structure is filled with at least one dielectric layer and has a gap.
14. The backside illuminated image sensor of claim 13, wherein the shape of the first trench isolation structure comprises at least one of an elongated shape, a mesh shape, a ring shape, a rectangular shape, or a hole shape.
15. The backside illuminated image sensor of claim 14, wherein the at least one dielectric layer comprises at least one high-k material layer, and the first trench isolation structure is configured to reduce delamination of the at least one dielectric layer.
16. The back-illuminated image sensor of claim 15, wherein the at least one dielectric layer comprises a first dielectric layer, a second dielectric layer, and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer.
17. The method of claim 16, wherein the first dielectric layer is silicon oxide; the third dielectric layer is silicon oxide.
18. The backside illuminated image sensor of claim 17, wherein the substrate backside of the peripheral circuit region further comprises metal traces; and arranging the first trench isolation structure in a region outside the metal wire.
19. The method of claim 18, wherein the at least one dielectric layer comprises a second dielectric layer and a third dielectric layer; the second dielectric layer is a high dielectric constant material layer; the third dielectric layer is silicon oxide.
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CN115347010A (en) * | 2022-09-21 | 2022-11-15 | 武汉新芯集成电路制造有限公司 | Backside illuminated image sensor |
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CN115347010A (en) * | 2022-09-21 | 2022-11-15 | 武汉新芯集成电路制造有限公司 | Backside illuminated image sensor |
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